1 //===-- UnwindAssemblyInstEmulation.cpp -----------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "UnwindAssemblyInstEmulation.h" 10 11 #include "lldb/Core/Address.h" 12 #include "lldb/Core/Disassembler.h" 13 #include "lldb/Core/DumpDataExtractor.h" 14 #include "lldb/Core/DumpRegisterValue.h" 15 #include "lldb/Core/FormatEntity.h" 16 #include "lldb/Core/PluginManager.h" 17 #include "lldb/Target/ExecutionContext.h" 18 #include "lldb/Target/Process.h" 19 #include "lldb/Target/Target.h" 20 #include "lldb/Target/Thread.h" 21 #include "lldb/Utility/ArchSpec.h" 22 #include "lldb/Utility/DataBufferHeap.h" 23 #include "lldb/Utility/DataExtractor.h" 24 #include "lldb/Utility/LLDBLog.h" 25 #include "lldb/Utility/Log.h" 26 #include "lldb/Utility/Status.h" 27 #include "lldb/Utility/StreamString.h" 28 29 using namespace lldb; 30 using namespace lldb_private; 31 32 LLDB_PLUGIN_DEFINE(UnwindAssemblyInstEmulation) 33 34 // UnwindAssemblyInstEmulation method definitions 35 36 bool UnwindAssemblyInstEmulation::GetNonCallSiteUnwindPlanFromAssembly( 37 AddressRange &range, Thread &thread, UnwindPlan &unwind_plan) { 38 std::vector<uint8_t> function_text(range.GetByteSize()); 39 ProcessSP process_sp(thread.GetProcess()); 40 if (process_sp) { 41 Status error; 42 const bool force_live_memory = true; 43 if (process_sp->GetTarget().ReadMemory( 44 range.GetBaseAddress(), function_text.data(), range.GetByteSize(), 45 error, force_live_memory) != range.GetByteSize()) { 46 return false; 47 } 48 } 49 return GetNonCallSiteUnwindPlanFromAssembly( 50 range, function_text.data(), function_text.size(), unwind_plan); 51 } 52 53 bool UnwindAssemblyInstEmulation::GetNonCallSiteUnwindPlanFromAssembly( 54 AddressRange &range, uint8_t *opcode_data, size_t opcode_size, 55 UnwindPlan &unwind_plan) { 56 if (opcode_data == nullptr || opcode_size == 0) 57 return false; 58 59 if (range.GetByteSize() > 0 && range.GetBaseAddress().IsValid() && 60 m_inst_emulator_up.get()) { 61 62 // The instruction emulation subclass setup the unwind plan for the first 63 // instruction. 64 m_inst_emulator_up->CreateFunctionEntryUnwind(unwind_plan); 65 66 // CreateFunctionEntryUnwind should have created the first row. If it 67 // doesn't, then we are done. 68 if (unwind_plan.GetRowCount() == 0) 69 return false; 70 71 const bool prefer_file_cache = true; 72 DisassemblerSP disasm_sp(Disassembler::DisassembleBytes( 73 m_arch, nullptr, nullptr, range.GetBaseAddress(), opcode_data, 74 opcode_size, 99999, prefer_file_cache)); 75 76 Log *log = GetLog(LLDBLog::Unwind); 77 78 if (disasm_sp) { 79 80 m_range_ptr = ⦥ 81 m_unwind_plan_ptr = &unwind_plan; 82 83 const uint32_t addr_byte_size = m_arch.GetAddressByteSize(); 84 const bool show_address = true; 85 const bool show_bytes = true; 86 m_inst_emulator_up->GetRegisterInfo(unwind_plan.GetRegisterKind(), 87 unwind_plan.GetInitialCFARegister(), 88 m_cfa_reg_info); 89 90 m_fp_is_cfa = false; 91 m_register_values.clear(); 92 m_pushed_regs.clear(); 93 94 // Initialize the CFA with a known value. In the 32 bit case it will be 95 // 0x80000000, and in the 64 bit case 0x8000000000000000. We use the 96 // address byte size to be safe for any future address sizes 97 m_initial_sp = (1ull << ((addr_byte_size * 8) - 1)); 98 RegisterValue cfa_reg_value; 99 cfa_reg_value.SetUInt(m_initial_sp, m_cfa_reg_info.byte_size); 100 SetRegisterValue(m_cfa_reg_info, cfa_reg_value); 101 102 const InstructionList &inst_list = disasm_sp->GetInstructionList(); 103 const size_t num_instructions = inst_list.GetSize(); 104 105 if (num_instructions > 0) { 106 Instruction *inst = inst_list.GetInstructionAtIndex(0).get(); 107 const lldb::addr_t base_addr = inst->GetAddress().GetFileAddress(); 108 109 // Map for storing the unwind plan row and the value of the registers 110 // at a given offset. When we see a forward branch we add a new entry 111 // to this map with the actual unwind plan row and register context for 112 // the target address of the branch as the current data have to be 113 // valid for the target address of the branch too if we are in the same 114 // function. 115 std::map<lldb::addr_t, std::pair<UnwindPlan::RowSP, RegisterValueMap>> 116 saved_unwind_states; 117 118 // Make a copy of the current instruction Row and save it in m_curr_row 119 // so we can add updates as we process the instructions. 120 UnwindPlan::RowSP last_row = unwind_plan.GetLastRow(); 121 UnwindPlan::Row *newrow = new UnwindPlan::Row; 122 if (last_row.get()) 123 *newrow = *last_row.get(); 124 m_curr_row.reset(newrow); 125 126 // Add the initial state to the save list with offset 0. 127 saved_unwind_states.insert({0, {last_row, m_register_values}}); 128 129 // cache the stack pointer register number (in whatever register 130 // numbering this UnwindPlan uses) for quick reference during 131 // instruction parsing. 132 RegisterInfo sp_reg_info; 133 m_inst_emulator_up->GetRegisterInfo( 134 eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp_reg_info); 135 136 // The architecture dependent condition code of the last processed 137 // instruction. 138 EmulateInstruction::InstructionCondition last_condition = 139 EmulateInstruction::UnconditionalCondition; 140 lldb::addr_t condition_block_start_offset = 0; 141 142 for (size_t idx = 0; idx < num_instructions; ++idx) { 143 m_curr_row_modified = false; 144 m_forward_branch_offset = 0; 145 146 inst = inst_list.GetInstructionAtIndex(idx).get(); 147 if (inst) { 148 lldb::addr_t current_offset = 149 inst->GetAddress().GetFileAddress() - base_addr; 150 auto it = saved_unwind_states.upper_bound(current_offset); 151 assert(it != saved_unwind_states.begin() && 152 "Unwind row for the function entry missing"); 153 --it; // Move it to the row corresponding to the current offset 154 155 // If the offset of m_curr_row don't match with the offset we see 156 // in saved_unwind_states then we have to update m_curr_row and 157 // m_register_values based on the saved values. It is happening 158 // after we processed an epilogue and a return to caller 159 // instruction. 160 if (it->second.first->GetOffset() != m_curr_row->GetOffset()) { 161 UnwindPlan::Row *newrow = new UnwindPlan::Row; 162 *newrow = *it->second.first; 163 m_curr_row.reset(newrow); 164 m_register_values = it->second.second; 165 // re-set the CFA register ivars to match the 166 // new m_curr_row. 167 if (sp_reg_info.name && 168 m_curr_row->GetCFAValue().IsRegisterPlusOffset()) { 169 uint32_t row_cfa_regnum = 170 m_curr_row->GetCFAValue().GetRegisterNumber(); 171 lldb::RegisterKind row_kind = 172 m_unwind_plan_ptr->GetRegisterKind(); 173 // set m_cfa_reg_info to the row's CFA reg. 174 m_inst_emulator_up->GetRegisterInfo(row_kind, row_cfa_regnum, 175 m_cfa_reg_info); 176 // set m_fp_is_cfa. 177 if (sp_reg_info.kinds[row_kind] == row_cfa_regnum) 178 m_fp_is_cfa = false; 179 else 180 m_fp_is_cfa = true; 181 } 182 } 183 184 m_inst_emulator_up->SetInstruction(inst->GetOpcode(), 185 inst->GetAddress(), nullptr); 186 187 if (last_condition != 188 m_inst_emulator_up->GetInstructionCondition()) { 189 if (m_inst_emulator_up->GetInstructionCondition() != 190 EmulateInstruction::UnconditionalCondition && 191 saved_unwind_states.count(current_offset) == 0) { 192 // If we don't have a saved row for the current offset then 193 // save our current state because we will have to restore it 194 // after the conditional block. 195 auto new_row = 196 std::make_shared<UnwindPlan::Row>(*m_curr_row.get()); 197 saved_unwind_states.insert( 198 {current_offset, {new_row, m_register_values}}); 199 } 200 201 // If the last instruction was conditional with a different 202 // condition then the then current condition then restore the 203 // condition. 204 if (last_condition != 205 EmulateInstruction::UnconditionalCondition) { 206 const auto &saved_state = 207 saved_unwind_states.at(condition_block_start_offset); 208 m_curr_row = 209 std::make_shared<UnwindPlan::Row>(*saved_state.first); 210 m_curr_row->SetOffset(current_offset); 211 m_register_values = saved_state.second; 212 // re-set the CFA register ivars to match the 213 // new m_curr_row. 214 if (sp_reg_info.name && 215 m_curr_row->GetCFAValue().IsRegisterPlusOffset()) { 216 uint32_t row_cfa_regnum = 217 m_curr_row->GetCFAValue().GetRegisterNumber(); 218 lldb::RegisterKind row_kind = 219 m_unwind_plan_ptr->GetRegisterKind(); 220 // set m_cfa_reg_info to the row's CFA reg. 221 m_inst_emulator_up->GetRegisterInfo(row_kind, row_cfa_regnum, 222 m_cfa_reg_info); 223 // set m_fp_is_cfa. 224 if (sp_reg_info.kinds[row_kind] == row_cfa_regnum) 225 m_fp_is_cfa = false; 226 else 227 m_fp_is_cfa = true; 228 } 229 bool replace_existing = 230 true; // The last instruction might already 231 // created a row for this offset and 232 // we want to overwrite it. 233 unwind_plan.InsertRow( 234 std::make_shared<UnwindPlan::Row>(*m_curr_row), 235 replace_existing); 236 } 237 238 // We are starting a new conditional block at the actual offset 239 condition_block_start_offset = current_offset; 240 } 241 242 if (log && log->GetVerbose()) { 243 StreamString strm; 244 lldb_private::FormatEntity::Entry format; 245 FormatEntity::Parse("${frame.pc}: ", format); 246 inst->Dump(&strm, inst_list.GetMaxOpcocdeByteSize(), show_address, 247 show_bytes, nullptr, nullptr, nullptr, &format, 0); 248 log->PutString(strm.GetString()); 249 } 250 251 last_condition = m_inst_emulator_up->GetInstructionCondition(); 252 253 m_inst_emulator_up->EvaluateInstruction( 254 eEmulateInstructionOptionIgnoreConditions); 255 256 // If the current instruction is a branch forward then save the 257 // current CFI information for the offset where we are branching. 258 if (m_forward_branch_offset != 0 && 259 range.ContainsFileAddress(inst->GetAddress().GetFileAddress() + 260 m_forward_branch_offset)) { 261 auto newrow = 262 std::make_shared<UnwindPlan::Row>(*m_curr_row.get()); 263 newrow->SetOffset(current_offset + m_forward_branch_offset); 264 saved_unwind_states.insert( 265 {current_offset + m_forward_branch_offset, 266 {newrow, m_register_values}}); 267 unwind_plan.InsertRow(newrow); 268 } 269 270 // Were there any changes to the CFI while evaluating this 271 // instruction? 272 if (m_curr_row_modified) { 273 // Save the modified row if we don't already have a CFI row in 274 // the current address 275 if (saved_unwind_states.count( 276 current_offset + inst->GetOpcode().GetByteSize()) == 0) { 277 m_curr_row->SetOffset(current_offset + 278 inst->GetOpcode().GetByteSize()); 279 unwind_plan.InsertRow(m_curr_row); 280 saved_unwind_states.insert( 281 {current_offset + inst->GetOpcode().GetByteSize(), 282 {m_curr_row, m_register_values}}); 283 284 // Allocate a new Row for m_curr_row, copy the current state 285 // into it 286 UnwindPlan::Row *newrow = new UnwindPlan::Row; 287 *newrow = *m_curr_row.get(); 288 m_curr_row.reset(newrow); 289 } 290 } 291 } 292 } 293 } 294 } 295 296 if (log && log->GetVerbose()) { 297 StreamString strm; 298 lldb::addr_t base_addr = range.GetBaseAddress().GetFileAddress(); 299 strm.Printf("Resulting unwind rows for [0x%" PRIx64 " - 0x%" PRIx64 "):", 300 base_addr, base_addr + range.GetByteSize()); 301 unwind_plan.Dump(strm, nullptr, base_addr); 302 log->PutString(strm.GetString()); 303 } 304 return unwind_plan.GetRowCount() > 0; 305 } 306 return false; 307 } 308 309 bool UnwindAssemblyInstEmulation::AugmentUnwindPlanFromCallSite( 310 AddressRange &func, Thread &thread, UnwindPlan &unwind_plan) { 311 return false; 312 } 313 314 bool UnwindAssemblyInstEmulation::GetFastUnwindPlan(AddressRange &func, 315 Thread &thread, 316 UnwindPlan &unwind_plan) { 317 return false; 318 } 319 320 bool UnwindAssemblyInstEmulation::FirstNonPrologueInsn( 321 AddressRange &func, const ExecutionContext &exe_ctx, 322 Address &first_non_prologue_insn) { 323 return false; 324 } 325 326 UnwindAssembly * 327 UnwindAssemblyInstEmulation::CreateInstance(const ArchSpec &arch) { 328 std::unique_ptr<EmulateInstruction> inst_emulator_up( 329 EmulateInstruction::FindPlugin(arch, eInstructionTypePrologueEpilogue, 330 nullptr)); 331 // Make sure that all prologue instructions are handled 332 if (inst_emulator_up) 333 return new UnwindAssemblyInstEmulation(arch, inst_emulator_up.release()); 334 return nullptr; 335 } 336 337 void UnwindAssemblyInstEmulation::Initialize() { 338 PluginManager::RegisterPlugin(GetPluginNameStatic(), 339 GetPluginDescriptionStatic(), CreateInstance); 340 } 341 342 void UnwindAssemblyInstEmulation::Terminate() { 343 PluginManager::UnregisterPlugin(CreateInstance); 344 } 345 346 llvm::StringRef UnwindAssemblyInstEmulation::GetPluginDescriptionStatic() { 347 return "Instruction emulation based unwind information."; 348 } 349 350 uint64_t UnwindAssemblyInstEmulation::MakeRegisterKindValuePair( 351 const RegisterInfo ®_info) { 352 lldb::RegisterKind reg_kind; 353 uint32_t reg_num; 354 if (EmulateInstruction::GetBestRegisterKindAndNumber(®_info, reg_kind, 355 reg_num)) 356 return (uint64_t)reg_kind << 24 | reg_num; 357 return 0ull; 358 } 359 360 void UnwindAssemblyInstEmulation::SetRegisterValue( 361 const RegisterInfo ®_info, const RegisterValue ®_value) { 362 m_register_values[MakeRegisterKindValuePair(reg_info)] = reg_value; 363 } 364 365 bool UnwindAssemblyInstEmulation::GetRegisterValue(const RegisterInfo ®_info, 366 RegisterValue ®_value) { 367 const uint64_t reg_id = MakeRegisterKindValuePair(reg_info); 368 RegisterValueMap::const_iterator pos = m_register_values.find(reg_id); 369 if (pos != m_register_values.end()) { 370 reg_value = pos->second; 371 return true; // We had a real value that comes from an opcode that wrote 372 // to it... 373 } 374 // We are making up a value that is recognizable... 375 reg_value.SetUInt(reg_id, reg_info.byte_size); 376 return false; 377 } 378 379 size_t UnwindAssemblyInstEmulation::ReadMemory( 380 EmulateInstruction *instruction, void *baton, 381 const EmulateInstruction::Context &context, lldb::addr_t addr, void *dst, 382 size_t dst_len) { 383 Log *log = GetLog(LLDBLog::Unwind); 384 385 if (log && log->GetVerbose()) { 386 StreamString strm; 387 strm.Printf( 388 "UnwindAssemblyInstEmulation::ReadMemory (addr = 0x%16.16" PRIx64 389 ", dst = %p, dst_len = %" PRIu64 ", context = ", 390 addr, dst, (uint64_t)dst_len); 391 context.Dump(strm, instruction); 392 log->PutString(strm.GetString()); 393 } 394 memset(dst, 0, dst_len); 395 return dst_len; 396 } 397 398 size_t UnwindAssemblyInstEmulation::WriteMemory( 399 EmulateInstruction *instruction, void *baton, 400 const EmulateInstruction::Context &context, lldb::addr_t addr, 401 const void *dst, size_t dst_len) { 402 if (baton && dst && dst_len) 403 return ((UnwindAssemblyInstEmulation *)baton) 404 ->WriteMemory(instruction, context, addr, dst, dst_len); 405 return 0; 406 } 407 408 size_t UnwindAssemblyInstEmulation::WriteMemory( 409 EmulateInstruction *instruction, const EmulateInstruction::Context &context, 410 lldb::addr_t addr, const void *dst, size_t dst_len) { 411 DataExtractor data(dst, dst_len, 412 instruction->GetArchitecture().GetByteOrder(), 413 instruction->GetArchitecture().GetAddressByteSize()); 414 415 Log *log = GetLog(LLDBLog::Unwind); 416 417 if (log && log->GetVerbose()) { 418 StreamString strm; 419 420 strm.PutCString("UnwindAssemblyInstEmulation::WriteMemory ("); 421 DumpDataExtractor(data, &strm, 0, eFormatBytes, 1, dst_len, UINT32_MAX, 422 addr, 0, 0); 423 strm.PutCString(", context = "); 424 context.Dump(strm, instruction); 425 log->PutString(strm.GetString()); 426 } 427 428 const bool cant_replace = false; 429 430 switch (context.type) { 431 default: 432 case EmulateInstruction::eContextInvalid: 433 case EmulateInstruction::eContextReadOpcode: 434 case EmulateInstruction::eContextImmediate: 435 case EmulateInstruction::eContextAdjustBaseRegister: 436 case EmulateInstruction::eContextRegisterPlusOffset: 437 case EmulateInstruction::eContextAdjustPC: 438 case EmulateInstruction::eContextRegisterStore: 439 case EmulateInstruction::eContextRegisterLoad: 440 case EmulateInstruction::eContextRelativeBranchImmediate: 441 case EmulateInstruction::eContextAbsoluteBranchRegister: 442 case EmulateInstruction::eContextSupervisorCall: 443 case EmulateInstruction::eContextTableBranchReadMemory: 444 case EmulateInstruction::eContextWriteRegisterRandomBits: 445 case EmulateInstruction::eContextWriteMemoryRandomBits: 446 case EmulateInstruction::eContextArithmetic: 447 case EmulateInstruction::eContextAdvancePC: 448 case EmulateInstruction::eContextReturnFromException: 449 case EmulateInstruction::eContextPopRegisterOffStack: 450 case EmulateInstruction::eContextAdjustStackPointer: 451 break; 452 453 case EmulateInstruction::eContextPushRegisterOnStack: { 454 uint32_t reg_num = LLDB_INVALID_REGNUM; 455 uint32_t generic_regnum = LLDB_INVALID_REGNUM; 456 assert(context.info_type == 457 EmulateInstruction::eInfoTypeRegisterToRegisterPlusOffset && 458 "unhandled case, add code to handle this!"); 459 const uint32_t unwind_reg_kind = m_unwind_plan_ptr->GetRegisterKind(); 460 reg_num = context.info.RegisterToRegisterPlusOffset.data_reg 461 .kinds[unwind_reg_kind]; 462 generic_regnum = context.info.RegisterToRegisterPlusOffset.data_reg 463 .kinds[eRegisterKindGeneric]; 464 465 if (reg_num != LLDB_INVALID_REGNUM && 466 generic_regnum != LLDB_REGNUM_GENERIC_SP) { 467 if (m_pushed_regs.find(reg_num) == m_pushed_regs.end()) { 468 m_pushed_regs[reg_num] = addr; 469 const int32_t offset = addr - m_initial_sp; 470 m_curr_row->SetRegisterLocationToAtCFAPlusOffset(reg_num, offset, 471 cant_replace); 472 m_curr_row_modified = true; 473 } 474 } 475 } break; 476 } 477 478 return dst_len; 479 } 480 481 bool UnwindAssemblyInstEmulation::ReadRegister(EmulateInstruction *instruction, 482 void *baton, 483 const RegisterInfo *reg_info, 484 RegisterValue ®_value) { 485 486 if (baton && reg_info) 487 return ((UnwindAssemblyInstEmulation *)baton) 488 ->ReadRegister(instruction, reg_info, reg_value); 489 return false; 490 } 491 bool UnwindAssemblyInstEmulation::ReadRegister(EmulateInstruction *instruction, 492 const RegisterInfo *reg_info, 493 RegisterValue ®_value) { 494 bool synthetic = GetRegisterValue(*reg_info, reg_value); 495 496 Log *log = GetLog(LLDBLog::Unwind); 497 498 if (log && log->GetVerbose()) { 499 500 StreamString strm; 501 strm.Printf("UnwindAssemblyInstEmulation::ReadRegister (name = \"%s\") => " 502 "synthetic_value = %i, value = ", 503 reg_info->name, synthetic); 504 DumpRegisterValue(reg_value, &strm, reg_info, false, false, eFormatDefault); 505 log->PutString(strm.GetString()); 506 } 507 return true; 508 } 509 510 bool UnwindAssemblyInstEmulation::WriteRegister( 511 EmulateInstruction *instruction, void *baton, 512 const EmulateInstruction::Context &context, const RegisterInfo *reg_info, 513 const RegisterValue ®_value) { 514 if (baton && reg_info) 515 return ((UnwindAssemblyInstEmulation *)baton) 516 ->WriteRegister(instruction, context, reg_info, reg_value); 517 return false; 518 } 519 bool UnwindAssemblyInstEmulation::WriteRegister( 520 EmulateInstruction *instruction, const EmulateInstruction::Context &context, 521 const RegisterInfo *reg_info, const RegisterValue ®_value) { 522 Log *log = GetLog(LLDBLog::Unwind); 523 524 if (log && log->GetVerbose()) { 525 526 StreamString strm; 527 strm.Printf( 528 "UnwindAssemblyInstEmulation::WriteRegister (name = \"%s\", value = ", 529 reg_info->name); 530 DumpRegisterValue(reg_value, &strm, reg_info, false, false, eFormatDefault); 531 strm.PutCString(", context = "); 532 context.Dump(strm, instruction); 533 log->PutString(strm.GetString()); 534 } 535 536 SetRegisterValue(*reg_info, reg_value); 537 538 switch (context.type) { 539 case EmulateInstruction::eContextInvalid: 540 case EmulateInstruction::eContextReadOpcode: 541 case EmulateInstruction::eContextImmediate: 542 case EmulateInstruction::eContextAdjustBaseRegister: 543 case EmulateInstruction::eContextRegisterPlusOffset: 544 case EmulateInstruction::eContextAdjustPC: 545 case EmulateInstruction::eContextRegisterStore: 546 case EmulateInstruction::eContextSupervisorCall: 547 case EmulateInstruction::eContextTableBranchReadMemory: 548 case EmulateInstruction::eContextWriteRegisterRandomBits: 549 case EmulateInstruction::eContextWriteMemoryRandomBits: 550 case EmulateInstruction::eContextAdvancePC: 551 case EmulateInstruction::eContextReturnFromException: 552 case EmulateInstruction::eContextPushRegisterOnStack: 553 case EmulateInstruction::eContextRegisterLoad: 554 // { 555 // const uint32_t reg_num = 556 // reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 557 // if (reg_num != LLDB_INVALID_REGNUM) 558 // { 559 // const bool can_replace_only_if_unspecified = true; 560 // 561 // m_curr_row.SetRegisterLocationToUndefined (reg_num, 562 // can_replace_only_if_unspecified, 563 // can_replace_only_if_unspecified); 564 // m_curr_row_modified = true; 565 // } 566 // } 567 break; 568 569 case EmulateInstruction::eContextArithmetic: { 570 // If we adjusted the current frame pointer by a constant then adjust the 571 // CFA offset 572 // with the same amount. 573 lldb::RegisterKind kind = m_unwind_plan_ptr->GetRegisterKind(); 574 if (m_fp_is_cfa && reg_info->kinds[kind] == m_cfa_reg_info.kinds[kind] && 575 context.info_type == EmulateInstruction::eInfoTypeRegisterPlusOffset && 576 context.info.RegisterPlusOffset.reg.kinds[kind] == 577 m_cfa_reg_info.kinds[kind]) { 578 const int64_t offset = context.info.RegisterPlusOffset.signed_offset; 579 m_curr_row->GetCFAValue().IncOffset(-1 * offset); 580 m_curr_row_modified = true; 581 } 582 } break; 583 584 case EmulateInstruction::eContextAbsoluteBranchRegister: 585 case EmulateInstruction::eContextRelativeBranchImmediate: { 586 if (context.info_type == EmulateInstruction::eInfoTypeISAAndImmediate && 587 context.info.ISAAndImmediate.unsigned_data32 > 0) { 588 m_forward_branch_offset = 589 context.info.ISAAndImmediateSigned.signed_data32; 590 } else if (context.info_type == 591 EmulateInstruction::eInfoTypeISAAndImmediateSigned && 592 context.info.ISAAndImmediateSigned.signed_data32 > 0) { 593 m_forward_branch_offset = context.info.ISAAndImmediate.unsigned_data32; 594 } else if (context.info_type == EmulateInstruction::eInfoTypeImmediate && 595 context.info.unsigned_immediate > 0) { 596 m_forward_branch_offset = context.info.unsigned_immediate; 597 } else if (context.info_type == 598 EmulateInstruction::eInfoTypeImmediateSigned && 599 context.info.signed_immediate > 0) { 600 m_forward_branch_offset = context.info.signed_immediate; 601 } 602 } break; 603 604 case EmulateInstruction::eContextPopRegisterOffStack: { 605 const uint32_t reg_num = 606 reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 607 const uint32_t generic_regnum = reg_info->kinds[eRegisterKindGeneric]; 608 if (reg_num != LLDB_INVALID_REGNUM && 609 generic_regnum != LLDB_REGNUM_GENERIC_SP) { 610 switch (context.info_type) { 611 case EmulateInstruction::eInfoTypeAddress: 612 if (m_pushed_regs.find(reg_num) != m_pushed_regs.end() && 613 context.info.address == m_pushed_regs[reg_num]) { 614 m_curr_row->SetRegisterLocationToSame(reg_num, 615 false /*must_replace*/); 616 m_curr_row_modified = true; 617 } 618 break; 619 case EmulateInstruction::eInfoTypeISA: 620 assert( 621 (generic_regnum == LLDB_REGNUM_GENERIC_PC || 622 generic_regnum == LLDB_REGNUM_GENERIC_FLAGS) && 623 "eInfoTypeISA used for popping a register other the PC/FLAGS"); 624 if (generic_regnum != LLDB_REGNUM_GENERIC_FLAGS) { 625 m_curr_row->SetRegisterLocationToSame(reg_num, 626 false /*must_replace*/); 627 m_curr_row_modified = true; 628 } 629 break; 630 default: 631 assert(false && "unhandled case, add code to handle this!"); 632 break; 633 } 634 } 635 } break; 636 637 case EmulateInstruction::eContextSetFramePointer: 638 if (!m_fp_is_cfa) { 639 m_fp_is_cfa = true; 640 m_cfa_reg_info = *reg_info; 641 const uint32_t cfa_reg_num = 642 reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 643 assert(cfa_reg_num != LLDB_INVALID_REGNUM); 644 m_curr_row->GetCFAValue().SetIsRegisterPlusOffset( 645 cfa_reg_num, m_initial_sp - reg_value.GetAsUInt64()); 646 m_curr_row_modified = true; 647 } 648 break; 649 650 case EmulateInstruction::eContextRestoreStackPointer: 651 if (m_fp_is_cfa) { 652 m_fp_is_cfa = false; 653 m_cfa_reg_info = *reg_info; 654 const uint32_t cfa_reg_num = 655 reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 656 assert(cfa_reg_num != LLDB_INVALID_REGNUM); 657 m_curr_row->GetCFAValue().SetIsRegisterPlusOffset( 658 cfa_reg_num, m_initial_sp - reg_value.GetAsUInt64()); 659 m_curr_row_modified = true; 660 } 661 break; 662 663 case EmulateInstruction::eContextAdjustStackPointer: 664 // If we have created a frame using the frame pointer, don't follow 665 // subsequent adjustments to the stack pointer. 666 if (!m_fp_is_cfa) { 667 m_curr_row->GetCFAValue().SetIsRegisterPlusOffset( 668 m_curr_row->GetCFAValue().GetRegisterNumber(), 669 m_initial_sp - reg_value.GetAsUInt64()); 670 m_curr_row_modified = true; 671 } 672 break; 673 } 674 return true; 675 } 676