1 //===-- UnwindAssemblyInstEmulation.cpp --------------------------*- C++-*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "UnwindAssemblyInstEmulation.h" 11 12 #include "lldb/Core/Address.h" 13 #include "lldb/Core/ArchSpec.h" 14 #include "lldb/Core/DataBufferHeap.h" 15 #include "lldb/Core/DataExtractor.h" 16 #include "lldb/Core/Disassembler.h" 17 #include "lldb/Core/Error.h" 18 #include "lldb/Core/FormatEntity.h" 19 #include "lldb/Core/Log.h" 20 #include "lldb/Core/PluginManager.h" 21 #include "lldb/Core/StreamString.h" 22 #include "lldb/Target/ExecutionContext.h" 23 #include "lldb/Target/Process.h" 24 #include "lldb/Target/Target.h" 25 #include "lldb/Target/Thread.h" 26 27 using namespace lldb; 28 using namespace lldb_private; 29 30 //----------------------------------------------------------------------------------------------- 31 // UnwindAssemblyInstEmulation method definitions 32 //----------------------------------------------------------------------------------------------- 33 34 bool UnwindAssemblyInstEmulation::GetNonCallSiteUnwindPlanFromAssembly( 35 AddressRange &range, Thread &thread, UnwindPlan &unwind_plan) { 36 std::vector<uint8_t> function_text(range.GetByteSize()); 37 ProcessSP process_sp(thread.GetProcess()); 38 if (process_sp) { 39 Error error; 40 const bool prefer_file_cache = true; 41 if (process_sp->GetTarget().ReadMemory( 42 range.GetBaseAddress(), prefer_file_cache, function_text.data(), 43 range.GetByteSize(), error) != range.GetByteSize()) { 44 return false; 45 } 46 } 47 return GetNonCallSiteUnwindPlanFromAssembly( 48 range, function_text.data(), function_text.size(), unwind_plan); 49 } 50 51 bool UnwindAssemblyInstEmulation::GetNonCallSiteUnwindPlanFromAssembly( 52 AddressRange &range, uint8_t *opcode_data, size_t opcode_size, 53 UnwindPlan &unwind_plan) { 54 if (opcode_data == nullptr || opcode_size == 0) 55 return false; 56 57 if (range.GetByteSize() > 0 && range.GetBaseAddress().IsValid() && 58 m_inst_emulator_ap.get()) { 59 60 // The instruction emulation subclass setup the unwind plan for the 61 // first instruction. 62 m_inst_emulator_ap->CreateFunctionEntryUnwind(unwind_plan); 63 64 // CreateFunctionEntryUnwind should have created the first row. If it 65 // doesn't, then we are done. 66 if (unwind_plan.GetRowCount() == 0) 67 return false; 68 69 const bool prefer_file_cache = true; 70 DisassemblerSP disasm_sp(Disassembler::DisassembleBytes( 71 m_arch, NULL, NULL, range.GetBaseAddress(), opcode_data, opcode_size, 72 99999, prefer_file_cache)); 73 74 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND)); 75 76 if (disasm_sp) { 77 78 m_range_ptr = ⦥ 79 m_unwind_plan_ptr = &unwind_plan; 80 81 const uint32_t addr_byte_size = m_arch.GetAddressByteSize(); 82 const bool show_address = true; 83 const bool show_bytes = true; 84 m_inst_emulator_ap->GetRegisterInfo(unwind_plan.GetRegisterKind(), 85 unwind_plan.GetInitialCFARegister(), 86 m_cfa_reg_info); 87 88 m_fp_is_cfa = false; 89 m_register_values.clear(); 90 m_pushed_regs.clear(); 91 92 // Initialize the CFA with a known value. In the 32 bit case 93 // it will be 0x80000000, and in the 64 bit case 0x8000000000000000. 94 // We use the address byte size to be safe for any future address sizes 95 m_initial_sp = (1ull << ((addr_byte_size * 8) - 1)); 96 RegisterValue cfa_reg_value; 97 cfa_reg_value.SetUInt(m_initial_sp, m_cfa_reg_info.byte_size); 98 SetRegisterValue(m_cfa_reg_info, cfa_reg_value); 99 100 const InstructionList &inst_list = disasm_sp->GetInstructionList(); 101 const size_t num_instructions = inst_list.GetSize(); 102 103 if (num_instructions > 0) { 104 Instruction *inst = inst_list.GetInstructionAtIndex(0).get(); 105 const lldb::addr_t base_addr = inst->GetAddress().GetFileAddress(); 106 107 // Map for storing the unwind plan row and the value of the registers at 108 // a given offset. 109 // When we see a forward branch we add a new entry to this map with the 110 // actual unwind plan 111 // row and register context for the target address of the branch as the 112 // current data have 113 // to be valid for the target address of the branch too if we are in the 114 // same function. 115 std::map<lldb::addr_t, std::pair<UnwindPlan::RowSP, RegisterValueMap>> 116 saved_unwind_states; 117 118 // Make a copy of the current instruction Row and save it in m_curr_row 119 // so we can add updates as we process the instructions. 120 UnwindPlan::RowSP last_row = unwind_plan.GetLastRow(); 121 UnwindPlan::Row *newrow = new UnwindPlan::Row; 122 if (last_row.get()) 123 *newrow = *last_row.get(); 124 m_curr_row.reset(newrow); 125 126 // Add the initial state to the save list with offset 0. 127 saved_unwind_states.insert({0, {last_row, m_register_values}}); 128 129 // cache the pc register number (in whatever register numbering this 130 // UnwindPlan uses) for 131 // quick reference during instruction parsing. 132 RegisterInfo pc_reg_info; 133 m_inst_emulator_ap->GetRegisterInfo( 134 eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc_reg_info); 135 136 // cache the return address register number (in whatever register 137 // numbering this UnwindPlan uses) for 138 // quick reference during instruction parsing. 139 RegisterInfo ra_reg_info; 140 m_inst_emulator_ap->GetRegisterInfo( 141 eRegisterKindGeneric, LLDB_REGNUM_GENERIC_RA, ra_reg_info); 142 143 // The architecture dependent condition code of the last processed 144 // instruction. 145 EmulateInstruction::InstructionCondition last_condition = 146 EmulateInstruction::UnconditionalCondition; 147 lldb::addr_t condition_block_start_offset = 0; 148 149 for (size_t idx = 0; idx < num_instructions; ++idx) { 150 m_curr_row_modified = false; 151 m_forward_branch_offset = 0; 152 153 inst = inst_list.GetInstructionAtIndex(idx).get(); 154 if (inst) { 155 lldb::addr_t current_offset = 156 inst->GetAddress().GetFileAddress() - base_addr; 157 auto it = saved_unwind_states.upper_bound(current_offset); 158 assert(it != saved_unwind_states.begin() && 159 "Unwind row for the function entry missing"); 160 --it; // Move it to the row corresponding to the current offset 161 162 // If the offset of m_curr_row don't match with the offset we see in 163 // saved_unwind_states 164 // then we have to update m_curr_row and m_register_values based on 165 // the saved values. It 166 // is happenning after we processed an epilogue and a return to 167 // caller instruction. 168 if (it->second.first->GetOffset() != m_curr_row->GetOffset()) { 169 UnwindPlan::Row *newrow = new UnwindPlan::Row; 170 *newrow = *it->second.first; 171 m_curr_row.reset(newrow); 172 m_register_values = it->second.second; 173 } 174 175 m_inst_emulator_ap->SetInstruction(inst->GetOpcode(), 176 inst->GetAddress(), nullptr); 177 178 if (last_condition != 179 m_inst_emulator_ap->GetInstructionCondition()) { 180 if (m_inst_emulator_ap->GetInstructionCondition() != 181 EmulateInstruction::UnconditionalCondition && 182 saved_unwind_states.count(current_offset) == 0) { 183 // If we don't have a saved row for the current offset then save 184 // our 185 // current state because we will have to restore it after the 186 // conditional block. 187 auto new_row = 188 std::make_shared<UnwindPlan::Row>(*m_curr_row.get()); 189 saved_unwind_states.insert( 190 {current_offset, {new_row, m_register_values}}); 191 } 192 193 // If the last instruction was conditional with a different 194 // condition 195 // then the then current condition then restore the condition. 196 if (last_condition != 197 EmulateInstruction::UnconditionalCondition) { 198 const auto &saved_state = 199 saved_unwind_states.at(condition_block_start_offset); 200 m_curr_row = 201 std::make_shared<UnwindPlan::Row>(*saved_state.first); 202 m_curr_row->SetOffset(current_offset); 203 m_register_values = saved_state.second; 204 bool replace_existing = 205 true; // The last instruction might already 206 // created a row for this offset and 207 // we want to overwrite it. 208 unwind_plan.InsertRow( 209 std::make_shared<UnwindPlan::Row>(*m_curr_row), 210 replace_existing); 211 } 212 213 // We are starting a new conditional block at the catual offset 214 condition_block_start_offset = current_offset; 215 } 216 217 if (log && log->GetVerbose()) { 218 StreamString strm; 219 lldb_private::FormatEntity::Entry format; 220 FormatEntity::Parse("${frame.pc}: ", format); 221 inst->Dump(&strm, inst_list.GetMaxOpcocdeByteSize(), show_address, 222 show_bytes, NULL, NULL, NULL, &format, 0); 223 log->PutString(strm.GetString()); 224 } 225 226 last_condition = m_inst_emulator_ap->GetInstructionCondition(); 227 228 m_inst_emulator_ap->EvaluateInstruction( 229 eEmulateInstructionOptionIgnoreConditions); 230 231 // If the current instruction is a branch forward then save the 232 // current CFI information 233 // for the offset where we are branching. 234 if (m_forward_branch_offset != 0 && 235 range.ContainsFileAddress(inst->GetAddress().GetFileAddress() + 236 m_forward_branch_offset)) { 237 auto newrow = 238 std::make_shared<UnwindPlan::Row>(*m_curr_row.get()); 239 newrow->SetOffset(current_offset + m_forward_branch_offset); 240 saved_unwind_states.insert( 241 {current_offset + m_forward_branch_offset, 242 {newrow, m_register_values}}); 243 unwind_plan.InsertRow(newrow); 244 } 245 246 // Were there any changes to the CFI while evaluating this 247 // instruction? 248 if (m_curr_row_modified) { 249 // Save the modified row if we don't already have a CFI row in the 250 // currennt address 251 if (saved_unwind_states.count( 252 current_offset + inst->GetOpcode().GetByteSize()) == 0) { 253 m_curr_row->SetOffset(current_offset + 254 inst->GetOpcode().GetByteSize()); 255 unwind_plan.InsertRow(m_curr_row); 256 saved_unwind_states.insert( 257 {current_offset + inst->GetOpcode().GetByteSize(), 258 {m_curr_row, m_register_values}}); 259 260 // Allocate a new Row for m_curr_row, copy the current state 261 // into it 262 UnwindPlan::Row *newrow = new UnwindPlan::Row; 263 *newrow = *m_curr_row.get(); 264 m_curr_row.reset(newrow); 265 } 266 } 267 } 268 } 269 } 270 } 271 272 if (log && log->GetVerbose()) { 273 StreamString strm; 274 lldb::addr_t base_addr = range.GetBaseAddress().GetFileAddress(); 275 strm.Printf("Resulting unwind rows for [0x%" PRIx64 " - 0x%" PRIx64 "):", 276 base_addr, base_addr + range.GetByteSize()); 277 unwind_plan.Dump(strm, nullptr, base_addr); 278 log->PutString(strm.GetString()); 279 } 280 return unwind_plan.GetRowCount() > 0; 281 } 282 return false; 283 } 284 285 bool UnwindAssemblyInstEmulation::AugmentUnwindPlanFromCallSite( 286 AddressRange &func, Thread &thread, UnwindPlan &unwind_plan) { 287 return false; 288 } 289 290 bool UnwindAssemblyInstEmulation::GetFastUnwindPlan(AddressRange &func, 291 Thread &thread, 292 UnwindPlan &unwind_plan) { 293 return false; 294 } 295 296 bool UnwindAssemblyInstEmulation::FirstNonPrologueInsn( 297 AddressRange &func, const ExecutionContext &exe_ctx, 298 Address &first_non_prologue_insn) { 299 return false; 300 } 301 302 UnwindAssembly * 303 UnwindAssemblyInstEmulation::CreateInstance(const ArchSpec &arch) { 304 std::unique_ptr<EmulateInstruction> inst_emulator_ap( 305 EmulateInstruction::FindPlugin(arch, eInstructionTypePrologueEpilogue, 306 NULL)); 307 // Make sure that all prologue instructions are handled 308 if (inst_emulator_ap.get()) 309 return new UnwindAssemblyInstEmulation(arch, inst_emulator_ap.release()); 310 return NULL; 311 } 312 313 //------------------------------------------------------------------ 314 // PluginInterface protocol in UnwindAssemblyParser_x86 315 //------------------------------------------------------------------ 316 ConstString UnwindAssemblyInstEmulation::GetPluginName() { 317 return GetPluginNameStatic(); 318 } 319 320 uint32_t UnwindAssemblyInstEmulation::GetPluginVersion() { return 1; } 321 322 void UnwindAssemblyInstEmulation::Initialize() { 323 PluginManager::RegisterPlugin(GetPluginNameStatic(), 324 GetPluginDescriptionStatic(), CreateInstance); 325 } 326 327 void UnwindAssemblyInstEmulation::Terminate() { 328 PluginManager::UnregisterPlugin(CreateInstance); 329 } 330 331 ConstString UnwindAssemblyInstEmulation::GetPluginNameStatic() { 332 static ConstString g_name("inst-emulation"); 333 return g_name; 334 } 335 336 const char *UnwindAssemblyInstEmulation::GetPluginDescriptionStatic() { 337 return "Instruction emulation based unwind information."; 338 } 339 340 uint64_t UnwindAssemblyInstEmulation::MakeRegisterKindValuePair( 341 const RegisterInfo ®_info) { 342 lldb::RegisterKind reg_kind; 343 uint32_t reg_num; 344 if (EmulateInstruction::GetBestRegisterKindAndNumber(®_info, reg_kind, 345 reg_num)) 346 return (uint64_t)reg_kind << 24 | reg_num; 347 return 0ull; 348 } 349 350 void UnwindAssemblyInstEmulation::SetRegisterValue( 351 const RegisterInfo ®_info, const RegisterValue ®_value) { 352 m_register_values[MakeRegisterKindValuePair(reg_info)] = reg_value; 353 } 354 355 bool UnwindAssemblyInstEmulation::GetRegisterValue(const RegisterInfo ®_info, 356 RegisterValue ®_value) { 357 const uint64_t reg_id = MakeRegisterKindValuePair(reg_info); 358 RegisterValueMap::const_iterator pos = m_register_values.find(reg_id); 359 if (pos != m_register_values.end()) { 360 reg_value = pos->second; 361 return true; // We had a real value that comes from an opcode that wrote 362 // to it... 363 } 364 // We are making up a value that is recognizable... 365 reg_value.SetUInt(reg_id, reg_info.byte_size); 366 return false; 367 } 368 369 size_t UnwindAssemblyInstEmulation::ReadMemory( 370 EmulateInstruction *instruction, void *baton, 371 const EmulateInstruction::Context &context, lldb::addr_t addr, void *dst, 372 size_t dst_len) { 373 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND)); 374 375 if (log && log->GetVerbose()) { 376 StreamString strm; 377 strm.Printf( 378 "UnwindAssemblyInstEmulation::ReadMemory (addr = 0x%16.16" PRIx64 379 ", dst = %p, dst_len = %" PRIu64 ", context = ", 380 addr, dst, (uint64_t)dst_len); 381 context.Dump(strm, instruction); 382 log->PutString(strm.GetString()); 383 } 384 memset(dst, 0, dst_len); 385 return dst_len; 386 } 387 388 size_t UnwindAssemblyInstEmulation::WriteMemory( 389 EmulateInstruction *instruction, void *baton, 390 const EmulateInstruction::Context &context, lldb::addr_t addr, 391 const void *dst, size_t dst_len) { 392 if (baton && dst && dst_len) 393 return ((UnwindAssemblyInstEmulation *)baton) 394 ->WriteMemory(instruction, context, addr, dst, dst_len); 395 return 0; 396 } 397 398 size_t UnwindAssemblyInstEmulation::WriteMemory( 399 EmulateInstruction *instruction, const EmulateInstruction::Context &context, 400 lldb::addr_t addr, const void *dst, size_t dst_len) { 401 DataExtractor data(dst, dst_len, 402 instruction->GetArchitecture().GetByteOrder(), 403 instruction->GetArchitecture().GetAddressByteSize()); 404 405 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND)); 406 407 if (log && log->GetVerbose()) { 408 StreamString strm; 409 410 strm.PutCString("UnwindAssemblyInstEmulation::WriteMemory ("); 411 data.Dump(&strm, 0, eFormatBytes, 1, dst_len, UINT32_MAX, addr, 0, 0); 412 strm.PutCString(", context = "); 413 context.Dump(strm, instruction); 414 log->PutString(strm.GetString()); 415 } 416 417 const bool cant_replace = false; 418 419 switch (context.type) { 420 default: 421 case EmulateInstruction::eContextInvalid: 422 case EmulateInstruction::eContextReadOpcode: 423 case EmulateInstruction::eContextImmediate: 424 case EmulateInstruction::eContextAdjustBaseRegister: 425 case EmulateInstruction::eContextRegisterPlusOffset: 426 case EmulateInstruction::eContextAdjustPC: 427 case EmulateInstruction::eContextRegisterStore: 428 case EmulateInstruction::eContextRegisterLoad: 429 case EmulateInstruction::eContextRelativeBranchImmediate: 430 case EmulateInstruction::eContextAbsoluteBranchRegister: 431 case EmulateInstruction::eContextSupervisorCall: 432 case EmulateInstruction::eContextTableBranchReadMemory: 433 case EmulateInstruction::eContextWriteRegisterRandomBits: 434 case EmulateInstruction::eContextWriteMemoryRandomBits: 435 case EmulateInstruction::eContextArithmetic: 436 case EmulateInstruction::eContextAdvancePC: 437 case EmulateInstruction::eContextReturnFromException: 438 case EmulateInstruction::eContextPopRegisterOffStack: 439 case EmulateInstruction::eContextAdjustStackPointer: 440 break; 441 442 case EmulateInstruction::eContextPushRegisterOnStack: { 443 uint32_t reg_num = LLDB_INVALID_REGNUM; 444 uint32_t generic_regnum = LLDB_INVALID_REGNUM; 445 if (context.info_type == 446 EmulateInstruction::eInfoTypeRegisterToRegisterPlusOffset) { 447 const uint32_t unwind_reg_kind = m_unwind_plan_ptr->GetRegisterKind(); 448 reg_num = context.info.RegisterToRegisterPlusOffset.data_reg 449 .kinds[unwind_reg_kind]; 450 generic_regnum = context.info.RegisterToRegisterPlusOffset.data_reg 451 .kinds[eRegisterKindGeneric]; 452 } else 453 assert(!"unhandled case, add code to handle this!"); 454 455 if (reg_num != LLDB_INVALID_REGNUM && 456 generic_regnum != LLDB_REGNUM_GENERIC_SP) { 457 if (m_pushed_regs.find(reg_num) == m_pushed_regs.end()) { 458 m_pushed_regs[reg_num] = addr; 459 const int32_t offset = addr - m_initial_sp; 460 m_curr_row->SetRegisterLocationToAtCFAPlusOffset(reg_num, offset, 461 cant_replace); 462 m_curr_row_modified = true; 463 } 464 } 465 } break; 466 } 467 468 return dst_len; 469 } 470 471 bool UnwindAssemblyInstEmulation::ReadRegister(EmulateInstruction *instruction, 472 void *baton, 473 const RegisterInfo *reg_info, 474 RegisterValue ®_value) { 475 476 if (baton && reg_info) 477 return ((UnwindAssemblyInstEmulation *)baton) 478 ->ReadRegister(instruction, reg_info, reg_value); 479 return false; 480 } 481 bool UnwindAssemblyInstEmulation::ReadRegister(EmulateInstruction *instruction, 482 const RegisterInfo *reg_info, 483 RegisterValue ®_value) { 484 bool synthetic = GetRegisterValue(*reg_info, reg_value); 485 486 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND)); 487 488 if (log && log->GetVerbose()) { 489 490 StreamString strm; 491 strm.Printf("UnwindAssemblyInstEmulation::ReadRegister (name = \"%s\") => " 492 "synthetic_value = %i, value = ", 493 reg_info->name, synthetic); 494 reg_value.Dump(&strm, reg_info, false, false, eFormatDefault); 495 log->PutString(strm.GetString()); 496 } 497 return true; 498 } 499 500 bool UnwindAssemblyInstEmulation::WriteRegister( 501 EmulateInstruction *instruction, void *baton, 502 const EmulateInstruction::Context &context, const RegisterInfo *reg_info, 503 const RegisterValue ®_value) { 504 if (baton && reg_info) 505 return ((UnwindAssemblyInstEmulation *)baton) 506 ->WriteRegister(instruction, context, reg_info, reg_value); 507 return false; 508 } 509 bool UnwindAssemblyInstEmulation::WriteRegister( 510 EmulateInstruction *instruction, const EmulateInstruction::Context &context, 511 const RegisterInfo *reg_info, const RegisterValue ®_value) { 512 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND)); 513 514 if (log && log->GetVerbose()) { 515 516 StreamString strm; 517 strm.Printf( 518 "UnwindAssemblyInstEmulation::WriteRegister (name = \"%s\", value = ", 519 reg_info->name); 520 reg_value.Dump(&strm, reg_info, false, false, eFormatDefault); 521 strm.PutCString(", context = "); 522 context.Dump(strm, instruction); 523 log->PutString(strm.GetString()); 524 } 525 526 SetRegisterValue(*reg_info, reg_value); 527 528 switch (context.type) { 529 case EmulateInstruction::eContextInvalid: 530 case EmulateInstruction::eContextReadOpcode: 531 case EmulateInstruction::eContextImmediate: 532 case EmulateInstruction::eContextAdjustBaseRegister: 533 case EmulateInstruction::eContextRegisterPlusOffset: 534 case EmulateInstruction::eContextAdjustPC: 535 case EmulateInstruction::eContextRegisterStore: 536 case EmulateInstruction::eContextSupervisorCall: 537 case EmulateInstruction::eContextTableBranchReadMemory: 538 case EmulateInstruction::eContextWriteRegisterRandomBits: 539 case EmulateInstruction::eContextWriteMemoryRandomBits: 540 case EmulateInstruction::eContextAdvancePC: 541 case EmulateInstruction::eContextReturnFromException: 542 case EmulateInstruction::eContextPushRegisterOnStack: 543 case EmulateInstruction::eContextRegisterLoad: 544 // { 545 // const uint32_t reg_num = 546 // reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 547 // if (reg_num != LLDB_INVALID_REGNUM) 548 // { 549 // const bool can_replace_only_if_unspecified = true; 550 // 551 // m_curr_row.SetRegisterLocationToUndefined (reg_num, 552 // can_replace_only_if_unspecified, 553 // can_replace_only_if_unspecified); 554 // m_curr_row_modified = true; 555 // } 556 // } 557 break; 558 559 case EmulateInstruction::eContextArithmetic: { 560 // If we adjusted the current frame pointer by a constant then adjust the 561 // CFA offset 562 // with the same amount. 563 lldb::RegisterKind kind = m_unwind_plan_ptr->GetRegisterKind(); 564 if (m_fp_is_cfa && reg_info->kinds[kind] == m_cfa_reg_info.kinds[kind] && 565 context.info_type == EmulateInstruction::eInfoTypeRegisterPlusOffset && 566 context.info.RegisterPlusOffset.reg.kinds[kind] == 567 m_cfa_reg_info.kinds[kind]) { 568 const int64_t offset = context.info.RegisterPlusOffset.signed_offset; 569 m_curr_row->GetCFAValue().IncOffset(-1 * offset); 570 m_curr_row_modified = true; 571 } 572 } break; 573 574 case EmulateInstruction::eContextAbsoluteBranchRegister: 575 case EmulateInstruction::eContextRelativeBranchImmediate: { 576 if (context.info_type == EmulateInstruction::eInfoTypeISAAndImmediate && 577 context.info.ISAAndImmediate.unsigned_data32 > 0) { 578 m_forward_branch_offset = 579 context.info.ISAAndImmediateSigned.signed_data32; 580 } else if (context.info_type == 581 EmulateInstruction::eInfoTypeISAAndImmediateSigned && 582 context.info.ISAAndImmediateSigned.signed_data32 > 0) { 583 m_forward_branch_offset = context.info.ISAAndImmediate.unsigned_data32; 584 } else if (context.info_type == EmulateInstruction::eInfoTypeImmediate && 585 context.info.unsigned_immediate > 0) { 586 m_forward_branch_offset = context.info.unsigned_immediate; 587 } else if (context.info_type == 588 EmulateInstruction::eInfoTypeImmediateSigned && 589 context.info.signed_immediate > 0) { 590 m_forward_branch_offset = context.info.signed_immediate; 591 } 592 } break; 593 594 case EmulateInstruction::eContextPopRegisterOffStack: { 595 const uint32_t reg_num = 596 reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 597 const uint32_t generic_regnum = reg_info->kinds[eRegisterKindGeneric]; 598 if (reg_num != LLDB_INVALID_REGNUM && 599 generic_regnum != LLDB_REGNUM_GENERIC_SP) { 600 switch (context.info_type) { 601 case EmulateInstruction::eInfoTypeAddress: 602 if (m_pushed_regs.find(reg_num) != m_pushed_regs.end() && 603 context.info.address == m_pushed_regs[reg_num]) { 604 m_curr_row->SetRegisterLocationToSame(reg_num, 605 false /*must_replace*/); 606 m_curr_row_modified = true; 607 } 608 break; 609 case EmulateInstruction::eInfoTypeISA: 610 assert( 611 (generic_regnum == LLDB_REGNUM_GENERIC_PC || 612 generic_regnum == LLDB_REGNUM_GENERIC_FLAGS) && 613 "eInfoTypeISA used for poping a register other the the PC/FLAGS"); 614 if (generic_regnum != LLDB_REGNUM_GENERIC_FLAGS) { 615 m_curr_row->SetRegisterLocationToSame(reg_num, 616 false /*must_replace*/); 617 m_curr_row_modified = true; 618 } 619 break; 620 default: 621 assert(false && "unhandled case, add code to handle this!"); 622 break; 623 } 624 } 625 } break; 626 627 case EmulateInstruction::eContextSetFramePointer: 628 if (!m_fp_is_cfa) { 629 m_fp_is_cfa = true; 630 m_cfa_reg_info = *reg_info; 631 const uint32_t cfa_reg_num = 632 reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 633 assert(cfa_reg_num != LLDB_INVALID_REGNUM); 634 m_curr_row->GetCFAValue().SetIsRegisterPlusOffset( 635 cfa_reg_num, m_initial_sp - reg_value.GetAsUInt64()); 636 m_curr_row_modified = true; 637 } 638 break; 639 640 case EmulateInstruction::eContextRestoreStackPointer: 641 if (m_fp_is_cfa) { 642 m_fp_is_cfa = false; 643 m_cfa_reg_info = *reg_info; 644 const uint32_t cfa_reg_num = 645 reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 646 assert(cfa_reg_num != LLDB_INVALID_REGNUM); 647 m_curr_row->GetCFAValue().SetIsRegisterPlusOffset( 648 cfa_reg_num, m_initial_sp - reg_value.GetAsUInt64()); 649 m_curr_row_modified = true; 650 } 651 break; 652 653 case EmulateInstruction::eContextAdjustStackPointer: 654 // If we have created a frame using the frame pointer, don't follow 655 // subsequent adjustments to the stack pointer. 656 if (!m_fp_is_cfa) { 657 m_curr_row->GetCFAValue().SetIsRegisterPlusOffset( 658 m_curr_row->GetCFAValue().GetRegisterNumber(), 659 m_initial_sp - reg_value.GetAsUInt64()); 660 m_curr_row_modified = true; 661 } 662 break; 663 } 664 return true; 665 } 666