180814287SRaphael Isemann //===-- RegisterInfoPOSIX_ppc64le.cpp -------------------------------------===//
2aae0a752SEugene Zemtsov //
32946cd70SChandler Carruth // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
42946cd70SChandler Carruth // See https://llvm.org/LICENSE.txt for license information.
52946cd70SChandler Carruth // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6aae0a752SEugene Zemtsov //
7aae0a752SEugene Zemtsov //===---------------------------------------------------------------------===//
8aae0a752SEugene Zemtsov 
9aae0a752SEugene Zemtsov #include <cassert>
10*76e47d48SRaphael Isemann #include <cstddef>
11aae0a752SEugene Zemtsov #include <vector>
12aae0a752SEugene Zemtsov 
13aae0a752SEugene Zemtsov #include "lldb/lldb-defines.h"
14aae0a752SEugene Zemtsov #include "llvm/Support/Compiler.h"
15aae0a752SEugene Zemtsov 
16aae0a752SEugene Zemtsov #include "RegisterInfoPOSIX_ppc64le.h"
17aae0a752SEugene Zemtsov 
18aae0a752SEugene Zemtsov // Include RegisterInfoPOSIX_ppc64le to declare our g_register_infos_ppc64le
19aae0a752SEugene Zemtsov #define DECLARE_REGISTER_INFOS_PPC64LE_STRUCT
20aae0a752SEugene Zemtsov #include "RegisterInfos_ppc64le.h"
21aae0a752SEugene Zemtsov #undef DECLARE_REGISTER_INFOS_PPC64LE_STRUCT
22aae0a752SEugene Zemtsov 
23aae0a752SEugene Zemtsov static const lldb_private::RegisterInfo *
GetRegisterInfoPtr(const lldb_private::ArchSpec & target_arch)24aae0a752SEugene Zemtsov GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
25aae0a752SEugene Zemtsov   switch (target_arch.GetMachine()) {
26aae0a752SEugene Zemtsov   case llvm::Triple::ppc64le:
27aae0a752SEugene Zemtsov     return g_register_infos_ppc64le;
28aae0a752SEugene Zemtsov   default:
29aae0a752SEugene Zemtsov     assert(false && "Unhandled target architecture.");
30248a1305SKonrad Kleine     return nullptr;
31aae0a752SEugene Zemtsov   }
32aae0a752SEugene Zemtsov }
33aae0a752SEugene Zemtsov 
34aae0a752SEugene Zemtsov static uint32_t
GetRegisterInfoCount(const lldb_private::ArchSpec & target_arch)35aae0a752SEugene Zemtsov GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
36aae0a752SEugene Zemtsov   switch (target_arch.GetMachine()) {
37aae0a752SEugene Zemtsov   case llvm::Triple::ppc64le:
38aae0a752SEugene Zemtsov     return static_cast<uint32_t>(sizeof(g_register_infos_ppc64le) /
39aae0a752SEugene Zemtsov                                  sizeof(g_register_infos_ppc64le[0]));
40aae0a752SEugene Zemtsov   default:
41aae0a752SEugene Zemtsov     assert(false && "Unhandled target architecture.");
42aae0a752SEugene Zemtsov     return 0;
43aae0a752SEugene Zemtsov   }
44aae0a752SEugene Zemtsov }
45aae0a752SEugene Zemtsov 
RegisterInfoPOSIX_ppc64le(const lldb_private::ArchSpec & target_arch)46aae0a752SEugene Zemtsov RegisterInfoPOSIX_ppc64le::RegisterInfoPOSIX_ppc64le(
47aae0a752SEugene Zemtsov     const lldb_private::ArchSpec &target_arch)
48aae0a752SEugene Zemtsov     : lldb_private::RegisterInfoInterface(target_arch),
49aae0a752SEugene Zemtsov       m_register_info_p(GetRegisterInfoPtr(target_arch)),
50aae0a752SEugene Zemtsov       m_register_info_count(GetRegisterInfoCount(target_arch)) {}
51aae0a752SEugene Zemtsov 
GetGPRSize() const52aae0a752SEugene Zemtsov size_t RegisterInfoPOSIX_ppc64le::GetGPRSize() const {
53aae0a752SEugene Zemtsov   return sizeof(GPR);
54aae0a752SEugene Zemtsov }
55aae0a752SEugene Zemtsov 
56aae0a752SEugene Zemtsov const lldb_private::RegisterInfo *
GetRegisterInfo() const57aae0a752SEugene Zemtsov RegisterInfoPOSIX_ppc64le::GetRegisterInfo() const {
58aae0a752SEugene Zemtsov   return m_register_info_p;
59aae0a752SEugene Zemtsov }
60aae0a752SEugene Zemtsov 
GetRegisterCount() const61aae0a752SEugene Zemtsov uint32_t RegisterInfoPOSIX_ppc64le::GetRegisterCount() const {
62aae0a752SEugene Zemtsov   return m_register_info_count;
63aae0a752SEugene Zemtsov }
64