1 //===-- RegisterInfoPOSIX_arm.cpp ------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===---------------------------------------------------------------------===// 8 9 #include <cassert> 10 #include <stddef.h> 11 #include <vector> 12 13 #include "lldb/lldb-defines.h" 14 #include "llvm/Support/Compiler.h" 15 16 #include "RegisterInfoPOSIX_arm.h" 17 18 using namespace lldb; 19 using namespace lldb_private; 20 21 // Based on RegisterContextDarwin_arm.cpp 22 #define GPR_OFFSET(idx) ((idx)*4) 23 #define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterInfoPOSIX_arm::GPR)) 24 #define FPSCR_OFFSET \ 25 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::FPU, fpscr) + \ 26 sizeof(RegisterInfoPOSIX_arm::GPR)) 27 #define EXC_OFFSET(idx) \ 28 ((idx)*4 + sizeof(RegisterInfoPOSIX_arm::GPR) + \ 29 sizeof(RegisterInfoPOSIX_arm::FPU)) 30 #define DBG_OFFSET(reg) \ 31 ((LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::DBG, reg) + \ 32 sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \ 33 sizeof(RegisterInfoPOSIX_arm::EXC))) 34 35 #define DEFINE_DBG(reg, i) \ 36 #reg, NULL, sizeof(((RegisterInfoPOSIX_arm::DBG *) NULL)->reg[i]), \ 37 DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, \ 38 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 39 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 40 dbg_##reg##i }, \ 41 NULL, NULL, NULL, 0 42 #define REG_CONTEXT_SIZE \ 43 (sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \ 44 sizeof(RegisterInfoPOSIX_arm::EXC)) 45 46 //----------------------------------------------------------------------------- 47 // Include RegisterInfos_arm to declare our g_register_infos_arm structure. 48 //----------------------------------------------------------------------------- 49 #define DECLARE_REGISTER_INFOS_ARM_STRUCT 50 #include "RegisterInfos_arm.h" 51 #undef DECLARE_REGISTER_INFOS_ARM_STRUCT 52 53 static const lldb_private::RegisterInfo * 54 GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) { 55 switch (target_arch.GetMachine()) { 56 case llvm::Triple::arm: 57 return g_register_infos_arm; 58 default: 59 assert(false && "Unhandled target architecture."); 60 return NULL; 61 } 62 } 63 64 static uint32_t 65 GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) { 66 switch (target_arch.GetMachine()) { 67 case llvm::Triple::arm: 68 return static_cast<uint32_t>(sizeof(g_register_infos_arm) / 69 sizeof(g_register_infos_arm[0])); 70 default: 71 assert(false && "Unhandled target architecture."); 72 return 0; 73 } 74 } 75 76 RegisterInfoPOSIX_arm::RegisterInfoPOSIX_arm( 77 const lldb_private::ArchSpec &target_arch) 78 : lldb_private::RegisterInfoInterface(target_arch), 79 m_register_info_p(GetRegisterInfoPtr(target_arch)), 80 m_register_info_count(GetRegisterInfoCount(target_arch)) {} 81 82 size_t RegisterInfoPOSIX_arm::GetGPRSize() const { 83 return sizeof(struct RegisterInfoPOSIX_arm::GPR); 84 } 85 86 const lldb_private::RegisterInfo * 87 RegisterInfoPOSIX_arm::GetRegisterInfo() const { 88 return m_register_info_p; 89 } 90 91 uint32_t RegisterInfoPOSIX_arm::GetRegisterCount() const { 92 return m_register_info_count; 93 } 94