1 //===-- RegisterInfoPOSIX_arm.cpp ------------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===---------------------------------------------------------------------===// 9 10 #include <cassert> 11 #include <stddef.h> 12 #include <vector> 13 14 #include "lldb/lldb-defines.h" 15 #include "llvm/Support/Compiler.h" 16 17 #include "RegisterInfoPOSIX_arm.h" 18 19 using namespace lldb; 20 using namespace lldb_private; 21 22 // Based on RegisterContextDarwin_arm.cpp 23 #define GPR_OFFSET(idx) ((idx)*4) 24 #define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterInfoPOSIX_arm::GPR)) 25 #define FPSCR_OFFSET \ 26 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::FPU, fpscr) + \ 27 sizeof(RegisterInfoPOSIX_arm::GPR)) 28 #define EXC_OFFSET(idx) \ 29 ((idx)*4 + sizeof(RegisterInfoPOSIX_arm::GPR) + \ 30 sizeof(RegisterInfoPOSIX_arm::FPU)) 31 #define DBG_OFFSET(reg) \ 32 ((LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::DBG, reg) + \ 33 sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \ 34 sizeof(RegisterInfoPOSIX_arm::EXC))) 35 36 #define DEFINE_DBG(reg, i) \ 37 #reg, NULL, sizeof(((RegisterInfoPOSIX_arm::DBG *) NULL)->reg[i]), \ 38 DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, \ 39 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 40 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 41 dbg_##reg##i }, \ 42 NULL, NULL, NULL, 0 43 #define REG_CONTEXT_SIZE \ 44 (sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \ 45 sizeof(RegisterInfoPOSIX_arm::EXC)) 46 47 //----------------------------------------------------------------------------- 48 // Include RegisterInfos_arm to declare our g_register_infos_arm structure. 49 //----------------------------------------------------------------------------- 50 #define DECLARE_REGISTER_INFOS_ARM_STRUCT 51 #include "RegisterInfos_arm.h" 52 #undef DECLARE_REGISTER_INFOS_ARM_STRUCT 53 54 static const lldb_private::RegisterInfo * 55 GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) { 56 switch (target_arch.GetMachine()) { 57 case llvm::Triple::arm: 58 return g_register_infos_arm; 59 default: 60 assert(false && "Unhandled target architecture."); 61 return NULL; 62 } 63 } 64 65 static uint32_t 66 GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) { 67 switch (target_arch.GetMachine()) { 68 case llvm::Triple::arm: 69 return static_cast<uint32_t>(sizeof(g_register_infos_arm) / 70 sizeof(g_register_infos_arm[0])); 71 default: 72 assert(false && "Unhandled target architecture."); 73 return 0; 74 } 75 } 76 77 RegisterInfoPOSIX_arm::RegisterInfoPOSIX_arm( 78 const lldb_private::ArchSpec &target_arch) 79 : lldb_private::RegisterInfoInterface(target_arch), 80 m_register_info_p(GetRegisterInfoPtr(target_arch)), 81 m_register_info_count(GetRegisterInfoCount(target_arch)) {} 82 83 size_t RegisterInfoPOSIX_arm::GetGPRSize() const { 84 return sizeof(struct RegisterInfoPOSIX_arm::GPR); 85 } 86 87 const lldb_private::RegisterInfo * 88 RegisterInfoPOSIX_arm::GetRegisterInfo() const { 89 return m_register_info_p; 90 } 91 92 uint32_t RegisterInfoPOSIX_arm::GetRegisterCount() const { 93 return m_register_info_count; 94 } 95