1 //===-- RegisterContextFreeBSD_x86_64.cpp ----------------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===---------------------------------------------------------------------===//
9 
10 #include <vector>
11 #include "RegisterContextPOSIX_x86.h"
12 #include "RegisterContextFreeBSD_i386.h"
13 #include "RegisterContextFreeBSD_x86_64.h"
14 
15 using namespace lldb_private;
16 using namespace lldb;
17 
18 // http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h
19 typedef struct _GPR
20 {
21     uint64_t r15;
22     uint64_t r14;
23     uint64_t r13;
24     uint64_t r12;
25     uint64_t r11;
26     uint64_t r10;
27     uint64_t r9;
28     uint64_t r8;
29     uint64_t rdi;
30     uint64_t rsi;
31     uint64_t rbp;
32     uint64_t rbx;
33     uint64_t rdx;
34     uint64_t rcx;
35     uint64_t rax;
36     uint32_t trapno;
37     uint16_t fs;
38     uint16_t gs;
39     uint32_t err;
40     uint16_t es;
41     uint16_t ds;
42     uint64_t rip;
43     uint64_t cs;
44     uint64_t rflags;
45     uint64_t rsp;
46     uint64_t ss;
47 } GPR;
48 
49 struct dbreg {
50        uint64_t  dr[16];  /* debug registers */
51                           /* Index 0-3: debug address registers */
52                           /* Index 4-5: reserved */
53                           /* Index 6: debug status */
54                           /* Index 7: debug control */
55                           /* Index 8-15: reserved */
56 };
57 
58 #define DR_SIZE sizeof(uint64_t)
59 #define DR_OFFSET(reg_index) \
60     (LLVM_EXTENSION offsetof(dbreg, dr[reg_index]))
61 
62 
63 //---------------------------------------------------------------------------
64 // Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 structure.
65 //---------------------------------------------------------------------------
66 #define DECLARE_REGISTER_INFOS_X86_64_STRUCT
67 #include "RegisterInfos_x86_64.h"
68 #undef DECLARE_REGISTER_INFOS_X86_64_STRUCT
69 
70 static std::vector<lldb_private::RegisterInfo>&
71 GetSharedRegisterInfoVector ()
72 {
73     static std::vector<lldb_private::RegisterInfo> register_infos;
74     return register_infos;
75 }
76 
77 static const RegisterInfo *
78 GetRegisterInfo_i386(const lldb_private::ArchSpec& arch)
79 {
80     static std::vector<lldb_private::RegisterInfo> g_register_infos (GetSharedRegisterInfoVector ());
81 
82     // Allocate RegisterInfo only once
83     if (g_register_infos.empty())
84     {
85         // Copy the register information from base class
86         std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface(new RegisterContextFreeBSD_i386 (arch));
87         const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
88         g_register_infos.insert(g_register_infos.end(), &base_info[0], &base_info[k_num_registers_i386]);
89 
90         //---------------------------------------------------------------------------
91         // Include RegisterInfos_x86_64 to update the g_register_infos structure
92         //  with x86_64 offsets.
93         //---------------------------------------------------------------------------
94         #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
95         #include "RegisterInfos_x86_64.h"
96         #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
97     }
98 
99     return &g_register_infos[0];
100 }
101 
102 static const RegisterInfo *
103 PrivateGetRegisterInfoPtr (const lldb_private::ArchSpec& target_arch)
104 {
105     switch (target_arch.GetMachine())
106     {
107         case llvm::Triple::x86:
108             return GetRegisterInfo_i386 (target_arch);
109         case llvm::Triple::x86_64:
110             return g_register_infos_x86_64;
111         default:
112             assert(false && "Unhandled target architecture.");
113             return nullptr;
114     }
115 }
116 
117 static uint32_t
118 PrivateGetRegisterCount (const lldb_private::ArchSpec& target_arch)
119 {
120     switch (target_arch.GetMachine())
121     {
122         case llvm::Triple::x86:
123             // This vector should have already been filled.
124             assert (!GetSharedRegisterInfoVector ().empty () && "i386 register info vector not filled.");
125             return static_cast<uint32_t> (GetSharedRegisterInfoVector().size ());
126         case llvm::Triple::x86_64:
127             return static_cast<uint32_t> (sizeof (g_register_infos_x86_64) / sizeof (g_register_infos_x86_64 [0]));
128         default:
129             assert(false && "Unhandled target architecture.");
130             return 0;
131     }
132 }
133 
134 RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64(const ArchSpec &target_arch) :
135     lldb_private::RegisterInfoInterface(target_arch),
136     m_register_info_p (PrivateGetRegisterInfoPtr (target_arch)),
137     m_register_count (PrivateGetRegisterCount (target_arch))
138 {
139 }
140 
141 size_t
142 RegisterContextFreeBSD_x86_64::GetGPRSize() const
143 {
144     return sizeof(GPR);
145 }
146 
147 const RegisterInfo *
148 RegisterContextFreeBSD_x86_64::GetRegisterInfo() const
149 {
150     return m_register_info_p;
151 }
152 
153 uint32_t
154 RegisterContextFreeBSD_x86_64::GetRegisterCount () const
155 {
156     return m_register_count;
157 }
158 
159 
160