1 //===-- NativeRegisterContextLinux_x86_64.cpp ---------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #if defined(__i386__) || defined(__x86_64__) 11 12 #include "NativeRegisterContextLinux_x86_64.h" 13 14 #include "lldb/Core/RegisterValue.h" 15 #include "lldb/Host/HostInfo.h" 16 #include "lldb/Utility/DataBufferHeap.h" 17 #include "lldb/Utility/Log.h" 18 #include "lldb/Utility/Status.h" 19 20 #include "Plugins/Process/Utility/RegisterContextLinux_i386.h" 21 #include "Plugins/Process/Utility/RegisterContextLinux_x86_64.h" 22 23 #include <linux/elf.h> 24 25 using namespace lldb_private; 26 using namespace lldb_private::process_linux; 27 28 // ---------------------------------------------------------------------------- 29 // Private namespace. 30 // ---------------------------------------------------------------------------- 31 32 namespace { 33 // x86 32-bit general purpose registers. 34 const uint32_t g_gpr_regnums_i386[] = { 35 lldb_eax_i386, lldb_ebx_i386, lldb_ecx_i386, lldb_edx_i386, 36 lldb_edi_i386, lldb_esi_i386, lldb_ebp_i386, lldb_esp_i386, 37 lldb_eip_i386, lldb_eflags_i386, lldb_cs_i386, lldb_fs_i386, 38 lldb_gs_i386, lldb_ss_i386, lldb_ds_i386, lldb_es_i386, 39 lldb_ax_i386, lldb_bx_i386, lldb_cx_i386, lldb_dx_i386, 40 lldb_di_i386, lldb_si_i386, lldb_bp_i386, lldb_sp_i386, 41 lldb_ah_i386, lldb_bh_i386, lldb_ch_i386, lldb_dh_i386, 42 lldb_al_i386, lldb_bl_i386, lldb_cl_i386, lldb_dl_i386, 43 LLDB_INVALID_REGNUM // register sets need to end with this flag 44 }; 45 static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) - 46 1 == 47 k_num_gpr_registers_i386, 48 "g_gpr_regnums_i386 has wrong number of register infos"); 49 50 // x86 32-bit floating point registers. 51 const uint32_t g_fpu_regnums_i386[] = { 52 lldb_fctrl_i386, lldb_fstat_i386, lldb_ftag_i386, lldb_fop_i386, 53 lldb_fiseg_i386, lldb_fioff_i386, lldb_foseg_i386, lldb_fooff_i386, 54 lldb_mxcsr_i386, lldb_mxcsrmask_i386, lldb_st0_i386, lldb_st1_i386, 55 lldb_st2_i386, lldb_st3_i386, lldb_st4_i386, lldb_st5_i386, 56 lldb_st6_i386, lldb_st7_i386, lldb_mm0_i386, lldb_mm1_i386, 57 lldb_mm2_i386, lldb_mm3_i386, lldb_mm4_i386, lldb_mm5_i386, 58 lldb_mm6_i386, lldb_mm7_i386, lldb_xmm0_i386, lldb_xmm1_i386, 59 lldb_xmm2_i386, lldb_xmm3_i386, lldb_xmm4_i386, lldb_xmm5_i386, 60 lldb_xmm6_i386, lldb_xmm7_i386, 61 LLDB_INVALID_REGNUM // register sets need to end with this flag 62 }; 63 static_assert((sizeof(g_fpu_regnums_i386) / sizeof(g_fpu_regnums_i386[0])) - 64 1 == 65 k_num_fpr_registers_i386, 66 "g_fpu_regnums_i386 has wrong number of register infos"); 67 68 // x86 32-bit AVX registers. 69 const uint32_t g_avx_regnums_i386[] = { 70 lldb_ymm0_i386, lldb_ymm1_i386, lldb_ymm2_i386, lldb_ymm3_i386, 71 lldb_ymm4_i386, lldb_ymm5_i386, lldb_ymm6_i386, lldb_ymm7_i386, 72 LLDB_INVALID_REGNUM // register sets need to end with this flag 73 }; 74 static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) - 75 1 == 76 k_num_avx_registers_i386, 77 " g_avx_regnums_i386 has wrong number of register infos"); 78 79 // x64 32-bit MPX registers. 80 static const uint32_t g_mpx_regnums_i386[] = { 81 lldb_bnd0_i386, lldb_bnd1_i386, lldb_bnd2_i386, lldb_bnd3_i386, 82 lldb_bndcfgu_i386, lldb_bndstatus_i386, 83 LLDB_INVALID_REGNUM // register sets need to end with this flag 84 }; 85 static_assert((sizeof(g_mpx_regnums_i386) / sizeof(g_mpx_regnums_i386[0])) - 86 1 == 87 k_num_mpx_registers_i386, 88 "g_mpx_regnums_x86_64 has wrong number of register infos"); 89 90 // x86 64-bit general purpose registers. 91 static const uint32_t g_gpr_regnums_x86_64[] = { 92 lldb_rax_x86_64, lldb_rbx_x86_64, lldb_rcx_x86_64, lldb_rdx_x86_64, 93 lldb_rdi_x86_64, lldb_rsi_x86_64, lldb_rbp_x86_64, lldb_rsp_x86_64, 94 lldb_r8_x86_64, lldb_r9_x86_64, lldb_r10_x86_64, lldb_r11_x86_64, 95 lldb_r12_x86_64, lldb_r13_x86_64, lldb_r14_x86_64, lldb_r15_x86_64, 96 lldb_rip_x86_64, lldb_rflags_x86_64, lldb_cs_x86_64, lldb_fs_x86_64, 97 lldb_gs_x86_64, lldb_ss_x86_64, lldb_ds_x86_64, lldb_es_x86_64, 98 lldb_eax_x86_64, lldb_ebx_x86_64, lldb_ecx_x86_64, lldb_edx_x86_64, 99 lldb_edi_x86_64, lldb_esi_x86_64, lldb_ebp_x86_64, lldb_esp_x86_64, 100 lldb_r8d_x86_64, // Low 32 bits or r8 101 lldb_r9d_x86_64, // Low 32 bits or r9 102 lldb_r10d_x86_64, // Low 32 bits or r10 103 lldb_r11d_x86_64, // Low 32 bits or r11 104 lldb_r12d_x86_64, // Low 32 bits or r12 105 lldb_r13d_x86_64, // Low 32 bits or r13 106 lldb_r14d_x86_64, // Low 32 bits or r14 107 lldb_r15d_x86_64, // Low 32 bits or r15 108 lldb_ax_x86_64, lldb_bx_x86_64, lldb_cx_x86_64, lldb_dx_x86_64, 109 lldb_di_x86_64, lldb_si_x86_64, lldb_bp_x86_64, lldb_sp_x86_64, 110 lldb_r8w_x86_64, // Low 16 bits or r8 111 lldb_r9w_x86_64, // Low 16 bits or r9 112 lldb_r10w_x86_64, // Low 16 bits or r10 113 lldb_r11w_x86_64, // Low 16 bits or r11 114 lldb_r12w_x86_64, // Low 16 bits or r12 115 lldb_r13w_x86_64, // Low 16 bits or r13 116 lldb_r14w_x86_64, // Low 16 bits or r14 117 lldb_r15w_x86_64, // Low 16 bits or r15 118 lldb_ah_x86_64, lldb_bh_x86_64, lldb_ch_x86_64, lldb_dh_x86_64, 119 lldb_al_x86_64, lldb_bl_x86_64, lldb_cl_x86_64, lldb_dl_x86_64, 120 lldb_dil_x86_64, lldb_sil_x86_64, lldb_bpl_x86_64, lldb_spl_x86_64, 121 lldb_r8l_x86_64, // Low 8 bits or r8 122 lldb_r9l_x86_64, // Low 8 bits or r9 123 lldb_r10l_x86_64, // Low 8 bits or r10 124 lldb_r11l_x86_64, // Low 8 bits or r11 125 lldb_r12l_x86_64, // Low 8 bits or r12 126 lldb_r13l_x86_64, // Low 8 bits or r13 127 lldb_r14l_x86_64, // Low 8 bits or r14 128 lldb_r15l_x86_64, // Low 8 bits or r15 129 LLDB_INVALID_REGNUM // register sets need to end with this flag 130 }; 131 static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) - 132 1 == 133 k_num_gpr_registers_x86_64, 134 "g_gpr_regnums_x86_64 has wrong number of register infos"); 135 136 // x86 64-bit floating point registers. 137 static const uint32_t g_fpu_regnums_x86_64[] = { 138 lldb_fctrl_x86_64, lldb_fstat_x86_64, lldb_ftag_x86_64, 139 lldb_fop_x86_64, lldb_fiseg_x86_64, lldb_fioff_x86_64, 140 lldb_foseg_x86_64, lldb_fooff_x86_64, lldb_mxcsr_x86_64, 141 lldb_mxcsrmask_x86_64, lldb_st0_x86_64, lldb_st1_x86_64, 142 lldb_st2_x86_64, lldb_st3_x86_64, lldb_st4_x86_64, 143 lldb_st5_x86_64, lldb_st6_x86_64, lldb_st7_x86_64, 144 lldb_mm0_x86_64, lldb_mm1_x86_64, lldb_mm2_x86_64, 145 lldb_mm3_x86_64, lldb_mm4_x86_64, lldb_mm5_x86_64, 146 lldb_mm6_x86_64, lldb_mm7_x86_64, lldb_xmm0_x86_64, 147 lldb_xmm1_x86_64, lldb_xmm2_x86_64, lldb_xmm3_x86_64, 148 lldb_xmm4_x86_64, lldb_xmm5_x86_64, lldb_xmm6_x86_64, 149 lldb_xmm7_x86_64, lldb_xmm8_x86_64, lldb_xmm9_x86_64, 150 lldb_xmm10_x86_64, lldb_xmm11_x86_64, lldb_xmm12_x86_64, 151 lldb_xmm13_x86_64, lldb_xmm14_x86_64, lldb_xmm15_x86_64, 152 LLDB_INVALID_REGNUM // register sets need to end with this flag 153 }; 154 static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) - 155 1 == 156 k_num_fpr_registers_x86_64, 157 "g_fpu_regnums_x86_64 has wrong number of register infos"); 158 159 // x86 64-bit AVX registers. 160 static const uint32_t g_avx_regnums_x86_64[] = { 161 lldb_ymm0_x86_64, lldb_ymm1_x86_64, lldb_ymm2_x86_64, lldb_ymm3_x86_64, 162 lldb_ymm4_x86_64, lldb_ymm5_x86_64, lldb_ymm6_x86_64, lldb_ymm7_x86_64, 163 lldb_ymm8_x86_64, lldb_ymm9_x86_64, lldb_ymm10_x86_64, lldb_ymm11_x86_64, 164 lldb_ymm12_x86_64, lldb_ymm13_x86_64, lldb_ymm14_x86_64, lldb_ymm15_x86_64, 165 LLDB_INVALID_REGNUM // register sets need to end with this flag 166 }; 167 static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) - 168 1 == 169 k_num_avx_registers_x86_64, 170 "g_avx_regnums_x86_64 has wrong number of register infos"); 171 172 // x86 64-bit MPX registers. 173 static const uint32_t g_mpx_regnums_x86_64[] = { 174 lldb_bnd0_x86_64, lldb_bnd1_x86_64, lldb_bnd2_x86_64, 175 lldb_bnd3_x86_64, lldb_bndcfgu_x86_64, lldb_bndstatus_x86_64, 176 LLDB_INVALID_REGNUM // register sets need to end with this flag 177 }; 178 static_assert((sizeof(g_mpx_regnums_x86_64) / sizeof(g_mpx_regnums_x86_64[0])) - 179 1 == 180 k_num_mpx_registers_x86_64, 181 "g_mpx_regnums_x86_64 has wrong number of register infos"); 182 183 // Number of register sets provided by this context. 184 enum { k_num_extended_register_sets = 2, k_num_register_sets = 4 }; 185 186 // Register sets for x86 32-bit. 187 static const RegisterSet g_reg_sets_i386[k_num_register_sets] = { 188 {"General Purpose Registers", "gpr", k_num_gpr_registers_i386, 189 g_gpr_regnums_i386}, 190 {"Floating Point Registers", "fpu", k_num_fpr_registers_i386, 191 g_fpu_regnums_i386}, 192 {"Advanced Vector Extensions", "avx", k_num_avx_registers_i386, 193 g_avx_regnums_i386}, 194 { "Memory Protection Extensions", "mpx", k_num_mpx_registers_i386, 195 g_mpx_regnums_i386}}; 196 197 // Register sets for x86 64-bit. 198 static const RegisterSet g_reg_sets_x86_64[k_num_register_sets] = { 199 {"General Purpose Registers", "gpr", k_num_gpr_registers_x86_64, 200 g_gpr_regnums_x86_64}, 201 {"Floating Point Registers", "fpu", k_num_fpr_registers_x86_64, 202 g_fpu_regnums_x86_64}, 203 {"Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64, 204 g_avx_regnums_x86_64}, 205 { "Memory Protection Extensions", "mpx", k_num_mpx_registers_x86_64, 206 g_mpx_regnums_x86_64}}; 207 } 208 209 #define REG_CONTEXT_SIZE (GetRegisterInfoInterface().GetGPRSize() + sizeof(FPR)) 210 211 // ---------------------------------------------------------------------------- 212 // Required ptrace defines. 213 // ---------------------------------------------------------------------------- 214 215 // Support ptrace extensions even when compiled without required kernel support 216 #ifndef NT_X86_XSTATE 217 #define NT_X86_XSTATE 0x202 218 #endif 219 #ifndef NT_PRXFPREG 220 #define NT_PRXFPREG 0x46e62b7f 221 #endif 222 223 // On x86_64 NT_PRFPREG is used to access the FXSAVE area. On i386, we need to 224 // use NT_PRXFPREG. 225 static inline unsigned int fxsr_regset(const ArchSpec &arch) { 226 return arch.GetAddressByteSize() == 8 ? NT_PRFPREG : NT_PRXFPREG; 227 } 228 229 // ---------------------------------------------------------------------------- 230 // Required MPX define. 231 // ---------------------------------------------------------------------------- 232 233 // Support MPX extensions also if compiled with compiler without MPX support. 234 #ifndef bit_MPX 235 #define bit_MPX 0x4000 236 #endif 237 238 // ---------------------------------------------------------------------------- 239 // XCR0 extended register sets masks. 240 // ---------------------------------------------------------------------------- 241 #define mask_XSTATE_AVX (1ULL << 2) 242 #define mask_XSTATE_BNDREGS (1ULL << 3) 243 #define mask_XSTATE_BNDCFG (1ULL << 4) 244 #define mask_XSTATE_MPX (mask_XSTATE_BNDREGS | mask_XSTATE_BNDCFG) 245 246 std::unique_ptr<NativeRegisterContextLinux> 247 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux( 248 const ArchSpec &target_arch, NativeThreadProtocol &native_thread) { 249 return std::unique_ptr<NativeRegisterContextLinux>( 250 new NativeRegisterContextLinux_x86_64(target_arch, native_thread)); 251 } 252 253 // ---------------------------------------------------------------------------- 254 // NativeRegisterContextLinux_x86_64 members. 255 // ---------------------------------------------------------------------------- 256 257 static RegisterInfoInterface * 258 CreateRegisterInfoInterface(const ArchSpec &target_arch) { 259 if (HostInfo::GetArchitecture().GetAddressByteSize() == 4) { 260 // 32-bit hosts run with a RegisterContextLinux_i386 context. 261 return new RegisterContextLinux_i386(target_arch); 262 } else { 263 assert((HostInfo::GetArchitecture().GetAddressByteSize() == 8) && 264 "Register setting path assumes this is a 64-bit host"); 265 // X86_64 hosts know how to work with 64-bit and 32-bit EXEs using the 266 // x86_64 register context. 267 return new RegisterContextLinux_x86_64(target_arch); 268 } 269 } 270 271 NativeRegisterContextLinux_x86_64::NativeRegisterContextLinux_x86_64( 272 const ArchSpec &target_arch, NativeThreadProtocol &native_thread) 273 : NativeRegisterContextLinux(native_thread, 274 CreateRegisterInfoInterface(target_arch)), 275 m_xstate_type(XStateType::Invalid), m_fpr(), m_iovec(), m_ymm_set(), 276 m_mpx_set(), m_reg_info(), m_gpr_x86_64() { 277 // Set up data about ranges of valid registers. 278 switch (target_arch.GetMachine()) { 279 case llvm::Triple::x86: 280 m_reg_info.num_registers = k_num_registers_i386; 281 m_reg_info.num_gpr_registers = k_num_gpr_registers_i386; 282 m_reg_info.num_fpr_registers = k_num_fpr_registers_i386; 283 m_reg_info.num_avx_registers = k_num_avx_registers_i386; 284 m_reg_info.num_mpx_registers = k_num_mpx_registers_i386; 285 m_reg_info.last_gpr = k_last_gpr_i386; 286 m_reg_info.first_fpr = k_first_fpr_i386; 287 m_reg_info.last_fpr = k_last_fpr_i386; 288 m_reg_info.first_st = lldb_st0_i386; 289 m_reg_info.last_st = lldb_st7_i386; 290 m_reg_info.first_mm = lldb_mm0_i386; 291 m_reg_info.last_mm = lldb_mm7_i386; 292 m_reg_info.first_xmm = lldb_xmm0_i386; 293 m_reg_info.last_xmm = lldb_xmm7_i386; 294 m_reg_info.first_ymm = lldb_ymm0_i386; 295 m_reg_info.last_ymm = lldb_ymm7_i386; 296 m_reg_info.first_mpxr = lldb_bnd0_i386; 297 m_reg_info.last_mpxr = lldb_bnd3_i386; 298 m_reg_info.first_mpxc = lldb_bndcfgu_i386; 299 m_reg_info.last_mpxc = lldb_bndstatus_i386; 300 m_reg_info.first_dr = lldb_dr0_i386; 301 m_reg_info.gpr_flags = lldb_eflags_i386; 302 break; 303 case llvm::Triple::x86_64: 304 m_reg_info.num_registers = k_num_registers_x86_64; 305 m_reg_info.num_gpr_registers = k_num_gpr_registers_x86_64; 306 m_reg_info.num_fpr_registers = k_num_fpr_registers_x86_64; 307 m_reg_info.num_avx_registers = k_num_avx_registers_x86_64; 308 m_reg_info.num_mpx_registers = k_num_mpx_registers_x86_64; 309 m_reg_info.last_gpr = k_last_gpr_x86_64; 310 m_reg_info.first_fpr = k_first_fpr_x86_64; 311 m_reg_info.last_fpr = k_last_fpr_x86_64; 312 m_reg_info.first_st = lldb_st0_x86_64; 313 m_reg_info.last_st = lldb_st7_x86_64; 314 m_reg_info.first_mm = lldb_mm0_x86_64; 315 m_reg_info.last_mm = lldb_mm7_x86_64; 316 m_reg_info.first_xmm = lldb_xmm0_x86_64; 317 m_reg_info.last_xmm = lldb_xmm15_x86_64; 318 m_reg_info.first_ymm = lldb_ymm0_x86_64; 319 m_reg_info.last_ymm = lldb_ymm15_x86_64; 320 m_reg_info.first_mpxr = lldb_bnd0_x86_64; 321 m_reg_info.last_mpxr = lldb_bnd3_x86_64; 322 m_reg_info.first_mpxc = lldb_bndcfgu_x86_64; 323 m_reg_info.last_mpxc = lldb_bndstatus_x86_64; 324 m_reg_info.first_dr = lldb_dr0_x86_64; 325 m_reg_info.gpr_flags = lldb_rflags_x86_64; 326 break; 327 default: 328 assert(false && "Unhandled target architecture."); 329 break; 330 } 331 332 // Initialize m_iovec to point to the buffer and buffer size 333 // using the conventions of Berkeley style UIO structures, as required 334 // by PTRACE extensions. 335 m_iovec.iov_base = &m_fpr.xstate.xsave; 336 m_iovec.iov_len = sizeof(m_fpr.xstate.xsave); 337 338 // Clear out the FPR state. 339 ::memset(&m_fpr, 0, sizeof(FPR)); 340 341 // Store byte offset of fctrl (i.e. first register of FPR) 342 const RegisterInfo *reg_info_fctrl = GetRegisterInfoByName("fctrl"); 343 m_fctrl_offset_in_userarea = reg_info_fctrl->byte_offset; 344 } 345 346 // CONSIDER after local and llgs debugging are merged, register set support can 347 // be moved into a base x86-64 class with IsRegisterSetAvailable made virtual. 348 uint32_t NativeRegisterContextLinux_x86_64::GetRegisterSetCount() const { 349 uint32_t sets = 0; 350 for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) { 351 if (IsRegisterSetAvailable(set_index)) 352 ++sets; 353 } 354 355 return sets; 356 } 357 358 uint32_t NativeRegisterContextLinux_x86_64::GetUserRegisterCount() const { 359 uint32_t count = 0; 360 for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) { 361 const RegisterSet *set = GetRegisterSet(set_index); 362 if (set) 363 count += set->num_registers; 364 } 365 return count; 366 } 367 368 const RegisterSet * 369 NativeRegisterContextLinux_x86_64::GetRegisterSet(uint32_t set_index) const { 370 if (!IsRegisterSetAvailable(set_index)) 371 return nullptr; 372 373 switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) { 374 case llvm::Triple::x86: 375 return &g_reg_sets_i386[set_index]; 376 case llvm::Triple::x86_64: 377 return &g_reg_sets_x86_64[set_index]; 378 default: 379 assert(false && "Unhandled target architecture."); 380 return nullptr; 381 } 382 383 return nullptr; 384 } 385 386 Status 387 NativeRegisterContextLinux_x86_64::ReadRegister(const RegisterInfo *reg_info, 388 RegisterValue ®_value) { 389 Status error; 390 391 if (!reg_info) { 392 error.SetErrorString("reg_info NULL"); 393 return error; 394 } 395 396 const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB]; 397 if (reg == LLDB_INVALID_REGNUM) { 398 // This is likely an internal register for lldb use only and should not be 399 // directly queried. 400 error.SetErrorStringWithFormat("register \"%s\" is an internal-only lldb " 401 "register, cannot read directly", 402 reg_info->name); 403 return error; 404 } 405 406 if (IsFPR(reg) || IsAVX(reg) || IsMPX(reg)) { 407 error = ReadFPR(); 408 if (error.Fail()) 409 return error; 410 } else { 411 uint32_t full_reg = reg; 412 bool is_subreg = reg_info->invalidate_regs && 413 (reg_info->invalidate_regs[0] != LLDB_INVALID_REGNUM); 414 415 if (is_subreg) { 416 // Read the full aligned 64-bit register. 417 full_reg = reg_info->invalidate_regs[0]; 418 } 419 420 error = ReadRegisterRaw(full_reg, reg_value); 421 422 if (error.Success()) { 423 // If our read was not aligned (for ah,bh,ch,dh), shift our returned value 424 // one byte to the right. 425 if (is_subreg && (reg_info->byte_offset & 0x1)) 426 reg_value.SetUInt64(reg_value.GetAsUInt64() >> 8); 427 428 // If our return byte size was greater than the return value reg size, 429 // then 430 // use the type specified by reg_info rather than the uint64_t default 431 if (reg_value.GetByteSize() > reg_info->byte_size) 432 reg_value.SetType(reg_info); 433 } 434 return error; 435 } 436 437 if (reg_info->encoding == lldb::eEncodingVector) { 438 lldb::ByteOrder byte_order = GetByteOrder(); 439 440 if (byte_order != lldb::eByteOrderInvalid) { 441 if (reg >= m_reg_info.first_st && reg <= m_reg_info.last_st) 442 reg_value.SetBytes( 443 m_fpr.xstate.fxsave.stmm[reg - m_reg_info.first_st].bytes, 444 reg_info->byte_size, byte_order); 445 if (reg >= m_reg_info.first_mm && reg <= m_reg_info.last_mm) 446 reg_value.SetBytes( 447 m_fpr.xstate.fxsave.stmm[reg - m_reg_info.first_mm].bytes, 448 reg_info->byte_size, byte_order); 449 if (reg >= m_reg_info.first_xmm && reg <= m_reg_info.last_xmm) 450 reg_value.SetBytes( 451 m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_xmm].bytes, 452 reg_info->byte_size, byte_order); 453 if (reg >= m_reg_info.first_ymm && reg <= m_reg_info.last_ymm) { 454 // Concatenate ymm using the register halves in xmm.bytes and ymmh.bytes 455 if (CopyXSTATEtoYMM(reg, byte_order)) 456 reg_value.SetBytes(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, 457 reg_info->byte_size, byte_order); 458 else { 459 error.SetErrorString("failed to copy ymm register value"); 460 return error; 461 } 462 } 463 if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) { 464 if (CopyXSTATEtoMPX(reg)) 465 reg_value.SetBytes(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes, 466 reg_info->byte_size, byte_order); 467 else { 468 error.SetErrorString("failed to copy mpx register value"); 469 return error; 470 } 471 } 472 if (reg >= m_reg_info.first_mpxc && reg <= m_reg_info.last_mpxc) { 473 if (CopyXSTATEtoMPX(reg)) 474 reg_value.SetBytes(m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes, 475 reg_info->byte_size, byte_order); 476 else { 477 error.SetErrorString("failed to copy mpx register value"); 478 return error; 479 } 480 } 481 482 if (reg_value.GetType() != RegisterValue::eTypeBytes) 483 error.SetErrorString( 484 "write failed - type was expected to be RegisterValue::eTypeBytes"); 485 486 return error; 487 } 488 489 error.SetErrorString("byte order is invalid"); 490 return error; 491 } 492 493 // Get pointer to m_fpr.xstate.fxsave variable and set the data from it. 494 495 // Byte offsets of all registers are calculated wrt 'UserArea' structure. 496 // However, ReadFPR() reads fpu registers {using ptrace(PTRACE_GETFPREGS,..)} 497 // and stores them in 'm_fpr' (of type FPR structure). To extract values of 498 // fpu 499 // registers, m_fpr should be read at byte offsets calculated wrt to FPR 500 // structure. 501 502 // Since, FPR structure is also one of the member of UserArea structure. 503 // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) - 504 // byte_offset(fctrl wrt UserArea) 505 assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(m_fpr)); 506 uint8_t *src = 507 (uint8_t *)&m_fpr + reg_info->byte_offset - m_fctrl_offset_in_userarea; 508 switch (reg_info->byte_size) { 509 case 1: 510 reg_value.SetUInt8(*(uint8_t *)src); 511 break; 512 case 2: 513 reg_value.SetUInt16(*(uint16_t *)src); 514 break; 515 case 4: 516 reg_value.SetUInt32(*(uint32_t *)src); 517 break; 518 case 8: 519 reg_value.SetUInt64(*(uint64_t *)src); 520 break; 521 default: 522 assert(false && "Unhandled data size."); 523 error.SetErrorStringWithFormat("unhandled byte size: %" PRIu32, 524 reg_info->byte_size); 525 break; 526 } 527 528 return error; 529 } 530 531 void NativeRegisterContextLinux_x86_64::UpdateXSTATEforWrite( 532 uint32_t reg_index) { 533 XSAVE_HDR::XFeature &xstate_bv = m_fpr.xstate.xsave.header.xstate_bv; 534 if (IsFPR(reg_index)) { 535 // IsFPR considers both %st and %xmm registers as floating point, but these 536 // map to two features. Set both flags, just in case. 537 xstate_bv |= XSAVE_HDR::XFeature::FP | XSAVE_HDR::XFeature::SSE; 538 } else if (IsAVX(reg_index)) { 539 // Lower bytes of some %ymm registers are shared with %xmm registers. 540 xstate_bv |= XSAVE_HDR::XFeature::YMM | XSAVE_HDR::XFeature::SSE; 541 } else if (IsMPX(reg_index)) { 542 // MPX registers map to two XSAVE features. 543 xstate_bv |= XSAVE_HDR::XFeature::BNDREGS | XSAVE_HDR::XFeature::BNDCSR; 544 } 545 } 546 547 Status NativeRegisterContextLinux_x86_64::WriteRegister( 548 const RegisterInfo *reg_info, const RegisterValue ®_value) { 549 assert(reg_info && "reg_info is null"); 550 551 const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB]; 552 if (reg_index == LLDB_INVALID_REGNUM) 553 return Status("no lldb regnum for %s", reg_info && reg_info->name 554 ? reg_info->name 555 : "<unknown register>"); 556 557 UpdateXSTATEforWrite(reg_index); 558 559 if (IsGPR(reg_index)) 560 return WriteRegisterRaw(reg_index, reg_value); 561 562 if (IsFPR(reg_index) || IsAVX(reg_index) || IsMPX(reg_index)) { 563 if (reg_info->encoding == lldb::eEncodingVector) { 564 if (reg_index >= m_reg_info.first_st && reg_index <= m_reg_info.last_st) 565 ::memcpy( 566 m_fpr.xstate.fxsave.stmm[reg_index - m_reg_info.first_st].bytes, 567 reg_value.GetBytes(), reg_value.GetByteSize()); 568 569 if (reg_index >= m_reg_info.first_mm && reg_index <= m_reg_info.last_mm) 570 ::memcpy( 571 m_fpr.xstate.fxsave.stmm[reg_index - m_reg_info.first_mm].bytes, 572 reg_value.GetBytes(), reg_value.GetByteSize()); 573 574 if (reg_index >= m_reg_info.first_xmm && reg_index <= m_reg_info.last_xmm) 575 ::memcpy( 576 m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_xmm].bytes, 577 reg_value.GetBytes(), reg_value.GetByteSize()); 578 579 if (reg_index >= m_reg_info.first_ymm && 580 reg_index <= m_reg_info.last_ymm) { 581 // Store ymm register content, and split into the register halves in 582 // xmm.bytes and ymmh.bytes 583 ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes, 584 reg_value.GetBytes(), reg_value.GetByteSize()); 585 if (!CopyYMMtoXSTATE(reg_index, GetByteOrder())) 586 return Status("CopyYMMtoXSTATE() failed"); 587 } 588 589 if (reg_index >= m_reg_info.first_mpxr && 590 reg_index <= m_reg_info.last_mpxr) { 591 ::memcpy(m_mpx_set.mpxr[reg_index - m_reg_info.first_mpxr].bytes, 592 reg_value.GetBytes(), reg_value.GetByteSize()); 593 if (!CopyMPXtoXSTATE(reg_index)) 594 return Status("CopyMPXtoXSTATE() failed"); 595 } 596 597 if (reg_index >= m_reg_info.first_mpxc && 598 reg_index <= m_reg_info.last_mpxc) { 599 ::memcpy(m_mpx_set.mpxc[reg_index - m_reg_info.first_mpxc].bytes, 600 reg_value.GetBytes(), reg_value.GetByteSize()); 601 if (!CopyMPXtoXSTATE(reg_index)) 602 return Status("CopyMPXtoXSTATE() failed"); 603 } 604 } else { 605 // Get pointer to m_fpr.xstate.fxsave variable and set the data to it. 606 607 // Byte offsets of all registers are calculated wrt 'UserArea' structure. 608 // However, WriteFPR() takes m_fpr (of type FPR structure) and writes only 609 // fpu 610 // registers using ptrace(PTRACE_SETFPREGS,..) API. Hence fpu registers 611 // should 612 // be written in m_fpr at byte offsets calculated wrt FPR structure. 613 614 // Since, FPR structure is also one of the member of UserArea structure. 615 // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) - 616 // byte_offset(fctrl wrt UserArea) 617 assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) < 618 sizeof(m_fpr)); 619 uint8_t *dst = (uint8_t *)&m_fpr + reg_info->byte_offset - 620 m_fctrl_offset_in_userarea; 621 switch (reg_info->byte_size) { 622 case 1: 623 *(uint8_t *)dst = reg_value.GetAsUInt8(); 624 break; 625 case 2: 626 *(uint16_t *)dst = reg_value.GetAsUInt16(); 627 break; 628 case 4: 629 *(uint32_t *)dst = reg_value.GetAsUInt32(); 630 break; 631 case 8: 632 *(uint64_t *)dst = reg_value.GetAsUInt64(); 633 break; 634 default: 635 assert(false && "Unhandled data size."); 636 return Status("unhandled register data size %" PRIu32, 637 reg_info->byte_size); 638 } 639 } 640 641 Status error = WriteFPR(); 642 if (error.Fail()) 643 return error; 644 645 if (IsAVX(reg_index)) { 646 if (!CopyYMMtoXSTATE(reg_index, GetByteOrder())) 647 return Status("CopyYMMtoXSTATE() failed"); 648 } 649 650 if (IsMPX(reg_index)) { 651 if (!CopyMPXtoXSTATE(reg_index)) 652 return Status("CopyMPXtoXSTATE() failed"); 653 } 654 return Status(); 655 } 656 return Status("failed - register wasn't recognized to be a GPR or an FPR, " 657 "write strategy unknown"); 658 } 659 660 Status NativeRegisterContextLinux_x86_64::ReadAllRegisterValues( 661 lldb::DataBufferSP &data_sp) { 662 Status error; 663 664 data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0)); 665 error = ReadGPR(); 666 if (error.Fail()) 667 return error; 668 669 error = ReadFPR(); 670 if (error.Fail()) 671 return error; 672 673 uint8_t *dst = data_sp->GetBytes(); 674 ::memcpy(dst, &m_gpr_x86_64, GetRegisterInfoInterface().GetGPRSize()); 675 dst += GetRegisterInfoInterface().GetGPRSize(); 676 if (m_xstate_type == XStateType::FXSAVE) 677 ::memcpy(dst, &m_fpr.xstate.fxsave, sizeof(m_fpr.xstate.fxsave)); 678 else if (m_xstate_type == XStateType::XSAVE) { 679 lldb::ByteOrder byte_order = GetByteOrder(); 680 681 if (IsCPUFeatureAvailable(RegSet::avx)) { 682 // Assemble the YMM register content from the register halves. 683 for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm; 684 ++reg) { 685 if (!CopyXSTATEtoYMM(reg, byte_order)) { 686 error.SetErrorStringWithFormat( 687 "NativeRegisterContextLinux_x86_64::%s " 688 "CopyXSTATEtoYMM() failed for reg num " 689 "%" PRIu32, 690 __FUNCTION__, reg); 691 return error; 692 } 693 } 694 } 695 696 if (IsCPUFeatureAvailable(RegSet::mpx)) { 697 for (uint32_t reg = m_reg_info.first_mpxr; reg <= m_reg_info.last_mpxc; 698 ++reg) { 699 if (!CopyXSTATEtoMPX(reg)) { 700 error.SetErrorStringWithFormat( 701 "NativeRegisterContextLinux_x86_64::%s " 702 "CopyXSTATEtoMPX() failed for reg num " 703 "%" PRIu32, 704 __FUNCTION__, reg); 705 return error; 706 } 707 } 708 } 709 // Copy the extended register state including the assembled ymm registers. 710 ::memcpy(dst, &m_fpr, sizeof(m_fpr)); 711 } else { 712 assert(false && "how do we save the floating point registers?"); 713 error.SetErrorString("unsure how to save the floating point registers"); 714 } 715 /** The following code is specific to Linux x86 based architectures, 716 * where the register orig_eax (32 bit)/orig_rax (64 bit) is set to 717 * -1 to solve the bug 23659, such a setting prevents the automatic 718 * decrement of the instruction pointer which was causing the SIGILL 719 * exception. 720 * **/ 721 722 RegisterValue value((uint64_t)-1); 723 const RegisterInfo *reg_info = 724 GetRegisterInfoInterface().GetDynamicRegisterInfo("orig_eax"); 725 if (reg_info == nullptr) 726 reg_info = GetRegisterInfoInterface().GetDynamicRegisterInfo("orig_rax"); 727 728 if (reg_info != nullptr) 729 return DoWriteRegisterValue(reg_info->byte_offset, reg_info->name, value); 730 731 return error; 732 } 733 734 Status NativeRegisterContextLinux_x86_64::WriteAllRegisterValues( 735 const lldb::DataBufferSP &data_sp) { 736 Status error; 737 738 if (!data_sp) { 739 error.SetErrorStringWithFormat( 740 "NativeRegisterContextLinux_x86_64::%s invalid data_sp provided", 741 __FUNCTION__); 742 return error; 743 } 744 745 if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) { 746 error.SetErrorStringWithFormatv( 747 "data_sp contained mismatched data size, expected {0}, actual {1}", 748 REG_CONTEXT_SIZE, data_sp->GetByteSize()); 749 return error; 750 } 751 752 uint8_t *src = data_sp->GetBytes(); 753 if (src == nullptr) { 754 error.SetErrorStringWithFormat("NativeRegisterContextLinux_x86_64::%s " 755 "DataBuffer::GetBytes() returned a null " 756 "pointer", 757 __FUNCTION__); 758 return error; 759 } 760 ::memcpy(&m_gpr_x86_64, src, GetRegisterInfoInterface().GetGPRSize()); 761 762 error = WriteGPR(); 763 if (error.Fail()) 764 return error; 765 766 src += GetRegisterInfoInterface().GetGPRSize(); 767 if (m_xstate_type == XStateType::FXSAVE) 768 ::memcpy(&m_fpr.xstate.fxsave, src, sizeof(m_fpr.xstate.fxsave)); 769 else if (m_xstate_type == XStateType::XSAVE) 770 ::memcpy(&m_fpr.xstate.xsave, src, sizeof(m_fpr.xstate.xsave)); 771 772 error = WriteFPR(); 773 if (error.Fail()) 774 return error; 775 776 if (m_xstate_type == XStateType::XSAVE) { 777 lldb::ByteOrder byte_order = GetByteOrder(); 778 779 if (IsCPUFeatureAvailable(RegSet::avx)) { 780 // Parse the YMM register content from the register halves. 781 for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm; 782 ++reg) { 783 if (!CopyYMMtoXSTATE(reg, byte_order)) { 784 error.SetErrorStringWithFormat( 785 "NativeRegisterContextLinux_x86_64::%s " 786 "CopyYMMtoXSTATE() failed for reg num " 787 "%" PRIu32, 788 __FUNCTION__, reg); 789 return error; 790 } 791 } 792 } 793 794 if (IsCPUFeatureAvailable(RegSet::mpx)) { 795 for (uint32_t reg = m_reg_info.first_mpxr; reg <= m_reg_info.last_mpxc; 796 ++reg) { 797 if (!CopyMPXtoXSTATE(reg)) { 798 error.SetErrorStringWithFormat( 799 "NativeRegisterContextLinux_x86_64::%s " 800 "CopyMPXtoXSTATE() failed for reg num " 801 "%" PRIu32, 802 __FUNCTION__, reg); 803 return error; 804 } 805 } 806 } 807 } 808 809 return error; 810 } 811 812 bool NativeRegisterContextLinux_x86_64::IsCPUFeatureAvailable( 813 RegSet feature_code) const { 814 if (m_xstate_type == XStateType::Invalid) { 815 if (const_cast<NativeRegisterContextLinux_x86_64 *>(this)->ReadFPR().Fail()) 816 return false; 817 } 818 switch (feature_code) { 819 case RegSet::gpr: 820 case RegSet::fpu: 821 return true; 822 case RegSet::avx: // Check if CPU has AVX and if there is kernel support, by 823 // reading in the XCR0 area of XSAVE. 824 if ((m_fpr.xstate.xsave.i387.xcr0 & mask_XSTATE_AVX) == mask_XSTATE_AVX) 825 return true; 826 break; 827 case RegSet::mpx: // Check if CPU has MPX and if there is kernel support, by 828 // reading in the XCR0 area of XSAVE. 829 if ((m_fpr.xstate.xsave.i387.xcr0 & mask_XSTATE_MPX) == mask_XSTATE_MPX) 830 return true; 831 break; 832 } 833 return false; 834 } 835 836 bool NativeRegisterContextLinux_x86_64::IsRegisterSetAvailable( 837 uint32_t set_index) const { 838 uint32_t num_sets = k_num_register_sets - k_num_extended_register_sets; 839 840 switch (static_cast<RegSet>(set_index)) { 841 case RegSet::gpr: 842 case RegSet::fpu: 843 return (set_index < num_sets); 844 case RegSet::avx: 845 return IsCPUFeatureAvailable(RegSet::avx); 846 case RegSet::mpx: 847 return IsCPUFeatureAvailable(RegSet::mpx); 848 } 849 return false; 850 } 851 852 bool NativeRegisterContextLinux_x86_64::IsGPR(uint32_t reg_index) const { 853 // GPRs come first. 854 return reg_index <= m_reg_info.last_gpr; 855 } 856 857 bool NativeRegisterContextLinux_x86_64::IsFPR(uint32_t reg_index) const { 858 return (m_reg_info.first_fpr <= reg_index && 859 reg_index <= m_reg_info.last_fpr); 860 } 861 862 Status NativeRegisterContextLinux_x86_64::WriteFPR() { 863 switch (m_xstate_type) { 864 case XStateType::FXSAVE: 865 return WriteRegisterSet( 866 &m_iovec, sizeof(m_fpr.xstate.xsave), 867 fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture())); 868 case XStateType::XSAVE: 869 return WriteRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), 870 NT_X86_XSTATE); 871 default: 872 return Status("Unrecognized FPR type."); 873 } 874 } 875 876 bool NativeRegisterContextLinux_x86_64::IsAVX(uint32_t reg_index) const { 877 if (!IsCPUFeatureAvailable(RegSet::avx)) 878 return false; 879 return (m_reg_info.first_ymm <= reg_index && 880 reg_index <= m_reg_info.last_ymm); 881 } 882 883 bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoYMM( 884 uint32_t reg_index, lldb::ByteOrder byte_order) { 885 if (!IsAVX(reg_index)) 886 return false; 887 888 if (byte_order == lldb::eByteOrderLittle) { 889 ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes, 890 m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_ymm].bytes, 891 sizeof(XMMReg)); 892 ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes + 893 sizeof(XMMReg), 894 m_fpr.xstate.xsave.ymmh[reg_index - m_reg_info.first_ymm].bytes, 895 sizeof(YMMHReg)); 896 return true; 897 } 898 899 if (byte_order == lldb::eByteOrderBig) { 900 ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes + 901 sizeof(XMMReg), 902 m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_ymm].bytes, 903 sizeof(XMMReg)); 904 ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes, 905 m_fpr.xstate.xsave.ymmh[reg_index - m_reg_info.first_ymm].bytes, 906 sizeof(YMMHReg)); 907 return true; 908 } 909 return false; // unsupported or invalid byte order 910 } 911 912 bool NativeRegisterContextLinux_x86_64::CopyYMMtoXSTATE( 913 uint32_t reg, lldb::ByteOrder byte_order) { 914 if (!IsAVX(reg)) 915 return false; 916 917 if (byte_order == lldb::eByteOrderLittle) { 918 ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes, 919 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(XMMReg)); 920 ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes, 921 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg), 922 sizeof(YMMHReg)); 923 return true; 924 } 925 926 if (byte_order == lldb::eByteOrderBig) { 927 ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes, 928 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg), 929 sizeof(XMMReg)); 930 ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes, 931 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(YMMHReg)); 932 return true; 933 } 934 return false; // unsupported or invalid byte order 935 } 936 937 void *NativeRegisterContextLinux_x86_64::GetFPRBuffer() { 938 switch (m_xstate_type) { 939 case XStateType::FXSAVE: 940 return &m_fpr.xstate.fxsave; 941 case XStateType::XSAVE: 942 return &m_iovec; 943 default: 944 return nullptr; 945 } 946 } 947 948 size_t NativeRegisterContextLinux_x86_64::GetFPRSize() { 949 switch (m_xstate_type) { 950 case XStateType::FXSAVE: 951 return sizeof(m_fpr.xstate.fxsave); 952 case XStateType::XSAVE: 953 return sizeof(m_iovec); 954 default: 955 return 0; 956 } 957 } 958 959 Status NativeRegisterContextLinux_x86_64::ReadFPR() { 960 Status error; 961 962 // Probe XSAVE and if it is not supported fall back to FXSAVE. 963 if (m_xstate_type != XStateType::FXSAVE) { 964 error = 965 ReadRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_X86_XSTATE); 966 if (!error.Fail()) { 967 m_xstate_type = XStateType::XSAVE; 968 return error; 969 } 970 } 971 error = ReadRegisterSet( 972 &m_iovec, sizeof(m_fpr.xstate.xsave), 973 fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture())); 974 if (!error.Fail()) { 975 m_xstate_type = XStateType::FXSAVE; 976 return error; 977 } 978 return Status("Unrecognized FPR type."); 979 } 980 981 bool NativeRegisterContextLinux_x86_64::IsMPX(uint32_t reg_index) const { 982 if (!IsCPUFeatureAvailable(RegSet::mpx)) 983 return false; 984 return (m_reg_info.first_mpxr <= reg_index && 985 reg_index <= m_reg_info.last_mpxc); 986 } 987 988 bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoMPX(uint32_t reg) { 989 if (!IsMPX(reg)) 990 return false; 991 992 if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) { 993 ::memcpy(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes, 994 m_fpr.xstate.xsave.mpxr[reg - m_reg_info.first_mpxr].bytes, 995 sizeof(MPXReg)); 996 } else { 997 ::memcpy(m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes, 998 m_fpr.xstate.xsave.mpxc[reg - m_reg_info.first_mpxc].bytes, 999 sizeof(MPXCsr)); 1000 } 1001 return true; 1002 } 1003 1004 bool NativeRegisterContextLinux_x86_64::CopyMPXtoXSTATE(uint32_t reg) { 1005 if (!IsMPX(reg)) 1006 return false; 1007 1008 if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) { 1009 ::memcpy(m_fpr.xstate.xsave.mpxr[reg - m_reg_info.first_mpxr].bytes, 1010 m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes, sizeof(MPXReg)); 1011 } else { 1012 ::memcpy(m_fpr.xstate.xsave.mpxc[reg - m_reg_info.first_mpxc].bytes, 1013 m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes, sizeof(MPXCsr)); 1014 } 1015 return true; 1016 } 1017 1018 Status NativeRegisterContextLinux_x86_64::IsWatchpointHit(uint32_t wp_index, 1019 bool &is_hit) { 1020 if (wp_index >= NumSupportedHardwareWatchpoints()) 1021 return Status("Watchpoint index out of range"); 1022 1023 RegisterValue reg_value; 1024 Status error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value); 1025 if (error.Fail()) { 1026 is_hit = false; 1027 return error; 1028 } 1029 1030 uint64_t status_bits = reg_value.GetAsUInt64(); 1031 1032 is_hit = status_bits & (1 << wp_index); 1033 1034 return error; 1035 } 1036 1037 Status NativeRegisterContextLinux_x86_64::GetWatchpointHitIndex( 1038 uint32_t &wp_index, lldb::addr_t trap_addr) { 1039 uint32_t num_hw_wps = NumSupportedHardwareWatchpoints(); 1040 for (wp_index = 0; wp_index < num_hw_wps; ++wp_index) { 1041 bool is_hit; 1042 Status error = IsWatchpointHit(wp_index, is_hit); 1043 if (error.Fail()) { 1044 wp_index = LLDB_INVALID_INDEX32; 1045 return error; 1046 } else if (is_hit) { 1047 return error; 1048 } 1049 } 1050 wp_index = LLDB_INVALID_INDEX32; 1051 return Status(); 1052 } 1053 1054 Status NativeRegisterContextLinux_x86_64::IsWatchpointVacant(uint32_t wp_index, 1055 bool &is_vacant) { 1056 if (wp_index >= NumSupportedHardwareWatchpoints()) 1057 return Status("Watchpoint index out of range"); 1058 1059 RegisterValue reg_value; 1060 Status error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value); 1061 if (error.Fail()) { 1062 is_vacant = false; 1063 return error; 1064 } 1065 1066 uint64_t control_bits = reg_value.GetAsUInt64(); 1067 1068 is_vacant = !(control_bits & (1 << (2 * wp_index))); 1069 1070 return error; 1071 } 1072 1073 Status NativeRegisterContextLinux_x86_64::SetHardwareWatchpointWithIndex( 1074 lldb::addr_t addr, size_t size, uint32_t watch_flags, uint32_t wp_index) { 1075 1076 if (wp_index >= NumSupportedHardwareWatchpoints()) 1077 return Status("Watchpoint index out of range"); 1078 1079 // Read only watchpoints aren't supported on x86_64. Fall back to read/write 1080 // waitchpoints instead. 1081 // TODO: Add logic to detect when a write happens and ignore that watchpoint 1082 // hit. 1083 if (watch_flags == 0x2) 1084 watch_flags = 0x3; 1085 1086 if (watch_flags != 0x1 && watch_flags != 0x3) 1087 return Status("Invalid read/write bits for watchpoint"); 1088 1089 if (size != 1 && size != 2 && size != 4 && size != 8) 1090 return Status("Invalid size for watchpoint"); 1091 1092 bool is_vacant; 1093 Status error = IsWatchpointVacant(wp_index, is_vacant); 1094 if (error.Fail()) 1095 return error; 1096 if (!is_vacant) 1097 return Status("Watchpoint index not vacant"); 1098 1099 RegisterValue reg_value; 1100 error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value); 1101 if (error.Fail()) 1102 return error; 1103 1104 // for watchpoints 0, 1, 2, or 3, respectively, 1105 // set bits 1, 3, 5, or 7 1106 uint64_t enable_bit = 1 << (2 * wp_index); 1107 1108 // set bits 16-17, 20-21, 24-25, or 28-29 1109 // with 0b01 for write, and 0b11 for read/write 1110 uint64_t rw_bits = watch_flags << (16 + 4 * wp_index); 1111 1112 // set bits 18-19, 22-23, 26-27, or 30-31 1113 // with 0b00, 0b01, 0b10, or 0b11 1114 // for 1, 2, 8 (if supported), or 4 bytes, respectively 1115 uint64_t size_bits = (size == 8 ? 0x2 : size - 1) << (18 + 4 * wp_index); 1116 1117 uint64_t bit_mask = (0x3 << (2 * wp_index)) | (0xF << (16 + 4 * wp_index)); 1118 1119 uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask; 1120 1121 control_bits |= enable_bit | rw_bits | size_bits; 1122 1123 error = WriteRegisterRaw(m_reg_info.first_dr + wp_index, RegisterValue(addr)); 1124 if (error.Fail()) 1125 return error; 1126 1127 error = 1128 WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits)); 1129 if (error.Fail()) 1130 return error; 1131 1132 error.Clear(); 1133 return error; 1134 } 1135 1136 bool NativeRegisterContextLinux_x86_64::ClearHardwareWatchpoint( 1137 uint32_t wp_index) { 1138 if (wp_index >= NumSupportedHardwareWatchpoints()) 1139 return false; 1140 1141 RegisterValue reg_value; 1142 1143 // for watchpoints 0, 1, 2, or 3, respectively, 1144 // clear bits 0, 1, 2, or 3 of the debug status register (DR6) 1145 Status error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value); 1146 if (error.Fail()) 1147 return false; 1148 uint64_t bit_mask = 1 << wp_index; 1149 uint64_t status_bits = reg_value.GetAsUInt64() & ~bit_mask; 1150 error = WriteRegisterRaw(m_reg_info.first_dr + 6, RegisterValue(status_bits)); 1151 if (error.Fail()) 1152 return false; 1153 1154 // for watchpoints 0, 1, 2, or 3, respectively, 1155 // clear bits {0-1,16-19}, {2-3,20-23}, {4-5,24-27}, or {6-7,28-31} 1156 // of the debug control register (DR7) 1157 error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value); 1158 if (error.Fail()) 1159 return false; 1160 bit_mask = (0x3 << (2 * wp_index)) | (0xF << (16 + 4 * wp_index)); 1161 uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask; 1162 return WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits)) 1163 .Success(); 1164 } 1165 1166 Status NativeRegisterContextLinux_x86_64::ClearAllHardwareWatchpoints() { 1167 RegisterValue reg_value; 1168 1169 // clear bits {0-4} of the debug status register (DR6) 1170 Status error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value); 1171 if (error.Fail()) 1172 return error; 1173 uint64_t bit_mask = 0xF; 1174 uint64_t status_bits = reg_value.GetAsUInt64() & ~bit_mask; 1175 error = WriteRegisterRaw(m_reg_info.first_dr + 6, RegisterValue(status_bits)); 1176 if (error.Fail()) 1177 return error; 1178 1179 // clear bits {0-7,16-31} of the debug control register (DR7) 1180 error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value); 1181 if (error.Fail()) 1182 return error; 1183 bit_mask = 0xFF | (0xFFFF << 16); 1184 uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask; 1185 return WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits)); 1186 } 1187 1188 uint32_t NativeRegisterContextLinux_x86_64::SetHardwareWatchpoint( 1189 lldb::addr_t addr, size_t size, uint32_t watch_flags) { 1190 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS)); 1191 const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints(); 1192 for (uint32_t wp_index = 0; wp_index < num_hw_watchpoints; ++wp_index) { 1193 bool is_vacant; 1194 Status error = IsWatchpointVacant(wp_index, is_vacant); 1195 if (is_vacant) { 1196 error = SetHardwareWatchpointWithIndex(addr, size, watch_flags, wp_index); 1197 if (error.Success()) 1198 return wp_index; 1199 } 1200 if (error.Fail() && log) { 1201 log->Printf("NativeRegisterContextLinux_x86_64::%s Error: %s", 1202 __FUNCTION__, error.AsCString()); 1203 } 1204 } 1205 return LLDB_INVALID_INDEX32; 1206 } 1207 1208 lldb::addr_t 1209 NativeRegisterContextLinux_x86_64::GetWatchpointAddress(uint32_t wp_index) { 1210 if (wp_index >= NumSupportedHardwareWatchpoints()) 1211 return LLDB_INVALID_ADDRESS; 1212 RegisterValue reg_value; 1213 if (ReadRegisterRaw(m_reg_info.first_dr + wp_index, reg_value).Fail()) 1214 return LLDB_INVALID_ADDRESS; 1215 return reg_value.GetAsUInt64(); 1216 } 1217 1218 uint32_t NativeRegisterContextLinux_x86_64::NumSupportedHardwareWatchpoints() { 1219 // Available debug address registers: dr0, dr1, dr2, dr3 1220 return 4; 1221 } 1222 1223 #endif // defined(__i386__) || defined(__x86_64__) 1224