1 //===-- NativeRegisterContextLinux_x86_64.cpp ---------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #if defined(__i386__) || defined(__x86_64__) 11 12 #include "NativeRegisterContextLinux_x86_64.h" 13 14 #include "lldb/Core/Log.h" 15 #include "lldb/Core/DataBufferHeap.h" 16 #include "lldb/Core/Error.h" 17 #include "lldb/Core/RegisterValue.h" 18 #include "lldb/Host/HostInfo.h" 19 20 #include "Plugins/Process/Utility/RegisterContextLinux_i386.h" 21 #include "Plugins/Process/Utility/RegisterContextLinux_x86_64.h" 22 23 using namespace lldb_private; 24 using namespace lldb_private::process_linux; 25 26 // ---------------------------------------------------------------------------- 27 // Private namespace. 28 // ---------------------------------------------------------------------------- 29 30 namespace 31 { 32 // x86 32-bit general purpose registers. 33 const uint32_t 34 g_gpr_regnums_i386[] = 35 { 36 lldb_eax_i386, 37 lldb_ebx_i386, 38 lldb_ecx_i386, 39 lldb_edx_i386, 40 lldb_edi_i386, 41 lldb_esi_i386, 42 lldb_ebp_i386, 43 lldb_esp_i386, 44 lldb_eip_i386, 45 lldb_eflags_i386, 46 lldb_cs_i386, 47 lldb_fs_i386, 48 lldb_gs_i386, 49 lldb_ss_i386, 50 lldb_ds_i386, 51 lldb_es_i386, 52 lldb_ax_i386, 53 lldb_bx_i386, 54 lldb_cx_i386, 55 lldb_dx_i386, 56 lldb_di_i386, 57 lldb_si_i386, 58 lldb_bp_i386, 59 lldb_sp_i386, 60 lldb_ah_i386, 61 lldb_bh_i386, 62 lldb_ch_i386, 63 lldb_dh_i386, 64 lldb_al_i386, 65 lldb_bl_i386, 66 lldb_cl_i386, 67 lldb_dl_i386, 68 LLDB_INVALID_REGNUM // register sets need to end with this flag 69 }; 70 static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) - 1 == k_num_gpr_registers_i386, 71 "g_gpr_regnums_i386 has wrong number of register infos"); 72 73 // x86 32-bit floating point registers. 74 const uint32_t 75 g_fpu_regnums_i386[] = 76 { 77 lldb_fctrl_i386, 78 lldb_fstat_i386, 79 lldb_ftag_i386, 80 lldb_fop_i386, 81 lldb_fiseg_i386, 82 lldb_fioff_i386, 83 lldb_foseg_i386, 84 lldb_fooff_i386, 85 lldb_mxcsr_i386, 86 lldb_mxcsrmask_i386, 87 lldb_st0_i386, 88 lldb_st1_i386, 89 lldb_st2_i386, 90 lldb_st3_i386, 91 lldb_st4_i386, 92 lldb_st5_i386, 93 lldb_st6_i386, 94 lldb_st7_i386, 95 lldb_mm0_i386, 96 lldb_mm1_i386, 97 lldb_mm2_i386, 98 lldb_mm3_i386, 99 lldb_mm4_i386, 100 lldb_mm5_i386, 101 lldb_mm6_i386, 102 lldb_mm7_i386, 103 lldb_xmm0_i386, 104 lldb_xmm1_i386, 105 lldb_xmm2_i386, 106 lldb_xmm3_i386, 107 lldb_xmm4_i386, 108 lldb_xmm5_i386, 109 lldb_xmm6_i386, 110 lldb_xmm7_i386, 111 LLDB_INVALID_REGNUM // register sets need to end with this flag 112 }; 113 static_assert((sizeof(g_fpu_regnums_i386) / sizeof(g_fpu_regnums_i386[0])) - 1 == k_num_fpr_registers_i386, 114 "g_fpu_regnums_i386 has wrong number of register infos"); 115 116 // x86 32-bit AVX registers. 117 const uint32_t 118 g_avx_regnums_i386[] = 119 { 120 lldb_ymm0_i386, 121 lldb_ymm1_i386, 122 lldb_ymm2_i386, 123 lldb_ymm3_i386, 124 lldb_ymm4_i386, 125 lldb_ymm5_i386, 126 lldb_ymm6_i386, 127 lldb_ymm7_i386, 128 LLDB_INVALID_REGNUM // register sets need to end with this flag 129 }; 130 static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) - 1 == k_num_avx_registers_i386, 131 " g_avx_regnums_i386 has wrong number of register infos"); 132 133 // x86 64-bit general purpose registers. 134 static const 135 uint32_t g_gpr_regnums_x86_64[] = 136 { 137 lldb_rax_x86_64, 138 lldb_rbx_x86_64, 139 lldb_rcx_x86_64, 140 lldb_rdx_x86_64, 141 lldb_rdi_x86_64, 142 lldb_rsi_x86_64, 143 lldb_rbp_x86_64, 144 lldb_rsp_x86_64, 145 lldb_r8_x86_64, 146 lldb_r9_x86_64, 147 lldb_r10_x86_64, 148 lldb_r11_x86_64, 149 lldb_r12_x86_64, 150 lldb_r13_x86_64, 151 lldb_r14_x86_64, 152 lldb_r15_x86_64, 153 lldb_rip_x86_64, 154 lldb_rflags_x86_64, 155 lldb_cs_x86_64, 156 lldb_fs_x86_64, 157 lldb_gs_x86_64, 158 lldb_ss_x86_64, 159 lldb_ds_x86_64, 160 lldb_es_x86_64, 161 lldb_eax_x86_64, 162 lldb_ebx_x86_64, 163 lldb_ecx_x86_64, 164 lldb_edx_x86_64, 165 lldb_edi_x86_64, 166 lldb_esi_x86_64, 167 lldb_ebp_x86_64, 168 lldb_esp_x86_64, 169 lldb_r8d_x86_64, // Low 32 bits or r8 170 lldb_r9d_x86_64, // Low 32 bits or r9 171 lldb_r10d_x86_64, // Low 32 bits or r10 172 lldb_r11d_x86_64, // Low 32 bits or r11 173 lldb_r12d_x86_64, // Low 32 bits or r12 174 lldb_r13d_x86_64, // Low 32 bits or r13 175 lldb_r14d_x86_64, // Low 32 bits or r14 176 lldb_r15d_x86_64, // Low 32 bits or r15 177 lldb_ax_x86_64, 178 lldb_bx_x86_64, 179 lldb_cx_x86_64, 180 lldb_dx_x86_64, 181 lldb_di_x86_64, 182 lldb_si_x86_64, 183 lldb_bp_x86_64, 184 lldb_sp_x86_64, 185 lldb_r8w_x86_64, // Low 16 bits or r8 186 lldb_r9w_x86_64, // Low 16 bits or r9 187 lldb_r10w_x86_64, // Low 16 bits or r10 188 lldb_r11w_x86_64, // Low 16 bits or r11 189 lldb_r12w_x86_64, // Low 16 bits or r12 190 lldb_r13w_x86_64, // Low 16 bits or r13 191 lldb_r14w_x86_64, // Low 16 bits or r14 192 lldb_r15w_x86_64, // Low 16 bits or r15 193 lldb_ah_x86_64, 194 lldb_bh_x86_64, 195 lldb_ch_x86_64, 196 lldb_dh_x86_64, 197 lldb_al_x86_64, 198 lldb_bl_x86_64, 199 lldb_cl_x86_64, 200 lldb_dl_x86_64, 201 lldb_dil_x86_64, 202 lldb_sil_x86_64, 203 lldb_bpl_x86_64, 204 lldb_spl_x86_64, 205 lldb_r8l_x86_64, // Low 8 bits or r8 206 lldb_r9l_x86_64, // Low 8 bits or r9 207 lldb_r10l_x86_64, // Low 8 bits or r10 208 lldb_r11l_x86_64, // Low 8 bits or r11 209 lldb_r12l_x86_64, // Low 8 bits or r12 210 lldb_r13l_x86_64, // Low 8 bits or r13 211 lldb_r14l_x86_64, // Low 8 bits or r14 212 lldb_r15l_x86_64, // Low 8 bits or r15 213 LLDB_INVALID_REGNUM // register sets need to end with this flag 214 }; 215 static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) - 1 == k_num_gpr_registers_x86_64, 216 "g_gpr_regnums_x86_64 has wrong number of register infos"); 217 218 // x86 64-bit floating point registers. 219 static const uint32_t 220 g_fpu_regnums_x86_64[] = 221 { 222 lldb_fctrl_x86_64, 223 lldb_fstat_x86_64, 224 lldb_ftag_x86_64, 225 lldb_fop_x86_64, 226 lldb_fiseg_x86_64, 227 lldb_fioff_x86_64, 228 lldb_foseg_x86_64, 229 lldb_fooff_x86_64, 230 lldb_mxcsr_x86_64, 231 lldb_mxcsrmask_x86_64, 232 lldb_st0_x86_64, 233 lldb_st1_x86_64, 234 lldb_st2_x86_64, 235 lldb_st3_x86_64, 236 lldb_st4_x86_64, 237 lldb_st5_x86_64, 238 lldb_st6_x86_64, 239 lldb_st7_x86_64, 240 lldb_mm0_x86_64, 241 lldb_mm1_x86_64, 242 lldb_mm2_x86_64, 243 lldb_mm3_x86_64, 244 lldb_mm4_x86_64, 245 lldb_mm5_x86_64, 246 lldb_mm6_x86_64, 247 lldb_mm7_x86_64, 248 lldb_xmm0_x86_64, 249 lldb_xmm1_x86_64, 250 lldb_xmm2_x86_64, 251 lldb_xmm3_x86_64, 252 lldb_xmm4_x86_64, 253 lldb_xmm5_x86_64, 254 lldb_xmm6_x86_64, 255 lldb_xmm7_x86_64, 256 lldb_xmm8_x86_64, 257 lldb_xmm9_x86_64, 258 lldb_xmm10_x86_64, 259 lldb_xmm11_x86_64, 260 lldb_xmm12_x86_64, 261 lldb_xmm13_x86_64, 262 lldb_xmm14_x86_64, 263 lldb_xmm15_x86_64, 264 LLDB_INVALID_REGNUM // register sets need to end with this flag 265 }; 266 static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) - 1 == k_num_fpr_registers_x86_64, 267 "g_fpu_regnums_x86_64 has wrong number of register infos"); 268 269 // x86 64-bit AVX registers. 270 static const uint32_t 271 g_avx_regnums_x86_64[] = 272 { 273 lldb_ymm0_x86_64, 274 lldb_ymm1_x86_64, 275 lldb_ymm2_x86_64, 276 lldb_ymm3_x86_64, 277 lldb_ymm4_x86_64, 278 lldb_ymm5_x86_64, 279 lldb_ymm6_x86_64, 280 lldb_ymm7_x86_64, 281 lldb_ymm8_x86_64, 282 lldb_ymm9_x86_64, 283 lldb_ymm10_x86_64, 284 lldb_ymm11_x86_64, 285 lldb_ymm12_x86_64, 286 lldb_ymm13_x86_64, 287 lldb_ymm14_x86_64, 288 lldb_ymm15_x86_64, 289 LLDB_INVALID_REGNUM // register sets need to end with this flag 290 }; 291 static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) - 1 == k_num_avx_registers_x86_64, 292 "g_avx_regnums_x86_64 has wrong number of register infos"); 293 294 // Number of register sets provided by this context. 295 enum 296 { 297 k_num_extended_register_sets = 1, 298 k_num_register_sets = 3 299 }; 300 301 // Register sets for x86 32-bit. 302 static const RegisterSet 303 g_reg_sets_i386[k_num_register_sets] = 304 { 305 { "General Purpose Registers", "gpr", k_num_gpr_registers_i386, g_gpr_regnums_i386 }, 306 { "Floating Point Registers", "fpu", k_num_fpr_registers_i386, g_fpu_regnums_i386 }, 307 { "Advanced Vector Extensions", "avx", k_num_avx_registers_i386, g_avx_regnums_i386 } 308 }; 309 310 // Register sets for x86 64-bit. 311 static const RegisterSet 312 g_reg_sets_x86_64[k_num_register_sets] = 313 { 314 { "General Purpose Registers", "gpr", k_num_gpr_registers_x86_64, g_gpr_regnums_x86_64 }, 315 { "Floating Point Registers", "fpu", k_num_fpr_registers_x86_64, g_fpu_regnums_x86_64 }, 316 { "Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64, g_avx_regnums_x86_64 } 317 }; 318 } 319 320 #define REG_CONTEXT_SIZE (GetRegisterInfoInterface ().GetGPRSize () + sizeof(FPR)) 321 322 // ---------------------------------------------------------------------------- 323 // Required ptrace defines. 324 // ---------------------------------------------------------------------------- 325 326 // Support ptrace extensions even when compiled without required kernel support 327 #ifndef NT_X86_XSTATE 328 #define NT_X86_XSTATE 0x202 329 #endif 330 331 NativeRegisterContextLinux* 332 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(const ArchSpec& target_arch, 333 NativeThreadProtocol &native_thread, 334 uint32_t concrete_frame_idx) 335 { 336 return new NativeRegisterContextLinux_x86_64(target_arch, native_thread, concrete_frame_idx); 337 } 338 339 // ---------------------------------------------------------------------------- 340 // NativeRegisterContextLinux_x86_64 members. 341 // ---------------------------------------------------------------------------- 342 343 static RegisterInfoInterface* 344 CreateRegisterInfoInterface(const ArchSpec& target_arch) 345 { 346 if (HostInfo::GetArchitecture().GetAddressByteSize() == 4) 347 { 348 // 32-bit hosts run with a RegisterContextLinux_i386 context. 349 return new RegisterContextLinux_i386(target_arch); 350 } 351 else 352 { 353 assert((HostInfo::GetArchitecture().GetAddressByteSize() == 8) && 354 "Register setting path assumes this is a 64-bit host"); 355 // X86_64 hosts know how to work with 64-bit and 32-bit EXEs using the x86_64 register context. 356 return new RegisterContextLinux_x86_64 (target_arch); 357 } 358 } 359 360 NativeRegisterContextLinux_x86_64::NativeRegisterContextLinux_x86_64 (const ArchSpec& target_arch, 361 NativeThreadProtocol &native_thread, 362 uint32_t concrete_frame_idx) : 363 NativeRegisterContextLinux (native_thread, concrete_frame_idx, CreateRegisterInfoInterface(target_arch)), 364 m_fpr_type (eFPRTypeNotValid), 365 m_fpr (), 366 m_iovec (), 367 m_ymm_set (), 368 m_reg_info (), 369 m_gpr_x86_64 () 370 { 371 // Set up data about ranges of valid registers. 372 switch (target_arch.GetMachine ()) 373 { 374 case llvm::Triple::x86: 375 m_reg_info.num_registers = k_num_registers_i386; 376 m_reg_info.num_gpr_registers = k_num_gpr_registers_i386; 377 m_reg_info.num_fpr_registers = k_num_fpr_registers_i386; 378 m_reg_info.num_avx_registers = k_num_avx_registers_i386; 379 m_reg_info.last_gpr = k_last_gpr_i386; 380 m_reg_info.first_fpr = k_first_fpr_i386; 381 m_reg_info.last_fpr = k_last_fpr_i386; 382 m_reg_info.first_st = lldb_st0_i386; 383 m_reg_info.last_st = lldb_st7_i386; 384 m_reg_info.first_mm = lldb_mm0_i386; 385 m_reg_info.last_mm = lldb_mm7_i386; 386 m_reg_info.first_xmm = lldb_xmm0_i386; 387 m_reg_info.last_xmm = lldb_xmm7_i386; 388 m_reg_info.first_ymm = lldb_ymm0_i386; 389 m_reg_info.last_ymm = lldb_ymm7_i386; 390 m_reg_info.first_dr = lldb_dr0_i386; 391 m_reg_info.gpr_flags = lldb_eflags_i386; 392 break; 393 case llvm::Triple::x86_64: 394 m_reg_info.num_registers = k_num_registers_x86_64; 395 m_reg_info.num_gpr_registers = k_num_gpr_registers_x86_64; 396 m_reg_info.num_fpr_registers = k_num_fpr_registers_x86_64; 397 m_reg_info.num_avx_registers = k_num_avx_registers_x86_64; 398 m_reg_info.last_gpr = k_last_gpr_x86_64; 399 m_reg_info.first_fpr = k_first_fpr_x86_64; 400 m_reg_info.last_fpr = k_last_fpr_x86_64; 401 m_reg_info.first_st = lldb_st0_x86_64; 402 m_reg_info.last_st = lldb_st7_x86_64; 403 m_reg_info.first_mm = lldb_mm0_x86_64; 404 m_reg_info.last_mm = lldb_mm7_x86_64; 405 m_reg_info.first_xmm = lldb_xmm0_x86_64; 406 m_reg_info.last_xmm = lldb_xmm15_x86_64; 407 m_reg_info.first_ymm = lldb_ymm0_x86_64; 408 m_reg_info.last_ymm = lldb_ymm15_x86_64; 409 m_reg_info.first_dr = lldb_dr0_x86_64; 410 m_reg_info.gpr_flags = lldb_rflags_x86_64; 411 break; 412 default: 413 assert(false && "Unhandled target architecture."); 414 break; 415 } 416 417 // Initialize m_iovec to point to the buffer and buffer size 418 // using the conventions of Berkeley style UIO structures, as required 419 // by PTRACE extensions. 420 m_iovec.iov_base = &m_fpr.xstate.xsave; 421 m_iovec.iov_len = sizeof(m_fpr.xstate.xsave); 422 423 // Clear out the FPR state. 424 ::memset(&m_fpr, 0, sizeof(FPR)); 425 426 // Store byte offset of fctrl (i.e. first register of FPR) 427 const RegisterInfo *reg_info_fctrl = GetRegisterInfoByName("fctrl"); 428 m_fctrl_offset_in_userarea = reg_info_fctrl->byte_offset; 429 } 430 431 // CONSIDER after local and llgs debugging are merged, register set support can 432 // be moved into a base x86-64 class with IsRegisterSetAvailable made virtual. 433 uint32_t 434 NativeRegisterContextLinux_x86_64::GetRegisterSetCount () const 435 { 436 uint32_t sets = 0; 437 for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) 438 { 439 if (IsRegisterSetAvailable (set_index)) 440 ++sets; 441 } 442 443 return sets; 444 } 445 446 uint32_t 447 NativeRegisterContextLinux_x86_64::GetUserRegisterCount() const 448 { 449 uint32_t count = 0; 450 for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) 451 { 452 const RegisterSet* set = GetRegisterSet(set_index); 453 if (set) 454 count += set->num_registers; 455 } 456 return count; 457 } 458 459 const RegisterSet * 460 NativeRegisterContextLinux_x86_64::GetRegisterSet (uint32_t set_index) const 461 { 462 if (!IsRegisterSetAvailable (set_index)) 463 return nullptr; 464 465 switch (GetRegisterInfoInterface ().GetTargetArchitecture ().GetMachine ()) 466 { 467 case llvm::Triple::x86: 468 return &g_reg_sets_i386[set_index]; 469 case llvm::Triple::x86_64: 470 return &g_reg_sets_x86_64[set_index]; 471 default: 472 assert (false && "Unhandled target architecture."); 473 return nullptr; 474 } 475 476 return nullptr; 477 } 478 479 Error 480 NativeRegisterContextLinux_x86_64::ReadRegister (const RegisterInfo *reg_info, RegisterValue ®_value) 481 { 482 Error error; 483 484 if (!reg_info) 485 { 486 error.SetErrorString ("reg_info NULL"); 487 return error; 488 } 489 490 const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB]; 491 if (reg == LLDB_INVALID_REGNUM) 492 { 493 // This is likely an internal register for lldb use only and should not be directly queried. 494 error.SetErrorStringWithFormat ("register \"%s\" is an internal-only lldb register, cannot read directly", reg_info->name); 495 return error; 496 } 497 498 if (IsFPR(reg, GetFPRType())) 499 { 500 error = ReadFPR(); 501 if (error.Fail()) 502 return error; 503 } 504 else 505 { 506 uint32_t full_reg = reg; 507 bool is_subreg = reg_info->invalidate_regs && (reg_info->invalidate_regs[0] != LLDB_INVALID_REGNUM); 508 509 if (is_subreg) 510 { 511 // Read the full aligned 64-bit register. 512 full_reg = reg_info->invalidate_regs[0]; 513 } 514 515 error = ReadRegisterRaw(full_reg, reg_value); 516 517 if (error.Success ()) 518 { 519 // If our read was not aligned (for ah,bh,ch,dh), shift our returned value one byte to the right. 520 if (is_subreg && (reg_info->byte_offset & 0x1)) 521 reg_value.SetUInt64(reg_value.GetAsUInt64() >> 8); 522 523 // If our return byte size was greater than the return value reg size, then 524 // use the type specified by reg_info rather than the uint64_t default 525 if (reg_value.GetByteSize() > reg_info->byte_size) 526 reg_value.SetType(reg_info); 527 } 528 return error; 529 } 530 531 if (reg_info->encoding == lldb::eEncodingVector) 532 { 533 lldb::ByteOrder byte_order = GetByteOrder(); 534 535 if (byte_order != lldb::eByteOrderInvalid) 536 { 537 if (reg >= m_reg_info.first_st && reg <= m_reg_info.last_st) 538 reg_value.SetBytes(m_fpr.xstate.fxsave.stmm[reg - m_reg_info.first_st].bytes, reg_info->byte_size, byte_order); 539 if (reg >= m_reg_info.first_mm && reg <= m_reg_info.last_mm) 540 reg_value.SetBytes(m_fpr.xstate.fxsave.stmm[reg - m_reg_info.first_mm].bytes, reg_info->byte_size, byte_order); 541 if (reg >= m_reg_info.first_xmm && reg <= m_reg_info.last_xmm) 542 reg_value.SetBytes(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_xmm].bytes, reg_info->byte_size, byte_order); 543 if (reg >= m_reg_info.first_ymm && reg <= m_reg_info.last_ymm) 544 { 545 // Concatenate ymm using the register halves in xmm.bytes and ymmh.bytes 546 if (GetFPRType() == eFPRTypeXSAVE && CopyXSTATEtoYMM(reg, byte_order)) 547 reg_value.SetBytes(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, reg_info->byte_size, byte_order); 548 else 549 { 550 error.SetErrorString ("failed to copy ymm register value"); 551 return error; 552 } 553 } 554 555 if (reg_value.GetType() != RegisterValue::eTypeBytes) 556 error.SetErrorString ("write failed - type was expected to be RegisterValue::eTypeBytes"); 557 558 return error; 559 } 560 561 error.SetErrorString ("byte order is invalid"); 562 return error; 563 } 564 565 // Get pointer to m_fpr.xstate.fxsave variable and set the data from it. 566 567 // Byte offsets of all registers are calculated wrt 'UserArea' structure. 568 // However, ReadFPR() reads fpu registers {using ptrace(PTRACE_GETFPREGS,..)} 569 // and stores them in 'm_fpr' (of type FPR structure). To extract values of fpu 570 // registers, m_fpr should be read at byte offsets calculated wrt to FPR structure. 571 572 // Since, FPR structure is also one of the member of UserArea structure. 573 // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) - byte_offset(fctrl wrt UserArea) 574 assert ( (reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(m_fpr)); 575 uint8_t *src = (uint8_t *)&m_fpr + reg_info->byte_offset - m_fctrl_offset_in_userarea; 576 switch (reg_info->byte_size) 577 { 578 case 1: 579 reg_value.SetUInt8(*(uint8_t *)src); 580 break; 581 case 2: 582 reg_value.SetUInt16(*(uint16_t *)src); 583 break; 584 case 4: 585 reg_value.SetUInt32(*(uint32_t *)src); 586 break; 587 case 8: 588 reg_value.SetUInt64(*(uint64_t *)src); 589 break; 590 default: 591 assert(false && "Unhandled data size."); 592 error.SetErrorStringWithFormat ("unhandled byte size: %" PRIu32, reg_info->byte_size); 593 break; 594 } 595 596 return error; 597 } 598 599 Error 600 NativeRegisterContextLinux_x86_64::WriteRegister (const RegisterInfo *reg_info, const RegisterValue ®_value) 601 { 602 assert (reg_info && "reg_info is null"); 603 604 const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB]; 605 if (reg_index == LLDB_INVALID_REGNUM) 606 return Error ("no lldb regnum for %s", reg_info && reg_info->name ? reg_info->name : "<unknown register>"); 607 608 if (IsGPR(reg_index)) 609 return WriteRegisterRaw(reg_index, reg_value); 610 611 if (IsFPR(reg_index, GetFPRType())) 612 { 613 if (reg_info->encoding == lldb::eEncodingVector) 614 { 615 if (reg_index >= m_reg_info.first_st && reg_index <= m_reg_info.last_st) 616 ::memcpy (m_fpr.xstate.fxsave.stmm[reg_index - m_reg_info.first_st].bytes, reg_value.GetBytes(), reg_value.GetByteSize()); 617 618 if (reg_index >= m_reg_info.first_mm && reg_index <= m_reg_info.last_mm) 619 ::memcpy (m_fpr.xstate.fxsave.stmm[reg_index - m_reg_info.first_mm].bytes, reg_value.GetBytes(), reg_value.GetByteSize()); 620 621 if (reg_index >= m_reg_info.first_xmm && reg_index <= m_reg_info.last_xmm) 622 ::memcpy (m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_xmm].bytes, reg_value.GetBytes(), reg_value.GetByteSize()); 623 624 if (reg_index >= m_reg_info.first_ymm && reg_index <= m_reg_info.last_ymm) 625 { 626 if (GetFPRType() != eFPRTypeXSAVE) 627 return Error ("target processor does not support AVX"); 628 629 // Store ymm register content, and split into the register halves in xmm.bytes and ymmh.bytes 630 ::memcpy (m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes, reg_value.GetBytes(), reg_value.GetByteSize()); 631 if (!CopyYMMtoXSTATE(reg_index, GetByteOrder())) 632 return Error ("CopyYMMtoXSTATE() failed"); 633 } 634 } 635 else 636 { 637 // Get pointer to m_fpr.xstate.fxsave variable and set the data to it. 638 639 // Byte offsets of all registers are calculated wrt 'UserArea' structure. 640 // However, WriteFPR() takes m_fpr (of type FPR structure) and writes only fpu 641 // registers using ptrace(PTRACE_SETFPREGS,..) API. Hence fpu registers should 642 // be written in m_fpr at byte offsets calculated wrt FPR structure. 643 644 // Since, FPR structure is also one of the member of UserArea structure. 645 // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) - byte_offset(fctrl wrt UserArea) 646 assert ( (reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(m_fpr)); 647 uint8_t *dst = (uint8_t *)&m_fpr + reg_info->byte_offset - m_fctrl_offset_in_userarea; 648 switch (reg_info->byte_size) 649 { 650 case 1: 651 *(uint8_t *)dst = reg_value.GetAsUInt8(); 652 break; 653 case 2: 654 *(uint16_t *)dst = reg_value.GetAsUInt16(); 655 break; 656 case 4: 657 *(uint32_t *)dst = reg_value.GetAsUInt32(); 658 break; 659 case 8: 660 *(uint64_t *)dst = reg_value.GetAsUInt64(); 661 break; 662 default: 663 assert(false && "Unhandled data size."); 664 return Error ("unhandled register data size %" PRIu32, reg_info->byte_size); 665 } 666 } 667 668 Error error = WriteFPR(); 669 if (error.Fail()) 670 return error; 671 672 if (IsAVX(reg_index)) 673 { 674 if (!CopyYMMtoXSTATE(reg_index, GetByteOrder())) 675 return Error ("CopyYMMtoXSTATE() failed"); 676 } 677 return Error (); 678 } 679 return Error ("failed - register wasn't recognized to be a GPR or an FPR, write strategy unknown"); 680 } 681 682 Error 683 NativeRegisterContextLinux_x86_64::ReadAllRegisterValues (lldb::DataBufferSP &data_sp) 684 { 685 Error error; 686 687 data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0)); 688 if (!data_sp) 689 { 690 error.SetErrorStringWithFormat ("failed to allocate DataBufferHeap instance of size %" PRIu64, REG_CONTEXT_SIZE); 691 return error; 692 } 693 694 error = ReadGPR(); 695 if (error.Fail()) 696 return error; 697 698 error = ReadFPR(); 699 if (error.Fail()) 700 return error; 701 702 uint8_t *dst = data_sp->GetBytes (); 703 if (dst == nullptr) 704 { 705 error.SetErrorStringWithFormat ("DataBufferHeap instance of size %" PRIu64 " returned a null pointer", REG_CONTEXT_SIZE); 706 return error; 707 } 708 709 ::memcpy (dst, &m_gpr_x86_64, GetRegisterInfoInterface ().GetGPRSize ()); 710 dst += GetRegisterInfoInterface ().GetGPRSize (); 711 if (GetFPRType () == eFPRTypeFXSAVE) 712 ::memcpy (dst, &m_fpr.xstate.fxsave, sizeof(m_fpr.xstate.fxsave)); 713 else if (GetFPRType () == eFPRTypeXSAVE) 714 { 715 lldb::ByteOrder byte_order = GetByteOrder (); 716 717 // Assemble the YMM register content from the register halves. 718 for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm; ++reg) 719 { 720 if (!CopyXSTATEtoYMM (reg, byte_order)) 721 { 722 error.SetErrorStringWithFormat ("NativeRegisterContextLinux_x86_64::%s CopyXSTATEtoYMM() failed for reg num %" PRIu32, __FUNCTION__, reg); 723 return error; 724 } 725 } 726 727 // Copy the extended register state including the assembled ymm registers. 728 ::memcpy (dst, &m_fpr, sizeof (m_fpr)); 729 } 730 else 731 { 732 assert (false && "how do we save the floating point registers?"); 733 error.SetErrorString ("unsure how to save the floating point registers"); 734 } 735 /** The following code is specific to Linux x86 based architectures, 736 * where the register orig_eax (32 bit)/orig_rax (64 bit) is set to 737 * -1 to solve the bug 23659, such a setting prevents the automatic 738 * decrement of the instruction pointer which was causing the SIGILL 739 * exception. 740 * **/ 741 742 RegisterValue value((uint64_t) -1); 743 const RegisterInfo *reg_info = GetRegisterInfoInterface().GetDynamicRegisterInfo("orig_eax"); 744 if (reg_info == nullptr) 745 reg_info = GetRegisterInfoInterface().GetDynamicRegisterInfo("orig_rax"); 746 747 if (reg_info != nullptr) 748 return DoWriteRegisterValue(reg_info->byte_offset,reg_info->name,value); 749 750 return error; 751 } 752 753 Error 754 NativeRegisterContextLinux_x86_64::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp) 755 { 756 Error error; 757 758 if (!data_sp) 759 { 760 error.SetErrorStringWithFormat ("NativeRegisterContextLinux_x86_64::%s invalid data_sp provided", __FUNCTION__); 761 return error; 762 } 763 764 if (data_sp->GetByteSize () != REG_CONTEXT_SIZE) 765 { 766 error.SetErrorStringWithFormat ("NativeRegisterContextLinux_x86_64::%s data_sp contained mismatched data size, expected %" PRIu64 ", actual %" PRIu64, __FUNCTION__, REG_CONTEXT_SIZE, data_sp->GetByteSize ()); 767 return error; 768 } 769 770 771 uint8_t *src = data_sp->GetBytes (); 772 if (src == nullptr) 773 { 774 error.SetErrorStringWithFormat ("NativeRegisterContextLinux_x86_64::%s DataBuffer::GetBytes() returned a null pointer", __FUNCTION__); 775 return error; 776 } 777 ::memcpy (&m_gpr_x86_64, src, GetRegisterInfoInterface ().GetGPRSize ()); 778 779 error = WriteGPR(); 780 if (error.Fail()) 781 return error; 782 783 src += GetRegisterInfoInterface ().GetGPRSize (); 784 if (GetFPRType () == eFPRTypeFXSAVE) 785 ::memcpy (&m_fpr.xstate.fxsave, src, sizeof(m_fpr.xstate.fxsave)); 786 else if (GetFPRType () == eFPRTypeXSAVE) 787 ::memcpy (&m_fpr.xstate.xsave, src, sizeof(m_fpr.xstate.xsave)); 788 789 error = WriteFPR(); 790 if (error.Fail()) 791 return error; 792 793 if (GetFPRType() == eFPRTypeXSAVE) 794 { 795 lldb::ByteOrder byte_order = GetByteOrder(); 796 797 // Parse the YMM register content from the register halves. 798 for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm; ++reg) 799 { 800 if (!CopyYMMtoXSTATE (reg, byte_order)) 801 { 802 error.SetErrorStringWithFormat ("NativeRegisterContextLinux_x86_64::%s CopyYMMtoXSTATE() failed for reg num %" PRIu32, __FUNCTION__, reg); 803 return error; 804 } 805 } 806 } 807 808 return error; 809 } 810 811 bool 812 NativeRegisterContextLinux_x86_64::IsRegisterSetAvailable (uint32_t set_index) const 813 { 814 // Note: Extended register sets are assumed to be at the end of g_reg_sets. 815 uint32_t num_sets = k_num_register_sets - k_num_extended_register_sets; 816 817 if (GetFPRType () == eFPRTypeXSAVE) 818 { 819 // AVX is the first extended register set. 820 ++num_sets; 821 } 822 return (set_index < num_sets); 823 } 824 825 bool 826 NativeRegisterContextLinux_x86_64::IsGPR(uint32_t reg_index) const 827 { 828 // GPRs come first. 829 return reg_index <= m_reg_info.last_gpr; 830 } 831 832 NativeRegisterContextLinux_x86_64::FPRType 833 NativeRegisterContextLinux_x86_64::GetFPRType () const 834 { 835 if (m_fpr_type == eFPRTypeNotValid) 836 { 837 // TODO: Use assembly to call cpuid on the inferior and query ebx or ecx. 838 839 // Try and see if AVX register retrieval works. 840 m_fpr_type = eFPRTypeXSAVE; 841 if (const_cast<NativeRegisterContextLinux_x86_64*>(this)->ReadFPR().Fail()) 842 { 843 // Fall back to general floating point with no AVX support. 844 m_fpr_type = eFPRTypeFXSAVE; 845 } 846 } 847 848 return m_fpr_type; 849 } 850 851 bool 852 NativeRegisterContextLinux_x86_64::IsFPR(uint32_t reg_index) const 853 { 854 return (m_reg_info.first_fpr <= reg_index && reg_index <= m_reg_info.last_fpr); 855 } 856 857 bool 858 NativeRegisterContextLinux_x86_64::IsFPR(uint32_t reg_index, FPRType fpr_type) const 859 { 860 bool generic_fpr = IsFPR(reg_index); 861 862 if (fpr_type == eFPRTypeXSAVE) 863 return generic_fpr || IsAVX(reg_index); 864 return generic_fpr; 865 } 866 867 Error 868 NativeRegisterContextLinux_x86_64::WriteFPR() 869 { 870 const FPRType fpr_type = GetFPRType (); 871 switch (fpr_type) 872 { 873 case FPRType::eFPRTypeFXSAVE: 874 return NativeRegisterContextLinux::WriteFPR(); 875 case FPRType::eFPRTypeXSAVE: 876 return WriteRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_X86_XSTATE); 877 default: 878 return Error("Unrecognized FPR type"); 879 } 880 } 881 882 bool 883 NativeRegisterContextLinux_x86_64::IsAVX(uint32_t reg_index) const 884 { 885 return (m_reg_info.first_ymm <= reg_index && reg_index <= m_reg_info.last_ymm); 886 } 887 888 bool 889 NativeRegisterContextLinux_x86_64::CopyXSTATEtoYMM (uint32_t reg_index, lldb::ByteOrder byte_order) 890 { 891 if (!IsAVX (reg_index)) 892 return false; 893 894 if (byte_order == lldb::eByteOrderLittle) 895 { 896 ::memcpy (m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes, 897 m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_ymm].bytes, 898 sizeof (XMMReg)); 899 ::memcpy (m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes + sizeof (XMMReg), 900 m_fpr.xstate.xsave.ymmh[reg_index - m_reg_info.first_ymm].bytes, 901 sizeof (YMMHReg)); 902 return true; 903 } 904 905 if (byte_order == lldb::eByteOrderBig) 906 { 907 ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes + sizeof (XMMReg), 908 m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_ymm].bytes, 909 sizeof (XMMReg)); 910 ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes, 911 m_fpr.xstate.xsave.ymmh[reg_index - m_reg_info.first_ymm].bytes, 912 sizeof (YMMHReg)); 913 return true; 914 } 915 return false; // unsupported or invalid byte order 916 917 } 918 919 bool 920 NativeRegisterContextLinux_x86_64::CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order) 921 { 922 if (!IsAVX(reg)) 923 return false; 924 925 if (byte_order == lldb::eByteOrderLittle) 926 { 927 ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes, 928 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, 929 sizeof(XMMReg)); 930 ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes, 931 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg), 932 sizeof(YMMHReg)); 933 return true; 934 } 935 936 if (byte_order == lldb::eByteOrderBig) 937 { 938 ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes, 939 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg), 940 sizeof(XMMReg)); 941 ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes, 942 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, 943 sizeof(YMMHReg)); 944 return true; 945 } 946 return false; // unsupported or invalid byte order 947 } 948 949 void* 950 NativeRegisterContextLinux_x86_64::GetFPRBuffer() 951 { 952 const FPRType fpr_type = GetFPRType (); 953 switch (fpr_type) 954 { 955 case FPRType::eFPRTypeFXSAVE: 956 return &m_fpr.xstate.fxsave; 957 case FPRType::eFPRTypeXSAVE: 958 return &m_iovec; 959 default: 960 return nullptr; 961 } 962 } 963 964 size_t 965 NativeRegisterContextLinux_x86_64::GetFPRSize() 966 { 967 const FPRType fpr_type = GetFPRType (); 968 switch (fpr_type) 969 { 970 case FPRType::eFPRTypeFXSAVE: 971 return sizeof(m_fpr.xstate.fxsave); 972 case FPRType::eFPRTypeXSAVE: 973 return sizeof(m_iovec); 974 default: 975 return 0; 976 } 977 } 978 979 Error 980 NativeRegisterContextLinux_x86_64::ReadFPR () 981 { 982 const FPRType fpr_type = GetFPRType (); 983 switch (fpr_type) 984 { 985 case FPRType::eFPRTypeFXSAVE: 986 return NativeRegisterContextLinux::ReadFPR(); 987 case FPRType::eFPRTypeXSAVE: 988 return ReadRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_X86_XSTATE); 989 default: 990 return Error("Unrecognized FPR type"); 991 } 992 } 993 994 Error 995 NativeRegisterContextLinux_x86_64::IsWatchpointHit(uint32_t wp_index, bool &is_hit) 996 { 997 if (wp_index >= NumSupportedHardwareWatchpoints()) 998 return Error("Watchpoint index out of range"); 999 1000 RegisterValue reg_value; 1001 Error error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value); 1002 if (error.Fail()) 1003 { 1004 is_hit = false; 1005 return error; 1006 } 1007 1008 uint64_t status_bits = reg_value.GetAsUInt64(); 1009 1010 is_hit = status_bits & (1 << wp_index); 1011 1012 return error; 1013 } 1014 1015 Error 1016 NativeRegisterContextLinux_x86_64::GetWatchpointHitIndex(uint32_t &wp_index, lldb::addr_t trap_addr) { 1017 uint32_t num_hw_wps = NumSupportedHardwareWatchpoints(); 1018 for (wp_index = 0; wp_index < num_hw_wps; ++wp_index) 1019 { 1020 bool is_hit; 1021 Error error = IsWatchpointHit(wp_index, is_hit); 1022 if (error.Fail()) { 1023 wp_index = LLDB_INVALID_INDEX32; 1024 return error; 1025 } else if (is_hit) { 1026 return error; 1027 } 1028 } 1029 wp_index = LLDB_INVALID_INDEX32; 1030 return Error(); 1031 } 1032 1033 Error 1034 NativeRegisterContextLinux_x86_64::IsWatchpointVacant(uint32_t wp_index, bool &is_vacant) 1035 { 1036 if (wp_index >= NumSupportedHardwareWatchpoints()) 1037 return Error ("Watchpoint index out of range"); 1038 1039 RegisterValue reg_value; 1040 Error error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value); 1041 if (error.Fail()) 1042 { 1043 is_vacant = false; 1044 return error; 1045 } 1046 1047 uint64_t control_bits = reg_value.GetAsUInt64(); 1048 1049 is_vacant = !(control_bits & (1 << (2 * wp_index))); 1050 1051 return error; 1052 } 1053 1054 Error 1055 NativeRegisterContextLinux_x86_64::SetHardwareWatchpointWithIndex( 1056 lldb::addr_t addr, size_t size, uint32_t watch_flags, uint32_t wp_index) { 1057 1058 if (wp_index >= NumSupportedHardwareWatchpoints()) 1059 return Error ("Watchpoint index out of range"); 1060 1061 // Read only watchpoints aren't supported on x86_64. Fall back to read/write waitchpoints instead. 1062 // TODO: Add logic to detect when a write happens and ignore that watchpoint hit. 1063 if (watch_flags == 0x2) 1064 watch_flags = 0x3; 1065 1066 if (watch_flags != 0x1 && watch_flags != 0x3) 1067 return Error ("Invalid read/write bits for watchpoint"); 1068 1069 if (size != 1 && size != 2 && size != 4 && size != 8) 1070 return Error ("Invalid size for watchpoint"); 1071 1072 bool is_vacant; 1073 Error error = IsWatchpointVacant (wp_index, is_vacant); 1074 if (error.Fail()) return error; 1075 if (!is_vacant) return Error("Watchpoint index not vacant"); 1076 1077 RegisterValue reg_value; 1078 error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value); 1079 if (error.Fail()) return error; 1080 1081 // for watchpoints 0, 1, 2, or 3, respectively, 1082 // set bits 1, 3, 5, or 7 1083 uint64_t enable_bit = 1 << (2 * wp_index); 1084 1085 // set bits 16-17, 20-21, 24-25, or 28-29 1086 // with 0b01 for write, and 0b11 for read/write 1087 uint64_t rw_bits = watch_flags << (16 + 4 * wp_index); 1088 1089 // set bits 18-19, 22-23, 26-27, or 30-31 1090 // with 0b00, 0b01, 0b10, or 0b11 1091 // for 1, 2, 8 (if supported), or 4 bytes, respectively 1092 uint64_t size_bits = (size == 8 ? 0x2 : size - 1) << (18 + 4 * wp_index); 1093 1094 uint64_t bit_mask = (0x3 << (2 * wp_index)) | (0xF << (16 + 4 * wp_index)); 1095 1096 uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask; 1097 1098 control_bits |= enable_bit | rw_bits | size_bits; 1099 1100 error = WriteRegisterRaw(m_reg_info.first_dr + wp_index, RegisterValue(addr)); 1101 if (error.Fail()) return error; 1102 1103 error = WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits)); 1104 if (error.Fail()) return error; 1105 1106 error.Clear(); 1107 return error; 1108 } 1109 1110 bool 1111 NativeRegisterContextLinux_x86_64::ClearHardwareWatchpoint(uint32_t wp_index) 1112 { 1113 if (wp_index >= NumSupportedHardwareWatchpoints()) 1114 return false; 1115 1116 RegisterValue reg_value; 1117 1118 // for watchpoints 0, 1, 2, or 3, respectively, 1119 // clear bits 0, 1, 2, or 3 of the debug status register (DR6) 1120 Error error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value); 1121 if (error.Fail()) return false; 1122 uint64_t bit_mask = 1 << wp_index; 1123 uint64_t status_bits = reg_value.GetAsUInt64() & ~bit_mask; 1124 error = WriteRegisterRaw(m_reg_info.first_dr + 6, RegisterValue(status_bits)); 1125 if (error.Fail()) return false; 1126 1127 // for watchpoints 0, 1, 2, or 3, respectively, 1128 // clear bits {0-1,16-19}, {2-3,20-23}, {4-5,24-27}, or {6-7,28-31} 1129 // of the debug control register (DR7) 1130 error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value); 1131 if (error.Fail()) return false; 1132 bit_mask = (0x3 << (2 * wp_index)) | (0xF << (16 + 4 * wp_index)); 1133 uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask; 1134 return WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits)).Success(); 1135 } 1136 1137 Error 1138 NativeRegisterContextLinux_x86_64::ClearAllHardwareWatchpoints() 1139 { 1140 RegisterValue reg_value; 1141 1142 // clear bits {0-4} of the debug status register (DR6) 1143 Error error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value); 1144 if (error.Fail()) return error; 1145 uint64_t bit_mask = 0xF; 1146 uint64_t status_bits = reg_value.GetAsUInt64() & ~bit_mask; 1147 error = WriteRegisterRaw(m_reg_info.first_dr + 6, RegisterValue(status_bits)); 1148 if (error.Fail()) return error; 1149 1150 // clear bits {0-7,16-31} of the debug control register (DR7) 1151 error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value); 1152 if (error.Fail()) return error; 1153 bit_mask = 0xFF | (0xFFFF << 16); 1154 uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask; 1155 return WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits)); 1156 } 1157 1158 uint32_t 1159 NativeRegisterContextLinux_x86_64::SetHardwareWatchpoint( 1160 lldb::addr_t addr, size_t size, uint32_t watch_flags) 1161 { 1162 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS)); 1163 const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints(); 1164 for (uint32_t wp_index = 0; wp_index < num_hw_watchpoints; ++wp_index) 1165 { 1166 bool is_vacant; 1167 Error error = IsWatchpointVacant(wp_index, is_vacant); 1168 if (is_vacant) 1169 { 1170 error = SetHardwareWatchpointWithIndex(addr, size, watch_flags, wp_index); 1171 if (error.Success()) 1172 return wp_index; 1173 } 1174 if (error.Fail() && log) 1175 { 1176 log->Printf("NativeRegisterContextLinux_x86_64::%s Error: %s", 1177 __FUNCTION__, error.AsCString()); 1178 } 1179 } 1180 return LLDB_INVALID_INDEX32; 1181 } 1182 1183 lldb::addr_t 1184 NativeRegisterContextLinux_x86_64::GetWatchpointAddress(uint32_t wp_index) 1185 { 1186 if (wp_index >= NumSupportedHardwareWatchpoints()) 1187 return LLDB_INVALID_ADDRESS; 1188 RegisterValue reg_value; 1189 if (ReadRegisterRaw(m_reg_info.first_dr + wp_index, reg_value).Fail()) 1190 return LLDB_INVALID_ADDRESS; 1191 return reg_value.GetAsUInt64(); 1192 } 1193 1194 uint32_t 1195 NativeRegisterContextLinux_x86_64::NumSupportedHardwareWatchpoints () 1196 { 1197 // Available debug address registers: dr0, dr1, dr2, dr3 1198 return 4; 1199 } 1200 1201 #endif // defined(__i386__) || defined(__x86_64__) 1202