1 //===-- NativeRegisterContextLinux_x86_64.cpp ---------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #if defined(__i386__) || defined(__x86_64__)
11 
12 #include "NativeRegisterContextLinux_x86_64.h"
13 
14 #include "lldb/Core/RegisterValue.h"
15 #include "lldb/Host/HostInfo.h"
16 #include "lldb/Utility/DataBufferHeap.h"
17 #include "lldb/Utility/Log.h"
18 #include "lldb/Utility/Status.h"
19 
20 #include "Plugins/Process/Utility/RegisterContextLinux_i386.h"
21 #include "Plugins/Process/Utility/RegisterContextLinux_x86_64.h"
22 
23 #include <linux/elf.h>
24 
25 using namespace lldb_private;
26 using namespace lldb_private::process_linux;
27 
28 // ----------------------------------------------------------------------------
29 // Private namespace.
30 // ----------------------------------------------------------------------------
31 
32 namespace {
33 // x86 32-bit general purpose registers.
34 const uint32_t g_gpr_regnums_i386[] = {
35     lldb_eax_i386,      lldb_ebx_i386,    lldb_ecx_i386, lldb_edx_i386,
36     lldb_edi_i386,      lldb_esi_i386,    lldb_ebp_i386, lldb_esp_i386,
37     lldb_eip_i386,      lldb_eflags_i386, lldb_cs_i386,  lldb_fs_i386,
38     lldb_gs_i386,       lldb_ss_i386,     lldb_ds_i386,  lldb_es_i386,
39     lldb_ax_i386,       lldb_bx_i386,     lldb_cx_i386,  lldb_dx_i386,
40     lldb_di_i386,       lldb_si_i386,     lldb_bp_i386,  lldb_sp_i386,
41     lldb_ah_i386,       lldb_bh_i386,     lldb_ch_i386,  lldb_dh_i386,
42     lldb_al_i386,       lldb_bl_i386,     lldb_cl_i386,  lldb_dl_i386,
43     LLDB_INVALID_REGNUM // register sets need to end with this flag
44 };
45 static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) -
46                       1 ==
47                   k_num_gpr_registers_i386,
48               "g_gpr_regnums_i386 has wrong number of register infos");
49 
50 // x86 32-bit floating point registers.
51 const uint32_t g_fpu_regnums_i386[] = {
52     lldb_fctrl_i386,    lldb_fstat_i386,     lldb_ftag_i386,  lldb_fop_i386,
53     lldb_fiseg_i386,    lldb_fioff_i386,     lldb_foseg_i386, lldb_fooff_i386,
54     lldb_mxcsr_i386,    lldb_mxcsrmask_i386, lldb_st0_i386,   lldb_st1_i386,
55     lldb_st2_i386,      lldb_st3_i386,       lldb_st4_i386,   lldb_st5_i386,
56     lldb_st6_i386,      lldb_st7_i386,       lldb_mm0_i386,   lldb_mm1_i386,
57     lldb_mm2_i386,      lldb_mm3_i386,       lldb_mm4_i386,   lldb_mm5_i386,
58     lldb_mm6_i386,      lldb_mm7_i386,       lldb_xmm0_i386,  lldb_xmm1_i386,
59     lldb_xmm2_i386,     lldb_xmm3_i386,      lldb_xmm4_i386,  lldb_xmm5_i386,
60     lldb_xmm6_i386,     lldb_xmm7_i386,
61     LLDB_INVALID_REGNUM // register sets need to end with this flag
62 };
63 static_assert((sizeof(g_fpu_regnums_i386) / sizeof(g_fpu_regnums_i386[0])) -
64                       1 ==
65                   k_num_fpr_registers_i386,
66               "g_fpu_regnums_i386 has wrong number of register infos");
67 
68 // x86 32-bit AVX registers.
69 const uint32_t g_avx_regnums_i386[] = {
70     lldb_ymm0_i386,     lldb_ymm1_i386, lldb_ymm2_i386, lldb_ymm3_i386,
71     lldb_ymm4_i386,     lldb_ymm5_i386, lldb_ymm6_i386, lldb_ymm7_i386,
72     LLDB_INVALID_REGNUM // register sets need to end with this flag
73 };
74 static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) -
75                       1 ==
76                   k_num_avx_registers_i386,
77               " g_avx_regnums_i386 has wrong number of register infos");
78 
79 // x64 32-bit MPX registers.
80 static const uint32_t g_mpx_regnums_i386[] = {
81     lldb_bnd0_i386,     lldb_bnd1_i386, lldb_bnd2_i386, lldb_bnd3_i386,
82     lldb_bndcfgu_i386,  lldb_bndstatus_i386,
83     LLDB_INVALID_REGNUM // register sets need to end with this flag
84 };
85 static_assert((sizeof(g_mpx_regnums_i386) / sizeof(g_mpx_regnums_i386[0])) -
86                       1 ==
87                   k_num_mpx_registers_i386,
88               "g_mpx_regnums_x86_64 has wrong number of register infos");
89 
90 // x86 64-bit general purpose registers.
91 static const uint32_t g_gpr_regnums_x86_64[] = {
92     lldb_rax_x86_64,    lldb_rbx_x86_64,    lldb_rcx_x86_64, lldb_rdx_x86_64,
93     lldb_rdi_x86_64,    lldb_rsi_x86_64,    lldb_rbp_x86_64, lldb_rsp_x86_64,
94     lldb_r8_x86_64,     lldb_r9_x86_64,     lldb_r10_x86_64, lldb_r11_x86_64,
95     lldb_r12_x86_64,    lldb_r13_x86_64,    lldb_r14_x86_64, lldb_r15_x86_64,
96     lldb_rip_x86_64,    lldb_rflags_x86_64, lldb_cs_x86_64,  lldb_fs_x86_64,
97     lldb_gs_x86_64,     lldb_ss_x86_64,     lldb_ds_x86_64,  lldb_es_x86_64,
98     lldb_eax_x86_64,    lldb_ebx_x86_64,    lldb_ecx_x86_64, lldb_edx_x86_64,
99     lldb_edi_x86_64,    lldb_esi_x86_64,    lldb_ebp_x86_64, lldb_esp_x86_64,
100     lldb_r8d_x86_64,  // Low 32 bits or r8
101     lldb_r9d_x86_64,  // Low 32 bits or r9
102     lldb_r10d_x86_64, // Low 32 bits or r10
103     lldb_r11d_x86_64, // Low 32 bits or r11
104     lldb_r12d_x86_64, // Low 32 bits or r12
105     lldb_r13d_x86_64, // Low 32 bits or r13
106     lldb_r14d_x86_64, // Low 32 bits or r14
107     lldb_r15d_x86_64, // Low 32 bits or r15
108     lldb_ax_x86_64,     lldb_bx_x86_64,     lldb_cx_x86_64,  lldb_dx_x86_64,
109     lldb_di_x86_64,     lldb_si_x86_64,     lldb_bp_x86_64,  lldb_sp_x86_64,
110     lldb_r8w_x86_64,  // Low 16 bits or r8
111     lldb_r9w_x86_64,  // Low 16 bits or r9
112     lldb_r10w_x86_64, // Low 16 bits or r10
113     lldb_r11w_x86_64, // Low 16 bits or r11
114     lldb_r12w_x86_64, // Low 16 bits or r12
115     lldb_r13w_x86_64, // Low 16 bits or r13
116     lldb_r14w_x86_64, // Low 16 bits or r14
117     lldb_r15w_x86_64, // Low 16 bits or r15
118     lldb_ah_x86_64,     lldb_bh_x86_64,     lldb_ch_x86_64,  lldb_dh_x86_64,
119     lldb_al_x86_64,     lldb_bl_x86_64,     lldb_cl_x86_64,  lldb_dl_x86_64,
120     lldb_dil_x86_64,    lldb_sil_x86_64,    lldb_bpl_x86_64, lldb_spl_x86_64,
121     lldb_r8l_x86_64,    // Low 8 bits or r8
122     lldb_r9l_x86_64,    // Low 8 bits or r9
123     lldb_r10l_x86_64,   // Low 8 bits or r10
124     lldb_r11l_x86_64,   // Low 8 bits or r11
125     lldb_r12l_x86_64,   // Low 8 bits or r12
126     lldb_r13l_x86_64,   // Low 8 bits or r13
127     lldb_r14l_x86_64,   // Low 8 bits or r14
128     lldb_r15l_x86_64,   // Low 8 bits or r15
129     LLDB_INVALID_REGNUM // register sets need to end with this flag
130 };
131 static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) -
132                       1 ==
133                   k_num_gpr_registers_x86_64,
134               "g_gpr_regnums_x86_64 has wrong number of register infos");
135 
136 // x86 64-bit floating point registers.
137 static const uint32_t g_fpu_regnums_x86_64[] = {
138     lldb_fctrl_x86_64,     lldb_fstat_x86_64, lldb_ftag_x86_64,
139     lldb_fop_x86_64,       lldb_fiseg_x86_64, lldb_fioff_x86_64,
140     lldb_foseg_x86_64,     lldb_fooff_x86_64, lldb_mxcsr_x86_64,
141     lldb_mxcsrmask_x86_64, lldb_st0_x86_64,   lldb_st1_x86_64,
142     lldb_st2_x86_64,       lldb_st3_x86_64,   lldb_st4_x86_64,
143     lldb_st5_x86_64,       lldb_st6_x86_64,   lldb_st7_x86_64,
144     lldb_mm0_x86_64,       lldb_mm1_x86_64,   lldb_mm2_x86_64,
145     lldb_mm3_x86_64,       lldb_mm4_x86_64,   lldb_mm5_x86_64,
146     lldb_mm6_x86_64,       lldb_mm7_x86_64,   lldb_xmm0_x86_64,
147     lldb_xmm1_x86_64,      lldb_xmm2_x86_64,  lldb_xmm3_x86_64,
148     lldb_xmm4_x86_64,      lldb_xmm5_x86_64,  lldb_xmm6_x86_64,
149     lldb_xmm7_x86_64,      lldb_xmm8_x86_64,  lldb_xmm9_x86_64,
150     lldb_xmm10_x86_64,     lldb_xmm11_x86_64, lldb_xmm12_x86_64,
151     lldb_xmm13_x86_64,     lldb_xmm14_x86_64, lldb_xmm15_x86_64,
152     LLDB_INVALID_REGNUM // register sets need to end with this flag
153 };
154 static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) -
155                       1 ==
156                   k_num_fpr_registers_x86_64,
157               "g_fpu_regnums_x86_64 has wrong number of register infos");
158 
159 // x86 64-bit AVX registers.
160 static const uint32_t g_avx_regnums_x86_64[] = {
161     lldb_ymm0_x86_64,   lldb_ymm1_x86_64,  lldb_ymm2_x86_64,  lldb_ymm3_x86_64,
162     lldb_ymm4_x86_64,   lldb_ymm5_x86_64,  lldb_ymm6_x86_64,  lldb_ymm7_x86_64,
163     lldb_ymm8_x86_64,   lldb_ymm9_x86_64,  lldb_ymm10_x86_64, lldb_ymm11_x86_64,
164     lldb_ymm12_x86_64,  lldb_ymm13_x86_64, lldb_ymm14_x86_64, lldb_ymm15_x86_64,
165     LLDB_INVALID_REGNUM // register sets need to end with this flag
166 };
167 static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) -
168                       1 ==
169                   k_num_avx_registers_x86_64,
170               "g_avx_regnums_x86_64 has wrong number of register infos");
171 
172 // x86 64-bit MPX registers.
173 static const uint32_t g_mpx_regnums_x86_64[] = {
174     lldb_bnd0_x86_64,    lldb_bnd1_x86_64,    lldb_bnd2_x86_64,
175     lldb_bnd3_x86_64,    lldb_bndcfgu_x86_64, lldb_bndstatus_x86_64,
176     LLDB_INVALID_REGNUM // register sets need to end with this flag
177 };
178 static_assert((sizeof(g_mpx_regnums_x86_64) / sizeof(g_mpx_regnums_x86_64[0])) -
179                       1 ==
180                   k_num_mpx_registers_x86_64,
181               "g_mpx_regnums_x86_64 has wrong number of register infos");
182 
183 // Number of register sets provided by this context.
184 enum { k_num_extended_register_sets = 2, k_num_register_sets = 4 };
185 
186 // Register sets for x86 32-bit.
187 static const RegisterSet g_reg_sets_i386[k_num_register_sets] = {
188     {"General Purpose Registers", "gpr", k_num_gpr_registers_i386,
189      g_gpr_regnums_i386},
190     {"Floating Point Registers", "fpu", k_num_fpr_registers_i386,
191      g_fpu_regnums_i386},
192     {"Advanced Vector Extensions", "avx", k_num_avx_registers_i386,
193      g_avx_regnums_i386},
194     { "Memory Protection Extensions", "mpx", k_num_mpx_registers_i386,
195      g_mpx_regnums_i386}};
196 
197 // Register sets for x86 64-bit.
198 static const RegisterSet g_reg_sets_x86_64[k_num_register_sets] = {
199     {"General Purpose Registers", "gpr", k_num_gpr_registers_x86_64,
200      g_gpr_regnums_x86_64},
201     {"Floating Point Registers", "fpu", k_num_fpr_registers_x86_64,
202      g_fpu_regnums_x86_64},
203     {"Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64,
204      g_avx_regnums_x86_64},
205     { "Memory Protection Extensions", "mpx", k_num_mpx_registers_x86_64,
206      g_mpx_regnums_x86_64}};
207 }
208 
209 #define REG_CONTEXT_SIZE (GetRegisterInfoInterface().GetGPRSize() + sizeof(FPR))
210 
211 // ----------------------------------------------------------------------------
212 // Required ptrace defines.
213 // ----------------------------------------------------------------------------
214 
215 // Support ptrace extensions even when compiled without required kernel support
216 #ifndef NT_X86_XSTATE
217 #define NT_X86_XSTATE 0x202
218 #endif
219 #ifndef NT_PRXFPREG
220 #define NT_PRXFPREG 0x46e62b7f
221 #endif
222 
223 // On x86_64 NT_PRFPREG is used to access the FXSAVE area. On i386, we need to
224 // use NT_PRXFPREG.
225 static inline unsigned int fxsr_regset(const ArchSpec &arch) {
226   return arch.GetAddressByteSize() == 8 ? NT_PRFPREG : NT_PRXFPREG;
227 }
228 
229 // ----------------------------------------------------------------------------
230 // Required MPX define.
231 // ----------------------------------------------------------------------------
232 
233 // Support MPX extensions also if compiled with compiler without MPX support.
234 #ifndef bit_MPX
235 #define bit_MPX 0x4000
236 #endif
237 
238 // ----------------------------------------------------------------------------
239 // XCR0 extended register sets masks.
240 // ----------------------------------------------------------------------------
241 #define mask_XSTATE_AVX (1ULL << 2)
242 #define mask_XSTATE_BNDREGS (1ULL << 3)
243 #define mask_XSTATE_BNDCFG (1ULL << 4)
244 #define mask_XSTATE_MPX (mask_XSTATE_BNDREGS | mask_XSTATE_BNDCFG)
245 
246 std::unique_ptr<NativeRegisterContextLinux>
247 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(
248     const ArchSpec &target_arch, NativeThreadProtocol &native_thread) {
249   return std::unique_ptr<NativeRegisterContextLinux>(
250       new NativeRegisterContextLinux_x86_64(target_arch, native_thread));
251 }
252 
253 // ----------------------------------------------------------------------------
254 // NativeRegisterContextLinux_x86_64 members.
255 // ----------------------------------------------------------------------------
256 
257 static RegisterInfoInterface *
258 CreateRegisterInfoInterface(const ArchSpec &target_arch) {
259   if (HostInfo::GetArchitecture().GetAddressByteSize() == 4) {
260     // 32-bit hosts run with a RegisterContextLinux_i386 context.
261     return new RegisterContextLinux_i386(target_arch);
262   } else {
263     assert((HostInfo::GetArchitecture().GetAddressByteSize() == 8) &&
264            "Register setting path assumes this is a 64-bit host");
265     // X86_64 hosts know how to work with 64-bit and 32-bit EXEs using the
266     // x86_64 register context.
267     return new RegisterContextLinux_x86_64(target_arch);
268   }
269 }
270 
271 NativeRegisterContextLinux_x86_64::NativeRegisterContextLinux_x86_64(
272     const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
273     : NativeRegisterContextLinux(native_thread,
274                                  CreateRegisterInfoInterface(target_arch)),
275       m_xstate_type(XStateType::Invalid), m_fpr(), m_iovec(), m_ymm_set(),
276       m_mpx_set(), m_reg_info(), m_gpr_x86_64() {
277   // Set up data about ranges of valid registers.
278   switch (target_arch.GetMachine()) {
279   case llvm::Triple::x86:
280     m_reg_info.num_registers = k_num_registers_i386;
281     m_reg_info.num_gpr_registers = k_num_gpr_registers_i386;
282     m_reg_info.num_fpr_registers = k_num_fpr_registers_i386;
283     m_reg_info.num_avx_registers = k_num_avx_registers_i386;
284     m_reg_info.num_mpx_registers = k_num_mpx_registers_i386;
285     m_reg_info.last_gpr = k_last_gpr_i386;
286     m_reg_info.first_fpr = k_first_fpr_i386;
287     m_reg_info.last_fpr = k_last_fpr_i386;
288     m_reg_info.first_st = lldb_st0_i386;
289     m_reg_info.last_st = lldb_st7_i386;
290     m_reg_info.first_mm = lldb_mm0_i386;
291     m_reg_info.last_mm = lldb_mm7_i386;
292     m_reg_info.first_xmm = lldb_xmm0_i386;
293     m_reg_info.last_xmm = lldb_xmm7_i386;
294     m_reg_info.first_ymm = lldb_ymm0_i386;
295     m_reg_info.last_ymm = lldb_ymm7_i386;
296     m_reg_info.first_mpxr = lldb_bnd0_i386;
297     m_reg_info.last_mpxr = lldb_bnd3_i386;
298     m_reg_info.first_mpxc = lldb_bndcfgu_i386;
299     m_reg_info.last_mpxc = lldb_bndstatus_i386;
300     m_reg_info.first_dr = lldb_dr0_i386;
301     m_reg_info.gpr_flags = lldb_eflags_i386;
302     break;
303   case llvm::Triple::x86_64:
304     m_reg_info.num_registers = k_num_registers_x86_64;
305     m_reg_info.num_gpr_registers = k_num_gpr_registers_x86_64;
306     m_reg_info.num_fpr_registers = k_num_fpr_registers_x86_64;
307     m_reg_info.num_avx_registers = k_num_avx_registers_x86_64;
308     m_reg_info.num_mpx_registers = k_num_mpx_registers_x86_64;
309     m_reg_info.last_gpr = k_last_gpr_x86_64;
310     m_reg_info.first_fpr = k_first_fpr_x86_64;
311     m_reg_info.last_fpr = k_last_fpr_x86_64;
312     m_reg_info.first_st = lldb_st0_x86_64;
313     m_reg_info.last_st = lldb_st7_x86_64;
314     m_reg_info.first_mm = lldb_mm0_x86_64;
315     m_reg_info.last_mm = lldb_mm7_x86_64;
316     m_reg_info.first_xmm = lldb_xmm0_x86_64;
317     m_reg_info.last_xmm = lldb_xmm15_x86_64;
318     m_reg_info.first_ymm = lldb_ymm0_x86_64;
319     m_reg_info.last_ymm = lldb_ymm15_x86_64;
320     m_reg_info.first_mpxr = lldb_bnd0_x86_64;
321     m_reg_info.last_mpxr = lldb_bnd3_x86_64;
322     m_reg_info.first_mpxc = lldb_bndcfgu_x86_64;
323     m_reg_info.last_mpxc = lldb_bndstatus_x86_64;
324     m_reg_info.first_dr = lldb_dr0_x86_64;
325     m_reg_info.gpr_flags = lldb_rflags_x86_64;
326     break;
327   default:
328     assert(false && "Unhandled target architecture.");
329     break;
330   }
331 
332   // Initialize m_iovec to point to the buffer and buffer size
333   // using the conventions of Berkeley style UIO structures, as required
334   // by PTRACE extensions.
335   m_iovec.iov_base = &m_fpr.xstate.xsave;
336   m_iovec.iov_len = sizeof(m_fpr.xstate.xsave);
337 
338   // Clear out the FPR state.
339   ::memset(&m_fpr, 0, sizeof(FPR));
340 
341   // Store byte offset of fctrl (i.e. first register of FPR)
342   const RegisterInfo *reg_info_fctrl = GetRegisterInfoByName("fctrl");
343   m_fctrl_offset_in_userarea = reg_info_fctrl->byte_offset;
344 }
345 
346 // CONSIDER after local and llgs debugging are merged, register set support can
347 // be moved into a base x86-64 class with IsRegisterSetAvailable made virtual.
348 uint32_t NativeRegisterContextLinux_x86_64::GetRegisterSetCount() const {
349   uint32_t sets = 0;
350   for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) {
351     if (IsRegisterSetAvailable(set_index))
352       ++sets;
353   }
354 
355   return sets;
356 }
357 
358 uint32_t NativeRegisterContextLinux_x86_64::GetUserRegisterCount() const {
359   uint32_t count = 0;
360   for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) {
361     const RegisterSet *set = GetRegisterSet(set_index);
362     if (set)
363       count += set->num_registers;
364   }
365   return count;
366 }
367 
368 const RegisterSet *
369 NativeRegisterContextLinux_x86_64::GetRegisterSet(uint32_t set_index) const {
370   if (!IsRegisterSetAvailable(set_index))
371     return nullptr;
372 
373   switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
374   case llvm::Triple::x86:
375     return &g_reg_sets_i386[set_index];
376   case llvm::Triple::x86_64:
377     return &g_reg_sets_x86_64[set_index];
378   default:
379     assert(false && "Unhandled target architecture.");
380     return nullptr;
381   }
382 
383   return nullptr;
384 }
385 
386 Status
387 NativeRegisterContextLinux_x86_64::ReadRegister(const RegisterInfo *reg_info,
388                                                 RegisterValue &reg_value) {
389   Status error;
390 
391   if (!reg_info) {
392     error.SetErrorString("reg_info NULL");
393     return error;
394   }
395 
396   const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
397   if (reg == LLDB_INVALID_REGNUM) {
398     // This is likely an internal register for lldb use only and should not be
399     // directly queried.
400     error.SetErrorStringWithFormat("register \"%s\" is an internal-only lldb "
401                                    "register, cannot read directly",
402                                    reg_info->name);
403     return error;
404   }
405 
406   if (IsFPR(reg) || IsAVX(reg) || IsMPX(reg)) {
407     error = ReadFPR();
408     if (error.Fail())
409       return error;
410   } else {
411     uint32_t full_reg = reg;
412     bool is_subreg = reg_info->invalidate_regs &&
413                      (reg_info->invalidate_regs[0] != LLDB_INVALID_REGNUM);
414 
415     if (is_subreg) {
416       // Read the full aligned 64-bit register.
417       full_reg = reg_info->invalidate_regs[0];
418     }
419 
420     error = ReadRegisterRaw(full_reg, reg_value);
421 
422     if (error.Success()) {
423       // If our read was not aligned (for ah,bh,ch,dh), shift our returned value
424       // one byte to the right.
425       if (is_subreg && (reg_info->byte_offset & 0x1))
426         reg_value.SetUInt64(reg_value.GetAsUInt64() >> 8);
427 
428       // If our return byte size was greater than the return value reg size,
429       // then
430       // use the type specified by reg_info rather than the uint64_t default
431       if (reg_value.GetByteSize() > reg_info->byte_size)
432         reg_value.SetType(reg_info);
433     }
434     return error;
435   }
436 
437   if (reg_info->encoding == lldb::eEncodingVector) {
438     lldb::ByteOrder byte_order = GetByteOrder();
439 
440     if (byte_order != lldb::eByteOrderInvalid) {
441       if (reg >= m_reg_info.first_st && reg <= m_reg_info.last_st)
442         reg_value.SetBytes(
443             m_fpr.xstate.fxsave.stmm[reg - m_reg_info.first_st].bytes,
444             reg_info->byte_size, byte_order);
445       if (reg >= m_reg_info.first_mm && reg <= m_reg_info.last_mm)
446         reg_value.SetBytes(
447             m_fpr.xstate.fxsave.stmm[reg - m_reg_info.first_mm].bytes,
448             reg_info->byte_size, byte_order);
449       if (reg >= m_reg_info.first_xmm && reg <= m_reg_info.last_xmm)
450         reg_value.SetBytes(
451             m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_xmm].bytes,
452             reg_info->byte_size, byte_order);
453       if (reg >= m_reg_info.first_ymm && reg <= m_reg_info.last_ymm) {
454         // Concatenate ymm using the register halves in xmm.bytes and ymmh.bytes
455         if (CopyXSTATEtoYMM(reg, byte_order))
456           reg_value.SetBytes(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
457                              reg_info->byte_size, byte_order);
458         else {
459           error.SetErrorString("failed to copy ymm register value");
460           return error;
461         }
462       }
463       if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) {
464         if (CopyXSTATEtoMPX(reg))
465           reg_value.SetBytes(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes,
466                              reg_info->byte_size, byte_order);
467         else {
468           error.SetErrorString("failed to copy mpx register value");
469           return error;
470         }
471       }
472       if (reg >= m_reg_info.first_mpxc && reg <= m_reg_info.last_mpxc) {
473         if (CopyXSTATEtoMPX(reg))
474           reg_value.SetBytes(m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes,
475                              reg_info->byte_size, byte_order);
476         else {
477           error.SetErrorString("failed to copy mpx register value");
478           return error;
479         }
480       }
481 
482       if (reg_value.GetType() != RegisterValue::eTypeBytes)
483         error.SetErrorString(
484             "write failed - type was expected to be RegisterValue::eTypeBytes");
485 
486       return error;
487     }
488 
489     error.SetErrorString("byte order is invalid");
490     return error;
491   }
492 
493   // Get pointer to m_fpr.xstate.fxsave variable and set the data from it.
494 
495   // Byte offsets of all registers are calculated wrt 'UserArea' structure.
496   // However, ReadFPR() reads fpu registers {using ptrace(PTRACE_GETFPREGS,..)}
497   // and stores them in 'm_fpr' (of type FPR structure). To extract values of
498   // fpu
499   // registers, m_fpr should be read at byte offsets calculated wrt to FPR
500   // structure.
501 
502   // Since, FPR structure is also one of the member of UserArea structure.
503   // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) -
504   // byte_offset(fctrl wrt UserArea)
505   assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(m_fpr));
506   uint8_t *src =
507       (uint8_t *)&m_fpr + reg_info->byte_offset - m_fctrl_offset_in_userarea;
508   switch (reg_info->byte_size) {
509   case 1:
510     reg_value.SetUInt8(*(uint8_t *)src);
511     break;
512   case 2:
513     reg_value.SetUInt16(*(uint16_t *)src);
514     break;
515   case 4:
516     reg_value.SetUInt32(*(uint32_t *)src);
517     break;
518   case 8:
519     reg_value.SetUInt64(*(uint64_t *)src);
520     break;
521   default:
522     assert(false && "Unhandled data size.");
523     error.SetErrorStringWithFormat("unhandled byte size: %" PRIu32,
524                                    reg_info->byte_size);
525     break;
526   }
527 
528   return error;
529 }
530 
531 Status NativeRegisterContextLinux_x86_64::WriteRegister(
532     const RegisterInfo *reg_info, const RegisterValue &reg_value) {
533   assert(reg_info && "reg_info is null");
534 
535   const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB];
536   if (reg_index == LLDB_INVALID_REGNUM)
537     return Status("no lldb regnum for %s", reg_info && reg_info->name
538                                                ? reg_info->name
539                                                : "<unknown register>");
540 
541   if (IsGPR(reg_index))
542     return WriteRegisterRaw(reg_index, reg_value);
543 
544   if (IsFPR(reg_index) || IsAVX(reg_index) || IsMPX(reg_index)) {
545     if (reg_info->encoding == lldb::eEncodingVector) {
546       if (reg_index >= m_reg_info.first_st && reg_index <= m_reg_info.last_st)
547         ::memcpy(
548             m_fpr.xstate.fxsave.stmm[reg_index - m_reg_info.first_st].bytes,
549             reg_value.GetBytes(), reg_value.GetByteSize());
550 
551       if (reg_index >= m_reg_info.first_mm && reg_index <= m_reg_info.last_mm)
552         ::memcpy(
553             m_fpr.xstate.fxsave.stmm[reg_index - m_reg_info.first_mm].bytes,
554             reg_value.GetBytes(), reg_value.GetByteSize());
555 
556       if (reg_index >= m_reg_info.first_xmm && reg_index <= m_reg_info.last_xmm)
557         ::memcpy(
558             m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_xmm].bytes,
559             reg_value.GetBytes(), reg_value.GetByteSize());
560 
561       if (reg_index >= m_reg_info.first_ymm &&
562           reg_index <= m_reg_info.last_ymm) {
563         // Store ymm register content, and split into the register halves in
564         // xmm.bytes and ymmh.bytes
565         ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes,
566                  reg_value.GetBytes(), reg_value.GetByteSize());
567         if (!CopyYMMtoXSTATE(reg_index, GetByteOrder()))
568           return Status("CopyYMMtoXSTATE() failed");
569       }
570 
571       if (reg_index >= m_reg_info.first_mpxr &&
572           reg_index <= m_reg_info.last_mpxr) {
573         ::memcpy(m_mpx_set.mpxr[reg_index - m_reg_info.first_mpxr].bytes,
574                  reg_value.GetBytes(), reg_value.GetByteSize());
575         if (!CopyMPXtoXSTATE(reg_index))
576           return Status("CopyMPXtoXSTATE() failed");
577       }
578 
579       if (reg_index >= m_reg_info.first_mpxc &&
580           reg_index <= m_reg_info.last_mpxc) {
581         ::memcpy(m_mpx_set.mpxc[reg_index - m_reg_info.first_mpxc].bytes,
582                  reg_value.GetBytes(), reg_value.GetByteSize());
583         if (!CopyMPXtoXSTATE(reg_index))
584           return Status("CopyMPXtoXSTATE() failed");
585       }
586     } else {
587       // Get pointer to m_fpr.xstate.fxsave variable and set the data to it.
588 
589       // Byte offsets of all registers are calculated wrt 'UserArea' structure.
590       // However, WriteFPR() takes m_fpr (of type FPR structure) and writes only
591       // fpu
592       // registers using ptrace(PTRACE_SETFPREGS,..) API. Hence fpu registers
593       // should
594       // be written in m_fpr at byte offsets calculated wrt FPR structure.
595 
596       // Since, FPR structure is also one of the member of UserArea structure.
597       // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) -
598       // byte_offset(fctrl wrt UserArea)
599       assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) <
600              sizeof(m_fpr));
601       uint8_t *dst = (uint8_t *)&m_fpr + reg_info->byte_offset -
602                      m_fctrl_offset_in_userarea;
603       switch (reg_info->byte_size) {
604       case 1:
605         *(uint8_t *)dst = reg_value.GetAsUInt8();
606         break;
607       case 2:
608         *(uint16_t *)dst = reg_value.GetAsUInt16();
609         break;
610       case 4:
611         *(uint32_t *)dst = reg_value.GetAsUInt32();
612         break;
613       case 8:
614         *(uint64_t *)dst = reg_value.GetAsUInt64();
615         break;
616       default:
617         assert(false && "Unhandled data size.");
618         return Status("unhandled register data size %" PRIu32,
619                       reg_info->byte_size);
620       }
621     }
622 
623     Status error = WriteFPR();
624     if (error.Fail())
625       return error;
626 
627     if (IsAVX(reg_index)) {
628       if (!CopyYMMtoXSTATE(reg_index, GetByteOrder()))
629         return Status("CopyYMMtoXSTATE() failed");
630     }
631 
632     if (IsMPX(reg_index)) {
633       if (!CopyMPXtoXSTATE(reg_index))
634         return Status("CopyMPXtoXSTATE() failed");
635     }
636     return Status();
637   }
638   return Status("failed - register wasn't recognized to be a GPR or an FPR, "
639                 "write strategy unknown");
640 }
641 
642 Status NativeRegisterContextLinux_x86_64::ReadAllRegisterValues(
643     lldb::DataBufferSP &data_sp) {
644   Status error;
645 
646   data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
647   error = ReadGPR();
648   if (error.Fail())
649     return error;
650 
651   error = ReadFPR();
652   if (error.Fail())
653     return error;
654 
655   uint8_t *dst = data_sp->GetBytes();
656   ::memcpy(dst, &m_gpr_x86_64, GetRegisterInfoInterface().GetGPRSize());
657   dst += GetRegisterInfoInterface().GetGPRSize();
658   if (m_xstate_type == XStateType::FXSAVE)
659     ::memcpy(dst, &m_fpr.xstate.fxsave, sizeof(m_fpr.xstate.fxsave));
660   else if (m_xstate_type == XStateType::XSAVE) {
661     lldb::ByteOrder byte_order = GetByteOrder();
662 
663     if (IsCPUFeatureAvailable(RegSet::avx)) {
664       // Assemble the YMM register content from the register halves.
665       for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm;
666            ++reg) {
667         if (!CopyXSTATEtoYMM(reg, byte_order)) {
668           error.SetErrorStringWithFormat(
669               "NativeRegisterContextLinux_x86_64::%s "
670               "CopyXSTATEtoYMM() failed for reg num "
671               "%" PRIu32,
672               __FUNCTION__, reg);
673           return error;
674         }
675       }
676     }
677 
678     if (IsCPUFeatureAvailable(RegSet::mpx)) {
679       for (uint32_t reg = m_reg_info.first_mpxr; reg <= m_reg_info.last_mpxc;
680            ++reg) {
681         if (!CopyXSTATEtoMPX(reg)) {
682           error.SetErrorStringWithFormat(
683               "NativeRegisterContextLinux_x86_64::%s "
684               "CopyXSTATEtoMPX() failed for reg num "
685               "%" PRIu32,
686               __FUNCTION__, reg);
687           return error;
688         }
689       }
690     }
691     // Copy the extended register state including the assembled ymm registers.
692     ::memcpy(dst, &m_fpr, sizeof(m_fpr));
693   } else {
694     assert(false && "how do we save the floating point registers?");
695     error.SetErrorString("unsure how to save the floating point registers");
696   }
697   /** The following code is specific to Linux x86 based architectures,
698    *  where the register orig_eax (32 bit)/orig_rax (64 bit) is set to
699    *  -1 to solve the bug 23659, such a setting prevents the automatic
700    *  decrement of the instruction pointer which was causing the SIGILL
701    *  exception.
702    * **/
703 
704   RegisterValue value((uint64_t)-1);
705   const RegisterInfo *reg_info =
706       GetRegisterInfoInterface().GetDynamicRegisterInfo("orig_eax");
707   if (reg_info == nullptr)
708     reg_info = GetRegisterInfoInterface().GetDynamicRegisterInfo("orig_rax");
709 
710   if (reg_info != nullptr)
711     return DoWriteRegisterValue(reg_info->byte_offset, reg_info->name, value);
712 
713   return error;
714 }
715 
716 Status NativeRegisterContextLinux_x86_64::WriteAllRegisterValues(
717     const lldb::DataBufferSP &data_sp) {
718   Status error;
719 
720   if (!data_sp) {
721     error.SetErrorStringWithFormat(
722         "NativeRegisterContextLinux_x86_64::%s invalid data_sp provided",
723         __FUNCTION__);
724     return error;
725   }
726 
727   if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) {
728     error.SetErrorStringWithFormatv(
729         "data_sp contained mismatched data size, expected {0}, actual {1}",
730         REG_CONTEXT_SIZE, data_sp->GetByteSize());
731     return error;
732   }
733 
734   uint8_t *src = data_sp->GetBytes();
735   if (src == nullptr) {
736     error.SetErrorStringWithFormat("NativeRegisterContextLinux_x86_64::%s "
737                                    "DataBuffer::GetBytes() returned a null "
738                                    "pointer",
739                                    __FUNCTION__);
740     return error;
741   }
742   ::memcpy(&m_gpr_x86_64, src, GetRegisterInfoInterface().GetGPRSize());
743 
744   error = WriteGPR();
745   if (error.Fail())
746     return error;
747 
748   src += GetRegisterInfoInterface().GetGPRSize();
749   if (m_xstate_type == XStateType::FXSAVE)
750     ::memcpy(&m_fpr.xstate.fxsave, src, sizeof(m_fpr.xstate.fxsave));
751   else if (m_xstate_type == XStateType::XSAVE)
752     ::memcpy(&m_fpr.xstate.xsave, src, sizeof(m_fpr.xstate.xsave));
753 
754   error = WriteFPR();
755   if (error.Fail())
756     return error;
757 
758   if (m_xstate_type == XStateType::XSAVE) {
759     lldb::ByteOrder byte_order = GetByteOrder();
760 
761     if (IsCPUFeatureAvailable(RegSet::avx)) {
762       // Parse the YMM register content from the register halves.
763       for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm;
764            ++reg) {
765         if (!CopyYMMtoXSTATE(reg, byte_order)) {
766           error.SetErrorStringWithFormat(
767               "NativeRegisterContextLinux_x86_64::%s "
768               "CopyYMMtoXSTATE() failed for reg num "
769               "%" PRIu32,
770               __FUNCTION__, reg);
771           return error;
772         }
773       }
774     }
775 
776     if (IsCPUFeatureAvailable(RegSet::mpx)) {
777       for (uint32_t reg = m_reg_info.first_mpxr; reg <= m_reg_info.last_mpxc;
778            ++reg) {
779         if (!CopyMPXtoXSTATE(reg)) {
780           error.SetErrorStringWithFormat(
781               "NativeRegisterContextLinux_x86_64::%s "
782               "CopyMPXtoXSTATE() failed for reg num "
783               "%" PRIu32,
784               __FUNCTION__, reg);
785           return error;
786         }
787       }
788     }
789   }
790 
791   return error;
792 }
793 
794 bool NativeRegisterContextLinux_x86_64::IsCPUFeatureAvailable(
795     RegSet feature_code) const {
796   if (m_xstate_type == XStateType::Invalid) {
797     if (const_cast<NativeRegisterContextLinux_x86_64 *>(this)->ReadFPR().Fail())
798       return false;
799   }
800   switch (feature_code) {
801   case RegSet::gpr:
802   case RegSet::fpu:
803     return true;
804   case RegSet::avx: // Check if CPU has AVX and if there is kernel support, by
805                     // reading in the XCR0 area of XSAVE.
806     if ((m_fpr.xstate.xsave.i387.xcr0 & mask_XSTATE_AVX) == mask_XSTATE_AVX)
807       return true;
808      break;
809   case RegSet::mpx: // Check if CPU has MPX and if there is kernel support, by
810                     // reading in the XCR0 area of XSAVE.
811     if ((m_fpr.xstate.xsave.i387.xcr0 & mask_XSTATE_MPX) == mask_XSTATE_MPX)
812       return true;
813     break;
814   }
815   return false;
816 }
817 
818 bool NativeRegisterContextLinux_x86_64::IsRegisterSetAvailable(
819     uint32_t set_index) const {
820   uint32_t num_sets = k_num_register_sets - k_num_extended_register_sets;
821 
822   switch (static_cast<RegSet>(set_index)) {
823   case RegSet::gpr:
824   case RegSet::fpu:
825     return (set_index < num_sets);
826   case RegSet::avx:
827     return IsCPUFeatureAvailable(RegSet::avx);
828   case RegSet::mpx:
829     return IsCPUFeatureAvailable(RegSet::mpx);
830   }
831   return false;
832 }
833 
834 bool NativeRegisterContextLinux_x86_64::IsGPR(uint32_t reg_index) const {
835   // GPRs come first.
836   return reg_index <= m_reg_info.last_gpr;
837 }
838 
839 bool NativeRegisterContextLinux_x86_64::IsFPR(uint32_t reg_index) const {
840   return (m_reg_info.first_fpr <= reg_index &&
841           reg_index <= m_reg_info.last_fpr);
842 }
843 
844 Status NativeRegisterContextLinux_x86_64::WriteFPR() {
845   switch (m_xstate_type) {
846   case XStateType::FXSAVE:
847     return WriteRegisterSet(
848         &m_iovec, sizeof(m_fpr.xstate.xsave),
849         fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture()));
850   case XStateType::XSAVE:
851     return WriteRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave),
852                             NT_X86_XSTATE);
853   default:
854     return Status("Unrecognized FPR type.");
855   }
856 }
857 
858 bool NativeRegisterContextLinux_x86_64::IsAVX(uint32_t reg_index) const {
859   if (!IsCPUFeatureAvailable(RegSet::avx))
860     return false;
861   return (m_reg_info.first_ymm <= reg_index &&
862           reg_index <= m_reg_info.last_ymm);
863 }
864 
865 bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoYMM(
866     uint32_t reg_index, lldb::ByteOrder byte_order) {
867   if (!IsAVX(reg_index))
868     return false;
869 
870   if (byte_order == lldb::eByteOrderLittle) {
871     ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes,
872              m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_ymm].bytes,
873              sizeof(XMMReg));
874     ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes +
875                  sizeof(XMMReg),
876              m_fpr.xstate.xsave.ymmh[reg_index - m_reg_info.first_ymm].bytes,
877              sizeof(YMMHReg));
878     return true;
879   }
880 
881   if (byte_order == lldb::eByteOrderBig) {
882     ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes +
883                  sizeof(XMMReg),
884              m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_ymm].bytes,
885              sizeof(XMMReg));
886     ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes,
887              m_fpr.xstate.xsave.ymmh[reg_index - m_reg_info.first_ymm].bytes,
888              sizeof(YMMHReg));
889     return true;
890   }
891   return false; // unsupported or invalid byte order
892 }
893 
894 bool NativeRegisterContextLinux_x86_64::CopyYMMtoXSTATE(
895     uint32_t reg, lldb::ByteOrder byte_order) {
896   if (!IsAVX(reg))
897     return false;
898 
899   if (byte_order == lldb::eByteOrderLittle) {
900     ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
901              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(XMMReg));
902     ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
903              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
904              sizeof(YMMHReg));
905     return true;
906   }
907 
908   if (byte_order == lldb::eByteOrderBig) {
909     ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
910              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
911              sizeof(XMMReg));
912     ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
913              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(YMMHReg));
914     return true;
915   }
916   return false; // unsupported or invalid byte order
917 }
918 
919 void *NativeRegisterContextLinux_x86_64::GetFPRBuffer() {
920   switch (m_xstate_type) {
921   case XStateType::FXSAVE:
922     return &m_fpr.xstate.fxsave;
923   case XStateType::XSAVE:
924     return &m_iovec;
925   default:
926     return nullptr;
927   }
928 }
929 
930 size_t NativeRegisterContextLinux_x86_64::GetFPRSize() {
931   switch (m_xstate_type) {
932   case XStateType::FXSAVE:
933     return sizeof(m_fpr.xstate.fxsave);
934   case XStateType::XSAVE:
935     return sizeof(m_iovec);
936   default:
937     return 0;
938   }
939 }
940 
941 Status NativeRegisterContextLinux_x86_64::ReadFPR() {
942   Status error;
943 
944   // Probe XSAVE and if it is not supported fall back to FXSAVE.
945   if (m_xstate_type != XStateType::FXSAVE) {
946     error =
947         ReadRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_X86_XSTATE);
948     if (!error.Fail()) {
949       m_xstate_type = XStateType::XSAVE;
950       return error;
951     }
952   }
953   error = ReadRegisterSet(
954       &m_iovec, sizeof(m_fpr.xstate.xsave),
955       fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture()));
956   if (!error.Fail()) {
957     m_xstate_type = XStateType::FXSAVE;
958     return error;
959   }
960   return Status("Unrecognized FPR type.");
961 }
962 
963 bool NativeRegisterContextLinux_x86_64::IsMPX(uint32_t reg_index) const {
964   if (!IsCPUFeatureAvailable(RegSet::mpx))
965     return false;
966   return (m_reg_info.first_mpxr <= reg_index &&
967           reg_index <= m_reg_info.last_mpxc);
968 }
969 
970 bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoMPX(uint32_t reg) {
971   if (!IsMPX(reg))
972     return false;
973 
974   if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) {
975     ::memcpy(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes,
976              m_fpr.xstate.xsave.mpxr[reg - m_reg_info.first_mpxr].bytes,
977              sizeof(MPXReg));
978   } else {
979     ::memcpy(m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes,
980              m_fpr.xstate.xsave.mpxc[reg - m_reg_info.first_mpxc].bytes,
981              sizeof(MPXCsr));
982   }
983   return true;
984 }
985 
986 bool NativeRegisterContextLinux_x86_64::CopyMPXtoXSTATE(uint32_t reg) {
987   if (!IsMPX(reg))
988     return false;
989 
990   if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) {
991     ::memcpy(m_fpr.xstate.xsave.mpxr[reg - m_reg_info.first_mpxr].bytes,
992              m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes, sizeof(MPXReg));
993   } else {
994     ::memcpy(m_fpr.xstate.xsave.mpxc[reg - m_reg_info.first_mpxc].bytes,
995              m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes, sizeof(MPXCsr));
996   }
997   return true;
998 }
999 
1000 Status NativeRegisterContextLinux_x86_64::IsWatchpointHit(uint32_t wp_index,
1001                                                           bool &is_hit) {
1002   if (wp_index >= NumSupportedHardwareWatchpoints())
1003     return Status("Watchpoint index out of range");
1004 
1005   RegisterValue reg_value;
1006   Status error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value);
1007   if (error.Fail()) {
1008     is_hit = false;
1009     return error;
1010   }
1011 
1012   uint64_t status_bits = reg_value.GetAsUInt64();
1013 
1014   is_hit = status_bits & (1 << wp_index);
1015 
1016   return error;
1017 }
1018 
1019 Status NativeRegisterContextLinux_x86_64::GetWatchpointHitIndex(
1020     uint32_t &wp_index, lldb::addr_t trap_addr) {
1021   uint32_t num_hw_wps = NumSupportedHardwareWatchpoints();
1022   for (wp_index = 0; wp_index < num_hw_wps; ++wp_index) {
1023     bool is_hit;
1024     Status error = IsWatchpointHit(wp_index, is_hit);
1025     if (error.Fail()) {
1026       wp_index = LLDB_INVALID_INDEX32;
1027       return error;
1028     } else if (is_hit) {
1029       return error;
1030     }
1031   }
1032   wp_index = LLDB_INVALID_INDEX32;
1033   return Status();
1034 }
1035 
1036 Status NativeRegisterContextLinux_x86_64::IsWatchpointVacant(uint32_t wp_index,
1037                                                              bool &is_vacant) {
1038   if (wp_index >= NumSupportedHardwareWatchpoints())
1039     return Status("Watchpoint index out of range");
1040 
1041   RegisterValue reg_value;
1042   Status error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value);
1043   if (error.Fail()) {
1044     is_vacant = false;
1045     return error;
1046   }
1047 
1048   uint64_t control_bits = reg_value.GetAsUInt64();
1049 
1050   is_vacant = !(control_bits & (1 << (2 * wp_index)));
1051 
1052   return error;
1053 }
1054 
1055 Status NativeRegisterContextLinux_x86_64::SetHardwareWatchpointWithIndex(
1056     lldb::addr_t addr, size_t size, uint32_t watch_flags, uint32_t wp_index) {
1057 
1058   if (wp_index >= NumSupportedHardwareWatchpoints())
1059     return Status("Watchpoint index out of range");
1060 
1061   // Read only watchpoints aren't supported on x86_64. Fall back to read/write
1062   // waitchpoints instead.
1063   // TODO: Add logic to detect when a write happens and ignore that watchpoint
1064   // hit.
1065   if (watch_flags == 0x2)
1066     watch_flags = 0x3;
1067 
1068   if (watch_flags != 0x1 && watch_flags != 0x3)
1069     return Status("Invalid read/write bits for watchpoint");
1070 
1071   if (size != 1 && size != 2 && size != 4 && size != 8)
1072     return Status("Invalid size for watchpoint");
1073 
1074   bool is_vacant;
1075   Status error = IsWatchpointVacant(wp_index, is_vacant);
1076   if (error.Fail())
1077     return error;
1078   if (!is_vacant)
1079     return Status("Watchpoint index not vacant");
1080 
1081   RegisterValue reg_value;
1082   error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value);
1083   if (error.Fail())
1084     return error;
1085 
1086   // for watchpoints 0, 1, 2, or 3, respectively,
1087   // set bits 1, 3, 5, or 7
1088   uint64_t enable_bit = 1 << (2 * wp_index);
1089 
1090   // set bits 16-17, 20-21, 24-25, or 28-29
1091   // with 0b01 for write, and 0b11 for read/write
1092   uint64_t rw_bits = watch_flags << (16 + 4 * wp_index);
1093 
1094   // set bits 18-19, 22-23, 26-27, or 30-31
1095   // with 0b00, 0b01, 0b10, or 0b11
1096   // for 1, 2, 8 (if supported), or 4 bytes, respectively
1097   uint64_t size_bits = (size == 8 ? 0x2 : size - 1) << (18 + 4 * wp_index);
1098 
1099   uint64_t bit_mask = (0x3 << (2 * wp_index)) | (0xF << (16 + 4 * wp_index));
1100 
1101   uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask;
1102 
1103   control_bits |= enable_bit | rw_bits | size_bits;
1104 
1105   error = WriteRegisterRaw(m_reg_info.first_dr + wp_index, RegisterValue(addr));
1106   if (error.Fail())
1107     return error;
1108 
1109   error =
1110       WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits));
1111   if (error.Fail())
1112     return error;
1113 
1114   error.Clear();
1115   return error;
1116 }
1117 
1118 bool NativeRegisterContextLinux_x86_64::ClearHardwareWatchpoint(
1119     uint32_t wp_index) {
1120   if (wp_index >= NumSupportedHardwareWatchpoints())
1121     return false;
1122 
1123   RegisterValue reg_value;
1124 
1125   // for watchpoints 0, 1, 2, or 3, respectively,
1126   // clear bits 0, 1, 2, or 3 of the debug status register (DR6)
1127   Status error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value);
1128   if (error.Fail())
1129     return false;
1130   uint64_t bit_mask = 1 << wp_index;
1131   uint64_t status_bits = reg_value.GetAsUInt64() & ~bit_mask;
1132   error = WriteRegisterRaw(m_reg_info.first_dr + 6, RegisterValue(status_bits));
1133   if (error.Fail())
1134     return false;
1135 
1136   // for watchpoints 0, 1, 2, or 3, respectively,
1137   // clear bits {0-1,16-19}, {2-3,20-23}, {4-5,24-27}, or {6-7,28-31}
1138   // of the debug control register (DR7)
1139   error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value);
1140   if (error.Fail())
1141     return false;
1142   bit_mask = (0x3 << (2 * wp_index)) | (0xF << (16 + 4 * wp_index));
1143   uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask;
1144   return WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits))
1145       .Success();
1146 }
1147 
1148 Status NativeRegisterContextLinux_x86_64::ClearAllHardwareWatchpoints() {
1149   RegisterValue reg_value;
1150 
1151   // clear bits {0-4} of the debug status register (DR6)
1152   Status error = ReadRegisterRaw(m_reg_info.first_dr + 6, reg_value);
1153   if (error.Fail())
1154     return error;
1155   uint64_t bit_mask = 0xF;
1156   uint64_t status_bits = reg_value.GetAsUInt64() & ~bit_mask;
1157   error = WriteRegisterRaw(m_reg_info.first_dr + 6, RegisterValue(status_bits));
1158   if (error.Fail())
1159     return error;
1160 
1161   // clear bits {0-7,16-31} of the debug control register (DR7)
1162   error = ReadRegisterRaw(m_reg_info.first_dr + 7, reg_value);
1163   if (error.Fail())
1164     return error;
1165   bit_mask = 0xFF | (0xFFFF << 16);
1166   uint64_t control_bits = reg_value.GetAsUInt64() & ~bit_mask;
1167   return WriteRegisterRaw(m_reg_info.first_dr + 7, RegisterValue(control_bits));
1168 }
1169 
1170 uint32_t NativeRegisterContextLinux_x86_64::SetHardwareWatchpoint(
1171     lldb::addr_t addr, size_t size, uint32_t watch_flags) {
1172   Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS));
1173   const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
1174   for (uint32_t wp_index = 0; wp_index < num_hw_watchpoints; ++wp_index) {
1175     bool is_vacant;
1176     Status error = IsWatchpointVacant(wp_index, is_vacant);
1177     if (is_vacant) {
1178       error = SetHardwareWatchpointWithIndex(addr, size, watch_flags, wp_index);
1179       if (error.Success())
1180         return wp_index;
1181     }
1182     if (error.Fail() && log) {
1183       log->Printf("NativeRegisterContextLinux_x86_64::%s Error: %s",
1184                   __FUNCTION__, error.AsCString());
1185     }
1186   }
1187   return LLDB_INVALID_INDEX32;
1188 }
1189 
1190 lldb::addr_t
1191 NativeRegisterContextLinux_x86_64::GetWatchpointAddress(uint32_t wp_index) {
1192   if (wp_index >= NumSupportedHardwareWatchpoints())
1193     return LLDB_INVALID_ADDRESS;
1194   RegisterValue reg_value;
1195   if (ReadRegisterRaw(m_reg_info.first_dr + wp_index, reg_value).Fail())
1196     return LLDB_INVALID_ADDRESS;
1197   return reg_value.GetAsUInt64();
1198 }
1199 
1200 uint32_t NativeRegisterContextLinux_x86_64::NumSupportedHardwareWatchpoints() {
1201   // Available debug address registers: dr0, dr1, dr2, dr3
1202   return 4;
1203 }
1204 
1205 #endif // defined(__i386__) || defined(__x86_64__)
1206