1 //===-- NativeRegisterContextLinux_x86_64.cpp -----------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #if defined(__i386__) || defined(__x86_64__) 10 11 #include "NativeRegisterContextLinux_x86_64.h" 12 13 #include "lldb/Host/HostInfo.h" 14 #include "lldb/Utility/DataBufferHeap.h" 15 #include "lldb/Utility/Log.h" 16 #include "lldb/Utility/RegisterValue.h" 17 #include "lldb/Utility/Status.h" 18 19 #include "Plugins/Process/Utility/RegisterContextLinux_i386.h" 20 #include "Plugins/Process/Utility/RegisterContextLinux_x86_64.h" 21 #include <cpuid.h> 22 #include <linux/elf.h> 23 24 // Newer toolchains define __get_cpuid_count in cpuid.h, but some 25 // older-but-still-supported ones (e.g. gcc 5.4.0) don't, so we 26 // define it locally here, following the definition in clang/lib/Headers. 27 static inline int get_cpuid_count(unsigned int __leaf, 28 unsigned int __subleaf, 29 unsigned int *__eax, unsigned int *__ebx, 30 unsigned int *__ecx, unsigned int *__edx) 31 { 32 unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, nullptr); 33 34 if (__max_leaf == 0 || __max_leaf < __leaf) 35 return 0; 36 37 __cpuid_count(__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx); 38 return 1; 39 } 40 41 using namespace lldb_private; 42 using namespace lldb_private::process_linux; 43 44 // Private namespace. 45 46 namespace { 47 // x86 32-bit general purpose registers. 48 const uint32_t g_gpr_regnums_i386[] = { 49 lldb_eax_i386, lldb_ebx_i386, lldb_ecx_i386, lldb_edx_i386, 50 lldb_edi_i386, lldb_esi_i386, lldb_ebp_i386, lldb_esp_i386, 51 lldb_eip_i386, lldb_eflags_i386, lldb_cs_i386, lldb_fs_i386, 52 lldb_gs_i386, lldb_ss_i386, lldb_ds_i386, lldb_es_i386, 53 lldb_ax_i386, lldb_bx_i386, lldb_cx_i386, lldb_dx_i386, 54 lldb_di_i386, lldb_si_i386, lldb_bp_i386, lldb_sp_i386, 55 lldb_ah_i386, lldb_bh_i386, lldb_ch_i386, lldb_dh_i386, 56 lldb_al_i386, lldb_bl_i386, lldb_cl_i386, lldb_dl_i386, 57 LLDB_INVALID_REGNUM // register sets need to end with this flag 58 }; 59 static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) - 60 1 == 61 k_num_gpr_registers_i386, 62 "g_gpr_regnums_i386 has wrong number of register infos"); 63 64 // x86 32-bit floating point registers. 65 const uint32_t g_fpu_regnums_i386[] = { 66 lldb_fctrl_i386, lldb_fstat_i386, lldb_ftag_i386, lldb_fop_i386, 67 lldb_fiseg_i386, lldb_fioff_i386, lldb_foseg_i386, lldb_fooff_i386, 68 lldb_mxcsr_i386, lldb_mxcsrmask_i386, lldb_st0_i386, lldb_st1_i386, 69 lldb_st2_i386, lldb_st3_i386, lldb_st4_i386, lldb_st5_i386, 70 lldb_st6_i386, lldb_st7_i386, lldb_mm0_i386, lldb_mm1_i386, 71 lldb_mm2_i386, lldb_mm3_i386, lldb_mm4_i386, lldb_mm5_i386, 72 lldb_mm6_i386, lldb_mm7_i386, lldb_xmm0_i386, lldb_xmm1_i386, 73 lldb_xmm2_i386, lldb_xmm3_i386, lldb_xmm4_i386, lldb_xmm5_i386, 74 lldb_xmm6_i386, lldb_xmm7_i386, 75 LLDB_INVALID_REGNUM // register sets need to end with this flag 76 }; 77 static_assert((sizeof(g_fpu_regnums_i386) / sizeof(g_fpu_regnums_i386[0])) - 78 1 == 79 k_num_fpr_registers_i386, 80 "g_fpu_regnums_i386 has wrong number of register infos"); 81 82 // x86 32-bit AVX registers. 83 const uint32_t g_avx_regnums_i386[] = { 84 lldb_ymm0_i386, lldb_ymm1_i386, lldb_ymm2_i386, lldb_ymm3_i386, 85 lldb_ymm4_i386, lldb_ymm5_i386, lldb_ymm6_i386, lldb_ymm7_i386, 86 LLDB_INVALID_REGNUM // register sets need to end with this flag 87 }; 88 static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) - 89 1 == 90 k_num_avx_registers_i386, 91 " g_avx_regnums_i386 has wrong number of register infos"); 92 93 // x64 32-bit MPX registers. 94 static const uint32_t g_mpx_regnums_i386[] = { 95 lldb_bnd0_i386, lldb_bnd1_i386, lldb_bnd2_i386, lldb_bnd3_i386, 96 lldb_bndcfgu_i386, lldb_bndstatus_i386, 97 LLDB_INVALID_REGNUM // register sets need to end with this flag 98 }; 99 static_assert((sizeof(g_mpx_regnums_i386) / sizeof(g_mpx_regnums_i386[0])) - 100 1 == 101 k_num_mpx_registers_i386, 102 "g_mpx_regnums_x86_64 has wrong number of register infos"); 103 104 // x86 64-bit general purpose registers. 105 static const uint32_t g_gpr_regnums_x86_64[] = { 106 lldb_rax_x86_64, lldb_rbx_x86_64, lldb_rcx_x86_64, lldb_rdx_x86_64, 107 lldb_rdi_x86_64, lldb_rsi_x86_64, lldb_rbp_x86_64, lldb_rsp_x86_64, 108 lldb_r8_x86_64, lldb_r9_x86_64, lldb_r10_x86_64, lldb_r11_x86_64, 109 lldb_r12_x86_64, lldb_r13_x86_64, lldb_r14_x86_64, lldb_r15_x86_64, 110 lldb_rip_x86_64, lldb_rflags_x86_64, lldb_cs_x86_64, lldb_fs_x86_64, 111 lldb_gs_x86_64, lldb_ss_x86_64, lldb_ds_x86_64, lldb_es_x86_64, 112 lldb_eax_x86_64, lldb_ebx_x86_64, lldb_ecx_x86_64, lldb_edx_x86_64, 113 lldb_edi_x86_64, lldb_esi_x86_64, lldb_ebp_x86_64, lldb_esp_x86_64, 114 lldb_r8d_x86_64, // Low 32 bits or r8 115 lldb_r9d_x86_64, // Low 32 bits or r9 116 lldb_r10d_x86_64, // Low 32 bits or r10 117 lldb_r11d_x86_64, // Low 32 bits or r11 118 lldb_r12d_x86_64, // Low 32 bits or r12 119 lldb_r13d_x86_64, // Low 32 bits or r13 120 lldb_r14d_x86_64, // Low 32 bits or r14 121 lldb_r15d_x86_64, // Low 32 bits or r15 122 lldb_ax_x86_64, lldb_bx_x86_64, lldb_cx_x86_64, lldb_dx_x86_64, 123 lldb_di_x86_64, lldb_si_x86_64, lldb_bp_x86_64, lldb_sp_x86_64, 124 lldb_r8w_x86_64, // Low 16 bits or r8 125 lldb_r9w_x86_64, // Low 16 bits or r9 126 lldb_r10w_x86_64, // Low 16 bits or r10 127 lldb_r11w_x86_64, // Low 16 bits or r11 128 lldb_r12w_x86_64, // Low 16 bits or r12 129 lldb_r13w_x86_64, // Low 16 bits or r13 130 lldb_r14w_x86_64, // Low 16 bits or r14 131 lldb_r15w_x86_64, // Low 16 bits or r15 132 lldb_ah_x86_64, lldb_bh_x86_64, lldb_ch_x86_64, lldb_dh_x86_64, 133 lldb_al_x86_64, lldb_bl_x86_64, lldb_cl_x86_64, lldb_dl_x86_64, 134 lldb_dil_x86_64, lldb_sil_x86_64, lldb_bpl_x86_64, lldb_spl_x86_64, 135 lldb_r8l_x86_64, // Low 8 bits or r8 136 lldb_r9l_x86_64, // Low 8 bits or r9 137 lldb_r10l_x86_64, // Low 8 bits or r10 138 lldb_r11l_x86_64, // Low 8 bits or r11 139 lldb_r12l_x86_64, // Low 8 bits or r12 140 lldb_r13l_x86_64, // Low 8 bits or r13 141 lldb_r14l_x86_64, // Low 8 bits or r14 142 lldb_r15l_x86_64, // Low 8 bits or r15 143 LLDB_INVALID_REGNUM // register sets need to end with this flag 144 }; 145 static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) - 146 1 == 147 k_num_gpr_registers_x86_64, 148 "g_gpr_regnums_x86_64 has wrong number of register infos"); 149 150 // x86 64-bit floating point registers. 151 static const uint32_t g_fpu_regnums_x86_64[] = { 152 lldb_fctrl_x86_64, lldb_fstat_x86_64, lldb_ftag_x86_64, 153 lldb_fop_x86_64, lldb_fiseg_x86_64, lldb_fioff_x86_64, 154 lldb_foseg_x86_64, lldb_fooff_x86_64, lldb_mxcsr_x86_64, 155 lldb_mxcsrmask_x86_64, lldb_st0_x86_64, lldb_st1_x86_64, 156 lldb_st2_x86_64, lldb_st3_x86_64, lldb_st4_x86_64, 157 lldb_st5_x86_64, lldb_st6_x86_64, lldb_st7_x86_64, 158 lldb_mm0_x86_64, lldb_mm1_x86_64, lldb_mm2_x86_64, 159 lldb_mm3_x86_64, lldb_mm4_x86_64, lldb_mm5_x86_64, 160 lldb_mm6_x86_64, lldb_mm7_x86_64, lldb_xmm0_x86_64, 161 lldb_xmm1_x86_64, lldb_xmm2_x86_64, lldb_xmm3_x86_64, 162 lldb_xmm4_x86_64, lldb_xmm5_x86_64, lldb_xmm6_x86_64, 163 lldb_xmm7_x86_64, lldb_xmm8_x86_64, lldb_xmm9_x86_64, 164 lldb_xmm10_x86_64, lldb_xmm11_x86_64, lldb_xmm12_x86_64, 165 lldb_xmm13_x86_64, lldb_xmm14_x86_64, lldb_xmm15_x86_64, 166 LLDB_INVALID_REGNUM // register sets need to end with this flag 167 }; 168 static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) - 169 1 == 170 k_num_fpr_registers_x86_64, 171 "g_fpu_regnums_x86_64 has wrong number of register infos"); 172 173 // x86 64-bit AVX registers. 174 static const uint32_t g_avx_regnums_x86_64[] = { 175 lldb_ymm0_x86_64, lldb_ymm1_x86_64, lldb_ymm2_x86_64, lldb_ymm3_x86_64, 176 lldb_ymm4_x86_64, lldb_ymm5_x86_64, lldb_ymm6_x86_64, lldb_ymm7_x86_64, 177 lldb_ymm8_x86_64, lldb_ymm9_x86_64, lldb_ymm10_x86_64, lldb_ymm11_x86_64, 178 lldb_ymm12_x86_64, lldb_ymm13_x86_64, lldb_ymm14_x86_64, lldb_ymm15_x86_64, 179 LLDB_INVALID_REGNUM // register sets need to end with this flag 180 }; 181 static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) - 182 1 == 183 k_num_avx_registers_x86_64, 184 "g_avx_regnums_x86_64 has wrong number of register infos"); 185 186 // x86 64-bit MPX registers. 187 static const uint32_t g_mpx_regnums_x86_64[] = { 188 lldb_bnd0_x86_64, lldb_bnd1_x86_64, lldb_bnd2_x86_64, 189 lldb_bnd3_x86_64, lldb_bndcfgu_x86_64, lldb_bndstatus_x86_64, 190 LLDB_INVALID_REGNUM // register sets need to end with this flag 191 }; 192 static_assert((sizeof(g_mpx_regnums_x86_64) / sizeof(g_mpx_regnums_x86_64[0])) - 193 1 == 194 k_num_mpx_registers_x86_64, 195 "g_mpx_regnums_x86_64 has wrong number of register infos"); 196 197 // Number of register sets provided by this context. 198 enum { k_num_extended_register_sets = 2, k_num_register_sets = 4 }; 199 200 // Register sets for x86 32-bit. 201 static const RegisterSet g_reg_sets_i386[k_num_register_sets] = { 202 {"General Purpose Registers", "gpr", k_num_gpr_registers_i386, 203 g_gpr_regnums_i386}, 204 {"Floating Point Registers", "fpu", k_num_fpr_registers_i386, 205 g_fpu_regnums_i386}, 206 {"Advanced Vector Extensions", "avx", k_num_avx_registers_i386, 207 g_avx_regnums_i386}, 208 { "Memory Protection Extensions", "mpx", k_num_mpx_registers_i386, 209 g_mpx_regnums_i386}}; 210 211 // Register sets for x86 64-bit. 212 static const RegisterSet g_reg_sets_x86_64[k_num_register_sets] = { 213 {"General Purpose Registers", "gpr", k_num_gpr_registers_x86_64, 214 g_gpr_regnums_x86_64}, 215 {"Floating Point Registers", "fpu", k_num_fpr_registers_x86_64, 216 g_fpu_regnums_x86_64}, 217 {"Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64, 218 g_avx_regnums_x86_64}, 219 { "Memory Protection Extensions", "mpx", k_num_mpx_registers_x86_64, 220 g_mpx_regnums_x86_64}}; 221 } 222 223 #define REG_CONTEXT_SIZE (GetRegisterInfoInterface().GetGPRSize() + sizeof(FPR)) 224 225 // Required ptrace defines. 226 227 // Support ptrace extensions even when compiled without required kernel support 228 #ifndef NT_X86_XSTATE 229 #define NT_X86_XSTATE 0x202 230 #endif 231 #ifndef NT_PRXFPREG 232 #define NT_PRXFPREG 0x46e62b7f 233 #endif 234 235 // On x86_64 NT_PRFPREG is used to access the FXSAVE area. On i386, we need to 236 // use NT_PRXFPREG. 237 static inline unsigned int fxsr_regset(const ArchSpec &arch) { 238 return arch.GetAddressByteSize() == 8 ? NT_PRFPREG : NT_PRXFPREG; 239 } 240 241 // Required MPX define. 242 243 // Support MPX extensions also if compiled with compiler without MPX support. 244 #ifndef bit_MPX 245 #define bit_MPX 0x4000 246 #endif 247 248 // XCR0 extended register sets masks. 249 #define mask_XSTATE_AVX (1ULL << 2) 250 #define mask_XSTATE_BNDREGS (1ULL << 3) 251 #define mask_XSTATE_BNDCFG (1ULL << 4) 252 #define mask_XSTATE_MPX (mask_XSTATE_BNDREGS | mask_XSTATE_BNDCFG) 253 254 std::unique_ptr<NativeRegisterContextLinux> 255 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux( 256 const ArchSpec &target_arch, NativeThreadProtocol &native_thread) { 257 return std::unique_ptr<NativeRegisterContextLinux>( 258 new NativeRegisterContextLinux_x86_64(target_arch, native_thread)); 259 } 260 261 // NativeRegisterContextLinux_x86_64 members. 262 263 static RegisterInfoInterface * 264 CreateRegisterInfoInterface(const ArchSpec &target_arch) { 265 if (HostInfo::GetArchitecture().GetAddressByteSize() == 4) { 266 // 32-bit hosts run with a RegisterContextLinux_i386 context. 267 return new RegisterContextLinux_i386(target_arch); 268 } else { 269 assert((HostInfo::GetArchitecture().GetAddressByteSize() == 8) && 270 "Register setting path assumes this is a 64-bit host"); 271 // X86_64 hosts know how to work with 64-bit and 32-bit EXEs using the 272 // x86_64 register context. 273 return new RegisterContextLinux_x86_64(target_arch); 274 } 275 } 276 277 // Return the size of the XSTATE area supported on this cpu. It is necessary to 278 // allocate the full size of the area even if we do not use/recognise all of it 279 // because ptrace(PTRACE_SETREGSET, NT_X86_XSTATE) will refuse to write to it if 280 // we do not pass it a buffer of sufficient size. The size is always at least 281 // sizeof(FPR) so that the allocated buffer can be safely cast to FPR*. 282 static std::size_t GetXSTATESize() { 283 unsigned int eax, ebx, ecx, edx; 284 // First check whether the XSTATE are is supported at all. 285 if (!__get_cpuid(1, &eax, &ebx, &ecx, &edx) || !(ecx & bit_XSAVE)) 286 return sizeof(FPR); 287 288 // Then fetch the maximum size of the area. 289 if (!get_cpuid_count(0x0d, 0, &eax, &ebx, &ecx, &edx)) 290 return sizeof(FPR); 291 return std::max<std::size_t>(ecx, sizeof(FPR)); 292 } 293 294 NativeRegisterContextLinux_x86_64::NativeRegisterContextLinux_x86_64( 295 const ArchSpec &target_arch, NativeThreadProtocol &native_thread) 296 : NativeRegisterContextRegisterInfo( 297 native_thread, CreateRegisterInfoInterface(target_arch)), 298 m_xstate_type(XStateType::Invalid), m_ymm_set(), m_mpx_set(), 299 m_reg_info(), m_gpr_x86_64() { 300 // Set up data about ranges of valid registers. 301 switch (target_arch.GetMachine()) { 302 case llvm::Triple::x86: 303 m_reg_info.num_registers = k_num_registers_i386; 304 m_reg_info.num_gpr_registers = k_num_gpr_registers_i386; 305 m_reg_info.num_fpr_registers = k_num_fpr_registers_i386; 306 m_reg_info.num_avx_registers = k_num_avx_registers_i386; 307 m_reg_info.num_mpx_registers = k_num_mpx_registers_i386; 308 m_reg_info.last_gpr = k_last_gpr_i386; 309 m_reg_info.first_fpr = k_first_fpr_i386; 310 m_reg_info.last_fpr = k_last_fpr_i386; 311 m_reg_info.first_st = lldb_st0_i386; 312 m_reg_info.last_st = lldb_st7_i386; 313 m_reg_info.first_mm = lldb_mm0_i386; 314 m_reg_info.last_mm = lldb_mm7_i386; 315 m_reg_info.first_xmm = lldb_xmm0_i386; 316 m_reg_info.last_xmm = lldb_xmm7_i386; 317 m_reg_info.first_ymm = lldb_ymm0_i386; 318 m_reg_info.last_ymm = lldb_ymm7_i386; 319 m_reg_info.first_mpxr = lldb_bnd0_i386; 320 m_reg_info.last_mpxr = lldb_bnd3_i386; 321 m_reg_info.first_mpxc = lldb_bndcfgu_i386; 322 m_reg_info.last_mpxc = lldb_bndstatus_i386; 323 m_reg_info.first_dr = lldb_dr0_i386; 324 m_reg_info.last_dr = lldb_dr7_i386; 325 m_reg_info.gpr_flags = lldb_eflags_i386; 326 break; 327 case llvm::Triple::x86_64: 328 m_reg_info.num_registers = k_num_registers_x86_64; 329 m_reg_info.num_gpr_registers = k_num_gpr_registers_x86_64; 330 m_reg_info.num_fpr_registers = k_num_fpr_registers_x86_64; 331 m_reg_info.num_avx_registers = k_num_avx_registers_x86_64; 332 m_reg_info.num_mpx_registers = k_num_mpx_registers_x86_64; 333 m_reg_info.last_gpr = k_last_gpr_x86_64; 334 m_reg_info.first_fpr = k_first_fpr_x86_64; 335 m_reg_info.last_fpr = k_last_fpr_x86_64; 336 m_reg_info.first_st = lldb_st0_x86_64; 337 m_reg_info.last_st = lldb_st7_x86_64; 338 m_reg_info.first_mm = lldb_mm0_x86_64; 339 m_reg_info.last_mm = lldb_mm7_x86_64; 340 m_reg_info.first_xmm = lldb_xmm0_x86_64; 341 m_reg_info.last_xmm = lldb_xmm15_x86_64; 342 m_reg_info.first_ymm = lldb_ymm0_x86_64; 343 m_reg_info.last_ymm = lldb_ymm15_x86_64; 344 m_reg_info.first_mpxr = lldb_bnd0_x86_64; 345 m_reg_info.last_mpxr = lldb_bnd3_x86_64; 346 m_reg_info.first_mpxc = lldb_bndcfgu_x86_64; 347 m_reg_info.last_mpxc = lldb_bndstatus_x86_64; 348 m_reg_info.first_dr = lldb_dr0_x86_64; 349 m_reg_info.last_dr = lldb_dr7_x86_64; 350 m_reg_info.gpr_flags = lldb_rflags_x86_64; 351 break; 352 default: 353 assert(false && "Unhandled target architecture."); 354 break; 355 } 356 357 std::size_t xstate_size = GetXSTATESize(); 358 m_xstate.reset(static_cast<FPR *>(std::malloc(xstate_size))); 359 m_iovec.iov_base = m_xstate.get(); 360 m_iovec.iov_len = xstate_size; 361 362 // Clear out the FPR state. 363 ::memset(m_xstate.get(), 0, xstate_size); 364 365 // Store byte offset of fctrl (i.e. first register of FPR) 366 const RegisterInfo *reg_info_fctrl = GetRegisterInfoByName("fctrl"); 367 m_fctrl_offset_in_userarea = reg_info_fctrl->byte_offset; 368 } 369 370 // CONSIDER after local and llgs debugging are merged, register set support can 371 // be moved into a base x86-64 class with IsRegisterSetAvailable made virtual. 372 uint32_t NativeRegisterContextLinux_x86_64::GetRegisterSetCount() const { 373 uint32_t sets = 0; 374 for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) { 375 if (IsRegisterSetAvailable(set_index)) 376 ++sets; 377 } 378 379 return sets; 380 } 381 382 uint32_t NativeRegisterContextLinux_x86_64::GetUserRegisterCount() const { 383 uint32_t count = 0; 384 for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) { 385 const RegisterSet *set = GetRegisterSet(set_index); 386 if (set) 387 count += set->num_registers; 388 } 389 return count; 390 } 391 392 const RegisterSet * 393 NativeRegisterContextLinux_x86_64::GetRegisterSet(uint32_t set_index) const { 394 if (!IsRegisterSetAvailable(set_index)) 395 return nullptr; 396 397 switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) { 398 case llvm::Triple::x86: 399 return &g_reg_sets_i386[set_index]; 400 case llvm::Triple::x86_64: 401 return &g_reg_sets_x86_64[set_index]; 402 default: 403 assert(false && "Unhandled target architecture."); 404 return nullptr; 405 } 406 407 return nullptr; 408 } 409 410 Status 411 NativeRegisterContextLinux_x86_64::ReadRegister(const RegisterInfo *reg_info, 412 RegisterValue ®_value) { 413 Status error; 414 415 if (!reg_info) { 416 error.SetErrorString("reg_info NULL"); 417 return error; 418 } 419 420 const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB]; 421 if (reg == LLDB_INVALID_REGNUM) { 422 // This is likely an internal register for lldb use only and should not be 423 // directly queried. 424 error.SetErrorStringWithFormat("register \"%s\" is an internal-only lldb " 425 "register, cannot read directly", 426 reg_info->name); 427 return error; 428 } 429 430 if (IsFPR(reg) || IsAVX(reg) || IsMPX(reg)) { 431 error = ReadFPR(); 432 if (error.Fail()) 433 return error; 434 } else { 435 uint32_t full_reg = reg; 436 bool is_subreg = reg_info->invalidate_regs && 437 (reg_info->invalidate_regs[0] != LLDB_INVALID_REGNUM); 438 439 if (is_subreg) { 440 // Read the full aligned 64-bit register. 441 full_reg = reg_info->invalidate_regs[0]; 442 } 443 444 error = ReadRegisterRaw(full_reg, reg_value); 445 446 if (error.Success()) { 447 // If our read was not aligned (for ah,bh,ch,dh), shift our returned 448 // value one byte to the right. 449 if (is_subreg && (reg_info->byte_offset & 0x1)) 450 reg_value.SetUInt64(reg_value.GetAsUInt64() >> 8); 451 452 // If our return byte size was greater than the return value reg size, 453 // then use the type specified by reg_info rather than the uint64_t 454 // default 455 if (reg_value.GetByteSize() > reg_info->byte_size) 456 reg_value.SetType(reg_info); 457 } 458 return error; 459 } 460 461 if (reg_info->encoding == lldb::eEncodingVector) { 462 lldb::ByteOrder byte_order = GetByteOrder(); 463 464 if (byte_order != lldb::eByteOrderInvalid) { 465 if (reg >= m_reg_info.first_st && reg <= m_reg_info.last_st) 466 reg_value.SetBytes( 467 m_xstate->fxsave.stmm[reg - m_reg_info.first_st].bytes, 468 reg_info->byte_size, byte_order); 469 if (reg >= m_reg_info.first_mm && reg <= m_reg_info.last_mm) 470 reg_value.SetBytes( 471 m_xstate->fxsave.stmm[reg - m_reg_info.first_mm].bytes, 472 reg_info->byte_size, byte_order); 473 if (reg >= m_reg_info.first_xmm && reg <= m_reg_info.last_xmm) 474 reg_value.SetBytes( 475 m_xstate->fxsave.xmm[reg - m_reg_info.first_xmm].bytes, 476 reg_info->byte_size, byte_order); 477 if (reg >= m_reg_info.first_ymm && reg <= m_reg_info.last_ymm) { 478 // Concatenate ymm using the register halves in xmm.bytes and 479 // ymmh.bytes 480 if (CopyXSTATEtoYMM(reg, byte_order)) 481 reg_value.SetBytes(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, 482 reg_info->byte_size, byte_order); 483 else { 484 error.SetErrorString("failed to copy ymm register value"); 485 return error; 486 } 487 } 488 if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) { 489 if (CopyXSTATEtoMPX(reg)) 490 reg_value.SetBytes(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes, 491 reg_info->byte_size, byte_order); 492 else { 493 error.SetErrorString("failed to copy mpx register value"); 494 return error; 495 } 496 } 497 if (reg >= m_reg_info.first_mpxc && reg <= m_reg_info.last_mpxc) { 498 if (CopyXSTATEtoMPX(reg)) 499 reg_value.SetBytes(m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes, 500 reg_info->byte_size, byte_order); 501 else { 502 error.SetErrorString("failed to copy mpx register value"); 503 return error; 504 } 505 } 506 507 if (reg_value.GetType() != RegisterValue::eTypeBytes) 508 error.SetErrorString( 509 "write failed - type was expected to be RegisterValue::eTypeBytes"); 510 511 return error; 512 } 513 514 error.SetErrorString("byte order is invalid"); 515 return error; 516 } 517 518 // Get pointer to m_xstate->fxsave variable and set the data from it. 519 520 // Byte offsets of all registers are calculated wrt 'UserArea' structure. 521 // However, ReadFPR() reads fpu registers {using ptrace(PTRACE_GETFPREGS,..)} 522 // and stores them in 'm_fpr' (of type FPR structure). To extract values of 523 // fpu registers, m_fpr should be read at byte offsets calculated wrt to FPR 524 // structure. 525 526 // Since, FPR structure is also one of the member of UserArea structure. 527 // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) - 528 // byte_offset(fctrl wrt UserArea) 529 assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(FPR)); 530 uint8_t *src = (uint8_t *)m_xstate.get() + reg_info->byte_offset - 531 m_fctrl_offset_in_userarea; 532 switch (reg_info->byte_size) { 533 case 1: 534 reg_value.SetUInt8(*(uint8_t *)src); 535 break; 536 case 2: 537 reg_value.SetUInt16(*(uint16_t *)src); 538 break; 539 case 4: 540 reg_value.SetUInt32(*(uint32_t *)src); 541 break; 542 case 8: 543 reg_value.SetUInt64(*(uint64_t *)src); 544 break; 545 default: 546 assert(false && "Unhandled data size."); 547 error.SetErrorStringWithFormat("unhandled byte size: %" PRIu32, 548 reg_info->byte_size); 549 break; 550 } 551 552 return error; 553 } 554 555 void NativeRegisterContextLinux_x86_64::UpdateXSTATEforWrite( 556 uint32_t reg_index) { 557 XSAVE_HDR::XFeature &xstate_bv = m_xstate->xsave.header.xstate_bv; 558 if (IsFPR(reg_index)) { 559 // IsFPR considers both %st and %xmm registers as floating point, but these 560 // map to two features. Set both flags, just in case. 561 xstate_bv |= XSAVE_HDR::XFeature::FP | XSAVE_HDR::XFeature::SSE; 562 } else if (IsAVX(reg_index)) { 563 // Lower bytes of some %ymm registers are shared with %xmm registers. 564 xstate_bv |= XSAVE_HDR::XFeature::YMM | XSAVE_HDR::XFeature::SSE; 565 } else if (IsMPX(reg_index)) { 566 // MPX registers map to two XSAVE features. 567 xstate_bv |= XSAVE_HDR::XFeature::BNDREGS | XSAVE_HDR::XFeature::BNDCSR; 568 } 569 } 570 571 Status NativeRegisterContextLinux_x86_64::WriteRegister( 572 const RegisterInfo *reg_info, const RegisterValue ®_value) { 573 assert(reg_info && "reg_info is null"); 574 575 const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB]; 576 if (reg_index == LLDB_INVALID_REGNUM) 577 return Status("no lldb regnum for %s", reg_info && reg_info->name 578 ? reg_info->name 579 : "<unknown register>"); 580 581 UpdateXSTATEforWrite(reg_index); 582 583 if (IsGPR(reg_index) || IsDR(reg_index)) 584 return WriteRegisterRaw(reg_index, reg_value); 585 586 if (IsFPR(reg_index) || IsAVX(reg_index) || IsMPX(reg_index)) { 587 if (reg_info->encoding == lldb::eEncodingVector) { 588 if (reg_index >= m_reg_info.first_st && reg_index <= m_reg_info.last_st) 589 ::memcpy(m_xstate->fxsave.stmm[reg_index - m_reg_info.first_st].bytes, 590 reg_value.GetBytes(), reg_value.GetByteSize()); 591 592 if (reg_index >= m_reg_info.first_mm && reg_index <= m_reg_info.last_mm) 593 ::memcpy(m_xstate->fxsave.stmm[reg_index - m_reg_info.first_mm].bytes, 594 reg_value.GetBytes(), reg_value.GetByteSize()); 595 596 if (reg_index >= m_reg_info.first_xmm && reg_index <= m_reg_info.last_xmm) 597 ::memcpy(m_xstate->fxsave.xmm[reg_index - m_reg_info.first_xmm].bytes, 598 reg_value.GetBytes(), reg_value.GetByteSize()); 599 600 if (reg_index >= m_reg_info.first_ymm && 601 reg_index <= m_reg_info.last_ymm) { 602 // Store ymm register content, and split into the register halves in 603 // xmm.bytes and ymmh.bytes 604 ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes, 605 reg_value.GetBytes(), reg_value.GetByteSize()); 606 if (!CopyYMMtoXSTATE(reg_index, GetByteOrder())) 607 return Status("CopyYMMtoXSTATE() failed"); 608 } 609 610 if (reg_index >= m_reg_info.first_mpxr && 611 reg_index <= m_reg_info.last_mpxr) { 612 ::memcpy(m_mpx_set.mpxr[reg_index - m_reg_info.first_mpxr].bytes, 613 reg_value.GetBytes(), reg_value.GetByteSize()); 614 if (!CopyMPXtoXSTATE(reg_index)) 615 return Status("CopyMPXtoXSTATE() failed"); 616 } 617 618 if (reg_index >= m_reg_info.first_mpxc && 619 reg_index <= m_reg_info.last_mpxc) { 620 ::memcpy(m_mpx_set.mpxc[reg_index - m_reg_info.first_mpxc].bytes, 621 reg_value.GetBytes(), reg_value.GetByteSize()); 622 if (!CopyMPXtoXSTATE(reg_index)) 623 return Status("CopyMPXtoXSTATE() failed"); 624 } 625 } else { 626 // Get pointer to m_xstate->fxsave variable and set the data to it. 627 628 // Byte offsets of all registers are calculated wrt 'UserArea' structure. 629 // However, WriteFPR() takes m_fpr (of type FPR structure) and writes 630 // only fpu registers using ptrace(PTRACE_SETFPREGS,..) API. Hence fpu 631 // registers should be written in m_fpr at byte offsets calculated wrt 632 // FPR structure. 633 634 // Since, FPR structure is also one of the member of UserArea structure. 635 // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) - 636 // byte_offset(fctrl wrt UserArea) 637 assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) < 638 sizeof(FPR)); 639 uint8_t *dst = (uint8_t *)m_xstate.get() + reg_info->byte_offset - 640 m_fctrl_offset_in_userarea; 641 switch (reg_info->byte_size) { 642 case 1: 643 *(uint8_t *)dst = reg_value.GetAsUInt8(); 644 break; 645 case 2: 646 *(uint16_t *)dst = reg_value.GetAsUInt16(); 647 break; 648 case 4: 649 *(uint32_t *)dst = reg_value.GetAsUInt32(); 650 break; 651 case 8: 652 *(uint64_t *)dst = reg_value.GetAsUInt64(); 653 break; 654 default: 655 assert(false && "Unhandled data size."); 656 return Status("unhandled register data size %" PRIu32, 657 reg_info->byte_size); 658 } 659 } 660 661 Status error = WriteFPR(); 662 if (error.Fail()) 663 return error; 664 665 if (IsAVX(reg_index)) { 666 if (!CopyYMMtoXSTATE(reg_index, GetByteOrder())) 667 return Status("CopyYMMtoXSTATE() failed"); 668 } 669 670 if (IsMPX(reg_index)) { 671 if (!CopyMPXtoXSTATE(reg_index)) 672 return Status("CopyMPXtoXSTATE() failed"); 673 } 674 return Status(); 675 } 676 return Status("failed - register wasn't recognized to be a GPR or an FPR, " 677 "write strategy unknown"); 678 } 679 680 Status NativeRegisterContextLinux_x86_64::ReadAllRegisterValues( 681 lldb::DataBufferSP &data_sp) { 682 Status error; 683 684 data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0)); 685 error = ReadGPR(); 686 if (error.Fail()) 687 return error; 688 689 error = ReadFPR(); 690 if (error.Fail()) 691 return error; 692 693 uint8_t *dst = data_sp->GetBytes(); 694 ::memcpy(dst, &m_gpr_x86_64, GetRegisterInfoInterface().GetGPRSize()); 695 dst += GetRegisterInfoInterface().GetGPRSize(); 696 if (m_xstate_type == XStateType::FXSAVE) 697 ::memcpy(dst, &m_xstate->fxsave, sizeof(m_xstate->fxsave)); 698 else if (m_xstate_type == XStateType::XSAVE) { 699 lldb::ByteOrder byte_order = GetByteOrder(); 700 701 if (IsCPUFeatureAvailable(RegSet::avx)) { 702 // Assemble the YMM register content from the register halves. 703 for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm; 704 ++reg) { 705 if (!CopyXSTATEtoYMM(reg, byte_order)) { 706 error.SetErrorStringWithFormat( 707 "NativeRegisterContextLinux_x86_64::%s " 708 "CopyXSTATEtoYMM() failed for reg num " 709 "%" PRIu32, 710 __FUNCTION__, reg); 711 return error; 712 } 713 } 714 } 715 716 if (IsCPUFeatureAvailable(RegSet::mpx)) { 717 for (uint32_t reg = m_reg_info.first_mpxr; reg <= m_reg_info.last_mpxc; 718 ++reg) { 719 if (!CopyXSTATEtoMPX(reg)) { 720 error.SetErrorStringWithFormat( 721 "NativeRegisterContextLinux_x86_64::%s " 722 "CopyXSTATEtoMPX() failed for reg num " 723 "%" PRIu32, 724 __FUNCTION__, reg); 725 return error; 726 } 727 } 728 } 729 // Copy the extended register state including the assembled ymm registers. 730 ::memcpy(dst, m_xstate.get(), sizeof(FPR)); 731 } else { 732 assert(false && "how do we save the floating point registers?"); 733 error.SetErrorString("unsure how to save the floating point registers"); 734 } 735 /** The following code is specific to Linux x86 based architectures, 736 * where the register orig_eax (32 bit)/orig_rax (64 bit) is set to 737 * -1 to solve the bug 23659, such a setting prevents the automatic 738 * decrement of the instruction pointer which was causing the SIGILL 739 * exception. 740 * **/ 741 742 RegisterValue value((uint64_t)-1); 743 const RegisterInfo *reg_info = 744 GetRegisterInfoInterface().GetDynamicRegisterInfo("orig_eax"); 745 if (reg_info == nullptr) 746 reg_info = GetRegisterInfoInterface().GetDynamicRegisterInfo("orig_rax"); 747 748 if (reg_info != nullptr) 749 return DoWriteRegisterValue(reg_info->byte_offset, reg_info->name, value); 750 751 return error; 752 } 753 754 Status NativeRegisterContextLinux_x86_64::WriteAllRegisterValues( 755 const lldb::DataBufferSP &data_sp) { 756 Status error; 757 758 if (!data_sp) { 759 error.SetErrorStringWithFormat( 760 "NativeRegisterContextLinux_x86_64::%s invalid data_sp provided", 761 __FUNCTION__); 762 return error; 763 } 764 765 if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) { 766 error.SetErrorStringWithFormatv( 767 "data_sp contained mismatched data size, expected {0}, actual {1}", 768 REG_CONTEXT_SIZE, data_sp->GetByteSize()); 769 return error; 770 } 771 772 uint8_t *src = data_sp->GetBytes(); 773 if (src == nullptr) { 774 error.SetErrorStringWithFormat("NativeRegisterContextLinux_x86_64::%s " 775 "DataBuffer::GetBytes() returned a null " 776 "pointer", 777 __FUNCTION__); 778 return error; 779 } 780 ::memcpy(&m_gpr_x86_64, src, GetRegisterInfoInterface().GetGPRSize()); 781 782 error = WriteGPR(); 783 if (error.Fail()) 784 return error; 785 786 src += GetRegisterInfoInterface().GetGPRSize(); 787 if (m_xstate_type == XStateType::FXSAVE) 788 ::memcpy(&m_xstate->fxsave, src, sizeof(m_xstate->fxsave)); 789 else if (m_xstate_type == XStateType::XSAVE) 790 ::memcpy(&m_xstate->xsave, src, sizeof(m_xstate->xsave)); 791 792 error = WriteFPR(); 793 if (error.Fail()) 794 return error; 795 796 if (m_xstate_type == XStateType::XSAVE) { 797 lldb::ByteOrder byte_order = GetByteOrder(); 798 799 if (IsCPUFeatureAvailable(RegSet::avx)) { 800 // Parse the YMM register content from the register halves. 801 for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm; 802 ++reg) { 803 if (!CopyYMMtoXSTATE(reg, byte_order)) { 804 error.SetErrorStringWithFormat( 805 "NativeRegisterContextLinux_x86_64::%s " 806 "CopyYMMtoXSTATE() failed for reg num " 807 "%" PRIu32, 808 __FUNCTION__, reg); 809 return error; 810 } 811 } 812 } 813 814 if (IsCPUFeatureAvailable(RegSet::mpx)) { 815 for (uint32_t reg = m_reg_info.first_mpxr; reg <= m_reg_info.last_mpxc; 816 ++reg) { 817 if (!CopyMPXtoXSTATE(reg)) { 818 error.SetErrorStringWithFormat( 819 "NativeRegisterContextLinux_x86_64::%s " 820 "CopyMPXtoXSTATE() failed for reg num " 821 "%" PRIu32, 822 __FUNCTION__, reg); 823 return error; 824 } 825 } 826 } 827 } 828 829 return error; 830 } 831 832 bool NativeRegisterContextLinux_x86_64::IsCPUFeatureAvailable( 833 RegSet feature_code) const { 834 if (m_xstate_type == XStateType::Invalid) { 835 if (const_cast<NativeRegisterContextLinux_x86_64 *>(this)->ReadFPR().Fail()) 836 return false; 837 } 838 switch (feature_code) { 839 case RegSet::gpr: 840 case RegSet::fpu: 841 return true; 842 case RegSet::avx: // Check if CPU has AVX and if there is kernel support, by 843 // reading in the XCR0 area of XSAVE. 844 if ((m_xstate->xsave.i387.xcr0 & mask_XSTATE_AVX) == mask_XSTATE_AVX) 845 return true; 846 break; 847 case RegSet::mpx: // Check if CPU has MPX and if there is kernel support, by 848 // reading in the XCR0 area of XSAVE. 849 if ((m_xstate->xsave.i387.xcr0 & mask_XSTATE_MPX) == mask_XSTATE_MPX) 850 return true; 851 break; 852 } 853 return false; 854 } 855 856 bool NativeRegisterContextLinux_x86_64::IsRegisterSetAvailable( 857 uint32_t set_index) const { 858 uint32_t num_sets = k_num_register_sets - k_num_extended_register_sets; 859 860 switch (static_cast<RegSet>(set_index)) { 861 case RegSet::gpr: 862 case RegSet::fpu: 863 return (set_index < num_sets); 864 case RegSet::avx: 865 return IsCPUFeatureAvailable(RegSet::avx); 866 case RegSet::mpx: 867 return IsCPUFeatureAvailable(RegSet::mpx); 868 } 869 return false; 870 } 871 872 bool NativeRegisterContextLinux_x86_64::IsGPR(uint32_t reg_index) const { 873 // GPRs come first. 874 return reg_index <= m_reg_info.last_gpr; 875 } 876 877 bool NativeRegisterContextLinux_x86_64::IsFPR(uint32_t reg_index) const { 878 return (m_reg_info.first_fpr <= reg_index && 879 reg_index <= m_reg_info.last_fpr); 880 } 881 882 bool NativeRegisterContextLinux_x86_64::IsDR(uint32_t reg_index) const { 883 return (m_reg_info.first_dr <= reg_index && 884 reg_index <= m_reg_info.last_dr); 885 } 886 887 Status NativeRegisterContextLinux_x86_64::WriteFPR() { 888 switch (m_xstate_type) { 889 case XStateType::FXSAVE: 890 return WriteRegisterSet( 891 &m_iovec, sizeof(m_xstate->fxsave), 892 fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture())); 893 case XStateType::XSAVE: 894 return WriteRegisterSet(&m_iovec, sizeof(m_xstate->xsave), NT_X86_XSTATE); 895 default: 896 return Status("Unrecognized FPR type."); 897 } 898 } 899 900 bool NativeRegisterContextLinux_x86_64::IsAVX(uint32_t reg_index) const { 901 if (!IsCPUFeatureAvailable(RegSet::avx)) 902 return false; 903 return (m_reg_info.first_ymm <= reg_index && 904 reg_index <= m_reg_info.last_ymm); 905 } 906 907 bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoYMM( 908 uint32_t reg_index, lldb::ByteOrder byte_order) { 909 if (!IsAVX(reg_index)) 910 return false; 911 912 if (byte_order == lldb::eByteOrderLittle) { 913 uint32_t reg_no = reg_index - m_reg_info.first_ymm; 914 m_ymm_set.ymm[reg_no] = XStateToYMM( 915 m_xstate->fxsave.xmm[reg_no].bytes, 916 m_xstate->xsave.ymmh[reg_no].bytes); 917 return true; 918 } 919 920 return false; // unsupported or invalid byte order 921 } 922 923 bool NativeRegisterContextLinux_x86_64::CopyYMMtoXSTATE( 924 uint32_t reg, lldb::ByteOrder byte_order) { 925 if (!IsAVX(reg)) 926 return false; 927 928 if (byte_order == lldb::eByteOrderLittle) { 929 uint32_t reg_no = reg - m_reg_info.first_ymm; 930 YMMToXState(m_ymm_set.ymm[reg_no], 931 m_xstate->fxsave.xmm[reg_no].bytes, 932 m_xstate->xsave.ymmh[reg_no].bytes); 933 return true; 934 } 935 936 return false; // unsupported or invalid byte order 937 } 938 939 void *NativeRegisterContextLinux_x86_64::GetFPRBuffer() { 940 switch (m_xstate_type) { 941 case XStateType::FXSAVE: 942 return &m_xstate->fxsave; 943 case XStateType::XSAVE: 944 return &m_iovec; 945 default: 946 return nullptr; 947 } 948 } 949 950 size_t NativeRegisterContextLinux_x86_64::GetFPRSize() { 951 switch (m_xstate_type) { 952 case XStateType::FXSAVE: 953 return sizeof(m_xstate->fxsave); 954 case XStateType::XSAVE: 955 return sizeof(m_iovec); 956 default: 957 return 0; 958 } 959 } 960 961 Status NativeRegisterContextLinux_x86_64::ReadFPR() { 962 Status error; 963 964 // Probe XSAVE and if it is not supported fall back to FXSAVE. 965 if (m_xstate_type != XStateType::FXSAVE) { 966 error = ReadRegisterSet(&m_iovec, sizeof(m_xstate->xsave), NT_X86_XSTATE); 967 if (!error.Fail()) { 968 m_xstate_type = XStateType::XSAVE; 969 return error; 970 } 971 } 972 error = ReadRegisterSet( 973 &m_iovec, sizeof(m_xstate->xsave), 974 fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture())); 975 if (!error.Fail()) { 976 m_xstate_type = XStateType::FXSAVE; 977 return error; 978 } 979 return Status("Unrecognized FPR type."); 980 } 981 982 bool NativeRegisterContextLinux_x86_64::IsMPX(uint32_t reg_index) const { 983 if (!IsCPUFeatureAvailable(RegSet::mpx)) 984 return false; 985 return (m_reg_info.first_mpxr <= reg_index && 986 reg_index <= m_reg_info.last_mpxc); 987 } 988 989 bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoMPX(uint32_t reg) { 990 if (!IsMPX(reg)) 991 return false; 992 993 if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) { 994 ::memcpy(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes, 995 m_xstate->xsave.mpxr[reg - m_reg_info.first_mpxr].bytes, 996 sizeof(MPXReg)); 997 } else { 998 ::memcpy(m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes, 999 m_xstate->xsave.mpxc[reg - m_reg_info.first_mpxc].bytes, 1000 sizeof(MPXCsr)); 1001 } 1002 return true; 1003 } 1004 1005 bool NativeRegisterContextLinux_x86_64::CopyMPXtoXSTATE(uint32_t reg) { 1006 if (!IsMPX(reg)) 1007 return false; 1008 1009 if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) { 1010 ::memcpy(m_xstate->xsave.mpxr[reg - m_reg_info.first_mpxr].bytes, 1011 m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes, sizeof(MPXReg)); 1012 } else { 1013 ::memcpy(m_xstate->xsave.mpxc[reg - m_reg_info.first_mpxc].bytes, 1014 m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes, sizeof(MPXCsr)); 1015 } 1016 return true; 1017 } 1018 1019 uint32_t 1020 NativeRegisterContextLinux_x86_64::GetPtraceOffset(uint32_t reg_index) { 1021 // If register is MPX, remove extra factor from gdb offset 1022 return GetRegisterInfoAtIndex(reg_index)->byte_offset - 1023 (IsMPX(reg_index) ? 128 : 0); 1024 } 1025 1026 llvm::Optional<NativeRegisterContextLinux::SyscallData> 1027 NativeRegisterContextLinux_x86_64::GetSyscallData() { 1028 switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) { 1029 case llvm::Triple::x86: { 1030 static const uint8_t Int80[] = {0xcd, 0x80}; 1031 static const uint32_t Args[] = {lldb_eax_i386, lldb_ebx_i386, lldb_ecx_i386, 1032 lldb_edx_i386, lldb_esi_i386, lldb_edi_i386, 1033 lldb_ebp_i386}; 1034 return SyscallData{Int80, Args, lldb_eax_i386}; 1035 } 1036 case llvm::Triple::x86_64: { 1037 static const uint8_t Syscall[] = {0x0f, 0x05}; 1038 static const uint32_t Args[] = { 1039 lldb_rax_x86_64, lldb_rdi_x86_64, lldb_rsi_x86_64, lldb_rdx_x86_64, 1040 lldb_r10_x86_64, lldb_r8_x86_64, lldb_r9_x86_64}; 1041 return SyscallData{Syscall, Args, lldb_rax_x86_64}; 1042 } 1043 default: 1044 llvm_unreachable("Unhandled architecture!"); 1045 } 1046 } 1047 1048 llvm::Optional<NativeRegisterContextLinux::MmapData> 1049 NativeRegisterContextLinux_x86_64::GetMmapData() { 1050 switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) { 1051 case llvm::Triple::x86: 1052 return MmapData{192, 91}; 1053 case llvm::Triple::x86_64: 1054 return MmapData{9, 11}; 1055 default: 1056 llvm_unreachable("Unhandled architecture!"); 1057 } 1058 } 1059 1060 #endif // defined(__i386__) || defined(__x86_64__) 1061