1 //===-- NativeRegisterContextLinux_arm64.h ---------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #if defined(__arm64__) || defined(__aarch64__)
10 
11 #ifndef lldb_NativeRegisterContextLinux_arm64_h
12 #define lldb_NativeRegisterContextLinux_arm64_h
13 
14 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
15 #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h"
16 
17 namespace lldb_private {
18 namespace process_linux {
19 
20 class NativeProcessLinux;
21 
22 class NativeRegisterContextLinux_arm64 : public NativeRegisterContextLinux {
23 public:
24   NativeRegisterContextLinux_arm64(const ArchSpec &target_arch,
25                                    NativeThreadProtocol &native_thread);
26 
27   uint32_t GetRegisterSetCount() const override;
28 
29   uint32_t GetUserRegisterCount() const override;
30 
31   const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
32 
33   Status ReadRegister(const RegisterInfo *reg_info,
34                       RegisterValue &reg_value) override;
35 
36   Status WriteRegister(const RegisterInfo *reg_info,
37                        const RegisterValue &reg_value) override;
38 
39   Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
40 
41   Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
42 
43   void InvalidateAllRegisters() override;
44 
45   // Hardware breakpoints/watchpoint management functions
46 
47   uint32_t NumSupportedHardwareBreakpoints() override;
48 
49   uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
50 
51   bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
52 
53   Status ClearAllHardwareBreakpoints() override;
54 
55   Status GetHardwareBreakHitIndex(uint32_t &bp_index,
56                                   lldb::addr_t trap_addr) override;
57 
58   uint32_t NumSupportedHardwareWatchpoints() override;
59 
60   uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size,
61                                  uint32_t watch_flags) override;
62 
63   bool ClearHardwareWatchpoint(uint32_t hw_index) override;
64 
65   Status ClearAllHardwareWatchpoints() override;
66 
67   Status GetWatchpointHitIndex(uint32_t &wp_index,
68                                lldb::addr_t trap_addr) override;
69 
70   lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override;
71 
72   lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override;
73 
74   uint32_t GetWatchpointSize(uint32_t wp_index);
75 
76   bool WatchpointIsEnabled(uint32_t wp_index);
77 
78   // Debug register type select
79   enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK };
80 
81 protected:
82 
83   Status ReadGPR() override;
84 
85   Status WriteGPR() override;
86 
87   Status ReadFPR() override;
88 
89   Status WriteFPR() override;
90 
91   void *GetGPRBuffer() override { return &m_gpr_arm64; }
92 
93   void *GetFPRBuffer() override { return &m_fpr; }
94 
95   size_t GetFPRSize() override { return sizeof(m_fpr); }
96 
97 private:
98   bool m_gpr_is_valid;
99   bool m_fpu_is_valid;
100 
101   RegisterInfoPOSIX_arm64::GPR m_gpr_arm64; // 64-bit general purpose registers.
102 
103   RegisterInfoPOSIX_arm64::FPU
104       m_fpr; // floating-point registers including extended register sets.
105   // Debug register info for hardware breakpoints and watchpoints management.
106   struct DREG {
107     lldb::addr_t address;  // Breakpoint/watchpoint address value.
108     lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception
109                            // occurred.
110     lldb::addr_t real_addr; // Address value that should cause target to stop.
111     uint32_t control;       // Breakpoint/watchpoint control value.
112     uint32_t refcount;      // Serves as enable/disable and reference counter.
113   };
114 
115   struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints
116   struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints
117 
118   uint32_t m_max_hwp_supported;
119   uint32_t m_max_hbp_supported;
120   bool m_refresh_hwdebug_info;
121 
122   bool IsGPR(unsigned reg) const;
123 
124   bool IsFPR(unsigned reg) const;
125 
126   Status ReadHardwareDebugInfo();
127 
128   Status WriteHardwareDebugRegs(int hwbType);
129 
130   uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
131 
132   RegisterInfoPOSIX_arm64 &GetRegisterInfo() const;
133 };
134 
135 } // namespace process_linux
136 } // namespace lldb_private
137 
138 #endif // #ifndef lldb_NativeRegisterContextLinux_arm64_h
139 
140 #endif // defined (__arm64__) || defined (__aarch64__)
141