1 //===-- NativeRegisterContextLinux_arm64.h ---------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #if defined(__arm64__) || defined(__aarch64__) 10 11 #ifndef lldb_NativeRegisterContextLinux_arm64_h 12 #define lldb_NativeRegisterContextLinux_arm64_h 13 14 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h" 15 #include "Plugins/Process/Utility/lldb-arm64-register-enums.h" 16 17 namespace lldb_private { 18 namespace process_linux { 19 20 class NativeProcessLinux; 21 22 class NativeRegisterContextLinux_arm64 : public NativeRegisterContextLinux { 23 public: 24 NativeRegisterContextLinux_arm64(const ArchSpec &target_arch, 25 NativeThreadProtocol &native_thread); 26 27 uint32_t GetRegisterSetCount() const override; 28 29 uint32_t GetUserRegisterCount() const override; 30 31 const RegisterSet *GetRegisterSet(uint32_t set_index) const override; 32 33 Status ReadRegister(const RegisterInfo *reg_info, 34 RegisterValue ®_value) override; 35 36 Status WriteRegister(const RegisterInfo *reg_info, 37 const RegisterValue ®_value) override; 38 39 Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; 40 41 Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; 42 43 // Hardware breakpoints/watchpoint management functions 44 45 uint32_t NumSupportedHardwareBreakpoints() override; 46 47 uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override; 48 49 bool ClearHardwareBreakpoint(uint32_t hw_idx) override; 50 51 Status ClearAllHardwareBreakpoints() override; 52 53 Status GetHardwareBreakHitIndex(uint32_t &bp_index, 54 lldb::addr_t trap_addr) override; 55 56 uint32_t NumSupportedHardwareWatchpoints() override; 57 58 uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, 59 uint32_t watch_flags) override; 60 61 bool ClearHardwareWatchpoint(uint32_t hw_index) override; 62 63 Status ClearAllHardwareWatchpoints() override; 64 65 Status GetWatchpointHitIndex(uint32_t &wp_index, 66 lldb::addr_t trap_addr) override; 67 68 lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override; 69 70 lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override; 71 72 uint32_t GetWatchpointSize(uint32_t wp_index); 73 74 bool WatchpointIsEnabled(uint32_t wp_index); 75 76 // Debug register type select 77 enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK }; 78 79 protected: 80 Status DoReadRegisterValue(uint32_t offset, const char *reg_name, 81 uint32_t size, RegisterValue &value) override; 82 83 Status DoWriteRegisterValue(uint32_t offset, const char *reg_name, 84 const RegisterValue &value) override; 85 86 Status DoReadGPR(void *buf, size_t buf_size) override; 87 88 Status DoWriteGPR(void *buf, size_t buf_size) override; 89 90 Status DoReadFPR(void *buf, size_t buf_size) override; 91 92 Status DoWriteFPR(void *buf, size_t buf_size) override; 93 94 void *GetGPRBuffer() override { return &m_gpr_arm64; } 95 96 void *GetFPRBuffer() override { return &m_fpr; } 97 98 size_t GetFPRSize() override { return sizeof(m_fpr); } 99 100 private: 101 struct RegInfo { 102 uint32_t num_registers; 103 uint32_t num_gpr_registers; 104 uint32_t num_fpr_registers; 105 106 uint32_t last_gpr; 107 uint32_t first_fpr; 108 uint32_t last_fpr; 109 110 uint32_t first_fpr_v; 111 uint32_t last_fpr_v; 112 113 uint32_t gpr_flags; 114 }; 115 116 // based on RegisterContextDarwin_arm64.h 117 struct VReg { 118 uint8_t bytes[16]; 119 }; 120 121 // based on RegisterContextDarwin_arm64.h 122 struct FPU { 123 VReg v[32]; 124 uint32_t fpsr; 125 uint32_t fpcr; 126 }; 127 128 uint64_t m_gpr_arm64[k_num_gpr_registers_arm64]; // 64-bit general purpose 129 // registers. 130 RegInfo m_reg_info; 131 FPU m_fpr; // floating-point registers including extended register sets. 132 133 // Debug register info for hardware breakpoints and watchpoints management. 134 struct DREG { 135 lldb::addr_t address; // Breakpoint/watchpoint address value. 136 lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception 137 // occurred. 138 lldb::addr_t real_addr; // Address value that should cause target to stop. 139 uint32_t control; // Breakpoint/watchpoint control value. 140 uint32_t refcount; // Serves as enable/disable and reference counter. 141 }; 142 143 struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints 144 struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints 145 146 uint32_t m_max_hwp_supported; 147 uint32_t m_max_hbp_supported; 148 bool m_refresh_hwdebug_info; 149 150 bool IsGPR(unsigned reg) const; 151 152 bool IsFPR(unsigned reg) const; 153 154 Status ReadHardwareDebugInfo(); 155 156 Status WriteHardwareDebugRegs(int hwbType); 157 158 uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const; 159 }; 160 161 } // namespace process_linux 162 } // namespace lldb_private 163 164 #endif // #ifndef lldb_NativeRegisterContextLinux_arm64_h 165 166 #endif // defined (__arm64__) || defined (__aarch64__) 167