1 //===-- NativeRegisterContextLinux_arm64.h ---------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #if defined(__arm64__) || defined(__aarch64__)
10 
11 #ifndef lldb_NativeRegisterContextLinux_arm64_h
12 #define lldb_NativeRegisterContextLinux_arm64_h
13 
14 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
15 #include "Plugins/Process/Utility/LinuxPTraceDefines_arm64sve.h"
16 #include "Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.h"
17 #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h"
18 
19 #include <asm/ptrace.h>
20 
21 namespace lldb_private {
22 namespace process_linux {
23 
24 class NativeProcessLinux;
25 
26 class NativeRegisterContextLinux_arm64
27     : public NativeRegisterContextLinux,
28       public NativeRegisterContextDBReg_arm64 {
29 public:
30   NativeRegisterContextLinux_arm64(
31       const ArchSpec &target_arch, NativeThreadProtocol &native_thread,
32       std::unique_ptr<RegisterInfoPOSIX_arm64> register_info_up);
33 
34   uint32_t GetRegisterSetCount() const override;
35 
36   uint32_t GetUserRegisterCount() const override;
37 
38   const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
39 
40   Status ReadRegister(const RegisterInfo *reg_info,
41                       RegisterValue &reg_value) override;
42 
43   Status WriteRegister(const RegisterInfo *reg_info,
44                        const RegisterValue &reg_value) override;
45 
46   Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
47 
48   Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
49 
50   void InvalidateAllRegisters() override;
51 
52   std::vector<uint32_t>
53   GetExpeditedRegisters(ExpeditedRegs expType) const override;
54 
55   bool RegisterOffsetIsDynamic() const override { return true; }
56 
57   llvm::Expected<MemoryTaggingDetails>
58   GetMemoryTaggingDetails(int32_t type) override;
59 
60 protected:
61   Status ReadGPR() override;
62 
63   Status WriteGPR() override;
64 
65   Status ReadFPR() override;
66 
67   Status WriteFPR() override;
68 
69   void *GetGPRBuffer() override { return &m_gpr_arm64; }
70 
71   // GetGPRBufferSize returns sizeof arm64 GPR ptrace buffer, it is different
72   // from GetGPRSize which returns sizeof RegisterInfoPOSIX_arm64::GPR.
73   size_t GetGPRBufferSize() { return sizeof(m_gpr_arm64); }
74 
75   void *GetFPRBuffer() override { return &m_fpr; }
76 
77   size_t GetFPRSize() override { return sizeof(m_fpr); }
78 
79 private:
80   bool m_gpr_is_valid;
81   bool m_fpu_is_valid;
82   bool m_sve_buffer_is_valid;
83   bool m_mte_ctrl_is_valid;
84 
85   bool m_sve_header_is_valid;
86   bool m_pac_mask_is_valid;
87 
88   struct user_pt_regs m_gpr_arm64; // 64-bit general purpose registers.
89 
90   RegisterInfoPOSIX_arm64::FPU
91       m_fpr; // floating-point registers including extended register sets.
92 
93   SVEState m_sve_state;
94   struct sve::user_sve_header m_sve_header;
95   std::vector<uint8_t> m_sve_ptrace_payload;
96 
97   bool m_refresh_hwdebug_info;
98 
99   struct user_pac_mask {
100     uint64_t data_mask;
101     uint64_t insn_mask;
102   };
103 
104   struct user_pac_mask m_pac_mask;
105 
106   uint64_t m_mte_ctrl_reg;
107 
108   bool IsGPR(unsigned reg) const;
109 
110   bool IsFPR(unsigned reg) const;
111 
112   Status ReadAllSVE();
113 
114   Status WriteAllSVE();
115 
116   Status ReadSVEHeader();
117 
118   Status WriteSVEHeader();
119 
120   Status ReadPAuthMask();
121 
122   Status ReadMTEControl();
123 
124   Status WriteMTEControl();
125 
126   bool IsSVE(unsigned reg) const;
127   bool IsPAuth(unsigned reg) const;
128   bool IsMTE(unsigned reg) const;
129 
130   uint64_t GetSVERegVG() { return m_sve_header.vl / 8; }
131 
132   void SetSVERegVG(uint64_t vg) { m_sve_header.vl = vg * 8; }
133 
134   void *GetSVEHeader() { return &m_sve_header; }
135 
136   void *GetPACMask() { return &m_pac_mask; }
137 
138   void *GetMTEControl() { return &m_mte_ctrl_reg; }
139 
140   void *GetSVEBuffer();
141 
142   size_t GetSVEHeaderSize() { return sizeof(m_sve_header); }
143 
144   size_t GetPACMaskSize() { return sizeof(m_pac_mask); }
145 
146   size_t GetSVEBufferSize() { return m_sve_ptrace_payload.size(); }
147 
148   size_t GetMTEControlSize() { return sizeof(m_mte_ctrl_reg); }
149 
150   llvm::Error ReadHardwareDebugInfo() override;
151 
152   llvm::Error WriteHardwareDebugRegs(DREGType hwbType) override;
153 
154   uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
155 
156   RegisterInfoPOSIX_arm64 &GetRegisterInfo() const;
157 
158   void ConfigureRegisterContext();
159 
160   uint32_t CalculateSVEOffset(const RegisterInfo *reg_info) const;
161 };
162 
163 } // namespace process_linux
164 } // namespace lldb_private
165 
166 #endif // #ifndef lldb_NativeRegisterContextLinux_arm64_h
167 
168 #endif // defined (__arm64__) || defined (__aarch64__)
169