1 //===-- NativeRegisterContextLinux_arm.h ---------------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
11 
12 #ifndef lldb_NativeRegisterContextLinux_arm_h
13 #define lldb_NativeRegisterContextLinux_arm_h
14 
15 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
16 #include "Plugins/Process/Utility/lldb-arm-register-enums.h"
17 
18 namespace lldb_private {
19 namespace process_linux {
20 
21 class NativeProcessLinux;
22 
23 class NativeRegisterContextLinux_arm : public NativeRegisterContextLinux {
24 public:
25   NativeRegisterContextLinux_arm(const ArchSpec &target_arch,
26                                  NativeThreadProtocol &native_thread);
27 
28   uint32_t GetRegisterSetCount() const override;
29 
30   const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
31 
32   uint32_t GetUserRegisterCount() const override;
33 
34   Status ReadRegister(const RegisterInfo *reg_info,
35                       RegisterValue &reg_value) override;
36 
37   Status WriteRegister(const RegisterInfo *reg_info,
38                        const RegisterValue &reg_value) override;
39 
40   Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
41 
42   Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
43 
44   //------------------------------------------------------------------
45   // Hardware breakpoints/watchpoint mangement functions
46   //------------------------------------------------------------------
47 
48   uint32_t NumSupportedHardwareBreakpoints() override;
49 
50   uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
51 
52   bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
53 
54   Status ClearAllHardwareBreakpoints() override;
55 
56   Status GetHardwareBreakHitIndex(uint32_t &bp_index,
57                                   lldb::addr_t trap_addr) override;
58 
59   uint32_t NumSupportedHardwareWatchpoints() override;
60 
61   uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size,
62                                  uint32_t watch_flags) override;
63 
64   bool ClearHardwareWatchpoint(uint32_t hw_index) override;
65 
66   Status ClearAllHardwareWatchpoints() override;
67 
68   Status GetWatchpointHitIndex(uint32_t &wp_index,
69                                lldb::addr_t trap_addr) override;
70 
71   lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override;
72 
73   lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override;
74 
75   uint32_t GetWatchpointSize(uint32_t wp_index);
76 
77   bool WatchpointIsEnabled(uint32_t wp_index);
78 
79   // Debug register type select
80   enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK };
81 
82 protected:
83   Status DoReadRegisterValue(uint32_t offset, const char *reg_name,
84                              uint32_t size, RegisterValue &value) override;
85 
86   Status DoWriteRegisterValue(uint32_t offset, const char *reg_name,
87                               const RegisterValue &value) override;
88 
89   Status DoReadGPR(void *buf, size_t buf_size) override;
90 
91   Status DoWriteGPR(void *buf, size_t buf_size) override;
92 
93   Status DoReadFPR(void *buf, size_t buf_size) override;
94 
95   Status DoWriteFPR(void *buf, size_t buf_size) override;
96 
97   void *GetGPRBuffer() override { return &m_gpr_arm; }
98 
99   void *GetFPRBuffer() override { return &m_fpr; }
100 
101   size_t GetFPRSize() override { return sizeof(m_fpr); }
102 
103 private:
104   struct RegInfo {
105     uint32_t num_registers;
106     uint32_t num_gpr_registers;
107     uint32_t num_fpr_registers;
108 
109     uint32_t last_gpr;
110     uint32_t first_fpr;
111     uint32_t last_fpr;
112 
113     uint32_t first_fpr_v;
114     uint32_t last_fpr_v;
115 
116     uint32_t gpr_flags;
117   };
118 
119   struct QReg {
120     uint8_t bytes[16];
121   };
122 
123   struct FPU {
124     union {
125       uint32_t s[32];
126       uint64_t d[32];
127       QReg q[16]; // the 128-bit NEON registers
128     } floats;
129     uint32_t fpscr;
130   };
131 
132   uint32_t m_gpr_arm[k_num_gpr_registers_arm];
133   RegInfo m_reg_info;
134   FPU m_fpr;
135 
136   // Debug register info for hardware breakpoints and watchpoints management.
137   struct DREG {
138     lldb::addr_t address;  // Breakpoint/watchpoint address value.
139     lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception
140                            // occurred.
141     lldb::addr_t real_addr; // Address value that should cause target to stop.
142     uint32_t control;       // Breakpoint/watchpoint control value.
143     uint32_t refcount;      // Serves as enable/disable and refernce counter.
144   };
145 
146   struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints
147   struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints
148 
149   uint32_t m_max_hwp_supported;
150   uint32_t m_max_hbp_supported;
151   bool m_refresh_hwdebug_info;
152 
153   bool IsGPR(unsigned reg) const;
154 
155   bool IsFPR(unsigned reg) const;
156 
157   Status ReadHardwareDebugInfo();
158 
159   Status WriteHardwareDebugRegs(int hwbType, int hwb_index);
160 
161   uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
162 };
163 
164 } // namespace process_linux
165 } // namespace lldb_private
166 
167 #endif // #ifndef lldb_NativeRegisterContextLinux_arm_h
168 
169 #endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
170