1 //===-- NativeRegisterContextLinux_arm.h ---------------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #if defined(__arm__) // arm register context only needed on arm devices
11 
12 #ifndef lldb_NativeRegisterContextLinux_arm_h
13 #define lldb_NativeRegisterContextLinux_arm_h
14 
15 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
16 #include "Plugins/Process/Utility/lldb-arm-register-enums.h"
17 
18 namespace lldb_private {
19 namespace process_linux {
20 
21     class NativeProcessLinux;
22 
23     class NativeRegisterContextLinux_arm : public NativeRegisterContextLinux
24     {
25     public:
26         NativeRegisterContextLinux_arm (const ArchSpec& target_arch,
27                                         NativeThreadProtocol &native_thread,
28                                         uint32_t concrete_frame_idx);
29 
30         uint32_t
31         GetRegisterSetCount () const override;
32 
33         const RegisterSet *
34         GetRegisterSet (uint32_t set_index) const override;
35 
36         uint32_t
37         GetUserRegisterCount() const override;
38 
39         Error
40         ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) override;
41 
42         Error
43         WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) override;
44 
45         Error
46         ReadAllRegisterValues (lldb::DataBufferSP &data_sp) override;
47 
48         Error
49         WriteAllRegisterValues (const lldb::DataBufferSP &data_sp) override;
50 
51         //------------------------------------------------------------------
52         // Hardware breakpoints/watchpoint mangement functions
53         //------------------------------------------------------------------
54 
55         uint32_t
56         SetHardwareBreakpoint (lldb::addr_t addr, size_t size) override;
57 
58         bool
59         ClearHardwareBreakpoint (uint32_t hw_idx) override;
60 
61         uint32_t
62         NumSupportedHardwareWatchpoints () override;
63 
64         uint32_t
65         SetHardwareWatchpoint (lldb::addr_t addr, size_t size, uint32_t watch_flags) override;
66 
67         bool
68         ClearHardwareWatchpoint (uint32_t hw_index) override;
69 
70         Error
71         ClearAllHardwareWatchpoints () override;
72 
73         Error
74         GetWatchpointHitIndex(uint32_t &wp_index, lldb::addr_t trap_addr) override;
75 
76         lldb::addr_t
77         GetWatchpointAddress (uint32_t wp_index) override;
78 
79         uint32_t
80         GetWatchpointSize(uint32_t wp_index);
81 
82         bool
83         WatchpointIsEnabled(uint32_t wp_index);
84 
85         // Debug register type select
86         enum DREGType
87         {
88             eDREGTypeWATCH = 0,
89             eDREGTypeBREAK
90         };
91 
92     protected:
93         Error
94         DoWriteRegisterValue(uint32_t offset,
95                              const char* reg_name,
96                              const RegisterValue &value) override;
97 
98         Error
99         DoReadFPR(void *buf, size_t buf_size) override;
100 
101         Error
102         DoWriteFPR(void *buf, size_t buf_size) override;
103 
104         void*
105         GetGPRBuffer() override { return &m_gpr_arm; }
106 
107         void*
108         GetFPRBuffer() override { return &m_fpr; }
109 
110         size_t
111         GetFPRSize() override { return sizeof(m_fpr); }
112 
113     private:
114         struct RegInfo
115         {
116             uint32_t num_registers;
117             uint32_t num_gpr_registers;
118             uint32_t num_fpr_registers;
119 
120             uint32_t last_gpr;
121             uint32_t first_fpr;
122             uint32_t last_fpr;
123 
124             uint32_t first_fpr_v;
125             uint32_t last_fpr_v;
126 
127             uint32_t gpr_flags;
128         };
129 
130         struct QReg
131         {
132             uint8_t bytes[16];
133         };
134 
135         struct FPU
136         {
137             union {
138                 uint32_t s[32];
139                 uint64_t d[32];
140                 QReg     q[16];  // the 128-bit NEON registers
141                 } floats;
142             uint32_t fpscr;
143         };
144 
145         uint32_t m_gpr_arm[k_num_gpr_registers_arm];
146         RegInfo  m_reg_info;
147         FPU m_fpr;
148 
149         // Debug register info for hardware breakpoints and watchpoints management.
150         struct DREG
151         {
152             lldb::addr_t address;  // Breakpoint/watchpoint address value.
153             uint32_t control;  // Breakpoint/watchpoint control value.
154             uint32_t refcount;  // Serves as enable/disable and refernce counter.
155         };
156 
157         struct DREG m_hbr_regs[16];  // Arm native linux hardware breakpoints
158         struct DREG m_hwp_regs[16];  // Arm native linux hardware watchpoints
159 
160         uint32_t m_max_hwp_supported;
161         uint32_t m_max_hbp_supported;
162         bool m_refresh_hwdebug_info;
163 
164         bool
165         IsGPR(unsigned reg) const;
166 
167         bool
168         IsFPR(unsigned reg) const;
169 
170         Error
171         ReadHardwareDebugInfo();
172 
173         Error
174         WriteHardwareDebugRegs(int hwbType, int hwb_index);
175 
176         uint32_t
177         CalculateFprOffset(const RegisterInfo* reg_info) const;
178     };
179 
180 } // namespace process_linux
181 } // namespace lldb_private
182 
183 #endif // #ifndef lldb_NativeRegisterContextLinux_arm_h
184 
185 #endif // defined(__arm__)
186