1 //===-- NativeRegisterContextLinux_arm.h ---------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #if defined(__arm__) || defined(__arm64__) || defined(__aarch64__) 11 12 #ifndef lldb_NativeRegisterContextLinux_arm_h 13 #define lldb_NativeRegisterContextLinux_arm_h 14 15 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h" 16 #include "Plugins/Process/Utility/lldb-arm-register-enums.h" 17 18 namespace lldb_private { 19 namespace process_linux { 20 21 class NativeProcessLinux; 22 23 class NativeRegisterContextLinux_arm : public NativeRegisterContextLinux 24 { 25 public: 26 NativeRegisterContextLinux_arm (const ArchSpec& target_arch, 27 NativeThreadProtocol &native_thread, 28 uint32_t concrete_frame_idx); 29 30 uint32_t 31 GetRegisterSetCount () const override; 32 33 const RegisterSet * 34 GetRegisterSet (uint32_t set_index) const override; 35 36 uint32_t 37 GetUserRegisterCount() const override; 38 39 Error 40 ReadRegister (const RegisterInfo *reg_info, RegisterValue ®_value) override; 41 42 Error 43 WriteRegister (const RegisterInfo *reg_info, const RegisterValue ®_value) override; 44 45 Error 46 ReadAllRegisterValues (lldb::DataBufferSP &data_sp) override; 47 48 Error 49 WriteAllRegisterValues (const lldb::DataBufferSP &data_sp) override; 50 51 //------------------------------------------------------------------ 52 // Hardware breakpoints/watchpoint mangement functions 53 //------------------------------------------------------------------ 54 55 uint32_t 56 SetHardwareBreakpoint (lldb::addr_t addr, size_t size) override; 57 58 bool 59 ClearHardwareBreakpoint (uint32_t hw_idx) override; 60 61 uint32_t 62 NumSupportedHardwareWatchpoints () override; 63 64 uint32_t 65 SetHardwareWatchpoint (lldb::addr_t addr, size_t size, uint32_t watch_flags) override; 66 67 bool 68 ClearHardwareWatchpoint (uint32_t hw_index) override; 69 70 Error 71 ClearAllHardwareWatchpoints () override; 72 73 Error 74 GetWatchpointHitIndex(uint32_t &wp_index, lldb::addr_t trap_addr) override; 75 76 lldb::addr_t 77 GetWatchpointAddress (uint32_t wp_index) override; 78 79 uint32_t 80 GetWatchpointSize(uint32_t wp_index); 81 82 bool 83 WatchpointIsEnabled(uint32_t wp_index); 84 85 // Debug register type select 86 enum DREGType 87 { 88 eDREGTypeWATCH = 0, 89 eDREGTypeBREAK 90 }; 91 92 protected: 93 Error 94 DoReadRegisterValue(uint32_t offset, 95 const char* reg_name, 96 uint32_t size, 97 RegisterValue &value) override; 98 99 Error 100 DoWriteRegisterValue(uint32_t offset, 101 const char* reg_name, 102 const RegisterValue &value) override; 103 104 Error 105 DoReadGPR(void *buf, size_t buf_size) override; 106 107 Error 108 DoWriteGPR(void *buf, size_t buf_size) override; 109 110 Error 111 DoReadFPR(void *buf, size_t buf_size) override; 112 113 Error 114 DoWriteFPR(void *buf, size_t buf_size) override; 115 116 void* 117 GetGPRBuffer() override { return &m_gpr_arm; } 118 119 void* 120 GetFPRBuffer() override { return &m_fpr; } 121 122 size_t 123 GetFPRSize() override { return sizeof(m_fpr); } 124 125 private: 126 struct RegInfo 127 { 128 uint32_t num_registers; 129 uint32_t num_gpr_registers; 130 uint32_t num_fpr_registers; 131 132 uint32_t last_gpr; 133 uint32_t first_fpr; 134 uint32_t last_fpr; 135 136 uint32_t first_fpr_v; 137 uint32_t last_fpr_v; 138 139 uint32_t gpr_flags; 140 }; 141 142 struct QReg 143 { 144 uint8_t bytes[16]; 145 }; 146 147 struct FPU 148 { 149 union { 150 uint32_t s[32]; 151 uint64_t d[32]; 152 QReg q[16]; // the 128-bit NEON registers 153 } floats; 154 uint32_t fpscr; 155 }; 156 157 uint32_t m_gpr_arm[k_num_gpr_registers_arm]; 158 RegInfo m_reg_info; 159 FPU m_fpr; 160 161 // Debug register info for hardware breakpoints and watchpoints management. 162 struct DREG 163 { 164 lldb::addr_t address; // Breakpoint/watchpoint address value. 165 uint32_t control; // Breakpoint/watchpoint control value. 166 uint32_t refcount; // Serves as enable/disable and refernce counter. 167 }; 168 169 struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints 170 struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints 171 172 uint32_t m_max_hwp_supported; 173 uint32_t m_max_hbp_supported; 174 bool m_refresh_hwdebug_info; 175 176 bool 177 IsGPR(unsigned reg) const; 178 179 bool 180 IsFPR(unsigned reg) const; 181 182 Error 183 ReadHardwareDebugInfo(); 184 185 Error 186 WriteHardwareDebugRegs(int hwbType, int hwb_index); 187 188 uint32_t 189 CalculateFprOffset(const RegisterInfo* reg_info) const; 190 }; 191 192 } // namespace process_linux 193 } // namespace lldb_private 194 195 #endif // #ifndef lldb_NativeRegisterContextLinux_arm_h 196 197 #endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__) 198