1 //===-- NativeRegisterContextLinux_arm.h ---------------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
11 
12 #ifndef lldb_NativeRegisterContextLinux_arm_h
13 #define lldb_NativeRegisterContextLinux_arm_h
14 
15 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
16 #include "Plugins/Process/Utility/lldb-arm-register-enums.h"
17 
18 namespace lldb_private {
19 namespace process_linux {
20 
21 class NativeProcessLinux;
22 
23 class NativeRegisterContextLinux_arm : public NativeRegisterContextLinux {
24 public:
25   NativeRegisterContextLinux_arm(const ArchSpec &target_arch,
26                                  NativeThreadProtocol &native_thread,
27                                  uint32_t concrete_frame_idx);
28 
29   uint32_t GetRegisterSetCount() const override;
30 
31   const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
32 
33   uint32_t GetUserRegisterCount() const override;
34 
35   Error ReadRegister(const RegisterInfo *reg_info,
36                      RegisterValue &reg_value) override;
37 
38   Error WriteRegister(const RegisterInfo *reg_info,
39                       const RegisterValue &reg_value) override;
40 
41   Error ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
42 
43   Error WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
44 
45   //------------------------------------------------------------------
46   // Hardware breakpoints/watchpoint mangement functions
47   //------------------------------------------------------------------
48 
49   uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
50 
51   bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
52 
53   uint32_t NumSupportedHardwareWatchpoints() override;
54 
55   uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size,
56                                  uint32_t watch_flags) override;
57 
58   bool ClearHardwareWatchpoint(uint32_t hw_index) override;
59 
60   Error ClearAllHardwareWatchpoints() override;
61 
62   Error GetWatchpointHitIndex(uint32_t &wp_index,
63                               lldb::addr_t trap_addr) override;
64 
65   lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override;
66 
67   lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override;
68 
69   uint32_t GetWatchpointSize(uint32_t wp_index);
70 
71   bool WatchpointIsEnabled(uint32_t wp_index);
72 
73   // Debug register type select
74   enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK };
75 
76 protected:
77   Error DoReadRegisterValue(uint32_t offset, const char *reg_name,
78                             uint32_t size, RegisterValue &value) override;
79 
80   Error DoWriteRegisterValue(uint32_t offset, const char *reg_name,
81                              const RegisterValue &value) override;
82 
83   Error DoReadGPR(void *buf, size_t buf_size) override;
84 
85   Error DoWriteGPR(void *buf, size_t buf_size) override;
86 
87   Error DoReadFPR(void *buf, size_t buf_size) override;
88 
89   Error DoWriteFPR(void *buf, size_t buf_size) override;
90 
91   void *GetGPRBuffer() override { return &m_gpr_arm; }
92 
93   void *GetFPRBuffer() override { return &m_fpr; }
94 
95   size_t GetFPRSize() override { return sizeof(m_fpr); }
96 
97 private:
98   struct RegInfo {
99     uint32_t num_registers;
100     uint32_t num_gpr_registers;
101     uint32_t num_fpr_registers;
102 
103     uint32_t last_gpr;
104     uint32_t first_fpr;
105     uint32_t last_fpr;
106 
107     uint32_t first_fpr_v;
108     uint32_t last_fpr_v;
109 
110     uint32_t gpr_flags;
111   };
112 
113   struct QReg {
114     uint8_t bytes[16];
115   };
116 
117   struct FPU {
118     union {
119       uint32_t s[32];
120       uint64_t d[32];
121       QReg q[16]; // the 128-bit NEON registers
122     } floats;
123     uint32_t fpscr;
124   };
125 
126   uint32_t m_gpr_arm[k_num_gpr_registers_arm];
127   RegInfo m_reg_info;
128   FPU m_fpr;
129 
130   // Debug register info for hardware breakpoints and watchpoints management.
131   struct DREG {
132     lldb::addr_t address;  // Breakpoint/watchpoint address value.
133     lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception
134                            // occurred.
135     lldb::addr_t real_addr; // Address value that should cause target to stop.
136     uint32_t control;       // Breakpoint/watchpoint control value.
137     uint32_t refcount;      // Serves as enable/disable and refernce counter.
138   };
139 
140   struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints
141   struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints
142 
143   uint32_t m_max_hwp_supported;
144   uint32_t m_max_hbp_supported;
145   bool m_refresh_hwdebug_info;
146 
147   bool IsGPR(unsigned reg) const;
148 
149   bool IsFPR(unsigned reg) const;
150 
151   Error ReadHardwareDebugInfo();
152 
153   Error WriteHardwareDebugRegs(int hwbType, int hwb_index);
154 
155   uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
156 };
157 
158 } // namespace process_linux
159 } // namespace lldb_private
160 
161 #endif // #ifndef lldb_NativeRegisterContextLinux_arm_h
162 
163 #endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
164