1 //===-- NativeRegisterContextLinux_arm.h ---------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #if defined(__arm__) || defined(__arm64__) || defined(__aarch64__) 11 12 #ifndef lldb_NativeRegisterContextLinux_arm_h 13 #define lldb_NativeRegisterContextLinux_arm_h 14 15 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h" 16 #include "Plugins/Process/Utility/lldb-arm-register-enums.h" 17 18 namespace lldb_private { 19 namespace process_linux { 20 21 class NativeProcessLinux; 22 23 class NativeRegisterContextLinux_arm : public NativeRegisterContextLinux 24 { 25 public: 26 NativeRegisterContextLinux_arm (const ArchSpec& target_arch, 27 NativeThreadProtocol &native_thread, 28 uint32_t concrete_frame_idx); 29 30 uint32_t 31 GetRegisterSetCount () const override; 32 33 const RegisterSet * 34 GetRegisterSet (uint32_t set_index) const override; 35 36 uint32_t 37 GetUserRegisterCount() const override; 38 39 Error 40 ReadRegister (const RegisterInfo *reg_info, RegisterValue ®_value) override; 41 42 Error 43 WriteRegister (const RegisterInfo *reg_info, const RegisterValue ®_value) override; 44 45 Error 46 ReadAllRegisterValues (lldb::DataBufferSP &data_sp) override; 47 48 Error 49 WriteAllRegisterValues (const lldb::DataBufferSP &data_sp) override; 50 51 //------------------------------------------------------------------ 52 // Hardware breakpoints/watchpoint mangement functions 53 //------------------------------------------------------------------ 54 55 uint32_t 56 SetHardwareBreakpoint (lldb::addr_t addr, size_t size) override; 57 58 bool 59 ClearHardwareBreakpoint (uint32_t hw_idx) override; 60 61 uint32_t 62 NumSupportedHardwareWatchpoints () override; 63 64 uint32_t 65 SetHardwareWatchpoint (lldb::addr_t addr, size_t size, uint32_t watch_flags) override; 66 67 bool 68 ClearHardwareWatchpoint (uint32_t hw_index) override; 69 70 Error 71 ClearAllHardwareWatchpoints () override; 72 73 Error 74 GetWatchpointHitIndex(uint32_t &wp_index, lldb::addr_t trap_addr) override; 75 76 lldb::addr_t 77 GetWatchpointHitAddress (uint32_t wp_index) override; 78 79 lldb::addr_t 80 GetWatchpointAddress (uint32_t wp_index) override; 81 82 uint32_t 83 GetWatchpointSize(uint32_t wp_index); 84 85 bool 86 WatchpointIsEnabled(uint32_t wp_index); 87 88 // Debug register type select 89 enum DREGType 90 { 91 eDREGTypeWATCH = 0, 92 eDREGTypeBREAK 93 }; 94 95 protected: 96 Error 97 DoReadRegisterValue(uint32_t offset, 98 const char* reg_name, 99 uint32_t size, 100 RegisterValue &value) override; 101 102 Error 103 DoWriteRegisterValue(uint32_t offset, 104 const char* reg_name, 105 const RegisterValue &value) override; 106 107 Error 108 DoReadGPR(void *buf, size_t buf_size) override; 109 110 Error 111 DoWriteGPR(void *buf, size_t buf_size) override; 112 113 Error 114 DoReadFPR(void *buf, size_t buf_size) override; 115 116 Error 117 DoWriteFPR(void *buf, size_t buf_size) override; 118 119 void* 120 GetGPRBuffer() override { return &m_gpr_arm; } 121 122 void* 123 GetFPRBuffer() override { return &m_fpr; } 124 125 size_t 126 GetFPRSize() override { return sizeof(m_fpr); } 127 128 private: 129 struct RegInfo 130 { 131 uint32_t num_registers; 132 uint32_t num_gpr_registers; 133 uint32_t num_fpr_registers; 134 135 uint32_t last_gpr; 136 uint32_t first_fpr; 137 uint32_t last_fpr; 138 139 uint32_t first_fpr_v; 140 uint32_t last_fpr_v; 141 142 uint32_t gpr_flags; 143 }; 144 145 struct QReg 146 { 147 uint8_t bytes[16]; 148 }; 149 150 struct FPU 151 { 152 union { 153 uint32_t s[32]; 154 uint64_t d[32]; 155 QReg q[16]; // the 128-bit NEON registers 156 } floats; 157 uint32_t fpscr; 158 }; 159 160 uint32_t m_gpr_arm[k_num_gpr_registers_arm]; 161 RegInfo m_reg_info; 162 FPU m_fpr; 163 164 // Debug register info for hardware breakpoints and watchpoints management. 165 struct DREG 166 { 167 lldb::addr_t address; // Breakpoint/watchpoint address value. 168 lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception occurred. 169 lldb::addr_t real_addr; // Address value that should cause target to stop. 170 uint32_t control; // Breakpoint/watchpoint control value. 171 uint32_t refcount; // Serves as enable/disable and refernce counter. 172 }; 173 174 struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints 175 struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints 176 177 uint32_t m_max_hwp_supported; 178 uint32_t m_max_hbp_supported; 179 bool m_refresh_hwdebug_info; 180 181 bool 182 IsGPR(unsigned reg) const; 183 184 bool 185 IsFPR(unsigned reg) const; 186 187 Error 188 ReadHardwareDebugInfo(); 189 190 Error 191 WriteHardwareDebugRegs(int hwbType, int hwb_index); 192 193 uint32_t 194 CalculateFprOffset(const RegisterInfo* reg_info) const; 195 }; 196 197 } // namespace process_linux 198 } // namespace lldb_private 199 200 #endif // #ifndef lldb_NativeRegisterContextLinux_arm_h 201 202 #endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__) 203