1 //===-- NativeRegisterContextLinux_arm.h ---------------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
11 
12 #ifndef lldb_NativeRegisterContextLinux_arm_h
13 #define lldb_NativeRegisterContextLinux_arm_h
14 
15 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
16 #include "Plugins/Process/Utility/lldb-arm-register-enums.h"
17 
18 namespace lldb_private {
19 namespace process_linux {
20 
21 class NativeProcessLinux;
22 
23 class NativeRegisterContextLinux_arm : public NativeRegisterContextLinux {
24 public:
25   NativeRegisterContextLinux_arm(const ArchSpec &target_arch,
26                                  NativeThreadProtocol &native_thread,
27                                  uint32_t concrete_frame_idx);
28 
29   uint32_t GetRegisterSetCount() const override;
30 
31   const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
32 
33   uint32_t GetUserRegisterCount() const override;
34 
35   Status ReadRegister(const RegisterInfo *reg_info,
36                       RegisterValue &reg_value) override;
37 
38   Status WriteRegister(const RegisterInfo *reg_info,
39                        const RegisterValue &reg_value) override;
40 
41   Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
42 
43   Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
44 
45   //------------------------------------------------------------------
46   // Hardware breakpoints/watchpoint mangement functions
47   //------------------------------------------------------------------
48 
49   uint32_t NumSupportedHardwareBreakpoints() override;
50 
51   uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
52 
53   bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
54 
55   Status ClearAllHardwareBreakpoints() override;
56 
57   Status GetHardwareBreakHitIndex(uint32_t &bp_index,
58                                   lldb::addr_t trap_addr) override;
59 
60   uint32_t NumSupportedHardwareWatchpoints() override;
61 
62   uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size,
63                                  uint32_t watch_flags) override;
64 
65   bool ClearHardwareWatchpoint(uint32_t hw_index) override;
66 
67   Status ClearAllHardwareWatchpoints() override;
68 
69   Status GetWatchpointHitIndex(uint32_t &wp_index,
70                                lldb::addr_t trap_addr) override;
71 
72   lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override;
73 
74   lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override;
75 
76   uint32_t GetWatchpointSize(uint32_t wp_index);
77 
78   bool WatchpointIsEnabled(uint32_t wp_index);
79 
80   // Debug register type select
81   enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK };
82 
83 protected:
84   Status DoReadRegisterValue(uint32_t offset, const char *reg_name,
85                              uint32_t size, RegisterValue &value) override;
86 
87   Status DoWriteRegisterValue(uint32_t offset, const char *reg_name,
88                               const RegisterValue &value) override;
89 
90   Status DoReadGPR(void *buf, size_t buf_size) override;
91 
92   Status DoWriteGPR(void *buf, size_t buf_size) override;
93 
94   Status DoReadFPR(void *buf, size_t buf_size) override;
95 
96   Status DoWriteFPR(void *buf, size_t buf_size) override;
97 
98   void *GetGPRBuffer() override { return &m_gpr_arm; }
99 
100   void *GetFPRBuffer() override { return &m_fpr; }
101 
102   size_t GetFPRSize() override { return sizeof(m_fpr); }
103 
104 private:
105   struct RegInfo {
106     uint32_t num_registers;
107     uint32_t num_gpr_registers;
108     uint32_t num_fpr_registers;
109 
110     uint32_t last_gpr;
111     uint32_t first_fpr;
112     uint32_t last_fpr;
113 
114     uint32_t first_fpr_v;
115     uint32_t last_fpr_v;
116 
117     uint32_t gpr_flags;
118   };
119 
120   struct QReg {
121     uint8_t bytes[16];
122   };
123 
124   struct FPU {
125     union {
126       uint32_t s[32];
127       uint64_t d[32];
128       QReg q[16]; // the 128-bit NEON registers
129     } floats;
130     uint32_t fpscr;
131   };
132 
133   uint32_t m_gpr_arm[k_num_gpr_registers_arm];
134   RegInfo m_reg_info;
135   FPU m_fpr;
136 
137   // Debug register info for hardware breakpoints and watchpoints management.
138   struct DREG {
139     lldb::addr_t address;  // Breakpoint/watchpoint address value.
140     lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception
141                            // occurred.
142     lldb::addr_t real_addr; // Address value that should cause target to stop.
143     uint32_t control;       // Breakpoint/watchpoint control value.
144     uint32_t refcount;      // Serves as enable/disable and refernce counter.
145   };
146 
147   struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints
148   struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints
149 
150   uint32_t m_max_hwp_supported;
151   uint32_t m_max_hbp_supported;
152   bool m_refresh_hwdebug_info;
153 
154   bool IsGPR(unsigned reg) const;
155 
156   bool IsFPR(unsigned reg) const;
157 
158   Status ReadHardwareDebugInfo();
159 
160   Status WriteHardwareDebugRegs(int hwbType, int hwb_index);
161 
162   uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
163 };
164 
165 } // namespace process_linux
166 } // namespace lldb_private
167 
168 #endif // #ifndef lldb_NativeRegisterContextLinux_arm_h
169 
170 #endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
171