1 //===-- NativeRegisterContextLinux_arm.h ---------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
10 
11 #ifndef lldb_NativeRegisterContextLinux_arm_h
12 #define lldb_NativeRegisterContextLinux_arm_h
13 
14 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
15 #include "Plugins/Process/Utility/lldb-arm-register-enums.h"
16 
17 namespace lldb_private {
18 namespace process_linux {
19 
20 class NativeProcessLinux;
21 
22 class NativeRegisterContextLinux_arm : public NativeRegisterContextLinux {
23 public:
24   NativeRegisterContextLinux_arm(const ArchSpec &target_arch,
25                                  NativeThreadProtocol &native_thread);
26 
27   uint32_t GetRegisterSetCount() const override;
28 
29   const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
30 
31   uint32_t GetUserRegisterCount() const override;
32 
33   Status ReadRegister(const RegisterInfo *reg_info,
34                       RegisterValue &reg_value) override;
35 
36   Status WriteRegister(const RegisterInfo *reg_info,
37                        const RegisterValue &reg_value) override;
38 
39   Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
40 
41   Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
42 
43   //------------------------------------------------------------------
44   // Hardware breakpoints/watchpoint management functions
45   //------------------------------------------------------------------
46 
47   uint32_t NumSupportedHardwareBreakpoints() override;
48 
49   uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
50 
51   bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
52 
53   Status ClearAllHardwareBreakpoints() override;
54 
55   Status GetHardwareBreakHitIndex(uint32_t &bp_index,
56                                   lldb::addr_t trap_addr) override;
57 
58   uint32_t NumSupportedHardwareWatchpoints() override;
59 
60   uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size,
61                                  uint32_t watch_flags) override;
62 
63   bool ClearHardwareWatchpoint(uint32_t hw_index) override;
64 
65   Status ClearAllHardwareWatchpoints() override;
66 
67   Status GetWatchpointHitIndex(uint32_t &wp_index,
68                                lldb::addr_t trap_addr) override;
69 
70   lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override;
71 
72   lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override;
73 
74   uint32_t GetWatchpointSize(uint32_t wp_index);
75 
76   bool WatchpointIsEnabled(uint32_t wp_index);
77 
78   // Debug register type select
79   enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK };
80 
81 protected:
82   Status DoReadRegisterValue(uint32_t offset, const char *reg_name,
83                              uint32_t size, RegisterValue &value) override;
84 
85   Status DoWriteRegisterValue(uint32_t offset, const char *reg_name,
86                               const RegisterValue &value) override;
87 
88   Status DoReadGPR(void *buf, size_t buf_size) override;
89 
90   Status DoWriteGPR(void *buf, size_t buf_size) override;
91 
92   Status DoReadFPR(void *buf, size_t buf_size) override;
93 
94   Status DoWriteFPR(void *buf, size_t buf_size) override;
95 
96   void *GetGPRBuffer() override { return &m_gpr_arm; }
97 
98   void *GetFPRBuffer() override { return &m_fpr; }
99 
100   size_t GetFPRSize() override { return sizeof(m_fpr); }
101 
102 private:
103   struct RegInfo {
104     uint32_t num_registers;
105     uint32_t num_gpr_registers;
106     uint32_t num_fpr_registers;
107 
108     uint32_t last_gpr;
109     uint32_t first_fpr;
110     uint32_t last_fpr;
111 
112     uint32_t first_fpr_v;
113     uint32_t last_fpr_v;
114 
115     uint32_t gpr_flags;
116   };
117 
118   struct QReg {
119     uint8_t bytes[16];
120   };
121 
122   struct FPU {
123     union {
124       uint32_t s[32];
125       uint64_t d[32];
126       QReg q[16]; // the 128-bit NEON registers
127     } floats;
128     uint32_t fpscr;
129   };
130 
131   uint32_t m_gpr_arm[k_num_gpr_registers_arm];
132   RegInfo m_reg_info;
133   FPU m_fpr;
134 
135   // Debug register info for hardware breakpoints and watchpoints management.
136   struct DREG {
137     lldb::addr_t address;  // Breakpoint/watchpoint address value.
138     lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception
139                            // occurred.
140     lldb::addr_t real_addr; // Address value that should cause target to stop.
141     uint32_t control;       // Breakpoint/watchpoint control value.
142     uint32_t refcount;      // Serves as enable/disable and reference counter.
143   };
144 
145   struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints
146   struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints
147 
148   uint32_t m_max_hwp_supported;
149   uint32_t m_max_hbp_supported;
150   bool m_refresh_hwdebug_info;
151 
152   bool IsGPR(unsigned reg) const;
153 
154   bool IsFPR(unsigned reg) const;
155 
156   Status ReadHardwareDebugInfo();
157 
158   Status WriteHardwareDebugRegs(int hwbType, int hwb_index);
159 
160   uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
161 };
162 
163 } // namespace process_linux
164 } // namespace lldb_private
165 
166 #endif // #ifndef lldb_NativeRegisterContextLinux_arm_h
167 
168 #endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
169