1 //===-- AArch66.h ---------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "ABIAArch64.h"
10 #include "ABIMacOSX_arm64.h"
11 #include "ABISysV_arm64.h"
12 #include "Utility/ARM64_DWARF_Registers.h"
13 #include "lldb/Core/PluginManager.h"
14 #include "lldb/Target/Process.h"
15 
16 #include <bitset>
17 
18 LLDB_PLUGIN_DEFINE(ABIAArch64)
19 
20 void ABIAArch64::Initialize() {
21   ABISysV_arm64::Initialize();
22   ABIMacOSX_arm64::Initialize();
23 }
24 
25 void ABIAArch64::Terminate() {
26   ABISysV_arm64::Terminate();
27   ABIMacOSX_arm64::Terminate();
28 }
29 
30 lldb::addr_t ABIAArch64::FixCodeAddress(lldb::addr_t pc) {
31   if (lldb::ProcessSP process_sp = GetProcessSP())
32     return FixAddress(pc, process_sp->GetCodeAddressMask());
33   return pc;
34 }
35 
36 lldb::addr_t ABIAArch64::FixDataAddress(lldb::addr_t pc) {
37   if (lldb::ProcessSP process_sp = GetProcessSP())
38     return FixAddress(pc, process_sp->GetDataAddressMask());
39   return pc;
40 }
41 
42 std::pair<uint32_t, uint32_t>
43 ABIAArch64::GetEHAndDWARFNums(llvm::StringRef name) {
44   if (name == "pc")
45     return {LLDB_INVALID_REGNUM, arm64_dwarf::pc};
46   if (name == "cpsr")
47     return {LLDB_INVALID_REGNUM, arm64_dwarf::cpsr};
48   return MCBasedABI::GetEHAndDWARFNums(name);
49 }
50 
51 std::string ABIAArch64::GetMCName(std::string reg) {
52   MapRegisterName(reg, "v", "q");
53   MapRegisterName(reg, "x29", "fp");
54   MapRegisterName(reg, "x30", "lr");
55   return reg;
56 }
57 
58 uint32_t ABIAArch64::GetGenericNum(llvm::StringRef name) {
59   return llvm::StringSwitch<uint32_t>(name)
60       .Case("pc", LLDB_REGNUM_GENERIC_PC)
61       .Cases("lr", "x30", LLDB_REGNUM_GENERIC_RA)
62       .Cases("sp", "x31", LLDB_REGNUM_GENERIC_SP)
63       .Cases("fp", "x29", LLDB_REGNUM_GENERIC_FP)
64       .Case("cpsr", LLDB_REGNUM_GENERIC_FLAGS)
65       .Case("x0", LLDB_REGNUM_GENERIC_ARG1)
66       .Case("x1", LLDB_REGNUM_GENERIC_ARG2)
67       .Case("x2", LLDB_REGNUM_GENERIC_ARG3)
68       .Case("x3", LLDB_REGNUM_GENERIC_ARG4)
69       .Case("x4", LLDB_REGNUM_GENERIC_ARG5)
70       .Case("x5", LLDB_REGNUM_GENERIC_ARG6)
71       .Case("x6", LLDB_REGNUM_GENERIC_ARG7)
72       .Case("x7", LLDB_REGNUM_GENERIC_ARG8)
73       .Default(LLDB_INVALID_REGNUM);
74 }
75 
76 static void addPartialRegisters(
77     std::vector<lldb_private::DynamicRegisterInfo::Register> &regs,
78     llvm::ArrayRef<llvm::Optional<uint32_t>> full_reg_indices,
79     uint32_t full_reg_size, const char *partial_reg_format,
80     uint32_t partial_reg_size, lldb::Encoding encoding, lldb::Format format) {
81   for (auto it : llvm::enumerate(full_reg_indices)) {
82     llvm::Optional<uint32_t> full_reg_index = it.value();
83     if (!full_reg_index || regs[*full_reg_index].byte_size != full_reg_size)
84       return;
85 
86     lldb_private::DynamicRegisterInfo::Register partial_reg{
87         lldb_private::ConstString(
88             llvm::formatv(partial_reg_format, it.index()).str()),
89         lldb_private::ConstString(),
90         lldb_private::ConstString("supplementary registers"),
91         partial_reg_size,
92         LLDB_INVALID_INDEX32,
93         encoding,
94         format,
95         LLDB_INVALID_REGNUM,
96         LLDB_INVALID_REGNUM,
97         LLDB_INVALID_REGNUM,
98         LLDB_INVALID_REGNUM,
99         {*full_reg_index},
100         {}};
101     addSupplementaryRegister(regs, partial_reg);
102   }
103 }
104 
105 void ABIAArch64::AugmentRegisterInfo(
106     std::vector<lldb_private::DynamicRegisterInfo::Register> &regs) {
107   lldb_private::MCBasedABI::AugmentRegisterInfo(regs);
108 
109   lldb_private::ConstString sp_string{"sp"};
110 
111   std::array<llvm::Optional<uint32_t>, 32> x_regs;
112   std::array<llvm::Optional<uint32_t>, 32> v_regs;
113 
114   for (auto it : llvm::enumerate(regs)) {
115     lldb_private::DynamicRegisterInfo::Register &info = it.value();
116     // GDB sends x31 as "sp".  Add the "x31" alt_name for convenience.
117     if (info.name == sp_string && !info.alt_name)
118       info.alt_name.SetCString("x31");
119 
120     unsigned int reg_num;
121     auto get_reg = [&info, &reg_num](const char *prefix) {
122       llvm::StringRef reg_name = info.name.GetStringRef();
123       llvm::StringRef alt_name = info.alt_name.GetStringRef();
124       return (reg_name.consume_front(prefix) &&
125               llvm::to_integer(reg_name, reg_num, 10) && reg_num < 32) ||
126              (alt_name.consume_front(prefix) &&
127               llvm::to_integer(alt_name, reg_num, 10) && reg_num < 32);
128     };
129 
130     if (get_reg("x"))
131       x_regs[reg_num] = it.index();
132     else if (get_reg("v"))
133       v_regs[reg_num] = it.index();
134     // if we have at least one subregister, abort
135     else if (get_reg("w") || get_reg("s") || get_reg("d"))
136       return;
137   }
138 
139   // Create aliases for partial registers: wN for xN, and sN/dN for vN.
140   addPartialRegisters(regs, x_regs, 8, "w{0}", 4, lldb::eEncodingUint,
141                       lldb::eFormatHex);
142   addPartialRegisters(regs, v_regs, 16, "s{0}", 4, lldb::eEncodingIEEE754,
143                       lldb::eFormatFloat);
144   addPartialRegisters(regs, v_regs, 16, "d{0}", 8, lldb::eEncodingIEEE754,
145                       lldb::eFormatFloat);
146 }
147