1 //===- Target.cpp ---------------------------------------------------------===// 2 // 3 // The LLVM Linker 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Machine-specific things, such as applying relocations, creation of 11 // GOT or PLT entries, etc., are handled in this file. 12 // 13 // Refer the ELF spec for the single letter varaibles, S, A or P, used 14 // in this file. SA is S+A. 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "Target.h" 19 #include "Error.h" 20 #include "OutputSections.h" 21 #include "Symbols.h" 22 23 #include "llvm/ADT/ArrayRef.h" 24 #include "llvm/Object/ELF.h" 25 #include "llvm/Support/Endian.h" 26 #include "llvm/Support/ELF.h" 27 28 using namespace llvm; 29 using namespace llvm::object; 30 using namespace llvm::support::endian; 31 using namespace llvm::ELF; 32 33 namespace lld { 34 namespace elf { 35 36 TargetInfo *Target; 37 38 template <endianness E> static void add32(void *P, int32_t V) { 39 write32<E>(P, read32<E>(P) + V); 40 } 41 42 static void add32le(uint8_t *P, int32_t V) { add32<support::little>(P, V); } 43 static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); } 44 45 template <unsigned N> static void checkInt(int64_t V, uint32_t Type) { 46 if (isInt<N>(V)) 47 return; 48 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 49 error("relocation " + S + " out of range"); 50 } 51 52 template <unsigned N> static void checkUInt(uint64_t V, uint32_t Type) { 53 if (isUInt<N>(V)) 54 return; 55 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 56 error("relocation " + S + " out of range"); 57 } 58 59 template <unsigned N> static void checkIntUInt(uint64_t V, uint32_t Type) { 60 if (isInt<N>(V) || isUInt<N>(V)) 61 return; 62 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 63 error("relocation " + S + " out of range"); 64 } 65 66 template <unsigned N> static void checkAlignment(uint64_t V, uint32_t Type) { 67 if ((V & (N - 1)) == 0) 68 return; 69 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 70 error("improper alignment for relocation " + S); 71 } 72 73 namespace { 74 class X86TargetInfo final : public TargetInfo { 75 public: 76 X86TargetInfo(); 77 void writeGotPltHeader(uint8_t *Buf) const override; 78 uint32_t getDynRel(uint32_t Type) const override; 79 uint32_t getTlsGotRel(uint32_t Type) const override; 80 bool pointsToLocalDynamicGotEntry(uint32_t Type) const override; 81 bool isTlsLocalDynamicRel(uint32_t Type) const override; 82 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 83 bool isTlsInitialExecRel(uint32_t Type) const override; 84 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 85 void writePltZero(uint8_t *Buf) const override; 86 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 87 int32_t Index, unsigned RelOff) const override; 88 bool isRelRelative(uint32_t Type) const override; 89 bool needsCopyRelImpl(uint32_t Type) const override; 90 bool needsDynRelative(uint32_t Type) const override; 91 bool needsGot(uint32_t Type, SymbolBody &S) const override; 92 bool needsPltImpl(uint32_t Type) const override; 93 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 94 uint64_t SA, uint64_t ZA = 0, 95 uint8_t *PairedLoc = nullptr) const override; 96 97 size_t relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 98 uint64_t P, uint64_t SA) const override; 99 size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 100 uint64_t P, uint64_t SA) const override; 101 size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 102 uint64_t P, uint64_t SA) const override; 103 size_t relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 104 uint64_t P, uint64_t SA) const override; 105 106 bool isGotRelative(uint32_t Type) const override; 107 bool refersToGotEntry(uint32_t Type) const override; 108 }; 109 110 class X86_64TargetInfo final : public TargetInfo { 111 public: 112 X86_64TargetInfo(); 113 uint32_t getTlsGotRel(uint32_t Type) const override; 114 bool pointsToLocalDynamicGotEntry(uint32_t Type) const override; 115 bool isTlsLocalDynamicRel(uint32_t Type) const override; 116 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 117 bool isTlsInitialExecRel(uint32_t Type) const override; 118 void writeGotPltHeader(uint8_t *Buf) const override; 119 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 120 void writePltZero(uint8_t *Buf) const override; 121 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 122 int32_t Index, unsigned RelOff) const override; 123 bool needsCopyRelImpl(uint32_t Type) const override; 124 bool needsGot(uint32_t Type, SymbolBody &S) const override; 125 bool refersToGotEntry(uint32_t Type) const override; 126 bool needsPltImpl(uint32_t Type) const override; 127 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 128 uint64_t SA, uint64_t ZA = 0, 129 uint8_t *PairedLoc = nullptr) const override; 130 bool isRelRelative(uint32_t Type) const override; 131 bool isSizeRel(uint32_t Type) const override; 132 133 size_t relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 134 uint64_t P, uint64_t SA) const override; 135 size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 136 uint64_t P, uint64_t SA) const override; 137 size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 138 uint64_t P, uint64_t SA) const override; 139 size_t relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 140 uint64_t P, uint64_t SA) const override; 141 }; 142 143 class PPCTargetInfo final : public TargetInfo { 144 public: 145 PPCTargetInfo(); 146 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 147 uint64_t SA, uint64_t ZA = 0, 148 uint8_t *PairedLoc = nullptr) const override; 149 bool isRelRelative(uint32_t Type) const override; 150 }; 151 152 class PPC64TargetInfo final : public TargetInfo { 153 public: 154 PPC64TargetInfo(); 155 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 156 int32_t Index, unsigned RelOff) const override; 157 bool needsGot(uint32_t Type, SymbolBody &S) const override; 158 bool needsPltImpl(uint32_t Type) const override; 159 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 160 uint64_t SA, uint64_t ZA = 0, 161 uint8_t *PairedLoc = nullptr) const override; 162 bool isRelRelative(uint32_t Type) const override; 163 }; 164 165 class AArch64TargetInfo final : public TargetInfo { 166 public: 167 AArch64TargetInfo(); 168 uint32_t getDynRel(uint32_t Type) const override; 169 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 170 bool isTlsInitialExecRel(uint32_t Type) const override; 171 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 172 void writePltZero(uint8_t *Buf) const override; 173 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 174 int32_t Index, unsigned RelOff) const override; 175 uint32_t getTlsGotRel(uint32_t Type) const override; 176 bool isRelRelative(uint32_t Type) const override; 177 bool needsCopyRelImpl(uint32_t Type) const override; 178 bool needsGot(uint32_t Type, SymbolBody &S) const override; 179 bool needsPltImpl(uint32_t Type) const override; 180 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 181 uint64_t SA, uint64_t ZA = 0, 182 uint8_t *PairedLoc = nullptr) const override; 183 184 size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 185 uint64_t P, uint64_t SA) const override; 186 size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 187 uint64_t P, uint64_t SA) const override; 188 189 private: 190 static const uint64_t TcbSize = 16; 191 }; 192 193 class AMDGPUTargetInfo final : public TargetInfo { 194 public: 195 AMDGPUTargetInfo() {} 196 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 197 uint64_t SA, uint64_t ZA = 0, 198 uint8_t *PairedLoc = nullptr) const override; 199 }; 200 201 template <class ELFT> class MipsTargetInfo final : public TargetInfo { 202 public: 203 MipsTargetInfo(); 204 uint32_t getDynRel(uint32_t Type) const override; 205 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 206 void writePltZero(uint8_t *Buf) const override; 207 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 208 int32_t Index, unsigned RelOff) const override; 209 void writeGotHeader(uint8_t *Buf) const override; 210 bool needsCopyRelImpl(uint32_t Type) const override; 211 bool needsGot(uint32_t Type, SymbolBody &S) const override; 212 bool needsPltImpl(uint32_t Type) const override; 213 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 214 uint64_t S, uint64_t ZA = 0, 215 uint8_t *PairedLoc = nullptr) const override; 216 bool isHintRel(uint32_t Type) const override; 217 bool isRelRelative(uint32_t Type) const override; 218 bool refersToGotEntry(uint32_t Type) const override; 219 }; 220 } // anonymous namespace 221 222 TargetInfo *createTarget() { 223 switch (Config->EMachine) { 224 case EM_386: 225 return new X86TargetInfo(); 226 case EM_AARCH64: 227 return new AArch64TargetInfo(); 228 case EM_AMDGPU: 229 return new AMDGPUTargetInfo(); 230 case EM_MIPS: 231 switch (Config->EKind) { 232 case ELF32LEKind: 233 return new MipsTargetInfo<ELF32LE>(); 234 case ELF32BEKind: 235 return new MipsTargetInfo<ELF32BE>(); 236 default: 237 fatal("unsupported MIPS target"); 238 } 239 case EM_PPC: 240 return new PPCTargetInfo(); 241 case EM_PPC64: 242 return new PPC64TargetInfo(); 243 case EM_X86_64: 244 return new X86_64TargetInfo(); 245 } 246 fatal("unknown target machine"); 247 } 248 249 TargetInfo::~TargetInfo() {} 250 251 bool TargetInfo::canRelaxTls(uint32_t Type, const SymbolBody *S) const { 252 if (Config->Shared || (S && !S->IsTls)) 253 return false; 254 255 // We know we are producing an executable. 256 257 // Global-Dynamic relocs can be relaxed to Initial-Exec or Local-Exec 258 // depending on the symbol being locally defined or not. 259 if (isTlsGlobalDynamicRel(Type)) 260 return true; 261 262 // Local-Dynamic relocs can be relaxed to Local-Exec. 263 if (isTlsLocalDynamicRel(Type)) 264 return true; 265 266 // Initial-Exec relocs can be relaxed to Local-Exec if the symbol is locally 267 // defined. 268 if (isTlsInitialExecRel(Type)) 269 return !S->isPreemptible(); 270 271 return false; 272 } 273 274 uint64_t TargetInfo::getVAStart() const { return Config->Pic ? 0 : VAStart; } 275 276 bool TargetInfo::needsCopyRelImpl(uint32_t Type) const { return false; } 277 278 template <typename ELFT> static bool mayNeedCopy(const SymbolBody &S) { 279 if (Config->Shared) 280 return false; 281 auto *SS = dyn_cast<SharedSymbol<ELFT>>(&S); 282 if (!SS) 283 return false; 284 return SS->Sym.getType() == STT_OBJECT; 285 } 286 287 template <class ELFT> 288 bool TargetInfo::needsCopyRel(uint32_t Type, const SymbolBody &S) const { 289 return mayNeedCopy<ELFT>(S) && needsCopyRelImpl(Type); 290 } 291 292 bool TargetInfo::isGotRelative(uint32_t Type) const { return false; } 293 bool TargetInfo::isHintRel(uint32_t Type) const { return false; } 294 bool TargetInfo::isRelRelative(uint32_t Type) const { return true; } 295 bool TargetInfo::isSizeRel(uint32_t Type) const { return false; } 296 297 bool TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { return false; } 298 299 bool TargetInfo::needsPltImpl(uint32_t Type) const { return false; } 300 301 bool TargetInfo::refersToGotEntry(uint32_t Type) const { return false; } 302 303 TargetInfo::PltNeed TargetInfo::needsPlt(uint32_t Type, 304 const SymbolBody &S) const { 305 if (S.IsGnuIFunc) 306 return Plt_Explicit; 307 if (S.isPreemptible() && needsPltImpl(Type)) 308 return Plt_Explicit; 309 310 // This handles a non PIC program call to function in a shared library. 311 // In an ideal world, we could just report an error saying the relocation 312 // can overflow at runtime. 313 // In the real world with glibc, crt1.o has a R_X86_64_PC32 pointing to 314 // libc.so. 315 // 316 // The general idea on how to handle such cases is to create a PLT entry 317 // and use that as the function value. 318 // 319 // For the static linking part, we just return true and everything else 320 // will use the the PLT entry as the address. 321 // 322 // The remaining problem is making sure pointer equality still works. We 323 // need the help of the dynamic linker for that. We let it know that we have 324 // a direct reference to a so symbol by creating an undefined symbol with a 325 // non zero st_value. Seeing that, the dynamic linker resolves the symbol to 326 // the value of the symbol we created. This is true even for got entries, so 327 // pointer equality is maintained. To avoid an infinite loop, the only entry 328 // that points to the real function is a dedicated got entry used by the 329 // plt. That is identified by special relocation types (R_X86_64_JUMP_SLOT, 330 // R_386_JMP_SLOT, etc). 331 if (S.isShared()) 332 if (!Config->Pic && S.IsFunc && !refersToGotEntry(Type)) 333 return Plt_Implicit; 334 335 return Plt_No; 336 } 337 338 bool TargetInfo::isTlsInitialExecRel(uint32_t Type) const { return false; } 339 340 bool TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 341 return false; 342 } 343 344 bool TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { return false; } 345 346 bool TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 347 return false; 348 } 349 350 size_t TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 351 uint64_t P, uint64_t SA, 352 const SymbolBody &S) const { 353 if (isTlsGlobalDynamicRel(Type)) { 354 if (S.isPreemptible()) 355 return relaxTlsGdToIe(Loc, BufEnd, Type, P, SA); 356 return relaxTlsGdToLe(Loc, BufEnd, Type, P, SA); 357 } 358 if (isTlsLocalDynamicRel(Type)) 359 return relaxTlsLdToLe(Loc, BufEnd, Type, P, SA); 360 assert(isTlsInitialExecRel(Type)); 361 return relaxTlsIeToLe(Loc, BufEnd, Type, P, SA); 362 } 363 364 size_t TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 365 uint64_t P, uint64_t SA) const { 366 llvm_unreachable("Should not have claimed to be relaxable"); 367 } 368 369 size_t TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 370 uint64_t P, uint64_t SA) const { 371 llvm_unreachable("Should not have claimed to be relaxable"); 372 } 373 374 size_t TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 375 uint64_t P, uint64_t SA) const { 376 llvm_unreachable("Should not have claimed to be relaxable"); 377 } 378 379 size_t TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 380 uint64_t P, uint64_t SA) const { 381 llvm_unreachable("Should not have claimed to be relaxable"); 382 } 383 384 X86TargetInfo::X86TargetInfo() { 385 CopyRel = R_386_COPY; 386 GotRel = R_386_GLOB_DAT; 387 PltRel = R_386_JUMP_SLOT; 388 IRelativeRel = R_386_IRELATIVE; 389 RelativeRel = R_386_RELATIVE; 390 TlsGotRel = R_386_TLS_TPOFF; 391 TlsModuleIndexRel = R_386_TLS_DTPMOD32; 392 TlsOffsetRel = R_386_TLS_DTPOFF32; 393 UseLazyBinding = true; 394 PltEntrySize = 16; 395 PltZeroSize = 16; 396 } 397 398 bool X86TargetInfo::isRelRelative(uint32_t Type) const { 399 switch (Type) { 400 default: 401 return false; 402 case R_386_PC32: 403 case R_386_PLT32: 404 case R_386_TLS_LDO_32: 405 return true; 406 } 407 } 408 409 void X86TargetInfo::writeGotPltHeader(uint8_t *Buf) const { 410 write32le(Buf, Out<ELF32LE>::Dynamic->getVA()); 411 } 412 413 void X86TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 414 // Entries in .got.plt initially points back to the corresponding 415 // PLT entries with a fixed offset to skip the first instruction. 416 write32le(Buf, Plt + 6); 417 } 418 419 uint32_t X86TargetInfo::getDynRel(uint32_t Type) const { 420 if (Type == R_386_TLS_LE) 421 return R_386_TLS_TPOFF; 422 if (Type == R_386_TLS_LE_32) 423 return R_386_TLS_TPOFF32; 424 return Type; 425 } 426 427 uint32_t X86TargetInfo::getTlsGotRel(uint32_t Type) const { 428 if (Type == R_386_TLS_IE) 429 return Type; 430 return TlsGotRel; 431 } 432 433 bool X86TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 434 return Type == R_386_TLS_GD; 435 } 436 437 bool X86TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { 438 return Type == R_386_TLS_LDO_32 || Type == R_386_TLS_LDM; 439 } 440 441 bool X86TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 442 return Type == R_386_TLS_LDM; 443 } 444 445 bool X86TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 446 return Type == R_386_TLS_IE || Type == R_386_TLS_GOTIE; 447 } 448 449 void X86TargetInfo::writePltZero(uint8_t *Buf) const { 450 // Executable files and shared object files have 451 // separate procedure linkage tables. 452 if (Config->Pic) { 453 const uint8_t V[] = { 454 0xff, 0xb3, 0x04, 0x00, 0x00, 0x00, // pushl 4(%ebx) 455 0xff, 0xa3, 0x08, 0x00, 0x00, 0x00, // jmp *8(%ebx) 456 0x90, 0x90, 0x90, 0x90 // nop; nop; nop; nop 457 }; 458 memcpy(Buf, V, sizeof(V)); 459 return; 460 } 461 462 const uint8_t PltData[] = { 463 0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushl (GOT+4) 464 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *(GOT+8) 465 0x90, 0x90, 0x90, 0x90 // nop; nop; nop; nop 466 }; 467 memcpy(Buf, PltData, sizeof(PltData)); 468 uint32_t Got = Out<ELF32LE>::GotPlt->getVA(); 469 write32le(Buf + 2, Got + 4); 470 write32le(Buf + 8, Got + 8); 471 } 472 473 void X86TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 474 uint64_t PltEntryAddr, int32_t Index, 475 unsigned RelOff) const { 476 const uint8_t Inst[] = { 477 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, // jmp *foo_in_GOT|*foo@GOT(%ebx) 478 0x68, 0x00, 0x00, 0x00, 0x00, // pushl $reloc_offset 479 0xe9, 0x00, 0x00, 0x00, 0x00 // jmp .PLT0@PC 480 }; 481 memcpy(Buf, Inst, sizeof(Inst)); 482 483 // jmp *foo@GOT(%ebx) or jmp *foo_in_GOT 484 Buf[1] = Config->Pic ? 0xa3 : 0x25; 485 uint32_t Got = UseLazyBinding ? Out<ELF32LE>::GotPlt->getVA() 486 : Out<ELF32LE>::Got->getVA(); 487 write32le(Buf + 2, Config->Shared ? GotEntryAddr - Got : GotEntryAddr); 488 write32le(Buf + 7, RelOff); 489 write32le(Buf + 12, -Index * PltEntrySize - PltZeroSize - 16); 490 } 491 492 bool X86TargetInfo::needsCopyRelImpl(uint32_t Type) const { 493 return Type == R_386_32 || Type == R_386_16 || Type == R_386_8; 494 } 495 496 bool X86TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 497 if (S.IsTls && Type == R_386_TLS_GD) 498 return Target->canRelaxTls(Type, &S) && S.isPreemptible(); 499 if (Type == R_386_TLS_GOTIE || Type == R_386_TLS_IE) 500 return !canRelaxTls(Type, &S); 501 return Type == R_386_GOT32 || needsPlt(Type, S); 502 } 503 504 bool X86TargetInfo::needsPltImpl(uint32_t Type) const { 505 return Type == R_386_PLT32; 506 } 507 508 bool X86TargetInfo::isGotRelative(uint32_t Type) const { 509 // This relocation does not require got entry, 510 // but it is relative to got and needs it to be created. 511 // Here we request for that. 512 return Type == R_386_GOTOFF; 513 } 514 515 bool X86TargetInfo::refersToGotEntry(uint32_t Type) const { 516 return Type == R_386_GOT32; 517 } 518 519 void X86TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 520 uint64_t P, uint64_t SA, uint64_t ZA, 521 uint8_t *PairedLoc) const { 522 switch (Type) { 523 case R_386_32: 524 add32le(Loc, SA); 525 break; 526 case R_386_GOT32: { 527 uint64_t V = SA - Out<ELF32LE>::Got->getVA() - 528 Out<ELF32LE>::Got->getNumEntries() * 4; 529 checkInt<32>(V, Type); 530 add32le(Loc, V); 531 break; 532 } 533 case R_386_GOTOFF: 534 add32le(Loc, SA - Out<ELF32LE>::Got->getVA()); 535 break; 536 case R_386_GOTPC: 537 add32le(Loc, SA + Out<ELF32LE>::Got->getVA() - P); 538 break; 539 case R_386_PC32: 540 case R_386_PLT32: 541 add32le(Loc, SA - P); 542 break; 543 case R_386_TLS_GD: 544 case R_386_TLS_LDM: 545 case R_386_TLS_TPOFF: { 546 uint64_t V = SA - Out<ELF32LE>::Got->getVA() - 547 Out<ELF32LE>::Got->getNumEntries() * 4; 548 checkInt<32>(V, Type); 549 write32le(Loc, V); 550 break; 551 } 552 case R_386_TLS_IE: 553 case R_386_TLS_LDO_32: 554 write32le(Loc, SA); 555 break; 556 case R_386_TLS_LE: 557 write32le(Loc, SA - Out<ELF32LE>::TlsPhdr->p_memsz); 558 break; 559 case R_386_TLS_LE_32: 560 write32le(Loc, Out<ELF32LE>::TlsPhdr->p_memsz - SA); 561 break; 562 default: 563 fatal("unrecognized reloc " + Twine(Type)); 564 } 565 } 566 567 bool X86TargetInfo::needsDynRelative(uint32_t Type) const { 568 return Config->Shared && Type == R_386_TLS_IE; 569 } 570 571 size_t X86TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, 572 uint32_t Type, uint64_t P, 573 uint64_t SA) const { 574 // GD can be optimized to LE: 575 // leal x@tlsgd(, %ebx, 1), 576 // call __tls_get_addr@plt 577 // Can be converted to: 578 // movl %gs:0,%eax 579 // addl $x@ntpoff,%eax 580 // But gold emits subl $foo@tpoff,%eax instead of addl. 581 // These instructions are completely equal in behavior. 582 // This method generates subl to be consistent with gold. 583 const uint8_t Inst[] = { 584 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax 585 0x81, 0xe8, 0x00, 0x00, 0x00, 0x00 // subl 0(%ebx), %eax 586 }; 587 memcpy(Loc - 3, Inst, sizeof(Inst)); 588 relocateOne(Loc + 5, BufEnd, R_386_32, P, 589 Out<ELF32LE>::TlsPhdr->p_memsz - SA); 590 591 // The next relocation should be against __tls_get_addr, so skip it 592 return 1; 593 } 594 595 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.1 596 // IA-32 Linker Optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 597 // how GD can be optimized to IE: 598 // leal x@tlsgd(, %ebx, 1), 599 // call __tls_get_addr@plt 600 // Is converted to: 601 // movl %gs:0, %eax 602 // addl x@gotntpoff(%ebx), %eax 603 size_t X86TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, 604 uint32_t Type, uint64_t P, 605 uint64_t SA) const { 606 const uint8_t Inst[] = { 607 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax 608 0x03, 0x83, 0x00, 0x00, 0x00, 0x00 // addl 0(%ebx), %eax 609 }; 610 memcpy(Loc - 3, Inst, sizeof(Inst)); 611 relocateOne(Loc + 5, BufEnd, R_386_32, P, 612 SA - Out<ELF32LE>::Got->getVA() - 613 Out<ELF32LE>::Got->getNumEntries() * 4); 614 615 // The next relocation should be against __tls_get_addr, so skip it 616 return 1; 617 } 618 619 // In some conditions, relocations can be optimized to avoid using GOT. 620 // This function does that for Initial Exec to Local Exec case. 621 // Read "ELF Handling For Thread-Local Storage, 5.1 622 // IA-32 Linker Optimizations" (http://www.akkadia.org/drepper/tls.pdf) 623 // by Ulrich Drepper for details. 624 625 size_t X86TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, 626 uint32_t Type, uint64_t P, 627 uint64_t SA) const { 628 // Ulrich's document section 6.2 says that @gotntpoff can 629 // be used with MOVL or ADDL instructions. 630 // @indntpoff is similar to @gotntpoff, but for use in 631 // position dependent code. 632 uint8_t *Inst = Loc - 2; 633 uint8_t *Op = Loc - 1; 634 uint8_t Reg = (Loc[-1] >> 3) & 7; 635 bool IsMov = *Inst == 0x8b; 636 if (Type == R_386_TLS_IE) { 637 // For R_386_TLS_IE relocation we perform the next transformations: 638 // MOVL foo@INDNTPOFF,%EAX is transformed to MOVL $foo,%EAX 639 // MOVL foo@INDNTPOFF,%REG is transformed to MOVL $foo,%REG 640 // ADDL foo@INDNTPOFF,%REG is transformed to ADDL $foo,%REG 641 // First one is special because when EAX is used the sequence is 5 bytes 642 // long, otherwise it is 6 bytes. 643 if (*Op == 0xa1) { 644 *Op = 0xb8; 645 } else { 646 *Inst = IsMov ? 0xc7 : 0x81; 647 *Op = 0xc0 | ((*Op >> 3) & 7); 648 } 649 } else { 650 // R_386_TLS_GOTIE relocation can be optimized to 651 // R_386_TLS_LE so that it does not use GOT. 652 // "MOVL foo@GOTTPOFF(%RIP), %REG" is transformed to "MOVL $foo, %REG". 653 // "ADDL foo@GOTNTPOFF(%RIP), %REG" is transformed to "LEAL foo(%REG), %REG" 654 // Note: gold converts to ADDL instead of LEAL. 655 *Inst = IsMov ? 0xc7 : 0x8d; 656 if (IsMov) 657 *Op = 0xc0 | ((*Op >> 3) & 7); 658 else 659 *Op = 0x80 | Reg | (Reg << 3); 660 } 661 relocateOne(Loc, BufEnd, R_386_TLS_LE, P, SA); 662 663 return 0; 664 } 665 666 size_t X86TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, 667 uint32_t Type, uint64_t P, 668 uint64_t SA) const { 669 if (Type == R_386_TLS_LDO_32) { 670 relocateOne(Loc, BufEnd, R_386_TLS_LE, P, SA); 671 return 0; 672 } 673 674 // LD can be optimized to LE: 675 // leal foo(%reg),%eax 676 // call ___tls_get_addr 677 // Is converted to: 678 // movl %gs:0,%eax 679 // nop 680 // leal 0(%esi,1),%esi 681 const uint8_t Inst[] = { 682 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0,%eax 683 0x90, // nop 684 0x8d, 0x74, 0x26, 0x00 // leal 0(%esi,1),%esi 685 }; 686 memcpy(Loc - 2, Inst, sizeof(Inst)); 687 688 // The next relocation should be against __tls_get_addr, so skip it 689 return 1; 690 } 691 692 X86_64TargetInfo::X86_64TargetInfo() { 693 CopyRel = R_X86_64_COPY; 694 GotRel = R_X86_64_GLOB_DAT; 695 PltRel = R_X86_64_JUMP_SLOT; 696 RelativeRel = R_X86_64_RELATIVE; 697 IRelativeRel = R_X86_64_IRELATIVE; 698 TlsGotRel = R_X86_64_TPOFF64; 699 TlsModuleIndexRel = R_X86_64_DTPMOD64; 700 TlsOffsetRel = R_X86_64_DTPOFF64; 701 UseLazyBinding = true; 702 PltEntrySize = 16; 703 PltZeroSize = 16; 704 } 705 706 void X86_64TargetInfo::writeGotPltHeader(uint8_t *Buf) const { 707 write64le(Buf, Out<ELF64LE>::Dynamic->getVA()); 708 } 709 710 void X86_64TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 711 // See comments in X86TargetInfo::writeGotPlt. 712 write32le(Buf, Plt + 6); 713 } 714 715 void X86_64TargetInfo::writePltZero(uint8_t *Buf) const { 716 const uint8_t PltData[] = { 717 0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushq GOT+8(%rip) 718 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *GOT+16(%rip) 719 0x0f, 0x1f, 0x40, 0x00 // nopl 0x0(rax) 720 }; 721 memcpy(Buf, PltData, sizeof(PltData)); 722 uint64_t Got = Out<ELF64LE>::GotPlt->getVA(); 723 uint64_t Plt = Out<ELF64LE>::Plt->getVA(); 724 write32le(Buf + 2, Got - Plt + 2); // GOT+8 725 write32le(Buf + 8, Got - Plt + 4); // GOT+16 726 } 727 728 void X86_64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 729 uint64_t PltEntryAddr, int32_t Index, 730 unsigned RelOff) const { 731 const uint8_t Inst[] = { 732 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmpq *got(%rip) 733 0x68, 0x00, 0x00, 0x00, 0x00, // pushq <relocation index> 734 0xe9, 0x00, 0x00, 0x00, 0x00 // jmpq plt[0] 735 }; 736 memcpy(Buf, Inst, sizeof(Inst)); 737 738 write32le(Buf + 2, GotEntryAddr - PltEntryAddr - 6); 739 write32le(Buf + 7, Index); 740 write32le(Buf + 12, -Index * PltEntrySize - PltZeroSize - 16); 741 } 742 743 bool X86_64TargetInfo::needsCopyRelImpl(uint32_t Type) const { 744 return Type == R_X86_64_32S || Type == R_X86_64_32 || Type == R_X86_64_PC32 || 745 Type == R_X86_64_64; 746 } 747 748 bool X86_64TargetInfo::refersToGotEntry(uint32_t Type) const { 749 return Type == R_X86_64_GOTPCREL || Type == R_X86_64_GOTPCRELX || 750 Type == R_X86_64_REX_GOTPCRELX; 751 } 752 753 bool X86_64TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 754 if (Type == R_X86_64_TLSGD) 755 return Target->canRelaxTls(Type, &S) && S.isPreemptible(); 756 if (Type == R_X86_64_GOTTPOFF) 757 return !canRelaxTls(Type, &S); 758 return refersToGotEntry(Type) || needsPlt(Type, S); 759 } 760 761 uint32_t X86_64TargetInfo::getTlsGotRel(uint32_t Type) const { 762 // No other types of TLS relocations requiring GOT should 763 // reach here. 764 assert(Type == R_X86_64_GOTTPOFF); 765 return R_X86_64_PC32; 766 } 767 768 bool X86_64TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 769 return Type == R_X86_64_GOTTPOFF; 770 } 771 772 bool X86_64TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 773 return Type == R_X86_64_TLSGD; 774 } 775 776 bool X86_64TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 777 return Type == R_X86_64_TLSLD; 778 } 779 780 bool X86_64TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { 781 return Type == R_X86_64_DTPOFF32 || Type == R_X86_64_DTPOFF64 || 782 Type == R_X86_64_TLSLD; 783 } 784 785 bool X86_64TargetInfo::needsPltImpl(uint32_t Type) const { 786 return Type == R_X86_64_PLT32; 787 } 788 789 bool X86_64TargetInfo::isRelRelative(uint32_t Type) const { 790 switch (Type) { 791 default: 792 return false; 793 case R_X86_64_DTPOFF32: 794 case R_X86_64_DTPOFF64: 795 case R_X86_64_PC8: 796 case R_X86_64_PC16: 797 case R_X86_64_PC32: 798 case R_X86_64_PC64: 799 case R_X86_64_PLT32: 800 return true; 801 } 802 } 803 804 bool X86_64TargetInfo::isSizeRel(uint32_t Type) const { 805 return Type == R_X86_64_SIZE32 || Type == R_X86_64_SIZE64; 806 } 807 808 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 809 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 810 // how GD can be optimized to LE: 811 // .byte 0x66 812 // leaq x@tlsgd(%rip), %rdi 813 // .word 0x6666 814 // rex64 815 // call __tls_get_addr@plt 816 // Is converted to: 817 // mov %fs:0x0,%rax 818 // lea x@tpoff,%rax 819 size_t X86_64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, 820 uint32_t Type, uint64_t P, 821 uint64_t SA) const { 822 const uint8_t Inst[] = { 823 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax 824 0x48, 0x8d, 0x80, 0x00, 0x00, 0x00, 0x00 // lea x@tpoff,%rax 825 }; 826 memcpy(Loc - 4, Inst, sizeof(Inst)); 827 relocateOne(Loc + 8, BufEnd, R_X86_64_TPOFF32, P, SA); 828 829 // The next relocation should be against __tls_get_addr, so skip it 830 return 1; 831 } 832 833 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 834 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 835 // how GD can be optimized to IE: 836 // .byte 0x66 837 // leaq x@tlsgd(%rip), %rdi 838 // .word 0x6666 839 // rex64 840 // call __tls_get_addr@plt 841 // Is converted to: 842 // mov %fs:0x0,%rax 843 // addq x@tpoff,%rax 844 size_t X86_64TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, 845 uint32_t Type, uint64_t P, 846 uint64_t SA) const { 847 const uint8_t Inst[] = { 848 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax 849 0x48, 0x03, 0x05, 0x00, 0x00, 0x00, 0x00 // addq x@tpoff,%rax 850 }; 851 memcpy(Loc - 4, Inst, sizeof(Inst)); 852 relocateOne(Loc + 8, BufEnd, R_X86_64_PC32, P + 12, SA); 853 854 // The next relocation should be against __tls_get_addr, so skip it 855 return 1; 856 } 857 858 // In some conditions, R_X86_64_GOTTPOFF relocation can be optimized to 859 // R_X86_64_TPOFF32 so that it does not use GOT. 860 // This function does that. Read "ELF Handling For Thread-Local Storage, 861 // 5.5 x86-x64 linker optimizations" (http://www.akkadia.org/drepper/tls.pdf) 862 // by Ulrich Drepper for details. 863 size_t X86_64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, 864 uint32_t Type, uint64_t P, 865 uint64_t SA) const { 866 // Ulrich's document section 6.5 says that @gottpoff(%rip) must be 867 // used in MOVQ or ADDQ instructions only. 868 // "MOVQ foo@GOTTPOFF(%RIP), %REG" is transformed to "MOVQ $foo, %REG". 869 // "ADDQ foo@GOTTPOFF(%RIP), %REG" is transformed to "LEAQ foo(%REG), %REG" 870 // (if the register is not RSP/R12) or "ADDQ $foo, %RSP". 871 // Opcodes info can be found at http://ref.x86asm.net/coder64.html#x48. 872 uint8_t *Prefix = Loc - 3; 873 uint8_t *Inst = Loc - 2; 874 uint8_t *RegSlot = Loc - 1; 875 uint8_t Reg = Loc[-1] >> 3; 876 bool IsMov = *Inst == 0x8b; 877 bool RspAdd = !IsMov && Reg == 4; 878 // r12 and rsp registers requires special handling. 879 // Problem is that for other registers, for example leaq 0xXXXXXXXX(%r11),%r11 880 // result out is 7 bytes: 4d 8d 9b XX XX XX XX, 881 // but leaq 0xXXXXXXXX(%r12),%r12 is 8 bytes: 4d 8d a4 24 XX XX XX XX. 882 // The same true for rsp. So we convert to addq for them, saving 1 byte that 883 // we dont have. 884 if (RspAdd) 885 *Inst = 0x81; 886 else 887 *Inst = IsMov ? 0xc7 : 0x8d; 888 if (*Prefix == 0x4c) 889 *Prefix = (IsMov || RspAdd) ? 0x49 : 0x4d; 890 *RegSlot = (IsMov || RspAdd) ? (0xc0 | Reg) : (0x80 | Reg | (Reg << 3)); 891 relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA); 892 return 0; 893 } 894 895 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 896 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 897 // how LD can be optimized to LE: 898 // leaq bar@tlsld(%rip), %rdi 899 // callq __tls_get_addr@PLT 900 // leaq bar@dtpoff(%rax), %rcx 901 // Is converted to: 902 // .word 0x6666 903 // .byte 0x66 904 // mov %fs:0,%rax 905 // leaq bar@tpoff(%rax), %rcx 906 size_t X86_64TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, 907 uint32_t Type, uint64_t P, 908 uint64_t SA) const { 909 if (Type == R_X86_64_DTPOFF64) { 910 write64le(Loc, SA - Out<ELF64LE>::TlsPhdr->p_memsz); 911 return 0; 912 } 913 if (Type == R_X86_64_DTPOFF32) { 914 relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA); 915 return 0; 916 } 917 918 const uint8_t Inst[] = { 919 0x66, 0x66, //.word 0x6666 920 0x66, //.byte 0x66 921 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00 // mov %fs:0,%rax 922 }; 923 memcpy(Loc - 3, Inst, sizeof(Inst)); 924 // The next relocation should be against __tls_get_addr, so skip it 925 return 1; 926 } 927 928 void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 929 uint64_t P, uint64_t SA, uint64_t ZA, 930 uint8_t *PairedLoc) const { 931 switch (Type) { 932 case R_X86_64_32: 933 checkUInt<32>(SA, Type); 934 write32le(Loc, SA); 935 break; 936 case R_X86_64_32S: 937 checkInt<32>(SA, Type); 938 write32le(Loc, SA); 939 break; 940 case R_X86_64_64: 941 case R_X86_64_DTPOFF64: 942 write64le(Loc, SA); 943 break; 944 case R_X86_64_DTPOFF32: 945 write32le(Loc, SA); 946 break; 947 case R_X86_64_GOTPCREL: 948 case R_X86_64_GOTPCRELX: 949 case R_X86_64_REX_GOTPCRELX: 950 case R_X86_64_PC32: 951 case R_X86_64_PLT32: 952 case R_X86_64_TLSGD: 953 case R_X86_64_TLSLD: 954 write32le(Loc, SA - P); 955 break; 956 case R_X86_64_SIZE32: 957 write32le(Loc, ZA); 958 break; 959 case R_X86_64_SIZE64: 960 write64le(Loc, ZA); 961 break; 962 case R_X86_64_TPOFF32: { 963 uint64_t Val = SA - Out<ELF64LE>::TlsPhdr->p_memsz; 964 checkInt<32>(Val, Type); 965 write32le(Loc, Val); 966 break; 967 } 968 default: 969 fatal("unrecognized reloc " + Twine(Type)); 970 } 971 } 972 973 // Relocation masks following the #lo(value), #hi(value), #ha(value), 974 // #higher(value), #highera(value), #highest(value), and #highesta(value) 975 // macros defined in section 4.5.1. Relocation Types of the PPC-elf64abi 976 // document. 977 static uint16_t applyPPCLo(uint64_t V) { return V; } 978 static uint16_t applyPPCHi(uint64_t V) { return V >> 16; } 979 static uint16_t applyPPCHa(uint64_t V) { return (V + 0x8000) >> 16; } 980 static uint16_t applyPPCHigher(uint64_t V) { return V >> 32; } 981 static uint16_t applyPPCHighera(uint64_t V) { return (V + 0x8000) >> 32; } 982 static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; } 983 static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; } 984 985 PPCTargetInfo::PPCTargetInfo() {} 986 bool PPCTargetInfo::isRelRelative(uint32_t Type) const { return false; } 987 988 void PPCTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 989 uint64_t P, uint64_t SA, uint64_t ZA, 990 uint8_t *PairedLoc) const { 991 switch (Type) { 992 case R_PPC_ADDR16_HA: 993 write16be(Loc, applyPPCHa(SA)); 994 break; 995 case R_PPC_ADDR16_LO: 996 write16be(Loc, applyPPCLo(SA)); 997 break; 998 default: 999 fatal("unrecognized reloc " + Twine(Type)); 1000 } 1001 } 1002 1003 PPC64TargetInfo::PPC64TargetInfo() { 1004 GotRel = R_PPC64_GLOB_DAT; 1005 RelativeRel = R_PPC64_RELATIVE; 1006 PltEntrySize = 32; 1007 1008 // We need 64K pages (at least under glibc/Linux, the loader won't 1009 // set different permissions on a finer granularity than that). 1010 PageSize = 65536; 1011 1012 // The PPC64 ELF ABI v1 spec, says: 1013 // 1014 // It is normally desirable to put segments with different characteristics 1015 // in separate 256 Mbyte portions of the address space, to give the 1016 // operating system full paging flexibility in the 64-bit address space. 1017 // 1018 // And because the lowest non-zero 256M boundary is 0x10000000, PPC64 linkers 1019 // use 0x10000000 as the starting address. 1020 VAStart = 0x10000000; 1021 } 1022 1023 uint64_t getPPC64TocBase() { 1024 // The TOC consists of sections .got, .toc, .tocbss, .plt in that 1025 // order. The TOC starts where the first of these sections starts. 1026 1027 // FIXME: This obviously does not do the right thing when there is no .got 1028 // section, but there is a .toc or .tocbss section. 1029 uint64_t TocVA = Out<ELF64BE>::Got->getVA(); 1030 if (!TocVA) 1031 TocVA = Out<ELF64BE>::Plt->getVA(); 1032 1033 // Per the ppc64-elf-linux ABI, The TOC base is TOC value plus 0x8000 1034 // thus permitting a full 64 Kbytes segment. Note that the glibc startup 1035 // code (crt1.o) assumes that you can get from the TOC base to the 1036 // start of the .toc section with only a single (signed) 16-bit relocation. 1037 return TocVA + 0x8000; 1038 } 1039 1040 void PPC64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1041 uint64_t PltEntryAddr, int32_t Index, 1042 unsigned RelOff) const { 1043 uint64_t Off = GotEntryAddr - getPPC64TocBase(); 1044 1045 // FIXME: What we should do, in theory, is get the offset of the function 1046 // descriptor in the .opd section, and use that as the offset from %r2 (the 1047 // TOC-base pointer). Instead, we have the GOT-entry offset, and that will 1048 // be a pointer to the function descriptor in the .opd section. Using 1049 // this scheme is simpler, but requires an extra indirection per PLT dispatch. 1050 1051 write32be(Buf, 0xf8410028); // std %r2, 40(%r1) 1052 write32be(Buf + 4, 0x3d620000 | applyPPCHa(Off)); // addis %r11, %r2, X@ha 1053 write32be(Buf + 8, 0xe98b0000 | applyPPCLo(Off)); // ld %r12, X@l(%r11) 1054 write32be(Buf + 12, 0xe96c0000); // ld %r11,0(%r12) 1055 write32be(Buf + 16, 0x7d6903a6); // mtctr %r11 1056 write32be(Buf + 20, 0xe84c0008); // ld %r2,8(%r12) 1057 write32be(Buf + 24, 0xe96c0010); // ld %r11,16(%r12) 1058 write32be(Buf + 28, 0x4e800420); // bctr 1059 } 1060 1061 bool PPC64TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 1062 if (needsPlt(Type, S)) 1063 return true; 1064 1065 switch (Type) { 1066 default: return false; 1067 case R_PPC64_GOT16: 1068 case R_PPC64_GOT16_DS: 1069 case R_PPC64_GOT16_HA: 1070 case R_PPC64_GOT16_HI: 1071 case R_PPC64_GOT16_LO: 1072 case R_PPC64_GOT16_LO_DS: 1073 return true; 1074 } 1075 } 1076 1077 bool PPC64TargetInfo::needsPltImpl(uint32_t Type) const { 1078 // These are function calls that need to be redirected through a PLT stub. 1079 return Type == R_PPC64_REL24; 1080 } 1081 1082 bool PPC64TargetInfo::isRelRelative(uint32_t Type) const { 1083 switch (Type) { 1084 default: 1085 return true; 1086 case R_PPC64_ADDR64: 1087 case R_PPC64_TOC: 1088 return false; 1089 } 1090 } 1091 1092 void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1093 uint64_t P, uint64_t SA, uint64_t ZA, 1094 uint8_t *PairedLoc) const { 1095 uint64_t TB = getPPC64TocBase(); 1096 1097 // For a TOC-relative relocation, adjust the addend and proceed in terms of 1098 // the corresponding ADDR16 relocation type. 1099 switch (Type) { 1100 case R_PPC64_TOC16: Type = R_PPC64_ADDR16; SA -= TB; break; 1101 case R_PPC64_TOC16_DS: Type = R_PPC64_ADDR16_DS; SA -= TB; break; 1102 case R_PPC64_TOC16_HA: Type = R_PPC64_ADDR16_HA; SA -= TB; break; 1103 case R_PPC64_TOC16_HI: Type = R_PPC64_ADDR16_HI; SA -= TB; break; 1104 case R_PPC64_TOC16_LO: Type = R_PPC64_ADDR16_LO; SA -= TB; break; 1105 case R_PPC64_TOC16_LO_DS: Type = R_PPC64_ADDR16_LO_DS; SA -= TB; break; 1106 default: break; 1107 } 1108 1109 switch (Type) { 1110 case R_PPC64_ADDR14: { 1111 checkAlignment<4>(SA, Type); 1112 // Preserve the AA/LK bits in the branch instruction 1113 uint8_t AALK = Loc[3]; 1114 write16be(Loc + 2, (AALK & 3) | (SA & 0xfffc)); 1115 break; 1116 } 1117 case R_PPC64_ADDR16: 1118 checkInt<16>(SA, Type); 1119 write16be(Loc, SA); 1120 break; 1121 case R_PPC64_ADDR16_DS: 1122 checkInt<16>(SA, Type); 1123 write16be(Loc, (read16be(Loc) & 3) | (SA & ~3)); 1124 break; 1125 case R_PPC64_ADDR16_HA: 1126 write16be(Loc, applyPPCHa(SA)); 1127 break; 1128 case R_PPC64_ADDR16_HI: 1129 write16be(Loc, applyPPCHi(SA)); 1130 break; 1131 case R_PPC64_ADDR16_HIGHER: 1132 write16be(Loc, applyPPCHigher(SA)); 1133 break; 1134 case R_PPC64_ADDR16_HIGHERA: 1135 write16be(Loc, applyPPCHighera(SA)); 1136 break; 1137 case R_PPC64_ADDR16_HIGHEST: 1138 write16be(Loc, applyPPCHighest(SA)); 1139 break; 1140 case R_PPC64_ADDR16_HIGHESTA: 1141 write16be(Loc, applyPPCHighesta(SA)); 1142 break; 1143 case R_PPC64_ADDR16_LO: 1144 write16be(Loc, applyPPCLo(SA)); 1145 break; 1146 case R_PPC64_ADDR16_LO_DS: 1147 write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(SA) & ~3)); 1148 break; 1149 case R_PPC64_ADDR32: 1150 checkInt<32>(SA, Type); 1151 write32be(Loc, SA); 1152 break; 1153 case R_PPC64_ADDR64: 1154 write64be(Loc, SA); 1155 break; 1156 case R_PPC64_REL16_HA: 1157 write16be(Loc, applyPPCHa(SA - P)); 1158 break; 1159 case R_PPC64_REL16_HI: 1160 write16be(Loc, applyPPCHi(SA - P)); 1161 break; 1162 case R_PPC64_REL16_LO: 1163 write16be(Loc, applyPPCLo(SA - P)); 1164 break; 1165 case R_PPC64_REL24: { 1166 // If we have an undefined weak symbol, we might get here with a symbol 1167 // address of zero. That could overflow, but the code must be unreachable, 1168 // so don't bother doing anything at all. 1169 if (!SA) 1170 break; 1171 1172 uint64_t PltStart = Out<ELF64BE>::Plt->getVA(); 1173 uint64_t PltEnd = PltStart + Out<ELF64BE>::Plt->getSize(); 1174 bool InPlt = PltStart <= SA && SA < PltEnd; 1175 1176 if (!InPlt && Out<ELF64BE>::Opd) { 1177 // If this is a local call, and we currently have the address of a 1178 // function-descriptor, get the underlying code address instead. 1179 uint64_t OpdStart = Out<ELF64BE>::Opd->getVA(); 1180 uint64_t OpdEnd = OpdStart + Out<ELF64BE>::Opd->getSize(); 1181 bool InOpd = OpdStart <= SA && SA < OpdEnd; 1182 1183 if (InOpd) 1184 SA = read64be(&Out<ELF64BE>::OpdBuf[SA - OpdStart]); 1185 } 1186 1187 uint32_t Mask = 0x03FFFFFC; 1188 checkInt<24>(SA - P, Type); 1189 write32be(Loc, (read32be(Loc) & ~Mask) | ((SA - P) & Mask)); 1190 1191 uint32_t Nop = 0x60000000; 1192 if (InPlt && Loc + 8 <= BufEnd && read32be(Loc + 4) == Nop) 1193 write32be(Loc + 4, 0xe8410028); // ld %r2, 40(%r1) 1194 break; 1195 } 1196 case R_PPC64_REL32: 1197 checkInt<32>(SA - P, Type); 1198 write32be(Loc, SA - P); 1199 break; 1200 case R_PPC64_REL64: 1201 write64be(Loc, SA - P); 1202 break; 1203 case R_PPC64_TOC: 1204 write64be(Loc, SA); 1205 break; 1206 default: 1207 fatal("unrecognized reloc " + Twine(Type)); 1208 } 1209 } 1210 1211 AArch64TargetInfo::AArch64TargetInfo() { 1212 CopyRel = R_AARCH64_COPY; 1213 RelativeRel = R_AARCH64_RELATIVE; 1214 IRelativeRel = R_AARCH64_IRELATIVE; 1215 GotRel = R_AARCH64_GLOB_DAT; 1216 PltRel = R_AARCH64_JUMP_SLOT; 1217 TlsGotRel = R_AARCH64_TLS_TPREL64; 1218 TlsModuleIndexRel = R_AARCH64_TLS_DTPMOD64; 1219 TlsOffsetRel = R_AARCH64_TLS_DTPREL64; 1220 UseLazyBinding = true; 1221 PltEntrySize = 16; 1222 PltZeroSize = 32; 1223 } 1224 1225 bool AArch64TargetInfo::isRelRelative(uint32_t Type) const { 1226 switch (Type) { 1227 default: 1228 return false; 1229 case R_AARCH64_PREL32: 1230 case R_AARCH64_ADR_PREL_LO21: 1231 case R_AARCH64_ADR_PREL_PG_HI21: 1232 case R_AARCH64_ADR_GOT_PAGE: 1233 case R_AARCH64_LDST8_ABS_LO12_NC: 1234 case R_AARCH64_LDST16_ABS_LO12_NC: 1235 case R_AARCH64_LDST32_ABS_LO12_NC: 1236 case R_AARCH64_LDST64_ABS_LO12_NC: 1237 case R_AARCH64_LDST128_ABS_LO12_NC: 1238 case R_AARCH64_ADD_ABS_LO12_NC: 1239 case R_AARCH64_CALL26: 1240 case R_AARCH64_JUMP26: 1241 case R_AARCH64_CONDBR19: 1242 case R_AARCH64_TSTBR14: 1243 case R_AARCH64_PREL64: 1244 return true; 1245 } 1246 } 1247 1248 bool AArch64TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 1249 return Type == R_AARCH64_TLSDESC_ADR_PAGE21 || 1250 Type == R_AARCH64_TLSDESC_LD64_LO12_NC || 1251 Type == R_AARCH64_TLSDESC_ADD_LO12_NC || 1252 Type == R_AARCH64_TLSDESC_CALL; 1253 } 1254 1255 bool AArch64TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 1256 return Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 || 1257 Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC; 1258 } 1259 1260 uint32_t AArch64TargetInfo::getDynRel(uint32_t Type) const { 1261 if (Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64) 1262 return Type; 1263 StringRef S = getELFRelocationTypeName(EM_AARCH64, Type); 1264 error("relocation " + S + " cannot be used when making a shared object; " 1265 "recompile with -fPIC."); 1266 // Keep it going with a dummy value so that we can find more reloc errors. 1267 return R_AARCH64_ABS32; 1268 } 1269 1270 void AArch64TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 1271 write64le(Buf, Out<ELF64LE>::Plt->getVA()); 1272 } 1273 1274 void AArch64TargetInfo::writePltZero(uint8_t *Buf) const { 1275 const uint8_t PltData[] = { 1276 0xf0, 0x7b, 0xbf, 0xa9, // stp x16, x30, [sp,#-16]! 1277 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[2])) 1278 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[2]))] 1279 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[2])) 1280 0x20, 0x02, 0x1f, 0xd6, // br x17 1281 0x1f, 0x20, 0x03, 0xd5, // nop 1282 0x1f, 0x20, 0x03, 0xd5, // nop 1283 0x1f, 0x20, 0x03, 0xd5 // nop 1284 }; 1285 memcpy(Buf, PltData, sizeof(PltData)); 1286 1287 uint64_t Got = Out<ELF64LE>::GotPlt->getVA(); 1288 uint64_t Plt = Out<ELF64LE>::Plt->getVA(); 1289 relocateOne(Buf + 4, Buf + 8, R_AARCH64_ADR_PREL_PG_HI21, Plt + 4, Got + 16); 1290 relocateOne(Buf + 8, Buf + 12, R_AARCH64_LDST64_ABS_LO12_NC, Plt + 8, 1291 Got + 16); 1292 relocateOne(Buf + 12, Buf + 16, R_AARCH64_ADD_ABS_LO12_NC, Plt + 12, 1293 Got + 16); 1294 } 1295 1296 void AArch64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1297 uint64_t PltEntryAddr, int32_t Index, 1298 unsigned RelOff) const { 1299 const uint8_t Inst[] = { 1300 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[n])) 1301 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[n]))] 1302 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[n])) 1303 0x20, 0x02, 0x1f, 0xd6 // br x17 1304 }; 1305 memcpy(Buf, Inst, sizeof(Inst)); 1306 1307 relocateOne(Buf, Buf + 4, R_AARCH64_ADR_PREL_PG_HI21, PltEntryAddr, 1308 GotEntryAddr); 1309 relocateOne(Buf + 4, Buf + 8, R_AARCH64_LDST64_ABS_LO12_NC, PltEntryAddr + 4, 1310 GotEntryAddr); 1311 relocateOne(Buf + 8, Buf + 12, R_AARCH64_ADD_ABS_LO12_NC, PltEntryAddr + 8, 1312 GotEntryAddr); 1313 } 1314 1315 uint32_t AArch64TargetInfo::getTlsGotRel(uint32_t Type) const { 1316 assert(Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 || 1317 Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC); 1318 return Type; 1319 } 1320 1321 bool AArch64TargetInfo::needsCopyRelImpl(uint32_t Type) const { 1322 switch (Type) { 1323 default: 1324 return false; 1325 case R_AARCH64_ABS16: 1326 case R_AARCH64_ABS32: 1327 case R_AARCH64_ABS64: 1328 case R_AARCH64_ADD_ABS_LO12_NC: 1329 case R_AARCH64_ADR_PREL_LO21: 1330 case R_AARCH64_ADR_PREL_PG_HI21: 1331 case R_AARCH64_LDST8_ABS_LO12_NC: 1332 case R_AARCH64_LDST16_ABS_LO12_NC: 1333 case R_AARCH64_LDST32_ABS_LO12_NC: 1334 case R_AARCH64_LDST64_ABS_LO12_NC: 1335 case R_AARCH64_LDST128_ABS_LO12_NC: 1336 return true; 1337 } 1338 } 1339 1340 bool AArch64TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 1341 switch (Type) { 1342 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: 1343 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1344 return !canRelaxTls(Type, &S); 1345 case R_AARCH64_ADR_GOT_PAGE: 1346 case R_AARCH64_LD64_GOT_LO12_NC: 1347 return true; 1348 default: 1349 return needsPlt(Type, S); 1350 } 1351 } 1352 1353 bool AArch64TargetInfo::needsPltImpl(uint32_t Type) const { 1354 switch (Type) { 1355 default: 1356 return false; 1357 case R_AARCH64_CALL26: 1358 case R_AARCH64_CONDBR19: 1359 case R_AARCH64_JUMP26: 1360 case R_AARCH64_TSTBR14: 1361 return true; 1362 } 1363 } 1364 1365 static void updateAArch64Addr(uint8_t *L, uint64_t Imm) { 1366 uint32_t ImmLo = (Imm & 0x3) << 29; 1367 uint32_t ImmHi = ((Imm & 0x1FFFFC) >> 2) << 5; 1368 uint64_t Mask = (0x3 << 29) | (0x7FFFF << 5); 1369 write32le(L, (read32le(L) & ~Mask) | ImmLo | ImmHi); 1370 } 1371 1372 static inline void updateAArch64Add(uint8_t *L, uint64_t Imm) { 1373 or32le(L, (Imm & 0xFFF) << 10); 1374 } 1375 1376 // Page(Expr) is the page address of the expression Expr, defined 1377 // as (Expr & ~0xFFF). (This applies even if the machine page size 1378 // supported by the platform has a different value.) 1379 static uint64_t getAArch64Page(uint64_t Expr) { 1380 return Expr & (~static_cast<uint64_t>(0xFFF)); 1381 } 1382 1383 void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, 1384 uint32_t Type, uint64_t P, uint64_t SA, 1385 uint64_t ZA, uint8_t *PairedLoc) const { 1386 switch (Type) { 1387 case R_AARCH64_ABS16: 1388 checkIntUInt<16>(SA, Type); 1389 write16le(Loc, SA); 1390 break; 1391 case R_AARCH64_ABS32: 1392 checkIntUInt<32>(SA, Type); 1393 write32le(Loc, SA); 1394 break; 1395 case R_AARCH64_ABS64: 1396 write64le(Loc, SA); 1397 break; 1398 case R_AARCH64_ADD_ABS_LO12_NC: 1399 // This relocation stores 12 bits and there's no instruction 1400 // to do it. Instead, we do a 32 bits store of the value 1401 // of r_addend bitwise-or'ed Loc. This assumes that the addend 1402 // bits in Loc are zero. 1403 or32le(Loc, (SA & 0xFFF) << 10); 1404 break; 1405 case R_AARCH64_ADR_GOT_PAGE: { 1406 uint64_t X = getAArch64Page(SA) - getAArch64Page(P); 1407 checkInt<33>(X, Type); 1408 updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12] 1409 break; 1410 } 1411 case R_AARCH64_ADR_PREL_LO21: { 1412 uint64_t X = SA - P; 1413 checkInt<21>(X, Type); 1414 updateAArch64Addr(Loc, X & 0x1FFFFF); 1415 break; 1416 } 1417 case R_AARCH64_ADR_PREL_PG_HI21: 1418 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: { 1419 uint64_t X = getAArch64Page(SA) - getAArch64Page(P); 1420 checkInt<33>(X, Type); 1421 updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12] 1422 break; 1423 } 1424 case R_AARCH64_CALL26: 1425 case R_AARCH64_JUMP26: { 1426 uint64_t X = SA - P; 1427 checkInt<28>(X, Type); 1428 or32le(Loc, (X & 0x0FFFFFFC) >> 2); 1429 break; 1430 } 1431 case R_AARCH64_CONDBR19: { 1432 uint64_t X = SA - P; 1433 checkInt<21>(X, Type); 1434 or32le(Loc, (X & 0x1FFFFC) << 3); 1435 break; 1436 } 1437 case R_AARCH64_LD64_GOT_LO12_NC: 1438 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1439 checkAlignment<8>(SA, Type); 1440 or32le(Loc, (SA & 0xFF8) << 7); 1441 break; 1442 case R_AARCH64_LDST128_ABS_LO12_NC: 1443 or32le(Loc, (SA & 0x0FF8) << 6); 1444 break; 1445 case R_AARCH64_LDST16_ABS_LO12_NC: 1446 or32le(Loc, (SA & 0x0FFC) << 9); 1447 break; 1448 case R_AARCH64_LDST8_ABS_LO12_NC: 1449 or32le(Loc, (SA & 0xFFF) << 10); 1450 break; 1451 case R_AARCH64_LDST32_ABS_LO12_NC: 1452 or32le(Loc, (SA & 0xFFC) << 8); 1453 break; 1454 case R_AARCH64_LDST64_ABS_LO12_NC: 1455 or32le(Loc, (SA & 0xFF8) << 7); 1456 break; 1457 case R_AARCH64_PREL16: 1458 checkIntUInt<16>(SA - P, Type); 1459 write16le(Loc, SA - P); 1460 break; 1461 case R_AARCH64_PREL32: 1462 checkIntUInt<32>(SA - P, Type); 1463 write32le(Loc, SA - P); 1464 break; 1465 case R_AARCH64_PREL64: 1466 write64le(Loc, SA - P); 1467 break; 1468 case R_AARCH64_TSTBR14: { 1469 uint64_t X = SA - P; 1470 checkInt<16>(X, Type); 1471 or32le(Loc, (X & 0xFFFC) << 3); 1472 break; 1473 } 1474 case R_AARCH64_TLSLE_ADD_TPREL_HI12: { 1475 uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA; 1476 checkInt<24>(V, Type); 1477 updateAArch64Add(Loc, (V & 0xFFF000) >> 12); 1478 break; 1479 } 1480 case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC: { 1481 uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA; 1482 updateAArch64Add(Loc, V & 0xFFF); 1483 break; 1484 } 1485 default: 1486 fatal("unrecognized reloc " + Twine(Type)); 1487 } 1488 } 1489 1490 size_t AArch64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, 1491 uint32_t Type, uint64_t P, 1492 uint64_t SA) const { 1493 // TLSDESC Global-Dynamic relocation are in the form: 1494 // adrp x0, :tlsdesc:v [R_AARCH64_TLSDESC_ADR_PAGE21] 1495 // ldr x1, [x0, #:tlsdesc_lo12:v [R_AARCH64_TLSDESC_LD64_LO12_NC] 1496 // add x0, x0, :tlsdesc_los:v [_AARCH64_TLSDESC_ADD_LO12_NC] 1497 // .tlsdesccall [R_AARCH64_TLSDESC_CALL] 1498 // And it can optimized to: 1499 // movz x0, #0x0, lsl #16 1500 // movk x0, #0x10 1501 // nop 1502 // nop 1503 uint64_t TPOff = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align); 1504 uint64_t X = SA + TPOff; 1505 checkUInt<32>(X, Type); 1506 1507 uint32_t NewInst; 1508 switch (Type) { 1509 case R_AARCH64_TLSDESC_ADD_LO12_NC: 1510 case R_AARCH64_TLSDESC_CALL: 1511 // nop 1512 NewInst = 0xd503201f; 1513 break; 1514 case R_AARCH64_TLSDESC_ADR_PAGE21: 1515 // movz 1516 NewInst = 0xd2a00000 | (((X >> 16) & 0xffff) << 5); 1517 break; 1518 case R_AARCH64_TLSDESC_LD64_LO12_NC: 1519 // movk 1520 NewInst = 0xf2800000 | ((X & 0xffff) << 5); 1521 break; 1522 default: 1523 llvm_unreachable("unsupported Relocation for TLS GD to LE relax"); 1524 } 1525 write32le(Loc, NewInst); 1526 1527 return 0; 1528 } 1529 1530 size_t AArch64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, 1531 uint32_t Type, uint64_t P, 1532 uint64_t SA) const { 1533 uint64_t TPOff = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align); 1534 uint64_t X = SA + TPOff; 1535 checkUInt<32>(X, Type); 1536 1537 uint32_t Inst = read32le(Loc); 1538 uint32_t NewInst; 1539 if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21) { 1540 // Generate movz. 1541 unsigned RegNo = (Inst & 0x1f); 1542 NewInst = (0xd2a00000 | RegNo) | (((X >> 16) & 0xffff) << 5); 1543 } else if (Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC) { 1544 // Generate movk 1545 unsigned RegNo = (Inst & 0x1f); 1546 NewInst = (0xf2800000 | RegNo) | ((X & 0xffff) << 5); 1547 } else { 1548 llvm_unreachable("invalid Relocation for TLS IE to LE Relax"); 1549 } 1550 write32le(Loc, NewInst); 1551 1552 return 0; 1553 } 1554 1555 // Implementing relocations for AMDGPU is low priority since most 1556 // programs don't use relocations now. Thus, this function is not 1557 // actually called (relocateOne is called for each relocation). 1558 // That's why the AMDGPU port works without implementing this function. 1559 void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1560 uint64_t P, uint64_t SA, uint64_t ZA, 1561 uint8_t *PairedLoc) const { 1562 llvm_unreachable("not implemented"); 1563 } 1564 1565 template <class ELFT> MipsTargetInfo<ELFT>::MipsTargetInfo() { 1566 GotHeaderEntriesNum = 2; 1567 GotPltHeaderEntriesNum = 2; 1568 PageSize = 65536; 1569 PltEntrySize = 16; 1570 PltZeroSize = 32; 1571 UseLazyBinding = true; 1572 CopyRel = R_MIPS_COPY; 1573 PltRel = R_MIPS_JUMP_SLOT; 1574 RelativeRel = R_MIPS_REL32; 1575 } 1576 1577 template <class ELFT> 1578 uint32_t MipsTargetInfo<ELFT>::getDynRel(uint32_t Type) const { 1579 if (Type == R_MIPS_32 || Type == R_MIPS_64) 1580 return R_MIPS_REL32; 1581 StringRef S = getELFRelocationTypeName(EM_MIPS, Type); 1582 error("relocation " + S + " cannot be used when making a shared object; " 1583 "recompile with -fPIC."); 1584 // Keep it going with a dummy value so that we can find more reloc errors. 1585 return R_MIPS_32; 1586 } 1587 1588 template <class ELFT> 1589 void MipsTargetInfo<ELFT>::writeGotHeader(uint8_t *Buf) const { 1590 typedef typename ELFT::Off Elf_Off; 1591 typedef typename ELFT::uint uintX_t; 1592 1593 // Set the MSB of the second GOT slot. This is not required by any 1594 // MIPS ABI documentation, though. 1595 // 1596 // There is a comment in glibc saying that "The MSB of got[1] of a 1597 // gnu object is set to identify gnu objects," and in GNU gold it 1598 // says "the second entry will be used by some runtime loaders". 1599 // But how this field is being used is unclear. 1600 // 1601 // We are not really willing to mimic other linkers behaviors 1602 // without understanding why they do that, but because all files 1603 // generated by GNU tools have this special GOT value, and because 1604 // we've been doing this for years, it is probably a safe bet to 1605 // keep doing this for now. We really need to revisit this to see 1606 // if we had to do this. 1607 auto *P = reinterpret_cast<Elf_Off *>(Buf); 1608 P[1] = uintX_t(1) << (ELFT::Is64Bits ? 63 : 31); 1609 } 1610 1611 template <class ELFT> 1612 void MipsTargetInfo<ELFT>::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 1613 write32<ELFT::TargetEndianness>(Buf, Out<ELFT>::Plt->getVA()); 1614 } 1615 1616 static uint16_t mipsHigh(uint64_t V) { return (V + 0x8000) >> 16; } 1617 1618 template <endianness E, uint8_t BSIZE, uint8_t SHIFT> 1619 static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t P, 1620 uint64_t S) { 1621 uint32_t Mask = 0xffffffff >> (32 - BSIZE); 1622 uint32_t Instr = read32<E>(Loc); 1623 int64_t A = SignExtend64<BSIZE + SHIFT>((Instr & Mask) << SHIFT); 1624 if (SHIFT > 0) 1625 checkAlignment<(1 << SHIFT)>(S + A, Type); 1626 int64_t V = S + A - P; 1627 checkInt<BSIZE + SHIFT>(V, Type); 1628 write32<E>(Loc, (Instr & ~Mask) | ((V >> SHIFT) & Mask)); 1629 } 1630 1631 template <endianness E> 1632 static void writeMipsHi16(uint8_t *Loc, uint64_t V) { 1633 uint32_t Instr = read32<E>(Loc); 1634 write32<E>(Loc, (Instr & 0xffff0000) | mipsHigh(V)); 1635 } 1636 1637 template <endianness E> 1638 static void writeMipsLo16(uint8_t *Loc, uint64_t V) { 1639 uint32_t Instr = read32<E>(Loc); 1640 write32<E>(Loc, (Instr & 0xffff0000) | (V & 0xffff)); 1641 } 1642 1643 template <endianness E> static int16_t readSignedLo16(uint8_t *Loc) { 1644 return SignExtend32<16>(read32<E>(Loc) & 0xffff); 1645 } 1646 1647 template <endianness E> 1648 static int64_t readMipsAHL(uint8_t *HiLoc, uint8_t *LoLoc) { 1649 return ((read32<E>(HiLoc) & 0xffff) << 16) + readSignedLo16<E>(LoLoc); 1650 } 1651 1652 template <class ELFT> 1653 void MipsTargetInfo<ELFT>::writePltZero(uint8_t *Buf) const { 1654 const endianness E = ELFT::TargetEndianness; 1655 write32<E>(Buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0]) 1656 write32<E>(Buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28) 1657 write32<E>(Buf + 8, 0x279c0000); // addiu $28, $28, %lo(&GOTPLT[0]) 1658 write32<E>(Buf + 12, 0x031cc023); // subu $24, $24, $28 1659 write32<E>(Buf + 16, 0x03e07825); // move $15, $31 1660 write32<E>(Buf + 20, 0x0018c082); // srl $24, $24, 2 1661 write32<E>(Buf + 24, 0x0320f809); // jalr $25 1662 write32<E>(Buf + 28, 0x2718fffe); // subu $24, $24, 2 1663 uint64_t Got = Out<ELFT>::GotPlt->getVA(); 1664 writeMipsHi16<E>(Buf, Got); 1665 writeMipsLo16<E>(Buf + 4, Got); 1666 writeMipsLo16<E>(Buf + 8, Got); 1667 } 1668 1669 template <class ELFT> 1670 void MipsTargetInfo<ELFT>::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1671 uint64_t PltEntryAddr, int32_t Index, 1672 unsigned RelOff) const { 1673 const endianness E = ELFT::TargetEndianness; 1674 write32<E>(Buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry) 1675 write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15) 1676 write32<E>(Buf + 8, 0x03200008); // jr $25 1677 write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry) 1678 writeMipsHi16<E>(Buf, GotEntryAddr); 1679 writeMipsLo16<E>(Buf + 4, GotEntryAddr); 1680 writeMipsLo16<E>(Buf + 12, GotEntryAddr); 1681 } 1682 1683 template <class ELFT> 1684 bool MipsTargetInfo<ELFT>::needsCopyRelImpl(uint32_t Type) const { 1685 return !isRelRelative(Type); 1686 } 1687 1688 template <class ELFT> 1689 bool MipsTargetInfo<ELFT>::needsGot(uint32_t Type, SymbolBody &S) const { 1690 return needsPlt(Type, S) || refersToGotEntry(Type); 1691 } 1692 1693 template <class ELFT> 1694 bool MipsTargetInfo<ELFT>::refersToGotEntry(uint32_t Type) const { 1695 return Type == R_MIPS_GOT16 || Type == R_MIPS_CALL16; 1696 } 1697 1698 template <class ELFT> 1699 bool MipsTargetInfo<ELFT>::needsPltImpl(uint32_t Type) const { 1700 return Type == R_MIPS_26; 1701 } 1702 1703 template <class ELFT> 1704 void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint8_t *BufEnd, 1705 uint32_t Type, uint64_t P, uint64_t S, 1706 uint64_t ZA, uint8_t *PairedLoc) const { 1707 const endianness E = ELFT::TargetEndianness; 1708 // Thread pointer and DRP offsets from the start of TLS data area. 1709 // https://www.linux-mips.org/wiki/NPTL 1710 const uint32_t TPOffset = 0x7000; 1711 const uint32_t DTPOffset = 0x8000; 1712 switch (Type) { 1713 case R_MIPS_32: 1714 add32<E>(Loc, S); 1715 break; 1716 case R_MIPS_26: { 1717 uint32_t Instr = read32<E>(Loc); 1718 // FIXME (simon): If the relocation target symbol is not a PLT entry 1719 // we should use another expression for calculation: 1720 // ((A << 2) | (P & 0xf0000000)) >> 2 1721 S += SignExtend64<28>((Instr & 0x3ffffff) << 2); 1722 write32<E>(Loc, (Instr & ~0x3ffffff) | (S >> 2)); 1723 break; 1724 } 1725 case R_MIPS_CALL16: 1726 case R_MIPS_GOT16: { 1727 int64_t V = S - getMipsGpAddr<ELFT>(); 1728 if (Type == R_MIPS_GOT16) 1729 checkInt<16>(V, Type); 1730 writeMipsLo16<E>(Loc, V); 1731 break; 1732 } 1733 case R_MIPS_GPREL16: { 1734 int64_t V = S + readSignedLo16<E>(Loc) - getMipsGpAddr<ELFT>(); 1735 checkInt<16>(V, Type); 1736 writeMipsLo16<E>(Loc, V); 1737 break; 1738 } 1739 case R_MIPS_GPREL32: 1740 write32<E>(Loc, S + int32_t(read32<E>(Loc)) - getMipsGpAddr<ELFT>()); 1741 break; 1742 case R_MIPS_HI16: 1743 if (PairedLoc) 1744 writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedLoc)); 1745 else { 1746 warning("can't find matching R_MIPS_LO16 relocation for R_MIPS_HI16"); 1747 writeMipsHi16<E>(Loc, S); 1748 } 1749 break; 1750 case R_MIPS_JALR: 1751 // Ignore this optimization relocation for now 1752 break; 1753 case R_MIPS_LO16: 1754 writeMipsLo16<E>(Loc, S + readSignedLo16<E>(Loc)); 1755 break; 1756 case R_MIPS_PC16: 1757 applyMipsPcReloc<E, 16, 2>(Loc, Type, P, S); 1758 break; 1759 case R_MIPS_PC19_S2: 1760 applyMipsPcReloc<E, 19, 2>(Loc, Type, P, S); 1761 break; 1762 case R_MIPS_PC21_S2: 1763 applyMipsPcReloc<E, 21, 2>(Loc, Type, P, S); 1764 break; 1765 case R_MIPS_PC26_S2: 1766 applyMipsPcReloc<E, 26, 2>(Loc, Type, P, S); 1767 break; 1768 case R_MIPS_PC32: 1769 applyMipsPcReloc<E, 32, 0>(Loc, Type, P, S); 1770 break; 1771 case R_MIPS_PCHI16: 1772 if (PairedLoc) 1773 writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedLoc) - P); 1774 else { 1775 warning("can't find matching R_MIPS_PCLO16 relocation for R_MIPS_PCHI16"); 1776 writeMipsHi16<E>(Loc, S - P); 1777 } 1778 break; 1779 case R_MIPS_PCLO16: 1780 writeMipsLo16<E>(Loc, S + readSignedLo16<E>(Loc) - P); 1781 break; 1782 case R_MIPS_TLS_DTPREL_HI16: 1783 writeMipsHi16<E>(Loc, S - DTPOffset + readSignedLo16<E>(Loc)); 1784 break; 1785 case R_MIPS_TLS_DTPREL_LO16: 1786 writeMipsLo16<E>(Loc, S - DTPOffset + readSignedLo16<E>(Loc)); 1787 break; 1788 case R_MIPS_TLS_TPREL_HI16: 1789 writeMipsHi16<E>(Loc, S - TPOffset + readSignedLo16<E>(Loc)); 1790 break; 1791 case R_MIPS_TLS_TPREL_LO16: 1792 writeMipsLo16<E>(Loc, S - TPOffset + readSignedLo16<E>(Loc)); 1793 break; 1794 default: 1795 fatal("unrecognized reloc " + Twine(Type)); 1796 } 1797 } 1798 1799 template <class ELFT> 1800 bool MipsTargetInfo<ELFT>::isHintRel(uint32_t Type) const { 1801 return Type == R_MIPS_JALR; 1802 } 1803 1804 template <class ELFT> 1805 bool MipsTargetInfo<ELFT>::isRelRelative(uint32_t Type) const { 1806 switch (Type) { 1807 default: 1808 return true; 1809 case R_MIPS_26: 1810 case R_MIPS_32: 1811 case R_MIPS_64: 1812 case R_MIPS_HI16: 1813 case R_MIPS_LO16: 1814 case R_MIPS_TLS_DTPREL_HI16: 1815 case R_MIPS_TLS_DTPREL_LO16: 1816 case R_MIPS_TLS_TPREL_HI16: 1817 case R_MIPS_TLS_TPREL_LO16: 1818 return false; 1819 } 1820 } 1821 1822 // _gp is a MIPS-specific ABI-defined symbol which points to 1823 // a location that is relative to GOT. This function returns 1824 // the value for the symbol. 1825 template <class ELFT> typename ELFT::uint getMipsGpAddr() { 1826 unsigned GPOffset = 0x7ff0; 1827 if (uint64_t V = Out<ELFT>::Got->getVA()) 1828 return V + GPOffset; 1829 return 0; 1830 } 1831 1832 template uint32_t getMipsGpAddr<ELF32LE>(); 1833 template uint32_t getMipsGpAddr<ELF32BE>(); 1834 template uint64_t getMipsGpAddr<ELF64LE>(); 1835 template uint64_t getMipsGpAddr<ELF64BE>(); 1836 1837 template bool TargetInfo::needsCopyRel<ELF32LE>(uint32_t, 1838 const SymbolBody &) const; 1839 template bool TargetInfo::needsCopyRel<ELF32BE>(uint32_t, 1840 const SymbolBody &) const; 1841 template bool TargetInfo::needsCopyRel<ELF64LE>(uint32_t, 1842 const SymbolBody &) const; 1843 template bool TargetInfo::needsCopyRel<ELF64BE>(uint32_t, 1844 const SymbolBody &) const; 1845 } 1846 } 1847