1 //===- Target.cpp ---------------------------------------------------------===// 2 // 3 // The LLVM Linker 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Machine-specific things, such as applying relocations, creation of 11 // GOT or PLT entries, etc., are handled in this file. 12 // 13 // Refer the ELF spec for the single letter varaibles, S, A or P, used 14 // in this file. SA is S+A. 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "Target.h" 19 #include "Error.h" 20 #include "OutputSections.h" 21 #include "Symbols.h" 22 23 #include "llvm/ADT/ArrayRef.h" 24 #include "llvm/Object/ELF.h" 25 #include "llvm/Support/Endian.h" 26 #include "llvm/Support/ELF.h" 27 28 using namespace llvm; 29 using namespace llvm::object; 30 using namespace llvm::support::endian; 31 using namespace llvm::ELF; 32 33 namespace lld { 34 namespace elf { 35 36 TargetInfo *Target; 37 38 template <endianness E> static void add32(void *P, int32_t V) { 39 write32<E>(P, read32<E>(P) + V); 40 } 41 42 static void add32le(uint8_t *P, int32_t V) { add32<support::little>(P, V); } 43 static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); } 44 45 template <unsigned N> static void checkInt(int64_t V, uint32_t Type) { 46 if (isInt<N>(V)) 47 return; 48 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 49 error("relocation " + S + " out of range"); 50 } 51 52 template <unsigned N> static void checkUInt(uint64_t V, uint32_t Type) { 53 if (isUInt<N>(V)) 54 return; 55 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 56 error("relocation " + S + " out of range"); 57 } 58 59 template <unsigned N> static void checkIntUInt(uint64_t V, uint32_t Type) { 60 if (isInt<N>(V) || isUInt<N>(V)) 61 return; 62 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 63 error("relocation " + S + " out of range"); 64 } 65 66 template <unsigned N> static void checkAlignment(uint64_t V, uint32_t Type) { 67 if ((V & (N - 1)) == 0) 68 return; 69 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 70 error("improper alignment for relocation " + S); 71 } 72 73 namespace { 74 class X86TargetInfo final : public TargetInfo { 75 public: 76 X86TargetInfo(); 77 void writeGotPltHeader(uint8_t *Buf) const override; 78 uint32_t getDynRel(uint32_t Type) const override; 79 uint32_t getTlsGotRel(uint32_t Type) const override; 80 bool pointsToLocalDynamicGotEntry(uint32_t Type) const override; 81 bool isTlsLocalDynamicRel(uint32_t Type) const override; 82 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 83 bool isTlsInitialExecRel(uint32_t Type) const override; 84 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 85 void writePltZero(uint8_t *Buf) const override; 86 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 87 int32_t Index, unsigned RelOff) const override; 88 bool needsCopyRelImpl(uint32_t Type) const override; 89 bool needsDynRelative(uint32_t Type) const override; 90 bool needsGot(uint32_t Type, SymbolBody &S) const override; 91 bool needsPltImpl(uint32_t Type) const override; 92 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 93 uint64_t SA, uint64_t ZA = 0, 94 uint8_t *PairedLoc = nullptr) const override; 95 size_t relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 96 uint64_t SA, const SymbolBody &S) const override; 97 bool isGotRelative(uint32_t Type) const override; 98 bool refersToGotEntry(uint32_t Type) const override; 99 100 private: 101 void relocateTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 102 uint64_t SA) const; 103 void relocateTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 104 uint64_t SA) const; 105 void relocateTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 106 uint64_t SA) const; 107 void relocateTlsIeToLe(uint32_t Type, uint8_t *Loc, uint8_t *BufEnd, 108 uint64_t P, uint64_t SA) const; 109 }; 110 111 class X86_64TargetInfo final : public TargetInfo { 112 public: 113 X86_64TargetInfo(); 114 uint32_t getTlsGotRel(uint32_t Type) const override; 115 bool pointsToLocalDynamicGotEntry(uint32_t Type) const override; 116 bool isTlsLocalDynamicRel(uint32_t Type) const override; 117 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 118 bool isTlsInitialExecRel(uint32_t Type) const override; 119 void writeGotPltHeader(uint8_t *Buf) const override; 120 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 121 void writePltZero(uint8_t *Buf) const override; 122 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 123 int32_t Index, unsigned RelOff) const override; 124 bool needsCopyRelImpl(uint32_t Type) const override; 125 bool needsGot(uint32_t Type, SymbolBody &S) const override; 126 bool refersToGotEntry(uint32_t Type) const override; 127 bool needsPltImpl(uint32_t Type) const override; 128 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 129 uint64_t SA, uint64_t ZA = 0, 130 uint8_t *PairedLoc = nullptr) const override; 131 bool isRelRelative(uint32_t Type) const override; 132 bool isSizeRel(uint32_t Type) const override; 133 size_t relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 134 uint64_t SA, const SymbolBody &S) const override; 135 136 private: 137 void relocateTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 138 uint64_t SA) const; 139 void relocateTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 140 uint64_t SA) const; 141 void relocateTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 142 uint64_t SA) const; 143 void relocateTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 144 uint64_t SA) const; 145 }; 146 147 class PPCTargetInfo final : public TargetInfo { 148 public: 149 PPCTargetInfo(); 150 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 151 uint64_t SA, uint64_t ZA = 0, 152 uint8_t *PairedLoc = nullptr) const override; 153 bool isRelRelative(uint32_t Type) const override; 154 }; 155 156 class PPC64TargetInfo final : public TargetInfo { 157 public: 158 PPC64TargetInfo(); 159 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 160 int32_t Index, unsigned RelOff) const override; 161 bool needsGot(uint32_t Type, SymbolBody &S) const override; 162 bool needsPltImpl(uint32_t Type) const override; 163 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 164 uint64_t SA, uint64_t ZA = 0, 165 uint8_t *PairedLoc = nullptr) const override; 166 bool isRelRelative(uint32_t Type) const override; 167 }; 168 169 class AArch64TargetInfo final : public TargetInfo { 170 public: 171 AArch64TargetInfo(); 172 uint32_t getDynRel(uint32_t Type) const override; 173 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 174 bool isTlsInitialExecRel(uint32_t Type) const override; 175 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 176 void writePltZero(uint8_t *Buf) const override; 177 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 178 int32_t Index, unsigned RelOff) const override; 179 uint32_t getTlsGotRel(uint32_t Type) const override; 180 bool isRelRelative(uint32_t Type) const override; 181 bool needsCopyRelImpl(uint32_t Type) const override; 182 bool needsGot(uint32_t Type, SymbolBody &S) const override; 183 bool needsPltImpl(uint32_t Type) const override; 184 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 185 uint64_t SA, uint64_t ZA = 0, 186 uint8_t *PairedLoc = nullptr) const override; 187 size_t relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 188 uint64_t SA, const SymbolBody &S) const override; 189 190 private: 191 void relocateTlsGdToLe(uint32_t Type, uint8_t *Loc, uint8_t *BufEnd, 192 uint64_t P, uint64_t SA) const; 193 void relocateTlsIeToLe(uint32_t Type, uint8_t *Loc, uint8_t *BufEnd, 194 uint64_t P, uint64_t SA) const; 195 196 static const uint64_t TcbSize = 16; 197 }; 198 199 class AMDGPUTargetInfo final : public TargetInfo { 200 public: 201 AMDGPUTargetInfo() {} 202 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 203 uint64_t SA, uint64_t ZA = 0, 204 uint8_t *PairedLoc = nullptr) const override; 205 }; 206 207 template <class ELFT> class MipsTargetInfo final : public TargetInfo { 208 public: 209 MipsTargetInfo(); 210 uint32_t getDynRel(uint32_t Type) const override; 211 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 212 void writePltZero(uint8_t *Buf) const override; 213 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 214 int32_t Index, unsigned RelOff) const override; 215 void writeGotHeader(uint8_t *Buf) const override; 216 bool needsCopyRelImpl(uint32_t Type) const override; 217 bool needsGot(uint32_t Type, SymbolBody &S) const override; 218 bool needsPltImpl(uint32_t Type) const override; 219 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 220 uint64_t S, uint64_t ZA = 0, 221 uint8_t *PairedLoc = nullptr) const override; 222 bool isHintRel(uint32_t Type) const override; 223 bool isRelRelative(uint32_t Type) const override; 224 bool refersToGotEntry(uint32_t Type) const override; 225 }; 226 } // anonymous namespace 227 228 TargetInfo *createTarget() { 229 switch (Config->EMachine) { 230 case EM_386: 231 return new X86TargetInfo(); 232 case EM_AARCH64: 233 return new AArch64TargetInfo(); 234 case EM_AMDGPU: 235 return new AMDGPUTargetInfo(); 236 case EM_MIPS: 237 switch (Config->EKind) { 238 case ELF32LEKind: 239 return new MipsTargetInfo<ELF32LE>(); 240 case ELF32BEKind: 241 return new MipsTargetInfo<ELF32BE>(); 242 default: 243 fatal("unsupported MIPS target"); 244 } 245 case EM_PPC: 246 return new PPCTargetInfo(); 247 case EM_PPC64: 248 return new PPC64TargetInfo(); 249 case EM_X86_64: 250 return new X86_64TargetInfo(); 251 } 252 fatal("unknown target machine"); 253 } 254 255 TargetInfo::~TargetInfo() {} 256 257 bool TargetInfo::canRelaxTls(uint32_t Type, const SymbolBody *S) const { 258 if (Config->Shared || (S && !S->IsTls)) 259 return false; 260 261 // We know we are producing an executable. 262 263 // Global-Dynamic relocs can be relaxed to Initial-Exec or Local-Exec 264 // depending on the symbol being locally defined or not. 265 if (isTlsGlobalDynamicRel(Type)) 266 return true; 267 268 // Local-Dynamic relocs can be relaxed to Local-Exec. 269 if (isTlsLocalDynamicRel(Type)) 270 return true; 271 272 // Initial-Exec relocs can be relaxed to Local-Exec if the symbol is locally 273 // defined. 274 if (isTlsInitialExecRel(Type)) 275 return !S->isPreemptible(); 276 277 return false; 278 } 279 280 uint64_t TargetInfo::getVAStart() const { return Config->Shared ? 0 : VAStart; } 281 282 bool TargetInfo::needsCopyRelImpl(uint32_t Type) const { return false; } 283 284 template <typename ELFT> static bool mayNeedCopy(const SymbolBody &S) { 285 if (Config->Shared) 286 return false; 287 auto *SS = dyn_cast<SharedSymbol<ELFT>>(&S); 288 if (!SS) 289 return false; 290 return SS->Sym.getType() == STT_OBJECT; 291 } 292 293 template <class ELFT> 294 bool TargetInfo::needsCopyRel(uint32_t Type, const SymbolBody &S) const { 295 return mayNeedCopy<ELFT>(S) && needsCopyRelImpl(Type); 296 } 297 298 bool TargetInfo::isGotRelative(uint32_t Type) const { return false; } 299 bool TargetInfo::isHintRel(uint32_t Type) const { return false; } 300 bool TargetInfo::isRelRelative(uint32_t Type) const { return true; } 301 bool TargetInfo::isSizeRel(uint32_t Type) const { return false; } 302 303 bool TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { return false; } 304 305 bool TargetInfo::needsPltImpl(uint32_t Type) const { return false; } 306 307 bool TargetInfo::refersToGotEntry(uint32_t Type) const { return false; } 308 309 template <class ELFT> 310 TargetInfo::PltNeed TargetInfo::needsPlt(uint32_t Type, 311 const SymbolBody &S) const { 312 if (S.isGnuIfunc<ELFT>()) 313 return Plt_Explicit; 314 if (S.isPreemptible() && needsPltImpl(Type)) 315 return Plt_Explicit; 316 317 // This handles a non PIC program call to function in a shared library. 318 // In an ideal world, we could just report an error saying the relocation 319 // can overflow at runtime. 320 // In the real world with glibc, crt1.o has a R_X86_64_PC32 pointing to 321 // libc.so. 322 // 323 // The general idea on how to handle such cases is to create a PLT entry 324 // and use that as the function value. 325 // 326 // For the static linking part, we just return true and everything else 327 // will use the the PLT entry as the address. 328 // 329 // The remaining problem is making sure pointer equality still works. We 330 // need the help of the dynamic linker for that. We let it know that we have 331 // a direct reference to a so symbol by creating an undefined symbol with a 332 // non zero st_value. Seeing that, the dynamic linker resolves the symbol to 333 // the value of the symbol we created. This is true even for got entries, so 334 // pointer equality is maintained. To avoid an infinite loop, the only entry 335 // that points to the real function is a dedicated got entry used by the 336 // plt. That is identified by special relocation types (R_X86_64_JUMP_SLOT, 337 // R_386_JMP_SLOT, etc). 338 if (auto *SS = dyn_cast<SharedSymbol<ELFT>>(&S)) 339 if (!Config->Shared && SS->Sym.getType() == STT_FUNC && 340 !refersToGotEntry(Type)) 341 return Plt_Implicit; 342 343 return Plt_No; 344 } 345 346 bool TargetInfo::isTlsInitialExecRel(uint32_t Type) const { return false; } 347 348 bool TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 349 return false; 350 } 351 352 bool TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { return false; } 353 354 bool TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 355 return false; 356 } 357 358 size_t TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 359 uint64_t P, uint64_t SA, 360 const SymbolBody &S) const { 361 return 0; 362 } 363 364 X86TargetInfo::X86TargetInfo() { 365 CopyRel = R_386_COPY; 366 GotRel = R_386_GLOB_DAT; 367 PltRel = R_386_JUMP_SLOT; 368 IRelativeRel = R_386_IRELATIVE; 369 RelativeRel = R_386_RELATIVE; 370 TlsGotRel = R_386_TLS_TPOFF; 371 TlsModuleIndexRel = R_386_TLS_DTPMOD32; 372 TlsOffsetRel = R_386_TLS_DTPOFF32; 373 UseLazyBinding = true; 374 PltEntrySize = 16; 375 PltZeroSize = 16; 376 } 377 378 void X86TargetInfo::writeGotPltHeader(uint8_t *Buf) const { 379 write32le(Buf, Out<ELF32LE>::Dynamic->getVA()); 380 } 381 382 void X86TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 383 // Entries in .got.plt initially points back to the corresponding 384 // PLT entries with a fixed offset to skip the first instruction. 385 write32le(Buf, Plt + 6); 386 } 387 388 uint32_t X86TargetInfo::getDynRel(uint32_t Type) const { 389 if (Type == R_386_TLS_LE) 390 return R_386_TLS_TPOFF; 391 if (Type == R_386_TLS_LE_32) 392 return R_386_TLS_TPOFF32; 393 return Type; 394 } 395 396 uint32_t X86TargetInfo::getTlsGotRel(uint32_t Type) const { 397 if (Type == R_386_TLS_IE) 398 return Type; 399 return TlsGotRel; 400 } 401 402 bool X86TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 403 return Type == R_386_TLS_GD; 404 } 405 406 bool X86TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { 407 return Type == R_386_TLS_LDO_32 || Type == R_386_TLS_LDM; 408 } 409 410 bool X86TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 411 return Type == R_386_TLS_LDM; 412 } 413 414 bool X86TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 415 return Type == R_386_TLS_IE || Type == R_386_TLS_GOTIE; 416 } 417 418 void X86TargetInfo::writePltZero(uint8_t *Buf) const { 419 // Executable files and shared object files have 420 // separate procedure linkage tables. 421 if (Config->Shared) { 422 const uint8_t V[] = { 423 0xff, 0xb3, 0x04, 0x00, 0x00, 0x00, // pushl 4(%ebx) 424 0xff, 0xa3, 0x08, 0x00, 0x00, 0x00, // jmp *8(%ebx) 425 0x90, 0x90, 0x90, 0x90 // nop; nop; nop; nop 426 }; 427 memcpy(Buf, V, sizeof(V)); 428 return; 429 } 430 431 const uint8_t PltData[] = { 432 0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushl (GOT+4) 433 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *(GOT+8) 434 0x90, 0x90, 0x90, 0x90 // nop; nop; nop; nop 435 }; 436 memcpy(Buf, PltData, sizeof(PltData)); 437 uint32_t Got = Out<ELF32LE>::GotPlt->getVA(); 438 write32le(Buf + 2, Got + 4); 439 write32le(Buf + 8, Got + 8); 440 } 441 442 void X86TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 443 uint64_t PltEntryAddr, int32_t Index, 444 unsigned RelOff) const { 445 const uint8_t Inst[] = { 446 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, // jmp *foo_in_GOT|*foo@GOT(%ebx) 447 0x68, 0x00, 0x00, 0x00, 0x00, // pushl $reloc_offset 448 0xe9, 0x00, 0x00, 0x00, 0x00 // jmp .PLT0@PC 449 }; 450 memcpy(Buf, Inst, sizeof(Inst)); 451 452 // jmp *foo@GOT(%ebx) or jmp *foo_in_GOT 453 Buf[1] = Config->Shared ? 0xa3 : 0x25; 454 uint32_t Got = UseLazyBinding ? Out<ELF32LE>::GotPlt->getVA() 455 : Out<ELF32LE>::Got->getVA(); 456 write32le(Buf + 2, Config->Shared ? GotEntryAddr - Got : GotEntryAddr); 457 write32le(Buf + 7, RelOff); 458 write32le(Buf + 12, -Index * PltEntrySize - PltZeroSize - 16); 459 } 460 461 bool X86TargetInfo::needsCopyRelImpl(uint32_t Type) const { 462 return Type == R_386_32 || Type == R_386_16 || Type == R_386_8; 463 } 464 465 bool X86TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 466 if (S.IsTls && Type == R_386_TLS_GD) 467 return Target->canRelaxTls(Type, &S) && S.isPreemptible(); 468 if (Type == R_386_TLS_GOTIE || Type == R_386_TLS_IE) 469 return !canRelaxTls(Type, &S); 470 return Type == R_386_GOT32 || needsPlt<ELF32LE>(Type, S); 471 } 472 473 bool X86TargetInfo::needsPltImpl(uint32_t Type) const { 474 return Type == R_386_PLT32; 475 } 476 477 bool X86TargetInfo::isGotRelative(uint32_t Type) const { 478 // This relocation does not require got entry, 479 // but it is relative to got and needs it to be created. 480 // Here we request for that. 481 return Type == R_386_GOTOFF; 482 } 483 484 bool X86TargetInfo::refersToGotEntry(uint32_t Type) const { 485 return Type == R_386_GOT32; 486 } 487 488 void X86TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 489 uint64_t P, uint64_t SA, uint64_t ZA, 490 uint8_t *PairedLoc) const { 491 switch (Type) { 492 case R_386_32: 493 add32le(Loc, SA); 494 break; 495 case R_386_GOT32: { 496 uint64_t V = SA - Out<ELF32LE>::Got->getVA() - 497 Out<ELF32LE>::Got->getNumEntries() * 4; 498 checkInt<32>(V, Type); 499 add32le(Loc, V); 500 break; 501 } 502 case R_386_GOTOFF: 503 add32le(Loc, SA - Out<ELF32LE>::Got->getVA()); 504 break; 505 case R_386_GOTPC: 506 add32le(Loc, SA + Out<ELF32LE>::Got->getVA() - P); 507 break; 508 case R_386_PC32: 509 case R_386_PLT32: 510 add32le(Loc, SA - P); 511 break; 512 case R_386_TLS_GD: 513 case R_386_TLS_LDM: 514 case R_386_TLS_TPOFF: { 515 uint64_t V = SA - Out<ELF32LE>::Got->getVA() - 516 Out<ELF32LE>::Got->getNumEntries() * 4; 517 checkInt<32>(V, Type); 518 write32le(Loc, V); 519 break; 520 } 521 case R_386_TLS_IE: 522 case R_386_TLS_LDO_32: 523 write32le(Loc, SA); 524 break; 525 case R_386_TLS_LE: 526 write32le(Loc, SA - Out<ELF32LE>::TlsPhdr->p_memsz); 527 break; 528 case R_386_TLS_LE_32: 529 write32le(Loc, Out<ELF32LE>::TlsPhdr->p_memsz - SA); 530 break; 531 default: 532 fatal("unrecognized reloc " + Twine(Type)); 533 } 534 } 535 536 bool X86TargetInfo::needsDynRelative(uint32_t Type) const { 537 return Config->Shared && Type == R_386_TLS_IE; 538 } 539 540 size_t X86TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 541 uint64_t P, uint64_t SA, 542 const SymbolBody &S) const { 543 switch (Type) { 544 case R_386_TLS_GD: 545 if (S.isPreemptible()) 546 relocateTlsGdToIe(Loc, BufEnd, P, SA); 547 else 548 relocateTlsGdToLe(Loc, BufEnd, P, SA); 549 // The next relocation should be against __tls_get_addr, so skip it 550 return 1; 551 case R_386_TLS_GOTIE: 552 case R_386_TLS_IE: 553 relocateTlsIeToLe(Type, Loc, BufEnd, P, SA); 554 return 0; 555 case R_386_TLS_LDM: 556 relocateTlsLdToLe(Loc, BufEnd, P, SA); 557 // The next relocation should be against __tls_get_addr, so skip it 558 return 1; 559 case R_386_TLS_LDO_32: 560 relocateOne(Loc, BufEnd, R_386_TLS_LE, P, SA); 561 return 0; 562 } 563 llvm_unreachable("unknown TLS optimization"); 564 } 565 566 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.1 567 // IA-32 Linker Optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 568 // how GD can be optimized to IE: 569 // leal x@tlsgd(, %ebx, 1), 570 // call __tls_get_addr@plt 571 // Is converted to: 572 // movl %gs:0, %eax 573 // addl x@gotntpoff(%ebx), %eax 574 void X86TargetInfo::relocateTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 575 uint64_t SA) const { 576 const uint8_t Inst[] = { 577 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax 578 0x03, 0x83, 0x00, 0x00, 0x00, 0x00 // addl 0(%ebx), %eax 579 }; 580 memcpy(Loc - 3, Inst, sizeof(Inst)); 581 relocateOne(Loc + 5, BufEnd, R_386_32, P, 582 SA - Out<ELF32LE>::Got->getVA() - 583 Out<ELF32LE>::Got->getNumEntries() * 4); 584 } 585 586 // GD can be optimized to LE: 587 // leal x@tlsgd(, %ebx, 1), 588 // call __tls_get_addr@plt 589 // Can be converted to: 590 // movl %gs:0,%eax 591 // addl $x@ntpoff,%eax 592 // But gold emits subl $foo@tpoff,%eax instead of addl. 593 // These instructions are completely equal in behavior. 594 // This method generates subl to be consistent with gold. 595 void X86TargetInfo::relocateTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 596 uint64_t SA) const { 597 const uint8_t Inst[] = { 598 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax 599 0x81, 0xe8, 0x00, 0x00, 0x00, 0x00 // subl 0(%ebx), %eax 600 }; 601 memcpy(Loc - 3, Inst, sizeof(Inst)); 602 relocateOne(Loc + 5, BufEnd, R_386_32, P, 603 Out<ELF32LE>::TlsPhdr->p_memsz - SA); 604 } 605 606 // LD can be optimized to LE: 607 // leal foo(%reg),%eax 608 // call ___tls_get_addr 609 // Is converted to: 610 // movl %gs:0,%eax 611 // nop 612 // leal 0(%esi,1),%esi 613 void X86TargetInfo::relocateTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 614 uint64_t SA) const { 615 const uint8_t Inst[] = { 616 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0,%eax 617 0x90, // nop 618 0x8d, 0x74, 0x26, 0x00 // leal 0(%esi,1),%esi 619 }; 620 memcpy(Loc - 2, Inst, sizeof(Inst)); 621 } 622 623 // In some conditions, relocations can be optimized to avoid using GOT. 624 // This function does that for Initial Exec to Local Exec case. 625 // Read "ELF Handling For Thread-Local Storage, 5.1 626 // IA-32 Linker Optimizations" (http://www.akkadia.org/drepper/tls.pdf) 627 // by Ulrich Drepper for details. 628 void X86TargetInfo::relocateTlsIeToLe(uint32_t Type, uint8_t *Loc, 629 uint8_t *BufEnd, uint64_t P, 630 uint64_t SA) const { 631 // Ulrich's document section 6.2 says that @gotntpoff can 632 // be used with MOVL or ADDL instructions. 633 // @indntpoff is similar to @gotntpoff, but for use in 634 // position dependent code. 635 uint8_t *Inst = Loc - 2; 636 uint8_t *Op = Loc - 1; 637 uint8_t Reg = (Loc[-1] >> 3) & 7; 638 bool IsMov = *Inst == 0x8b; 639 if (Type == R_386_TLS_IE) { 640 // For R_386_TLS_IE relocation we perform the next transformations: 641 // MOVL foo@INDNTPOFF,%EAX is transformed to MOVL $foo,%EAX 642 // MOVL foo@INDNTPOFF,%REG is transformed to MOVL $foo,%REG 643 // ADDL foo@INDNTPOFF,%REG is transformed to ADDL $foo,%REG 644 // First one is special because when EAX is used the sequence is 5 bytes 645 // long, otherwise it is 6 bytes. 646 if (*Op == 0xa1) { 647 *Op = 0xb8; 648 } else { 649 *Inst = IsMov ? 0xc7 : 0x81; 650 *Op = 0xc0 | ((*Op >> 3) & 7); 651 } 652 } else { 653 // R_386_TLS_GOTIE relocation can be optimized to 654 // R_386_TLS_LE so that it does not use GOT. 655 // "MOVL foo@GOTTPOFF(%RIP), %REG" is transformed to "MOVL $foo, %REG". 656 // "ADDL foo@GOTNTPOFF(%RIP), %REG" is transformed to "LEAL foo(%REG), %REG" 657 // Note: gold converts to ADDL instead of LEAL. 658 *Inst = IsMov ? 0xc7 : 0x8d; 659 if (IsMov) 660 *Op = 0xc0 | ((*Op >> 3) & 7); 661 else 662 *Op = 0x80 | Reg | (Reg << 3); 663 } 664 relocateOne(Loc, BufEnd, R_386_TLS_LE, P, SA); 665 } 666 667 X86_64TargetInfo::X86_64TargetInfo() { 668 CopyRel = R_X86_64_COPY; 669 GotRel = R_X86_64_GLOB_DAT; 670 PltRel = R_X86_64_JUMP_SLOT; 671 RelativeRel = R_X86_64_RELATIVE; 672 IRelativeRel = R_X86_64_IRELATIVE; 673 TlsGotRel = R_X86_64_TPOFF64; 674 TlsModuleIndexRel = R_X86_64_DTPMOD64; 675 TlsOffsetRel = R_X86_64_DTPOFF64; 676 UseLazyBinding = true; 677 PltEntrySize = 16; 678 PltZeroSize = 16; 679 } 680 681 void X86_64TargetInfo::writeGotPltHeader(uint8_t *Buf) const { 682 write64le(Buf, Out<ELF64LE>::Dynamic->getVA()); 683 } 684 685 void X86_64TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 686 // See comments in X86TargetInfo::writeGotPlt. 687 write32le(Buf, Plt + 6); 688 } 689 690 void X86_64TargetInfo::writePltZero(uint8_t *Buf) const { 691 const uint8_t PltData[] = { 692 0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushq GOT+8(%rip) 693 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *GOT+16(%rip) 694 0x0f, 0x1f, 0x40, 0x00 // nopl 0x0(rax) 695 }; 696 memcpy(Buf, PltData, sizeof(PltData)); 697 uint64_t Got = Out<ELF64LE>::GotPlt->getVA(); 698 uint64_t Plt = Out<ELF64LE>::Plt->getVA(); 699 write32le(Buf + 2, Got - Plt + 2); // GOT+8 700 write32le(Buf + 8, Got - Plt + 4); // GOT+16 701 } 702 703 void X86_64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 704 uint64_t PltEntryAddr, int32_t Index, 705 unsigned RelOff) const { 706 const uint8_t Inst[] = { 707 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmpq *got(%rip) 708 0x68, 0x00, 0x00, 0x00, 0x00, // pushq <relocation index> 709 0xe9, 0x00, 0x00, 0x00, 0x00 // jmpq plt[0] 710 }; 711 memcpy(Buf, Inst, sizeof(Inst)); 712 713 write32le(Buf + 2, GotEntryAddr - PltEntryAddr - 6); 714 write32le(Buf + 7, Index); 715 write32le(Buf + 12, -Index * PltEntrySize - PltZeroSize - 16); 716 } 717 718 bool X86_64TargetInfo::needsCopyRelImpl(uint32_t Type) const { 719 return Type == R_X86_64_32S || Type == R_X86_64_32 || Type == R_X86_64_PC32 || 720 Type == R_X86_64_64; 721 } 722 723 bool X86_64TargetInfo::refersToGotEntry(uint32_t Type) const { 724 return Type == R_X86_64_GOTPCREL; 725 } 726 727 bool X86_64TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 728 if (Type == R_X86_64_TLSGD) 729 return Target->canRelaxTls(Type, &S) && S.isPreemptible(); 730 if (Type == R_X86_64_GOTTPOFF) 731 return !canRelaxTls(Type, &S); 732 return refersToGotEntry(Type) || needsPlt<ELF64LE>(Type, S); 733 } 734 735 uint32_t X86_64TargetInfo::getTlsGotRel(uint32_t Type) const { 736 // No other types of TLS relocations requiring GOT should 737 // reach here. 738 assert(Type == R_X86_64_GOTTPOFF); 739 return R_X86_64_PC32; 740 } 741 742 bool X86_64TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 743 return Type == R_X86_64_GOTTPOFF; 744 } 745 746 bool X86_64TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 747 return Type == R_X86_64_TLSGD; 748 } 749 750 bool X86_64TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 751 return Type == R_X86_64_TLSLD; 752 } 753 754 bool X86_64TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { 755 return Type == R_X86_64_DTPOFF32 || Type == R_X86_64_DTPOFF64 || 756 Type == R_X86_64_TLSLD; 757 } 758 759 bool X86_64TargetInfo::needsPltImpl(uint32_t Type) const { 760 return Type == R_X86_64_PLT32; 761 } 762 763 bool X86_64TargetInfo::isRelRelative(uint32_t Type) const { 764 switch (Type) { 765 default: 766 return false; 767 case R_X86_64_DTPOFF32: 768 case R_X86_64_DTPOFF64: 769 case R_X86_64_PC8: 770 case R_X86_64_PC16: 771 case R_X86_64_PC32: 772 case R_X86_64_PC64: 773 case R_X86_64_PLT32: 774 return true; 775 } 776 } 777 778 bool X86_64TargetInfo::isSizeRel(uint32_t Type) const { 779 return Type == R_X86_64_SIZE32 || Type == R_X86_64_SIZE64; 780 } 781 782 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 783 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 784 // how LD can be optimized to LE: 785 // leaq bar@tlsld(%rip), %rdi 786 // callq __tls_get_addr@PLT 787 // leaq bar@dtpoff(%rax), %rcx 788 // Is converted to: 789 // .word 0x6666 790 // .byte 0x66 791 // mov %fs:0,%rax 792 // leaq bar@tpoff(%rax), %rcx 793 void X86_64TargetInfo::relocateTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, 794 uint64_t P, uint64_t SA) const { 795 const uint8_t Inst[] = { 796 0x66, 0x66, //.word 0x6666 797 0x66, //.byte 0x66 798 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00 // mov %fs:0,%rax 799 }; 800 memcpy(Loc - 3, Inst, sizeof(Inst)); 801 } 802 803 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 804 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 805 // how GD can be optimized to LE: 806 // .byte 0x66 807 // leaq x@tlsgd(%rip), %rdi 808 // .word 0x6666 809 // rex64 810 // call __tls_get_addr@plt 811 // Is converted to: 812 // mov %fs:0x0,%rax 813 // lea x@tpoff,%rax 814 void X86_64TargetInfo::relocateTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, 815 uint64_t P, uint64_t SA) const { 816 const uint8_t Inst[] = { 817 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax 818 0x48, 0x8d, 0x80, 0x00, 0x00, 0x00, 0x00 // lea x@tpoff,%rax 819 }; 820 memcpy(Loc - 4, Inst, sizeof(Inst)); 821 relocateOne(Loc + 8, BufEnd, R_X86_64_TPOFF32, P, SA); 822 } 823 824 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 825 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 826 // how GD can be optimized to IE: 827 // .byte 0x66 828 // leaq x@tlsgd(%rip), %rdi 829 // .word 0x6666 830 // rex64 831 // call __tls_get_addr@plt 832 // Is converted to: 833 // mov %fs:0x0,%rax 834 // addq x@tpoff,%rax 835 void X86_64TargetInfo::relocateTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, 836 uint64_t P, uint64_t SA) const { 837 const uint8_t Inst[] = { 838 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax 839 0x48, 0x03, 0x05, 0x00, 0x00, 0x00, 0x00 // addq x@tpoff,%rax 840 }; 841 memcpy(Loc - 4, Inst, sizeof(Inst)); 842 relocateOne(Loc + 8, BufEnd, R_X86_64_PC32, P + 12, SA); 843 } 844 845 // In some conditions, R_X86_64_GOTTPOFF relocation can be optimized to 846 // R_X86_64_TPOFF32 so that it does not use GOT. 847 // This function does that. Read "ELF Handling For Thread-Local Storage, 848 // 5.5 x86-x64 linker optimizations" (http://www.akkadia.org/drepper/tls.pdf) 849 // by Ulrich Drepper for details. 850 void X86_64TargetInfo::relocateTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, 851 uint64_t P, uint64_t SA) const { 852 // Ulrich's document section 6.5 says that @gottpoff(%rip) must be 853 // used in MOVQ or ADDQ instructions only. 854 // "MOVQ foo@GOTTPOFF(%RIP), %REG" is transformed to "MOVQ $foo, %REG". 855 // "ADDQ foo@GOTTPOFF(%RIP), %REG" is transformed to "LEAQ foo(%REG), %REG" 856 // (if the register is not RSP/R12) or "ADDQ $foo, %RSP". 857 // Opcodes info can be found at http://ref.x86asm.net/coder64.html#x48. 858 uint8_t *Prefix = Loc - 3; 859 uint8_t *Inst = Loc - 2; 860 uint8_t *RegSlot = Loc - 1; 861 uint8_t Reg = Loc[-1] >> 3; 862 bool IsMov = *Inst == 0x8b; 863 bool RspAdd = !IsMov && Reg == 4; 864 // r12 and rsp registers requires special handling. 865 // Problem is that for other registers, for example leaq 0xXXXXXXXX(%r11),%r11 866 // result out is 7 bytes: 4d 8d 9b XX XX XX XX, 867 // but leaq 0xXXXXXXXX(%r12),%r12 is 8 bytes: 4d 8d a4 24 XX XX XX XX. 868 // The same true for rsp. So we convert to addq for them, saving 1 byte that 869 // we dont have. 870 if (RspAdd) 871 *Inst = 0x81; 872 else 873 *Inst = IsMov ? 0xc7 : 0x8d; 874 if (*Prefix == 0x4c) 875 *Prefix = (IsMov || RspAdd) ? 0x49 : 0x4d; 876 *RegSlot = (IsMov || RspAdd) ? (0xc0 | Reg) : (0x80 | Reg | (Reg << 3)); 877 relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA); 878 } 879 880 // This function applies a TLS relocation with an optimization as described 881 // in the Ulrich's document. As a result of rewriting instructions at the 882 // relocation target, relocations immediately follow the TLS relocation (which 883 // would be applied to rewritten instructions) may have to be skipped. 884 // This function returns a number of relocations that need to be skipped. 885 size_t X86_64TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 886 uint64_t P, uint64_t SA, 887 const SymbolBody &S) const { 888 switch (Type) { 889 case R_X86_64_DTPOFF32: 890 relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA); 891 return 0; 892 case R_X86_64_DTPOFF64: 893 write64le(Loc, SA - Out<ELF64LE>::TlsPhdr->p_memsz); 894 return 0; 895 case R_X86_64_GOTTPOFF: 896 relocateTlsIeToLe(Loc, BufEnd, P, SA); 897 return 0; 898 case R_X86_64_TLSGD: { 899 if (S.isPreemptible()) 900 relocateTlsGdToIe(Loc, BufEnd, P, SA); 901 else 902 relocateTlsGdToLe(Loc, BufEnd, P, SA); 903 // The next relocation should be against __tls_get_addr, so skip it 904 return 1; 905 } 906 case R_X86_64_TLSLD: 907 relocateTlsLdToLe(Loc, BufEnd, P, SA); 908 // The next relocation should be against __tls_get_addr, so skip it 909 return 1; 910 } 911 llvm_unreachable("unknown TLS optimization"); 912 } 913 914 void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 915 uint64_t P, uint64_t SA, uint64_t ZA, 916 uint8_t *PairedLoc) const { 917 switch (Type) { 918 case R_X86_64_32: 919 checkUInt<32>(SA, Type); 920 write32le(Loc, SA); 921 break; 922 case R_X86_64_32S: 923 checkInt<32>(SA, Type); 924 write32le(Loc, SA); 925 break; 926 case R_X86_64_64: 927 case R_X86_64_DTPOFF64: 928 write64le(Loc, SA); 929 break; 930 case R_X86_64_DTPOFF32: 931 write32le(Loc, SA); 932 break; 933 case R_X86_64_GOTPCREL: 934 case R_X86_64_PC32: 935 case R_X86_64_PLT32: 936 case R_X86_64_TLSGD: 937 case R_X86_64_TLSLD: 938 write32le(Loc, SA - P); 939 break; 940 case R_X86_64_SIZE32: 941 write32le(Loc, ZA); 942 break; 943 case R_X86_64_SIZE64: 944 write64le(Loc, ZA); 945 break; 946 case R_X86_64_TPOFF32: { 947 uint64_t Val = SA - Out<ELF64LE>::TlsPhdr->p_memsz; 948 checkInt<32>(Val, Type); 949 write32le(Loc, Val); 950 break; 951 } 952 default: 953 fatal("unrecognized reloc " + Twine(Type)); 954 } 955 } 956 957 // Relocation masks following the #lo(value), #hi(value), #ha(value), 958 // #higher(value), #highera(value), #highest(value), and #highesta(value) 959 // macros defined in section 4.5.1. Relocation Types of the PPC-elf64abi 960 // document. 961 static uint16_t applyPPCLo(uint64_t V) { return V; } 962 static uint16_t applyPPCHi(uint64_t V) { return V >> 16; } 963 static uint16_t applyPPCHa(uint64_t V) { return (V + 0x8000) >> 16; } 964 static uint16_t applyPPCHigher(uint64_t V) { return V >> 32; } 965 static uint16_t applyPPCHighera(uint64_t V) { return (V + 0x8000) >> 32; } 966 static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; } 967 static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; } 968 969 PPCTargetInfo::PPCTargetInfo() {} 970 bool PPCTargetInfo::isRelRelative(uint32_t Type) const { return false; } 971 972 void PPCTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 973 uint64_t P, uint64_t SA, uint64_t ZA, 974 uint8_t *PairedLoc) const { 975 switch (Type) { 976 case R_PPC_ADDR16_HA: 977 write16be(Loc, applyPPCHa(SA)); 978 break; 979 case R_PPC_ADDR16_LO: 980 write16be(Loc, applyPPCLo(SA)); 981 break; 982 default: 983 fatal("unrecognized reloc " + Twine(Type)); 984 } 985 } 986 987 PPC64TargetInfo::PPC64TargetInfo() { 988 GotRel = R_PPC64_GLOB_DAT; 989 RelativeRel = R_PPC64_RELATIVE; 990 PltEntrySize = 32; 991 992 // We need 64K pages (at least under glibc/Linux, the loader won't 993 // set different permissions on a finer granularity than that). 994 PageSize = 65536; 995 996 // The PPC64 ELF ABI v1 spec, says: 997 // 998 // It is normally desirable to put segments with different characteristics 999 // in separate 256 Mbyte portions of the address space, to give the 1000 // operating system full paging flexibility in the 64-bit address space. 1001 // 1002 // And because the lowest non-zero 256M boundary is 0x10000000, PPC64 linkers 1003 // use 0x10000000 as the starting address. 1004 VAStart = 0x10000000; 1005 } 1006 1007 uint64_t getPPC64TocBase() { 1008 // The TOC consists of sections .got, .toc, .tocbss, .plt in that 1009 // order. The TOC starts where the first of these sections starts. 1010 1011 // FIXME: This obviously does not do the right thing when there is no .got 1012 // section, but there is a .toc or .tocbss section. 1013 uint64_t TocVA = Out<ELF64BE>::Got->getVA(); 1014 if (!TocVA) 1015 TocVA = Out<ELF64BE>::Plt->getVA(); 1016 1017 // Per the ppc64-elf-linux ABI, The TOC base is TOC value plus 0x8000 1018 // thus permitting a full 64 Kbytes segment. Note that the glibc startup 1019 // code (crt1.o) assumes that you can get from the TOC base to the 1020 // start of the .toc section with only a single (signed) 16-bit relocation. 1021 return TocVA + 0x8000; 1022 } 1023 1024 void PPC64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1025 uint64_t PltEntryAddr, int32_t Index, 1026 unsigned RelOff) const { 1027 uint64_t Off = GotEntryAddr - getPPC64TocBase(); 1028 1029 // FIXME: What we should do, in theory, is get the offset of the function 1030 // descriptor in the .opd section, and use that as the offset from %r2 (the 1031 // TOC-base pointer). Instead, we have the GOT-entry offset, and that will 1032 // be a pointer to the function descriptor in the .opd section. Using 1033 // this scheme is simpler, but requires an extra indirection per PLT dispatch. 1034 1035 write32be(Buf, 0xf8410028); // std %r2, 40(%r1) 1036 write32be(Buf + 4, 0x3d620000 | applyPPCHa(Off)); // addis %r11, %r2, X@ha 1037 write32be(Buf + 8, 0xe98b0000 | applyPPCLo(Off)); // ld %r12, X@l(%r11) 1038 write32be(Buf + 12, 0xe96c0000); // ld %r11,0(%r12) 1039 write32be(Buf + 16, 0x7d6903a6); // mtctr %r11 1040 write32be(Buf + 20, 0xe84c0008); // ld %r2,8(%r12) 1041 write32be(Buf + 24, 0xe96c0010); // ld %r11,16(%r12) 1042 write32be(Buf + 28, 0x4e800420); // bctr 1043 } 1044 1045 bool PPC64TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 1046 if (needsPlt<ELF64BE>(Type, S)) 1047 return true; 1048 1049 switch (Type) { 1050 default: return false; 1051 case R_PPC64_GOT16: 1052 case R_PPC64_GOT16_DS: 1053 case R_PPC64_GOT16_HA: 1054 case R_PPC64_GOT16_HI: 1055 case R_PPC64_GOT16_LO: 1056 case R_PPC64_GOT16_LO_DS: 1057 return true; 1058 } 1059 } 1060 1061 bool PPC64TargetInfo::needsPltImpl(uint32_t Type) const { 1062 // These are function calls that need to be redirected through a PLT stub. 1063 return Type == R_PPC64_REL24; 1064 } 1065 1066 bool PPC64TargetInfo::isRelRelative(uint32_t Type) const { 1067 switch (Type) { 1068 default: 1069 return true; 1070 case R_PPC64_ADDR64: 1071 case R_PPC64_TOC: 1072 return false; 1073 } 1074 } 1075 1076 void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1077 uint64_t P, uint64_t SA, uint64_t ZA, 1078 uint8_t *PairedLoc) const { 1079 uint64_t TB = getPPC64TocBase(); 1080 1081 // For a TOC-relative relocation, adjust the addend and proceed in terms of 1082 // the corresponding ADDR16 relocation type. 1083 switch (Type) { 1084 case R_PPC64_TOC16: Type = R_PPC64_ADDR16; SA -= TB; break; 1085 case R_PPC64_TOC16_DS: Type = R_PPC64_ADDR16_DS; SA -= TB; break; 1086 case R_PPC64_TOC16_HA: Type = R_PPC64_ADDR16_HA; SA -= TB; break; 1087 case R_PPC64_TOC16_HI: Type = R_PPC64_ADDR16_HI; SA -= TB; break; 1088 case R_PPC64_TOC16_LO: Type = R_PPC64_ADDR16_LO; SA -= TB; break; 1089 case R_PPC64_TOC16_LO_DS: Type = R_PPC64_ADDR16_LO_DS; SA -= TB; break; 1090 default: break; 1091 } 1092 1093 switch (Type) { 1094 case R_PPC64_ADDR14: { 1095 checkAlignment<4>(SA, Type); 1096 // Preserve the AA/LK bits in the branch instruction 1097 uint8_t AALK = Loc[3]; 1098 write16be(Loc + 2, (AALK & 3) | (SA & 0xfffc)); 1099 break; 1100 } 1101 case R_PPC64_ADDR16: 1102 checkInt<16>(SA, Type); 1103 write16be(Loc, SA); 1104 break; 1105 case R_PPC64_ADDR16_DS: 1106 checkInt<16>(SA, Type); 1107 write16be(Loc, (read16be(Loc) & 3) | (SA & ~3)); 1108 break; 1109 case R_PPC64_ADDR16_HA: 1110 write16be(Loc, applyPPCHa(SA)); 1111 break; 1112 case R_PPC64_ADDR16_HI: 1113 write16be(Loc, applyPPCHi(SA)); 1114 break; 1115 case R_PPC64_ADDR16_HIGHER: 1116 write16be(Loc, applyPPCHigher(SA)); 1117 break; 1118 case R_PPC64_ADDR16_HIGHERA: 1119 write16be(Loc, applyPPCHighera(SA)); 1120 break; 1121 case R_PPC64_ADDR16_HIGHEST: 1122 write16be(Loc, applyPPCHighest(SA)); 1123 break; 1124 case R_PPC64_ADDR16_HIGHESTA: 1125 write16be(Loc, applyPPCHighesta(SA)); 1126 break; 1127 case R_PPC64_ADDR16_LO: 1128 write16be(Loc, applyPPCLo(SA)); 1129 break; 1130 case R_PPC64_ADDR16_LO_DS: 1131 write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(SA) & ~3)); 1132 break; 1133 case R_PPC64_ADDR32: 1134 checkInt<32>(SA, Type); 1135 write32be(Loc, SA); 1136 break; 1137 case R_PPC64_ADDR64: 1138 write64be(Loc, SA); 1139 break; 1140 case R_PPC64_REL16_HA: 1141 write16be(Loc, applyPPCHa(SA - P)); 1142 break; 1143 case R_PPC64_REL16_HI: 1144 write16be(Loc, applyPPCHi(SA - P)); 1145 break; 1146 case R_PPC64_REL16_LO: 1147 write16be(Loc, applyPPCLo(SA - P)); 1148 break; 1149 case R_PPC64_REL24: { 1150 // If we have an undefined weak symbol, we might get here with a symbol 1151 // address of zero. That could overflow, but the code must be unreachable, 1152 // so don't bother doing anything at all. 1153 if (!SA) 1154 break; 1155 1156 uint64_t PltStart = Out<ELF64BE>::Plt->getVA(); 1157 uint64_t PltEnd = PltStart + Out<ELF64BE>::Plt->getSize(); 1158 bool InPlt = PltStart <= SA && SA < PltEnd; 1159 1160 if (!InPlt && Out<ELF64BE>::Opd) { 1161 // If this is a local call, and we currently have the address of a 1162 // function-descriptor, get the underlying code address instead. 1163 uint64_t OpdStart = Out<ELF64BE>::Opd->getVA(); 1164 uint64_t OpdEnd = OpdStart + Out<ELF64BE>::Opd->getSize(); 1165 bool InOpd = OpdStart <= SA && SA < OpdEnd; 1166 1167 if (InOpd) 1168 SA = read64be(&Out<ELF64BE>::OpdBuf[SA - OpdStart]); 1169 } 1170 1171 uint32_t Mask = 0x03FFFFFC; 1172 checkInt<24>(SA - P, Type); 1173 write32be(Loc, (read32be(Loc) & ~Mask) | ((SA - P) & Mask)); 1174 1175 uint32_t Nop = 0x60000000; 1176 if (InPlt && Loc + 8 <= BufEnd && read32be(Loc + 4) == Nop) 1177 write32be(Loc + 4, 0xe8410028); // ld %r2, 40(%r1) 1178 break; 1179 } 1180 case R_PPC64_REL32: 1181 checkInt<32>(SA - P, Type); 1182 write32be(Loc, SA - P); 1183 break; 1184 case R_PPC64_REL64: 1185 write64be(Loc, SA - P); 1186 break; 1187 case R_PPC64_TOC: 1188 write64be(Loc, SA); 1189 break; 1190 default: 1191 fatal("unrecognized reloc " + Twine(Type)); 1192 } 1193 } 1194 1195 AArch64TargetInfo::AArch64TargetInfo() { 1196 CopyRel = R_AARCH64_COPY; 1197 RelativeRel = R_AARCH64_RELATIVE; 1198 IRelativeRel = R_AARCH64_IRELATIVE; 1199 GotRel = R_AARCH64_GLOB_DAT; 1200 PltRel = R_AARCH64_JUMP_SLOT; 1201 TlsGotRel = R_AARCH64_TLS_TPREL64; 1202 TlsModuleIndexRel = R_AARCH64_TLS_DTPMOD64; 1203 TlsOffsetRel = R_AARCH64_TLS_DTPREL64; 1204 UseLazyBinding = true; 1205 PltEntrySize = 16; 1206 PltZeroSize = 32; 1207 } 1208 1209 bool AArch64TargetInfo::isRelRelative(uint32_t Type) const { 1210 return Type == R_AARCH64_PREL32 || Type == R_AARCH64_ADR_PREL_PG_HI21 || 1211 Type == R_AARCH64_LDST8_ABS_LO12_NC || 1212 Type == R_AARCH64_LDST32_ABS_LO12_NC || 1213 Type == R_AARCH64_LDST64_ABS_LO12_NC || 1214 Type == R_AARCH64_ADD_ABS_LO12_NC || Type == R_AARCH64_CALL26; 1215 } 1216 1217 bool AArch64TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 1218 return Type == R_AARCH64_TLSDESC_ADR_PAGE21 || 1219 Type == R_AARCH64_TLSDESC_LD64_LO12_NC || 1220 Type == R_AARCH64_TLSDESC_ADD_LO12_NC || 1221 Type == R_AARCH64_TLSDESC_CALL; 1222 } 1223 1224 bool AArch64TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 1225 return Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 || 1226 Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC; 1227 } 1228 1229 uint32_t AArch64TargetInfo::getDynRel(uint32_t Type) const { 1230 if (Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64) 1231 return Type; 1232 StringRef S = getELFRelocationTypeName(EM_AARCH64, Type); 1233 error("Relocation " + S + " cannot be used when making a shared object; " 1234 "recompile with -fPIC."); 1235 // Keep it going with a dummy value so that we can find more reloc errors. 1236 return R_AARCH64_ABS32; 1237 } 1238 1239 void AArch64TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 1240 write64le(Buf, Out<ELF64LE>::Plt->getVA()); 1241 } 1242 1243 void AArch64TargetInfo::writePltZero(uint8_t *Buf) const { 1244 const uint8_t PltData[] = { 1245 0xf0, 0x7b, 0xbf, 0xa9, // stp x16, x30, [sp,#-16]! 1246 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[2])) 1247 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[2]))] 1248 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[2])) 1249 0x20, 0x02, 0x1f, 0xd6, // br x17 1250 0x1f, 0x20, 0x03, 0xd5, // nop 1251 0x1f, 0x20, 0x03, 0xd5, // nop 1252 0x1f, 0x20, 0x03, 0xd5 // nop 1253 }; 1254 memcpy(Buf, PltData, sizeof(PltData)); 1255 1256 uint64_t Got = Out<ELF64LE>::GotPlt->getVA(); 1257 uint64_t Plt = Out<ELF64LE>::Plt->getVA(); 1258 relocateOne(Buf + 4, Buf + 8, R_AARCH64_ADR_PREL_PG_HI21, Plt + 4, Got + 16); 1259 relocateOne(Buf + 8, Buf + 12, R_AARCH64_LDST64_ABS_LO12_NC, Plt + 8, 1260 Got + 16); 1261 relocateOne(Buf + 12, Buf + 16, R_AARCH64_ADD_ABS_LO12_NC, Plt + 12, 1262 Got + 16); 1263 } 1264 1265 void AArch64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1266 uint64_t PltEntryAddr, int32_t Index, 1267 unsigned RelOff) const { 1268 const uint8_t Inst[] = { 1269 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[n])) 1270 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[n]))] 1271 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[n])) 1272 0x20, 0x02, 0x1f, 0xd6 // br x17 1273 }; 1274 memcpy(Buf, Inst, sizeof(Inst)); 1275 1276 relocateOne(Buf, Buf + 4, R_AARCH64_ADR_PREL_PG_HI21, PltEntryAddr, 1277 GotEntryAddr); 1278 relocateOne(Buf + 4, Buf + 8, R_AARCH64_LDST64_ABS_LO12_NC, PltEntryAddr + 4, 1279 GotEntryAddr); 1280 relocateOne(Buf + 8, Buf + 12, R_AARCH64_ADD_ABS_LO12_NC, PltEntryAddr + 8, 1281 GotEntryAddr); 1282 } 1283 1284 uint32_t AArch64TargetInfo::getTlsGotRel(uint32_t Type) const { 1285 assert(Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 || 1286 Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC); 1287 return Type; 1288 } 1289 1290 bool AArch64TargetInfo::needsCopyRelImpl(uint32_t Type) const { 1291 switch (Type) { 1292 default: 1293 return false; 1294 case R_AARCH64_ABS16: 1295 case R_AARCH64_ABS32: 1296 case R_AARCH64_ABS64: 1297 case R_AARCH64_ADD_ABS_LO12_NC: 1298 case R_AARCH64_ADR_PREL_LO21: 1299 case R_AARCH64_ADR_PREL_PG_HI21: 1300 case R_AARCH64_LDST8_ABS_LO12_NC: 1301 case R_AARCH64_LDST16_ABS_LO12_NC: 1302 case R_AARCH64_LDST32_ABS_LO12_NC: 1303 case R_AARCH64_LDST64_ABS_LO12_NC: 1304 case R_AARCH64_LDST128_ABS_LO12_NC: 1305 return true; 1306 } 1307 } 1308 1309 bool AArch64TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 1310 switch (Type) { 1311 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1312 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: 1313 case R_AARCH64_ADR_GOT_PAGE: 1314 case R_AARCH64_LD64_GOT_LO12_NC: 1315 return true; 1316 default: 1317 return needsPlt<ELF64LE>(Type, S); 1318 } 1319 } 1320 1321 bool AArch64TargetInfo::needsPltImpl(uint32_t Type) const { 1322 switch (Type) { 1323 default: 1324 return false; 1325 case R_AARCH64_CALL26: 1326 case R_AARCH64_CONDBR19: 1327 case R_AARCH64_JUMP26: 1328 case R_AARCH64_TSTBR14: 1329 return true; 1330 } 1331 } 1332 1333 static void updateAArch64Addr(uint8_t *L, uint64_t Imm) { 1334 uint32_t ImmLo = (Imm & 0x3) << 29; 1335 uint32_t ImmHi = ((Imm & 0x1FFFFC) >> 2) << 5; 1336 uint64_t Mask = (0x3 << 29) | (0x7FFFF << 5); 1337 write32le(L, (read32le(L) & ~Mask) | ImmLo | ImmHi); 1338 } 1339 1340 static inline void updateAArch64Add(uint8_t *L, uint64_t Imm) { 1341 or32le(L, (Imm & 0xFFF) << 10); 1342 } 1343 1344 // Page(Expr) is the page address of the expression Expr, defined 1345 // as (Expr & ~0xFFF). (This applies even if the machine page size 1346 // supported by the platform has a different value.) 1347 static uint64_t getAArch64Page(uint64_t Expr) { 1348 return Expr & (~static_cast<uint64_t>(0xFFF)); 1349 } 1350 1351 void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, 1352 uint32_t Type, uint64_t P, uint64_t SA, 1353 uint64_t ZA, uint8_t *PairedLoc) const { 1354 switch (Type) { 1355 case R_AARCH64_ABS16: 1356 checkIntUInt<16>(SA, Type); 1357 write16le(Loc, SA); 1358 break; 1359 case R_AARCH64_ABS32: 1360 checkIntUInt<32>(SA, Type); 1361 write32le(Loc, SA); 1362 break; 1363 case R_AARCH64_ABS64: 1364 write64le(Loc, SA); 1365 break; 1366 case R_AARCH64_ADD_ABS_LO12_NC: 1367 // This relocation stores 12 bits and there's no instruction 1368 // to do it. Instead, we do a 32 bits store of the value 1369 // of r_addend bitwise-or'ed Loc. This assumes that the addend 1370 // bits in Loc are zero. 1371 or32le(Loc, (SA & 0xFFF) << 10); 1372 break; 1373 case R_AARCH64_ADR_GOT_PAGE: { 1374 uint64_t X = getAArch64Page(SA) - getAArch64Page(P); 1375 checkInt<33>(X, Type); 1376 updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12] 1377 break; 1378 } 1379 case R_AARCH64_ADR_PREL_LO21: { 1380 uint64_t X = SA - P; 1381 checkInt<21>(X, Type); 1382 updateAArch64Addr(Loc, X & 0x1FFFFF); 1383 break; 1384 } 1385 case R_AARCH64_ADR_PREL_PG_HI21: 1386 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: { 1387 uint64_t X = getAArch64Page(SA) - getAArch64Page(P); 1388 checkInt<33>(X, Type); 1389 updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12] 1390 break; 1391 } 1392 case R_AARCH64_CALL26: 1393 case R_AARCH64_JUMP26: { 1394 uint64_t X = SA - P; 1395 checkInt<28>(X, Type); 1396 or32le(Loc, (X & 0x0FFFFFFC) >> 2); 1397 break; 1398 } 1399 case R_AARCH64_CONDBR19: { 1400 uint64_t X = SA - P; 1401 checkInt<21>(X, Type); 1402 or32le(Loc, (X & 0x1FFFFC) << 3); 1403 break; 1404 } 1405 case R_AARCH64_LD64_GOT_LO12_NC: 1406 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1407 checkAlignment<8>(SA, Type); 1408 or32le(Loc, (SA & 0xFF8) << 7); 1409 break; 1410 case R_AARCH64_LDST128_ABS_LO12_NC: 1411 or32le(Loc, (SA & 0x0FF8) << 6); 1412 break; 1413 case R_AARCH64_LDST16_ABS_LO12_NC: 1414 or32le(Loc, (SA & 0x0FFC) << 9); 1415 break; 1416 case R_AARCH64_LDST8_ABS_LO12_NC: 1417 or32le(Loc, (SA & 0xFFF) << 10); 1418 break; 1419 case R_AARCH64_LDST32_ABS_LO12_NC: 1420 or32le(Loc, (SA & 0xFFC) << 8); 1421 break; 1422 case R_AARCH64_LDST64_ABS_LO12_NC: 1423 or32le(Loc, (SA & 0xFF8) << 7); 1424 break; 1425 case R_AARCH64_PREL16: 1426 checkIntUInt<16>(SA - P, Type); 1427 write16le(Loc, SA - P); 1428 break; 1429 case R_AARCH64_PREL32: 1430 checkIntUInt<32>(SA - P, Type); 1431 write32le(Loc, SA - P); 1432 break; 1433 case R_AARCH64_PREL64: 1434 write64le(Loc, SA - P); 1435 break; 1436 case R_AARCH64_TSTBR14: { 1437 uint64_t X = SA - P; 1438 checkInt<16>(X, Type); 1439 or32le(Loc, (X & 0xFFFC) << 3); 1440 break; 1441 } 1442 case R_AARCH64_TLSLE_ADD_TPREL_HI12: { 1443 uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA; 1444 checkInt<24>(V, Type); 1445 updateAArch64Add(Loc, (V & 0xFFF000) >> 12); 1446 break; 1447 } 1448 case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC: { 1449 uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA; 1450 updateAArch64Add(Loc, V & 0xFFF); 1451 break; 1452 } 1453 default: 1454 fatal("unrecognized reloc " + Twine(Type)); 1455 } 1456 } 1457 1458 size_t AArch64TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1459 uint64_t P, uint64_t SA, 1460 const SymbolBody &S) const { 1461 switch (Type) { 1462 case R_AARCH64_TLSDESC_ADR_PAGE21: 1463 case R_AARCH64_TLSDESC_LD64_LO12_NC: 1464 case R_AARCH64_TLSDESC_ADD_LO12_NC: 1465 case R_AARCH64_TLSDESC_CALL: { 1466 if (S.isPreemptible()) 1467 fatal("unsupported TLS optimization"); 1468 uint64_t X = S.getVA<ELF64LE>(); 1469 relocateTlsGdToLe(Type, Loc, BufEnd, P, X); 1470 return 0; 1471 } 1472 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: 1473 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1474 relocateTlsIeToLe(Type, Loc, BufEnd, P, S.getVA<ELF64LE>()); 1475 return 0; 1476 } 1477 llvm_unreachable("unknown TLS optimization"); 1478 } 1479 1480 // Global-Dynamic relocations can be relaxed to Local-Exec if both binary is 1481 // an executable and target is final (can notbe preempted). 1482 void AArch64TargetInfo::relocateTlsGdToLe(uint32_t Type, uint8_t *Loc, 1483 uint8_t *BufEnd, uint64_t P, 1484 uint64_t SA) const { 1485 // TLSDESC Global-Dynamic relocation are in the form: 1486 // adrp x0, :tlsdesc:v [R_AARCH64_TLSDESC_ADR_PAGE21] 1487 // ldr x1, [x0, #:tlsdesc_lo12:v [R_AARCH64_TLSDESC_LD64_LO12_NC] 1488 // add x0, x0, :tlsdesc_los:v [_AARCH64_TLSDESC_ADD_LO12_NC] 1489 // .tlsdesccall [R_AARCH64_TLSDESC_CALL] 1490 // And it can optimized to: 1491 // movz x0, #0x0, lsl #16 1492 // movk x0, #0x10 1493 // nop 1494 // nop 1495 1496 uint64_t TPOff = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align); 1497 uint64_t X = SA + TPOff; 1498 checkUInt<32>(X, Type); 1499 1500 uint32_t NewInst; 1501 switch (Type) { 1502 case R_AARCH64_TLSDESC_ADD_LO12_NC: 1503 case R_AARCH64_TLSDESC_CALL: 1504 // nop 1505 NewInst = 0xd503201f; 1506 break; 1507 case R_AARCH64_TLSDESC_ADR_PAGE21: 1508 // movz 1509 NewInst = 0xd2a00000 | (((X >> 16) & 0xffff) << 5); 1510 break; 1511 case R_AARCH64_TLSDESC_LD64_LO12_NC: 1512 // movk 1513 NewInst = 0xf2800000 | ((X & 0xffff) << 5); 1514 break; 1515 default: 1516 llvm_unreachable("unsupported Relocation for TLS GD to LE relax"); 1517 } 1518 write32le(Loc, NewInst); 1519 } 1520 1521 // Initial-Exec relocations can be relaxed to Local-Exec if symbol is final 1522 // (can not be preempted). 1523 void AArch64TargetInfo::relocateTlsIeToLe(uint32_t Type, uint8_t *Loc, 1524 uint8_t *BufEnd, uint64_t P, 1525 uint64_t SA) const { 1526 uint64_t TPOff = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align); 1527 uint64_t X = SA + TPOff; 1528 checkUInt<32>(X, Type); 1529 1530 uint32_t Inst = read32le(Loc); 1531 uint32_t NewInst; 1532 if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21) { 1533 // Generate movz. 1534 unsigned RegNo = (Inst & 0x1f); 1535 NewInst = (0xd2a00000 | RegNo) | (((X >> 16) & 0xffff) << 5); 1536 } else if (Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC) { 1537 // Generate movk 1538 unsigned RegNo = (Inst & 0x1f); 1539 NewInst = (0xf2800000 | RegNo) | ((X & 0xffff) << 5); 1540 } else { 1541 llvm_unreachable("invalid Relocation for TLS IE to LE Relax"); 1542 } 1543 write32le(Loc, NewInst); 1544 } 1545 1546 // Implementing relocations for AMDGPU is low priority since most 1547 // programs don't use relocations now. Thus, this function is not 1548 // actually called (relocateOne is called for each relocation). 1549 // That's why the AMDGPU port works without implementing this function. 1550 void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1551 uint64_t P, uint64_t SA, uint64_t ZA, 1552 uint8_t *PairedLoc) const { 1553 llvm_unreachable("not implemented"); 1554 } 1555 1556 template <class ELFT> MipsTargetInfo<ELFT>::MipsTargetInfo() { 1557 GotHeaderEntriesNum = 2; 1558 GotPltHeaderEntriesNum = 2; 1559 PageSize = 65536; 1560 PltEntrySize = 16; 1561 PltZeroSize = 32; 1562 UseLazyBinding = true; 1563 CopyRel = R_MIPS_COPY; 1564 PltRel = R_MIPS_JUMP_SLOT; 1565 RelativeRel = R_MIPS_REL32; 1566 } 1567 1568 template <class ELFT> 1569 uint32_t MipsTargetInfo<ELFT>::getDynRel(uint32_t Type) const { 1570 if (Type == R_MIPS_32 || Type == R_MIPS_64) 1571 return R_MIPS_REL32; 1572 StringRef S = getELFRelocationTypeName(EM_MIPS, Type); 1573 error("Relocation " + S + " cannot be used when making a shared object; " 1574 "recompile with -fPIC."); 1575 // Keep it going with a dummy value so that we can find more reloc errors. 1576 return R_MIPS_32; 1577 } 1578 1579 template <class ELFT> 1580 void MipsTargetInfo<ELFT>::writeGotHeader(uint8_t *Buf) const { 1581 typedef typename ELFFile<ELFT>::Elf_Off Elf_Off; 1582 typedef typename ELFFile<ELFT>::uintX_t uintX_t; 1583 1584 // Set the MSB of the second GOT slot. This is not required by any 1585 // MIPS ABI documentation, though. 1586 // 1587 // There is a comment in glibc saying that "The MSB of got[1] of a 1588 // gnu object is set to identify gnu objects," and in GNU gold it 1589 // says "the second entry will be used by some runtime loaders". 1590 // But how this field is being used is unclear. 1591 // 1592 // We are not really willing to mimic other linkers behaviors 1593 // without understanding why they do that, but because all files 1594 // generated by GNU tools have this special GOT value, and because 1595 // we've been doing this for years, it is probably a safe bet to 1596 // keep doing this for now. We really need to revisit this to see 1597 // if we had to do this. 1598 auto *P = reinterpret_cast<Elf_Off *>(Buf); 1599 P[1] = uintX_t(1) << (ELFT::Is64Bits ? 63 : 31); 1600 } 1601 1602 template <class ELFT> 1603 void MipsTargetInfo<ELFT>::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 1604 write32<ELFT::TargetEndianness>(Buf, Out<ELFT>::Plt->getVA()); 1605 } 1606 1607 static uint16_t mipsHigh(uint64_t V) { return (V + 0x8000) >> 16; } 1608 1609 template <endianness E, uint8_t BSIZE, uint8_t SHIFT> 1610 static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t P, 1611 uint64_t S) { 1612 uint32_t Mask = 0xffffffff >> (32 - BSIZE); 1613 uint32_t Instr = read32<E>(Loc); 1614 int64_t A = SignExtend64<BSIZE + SHIFT>((Instr & Mask) << SHIFT); 1615 if (SHIFT > 0) 1616 checkAlignment<(1 << SHIFT)>(S + A, Type); 1617 int64_t V = S + A - P; 1618 checkInt<BSIZE + SHIFT>(V, Type); 1619 write32<E>(Loc, (Instr & ~Mask) | ((V >> SHIFT) & Mask)); 1620 } 1621 1622 template <endianness E> 1623 static void writeMipsHi16(uint8_t *Loc, uint64_t V) { 1624 uint32_t Instr = read32<E>(Loc); 1625 write32<E>(Loc, (Instr & 0xffff0000) | mipsHigh(V)); 1626 } 1627 1628 template <endianness E> 1629 static void writeMipsLo16(uint8_t *Loc, uint64_t V) { 1630 uint32_t Instr = read32<E>(Loc); 1631 write32<E>(Loc, (Instr & 0xffff0000) | (V & 0xffff)); 1632 } 1633 1634 template <endianness E> static int16_t readSignedLo16(uint8_t *Loc) { 1635 return SignExtend32<16>(read32<E>(Loc) & 0xffff); 1636 } 1637 1638 template <endianness E> 1639 static int64_t readMipsAHL(uint8_t *HiLoc, uint8_t *LoLoc) { 1640 return ((read32<E>(HiLoc) & 0xffff) << 16) + readSignedLo16<E>(LoLoc); 1641 } 1642 1643 template <class ELFT> 1644 void MipsTargetInfo<ELFT>::writePltZero(uint8_t *Buf) const { 1645 const endianness E = ELFT::TargetEndianness; 1646 write32<E>(Buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0]) 1647 write32<E>(Buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28) 1648 write32<E>(Buf + 8, 0x279c0000); // addiu $28, $28, %lo(&GOTPLT[0]) 1649 write32<E>(Buf + 12, 0x031cc023); // subu $24, $24, $28 1650 write32<E>(Buf + 16, 0x03e07825); // move $15, $31 1651 write32<E>(Buf + 20, 0x0018c082); // srl $24, $24, 2 1652 write32<E>(Buf + 24, 0x0320f809); // jalr $25 1653 write32<E>(Buf + 28, 0x2718fffe); // subu $24, $24, 2 1654 uint64_t Got = Out<ELFT>::GotPlt->getVA(); 1655 writeMipsHi16<E>(Buf, Got); 1656 writeMipsLo16<E>(Buf + 4, Got); 1657 writeMipsLo16<E>(Buf + 8, Got); 1658 } 1659 1660 template <class ELFT> 1661 void MipsTargetInfo<ELFT>::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1662 uint64_t PltEntryAddr, int32_t Index, 1663 unsigned RelOff) const { 1664 const endianness E = ELFT::TargetEndianness; 1665 write32<E>(Buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry) 1666 write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15) 1667 write32<E>(Buf + 8, 0x03200008); // jr $25 1668 write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry) 1669 writeMipsHi16<E>(Buf, GotEntryAddr); 1670 writeMipsLo16<E>(Buf + 4, GotEntryAddr); 1671 writeMipsLo16<E>(Buf + 12, GotEntryAddr); 1672 } 1673 1674 template <class ELFT> 1675 bool MipsTargetInfo<ELFT>::needsCopyRelImpl(uint32_t Type) const { 1676 return !isRelRelative(Type); 1677 } 1678 1679 template <class ELFT> 1680 bool MipsTargetInfo<ELFT>::needsGot(uint32_t Type, SymbolBody &S) const { 1681 return needsPlt<ELFT>(Type, S) || refersToGotEntry(Type); 1682 } 1683 1684 template <class ELFT> 1685 bool MipsTargetInfo<ELFT>::refersToGotEntry(uint32_t Type) const { 1686 return Type == R_MIPS_GOT16 || Type == R_MIPS_CALL16; 1687 } 1688 1689 template <class ELFT> 1690 bool MipsTargetInfo<ELFT>::needsPltImpl(uint32_t Type) const { 1691 return Type == R_MIPS_26; 1692 } 1693 1694 template <class ELFT> 1695 void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint8_t *BufEnd, 1696 uint32_t Type, uint64_t P, uint64_t S, 1697 uint64_t ZA, uint8_t *PairedLoc) const { 1698 const endianness E = ELFT::TargetEndianness; 1699 switch (Type) { 1700 case R_MIPS_32: 1701 add32<E>(Loc, S); 1702 break; 1703 case R_MIPS_26: { 1704 uint32_t Instr = read32<E>(Loc); 1705 // FIXME (simon): If the relocation target symbol is not a PLT entry 1706 // we should use another expression for calculation: 1707 // ((A << 2) | (P & 0xf0000000)) >> 2 1708 S += SignExtend64<28>((Instr & 0x3ffffff) << 2); 1709 write32<E>(Loc, (Instr & ~0x3ffffff) | (S >> 2)); 1710 break; 1711 } 1712 case R_MIPS_CALL16: 1713 case R_MIPS_GOT16: { 1714 int64_t V = S - getMipsGpAddr<ELFT>(); 1715 if (Type == R_MIPS_GOT16) 1716 checkInt<16>(V, Type); 1717 writeMipsLo16<E>(Loc, V); 1718 break; 1719 } 1720 case R_MIPS_GPREL16: { 1721 int64_t V = S + readSignedLo16<E>(Loc) - getMipsGpAddr<ELFT>(); 1722 checkInt<16>(V, Type); 1723 writeMipsLo16<E>(Loc, V); 1724 break; 1725 } 1726 case R_MIPS_GPREL32: 1727 write32<E>(Loc, S + int32_t(read32<E>(Loc)) - getMipsGpAddr<ELFT>()); 1728 break; 1729 case R_MIPS_HI16: 1730 if (PairedLoc) 1731 writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedLoc)); 1732 else { 1733 warning("Can't find matching R_MIPS_LO16 relocation for R_MIPS_HI16"); 1734 writeMipsHi16<E>(Loc, S); 1735 } 1736 break; 1737 case R_MIPS_JALR: 1738 // Ignore this optimization relocation for now 1739 break; 1740 case R_MIPS_LO16: 1741 writeMipsLo16<E>(Loc, S + readSignedLo16<E>(Loc)); 1742 break; 1743 case R_MIPS_PC16: 1744 applyMipsPcReloc<E, 16, 2>(Loc, Type, P, S); 1745 break; 1746 case R_MIPS_PC19_S2: 1747 applyMipsPcReloc<E, 19, 2>(Loc, Type, P, S); 1748 break; 1749 case R_MIPS_PC21_S2: 1750 applyMipsPcReloc<E, 21, 2>(Loc, Type, P, S); 1751 break; 1752 case R_MIPS_PC26_S2: 1753 applyMipsPcReloc<E, 26, 2>(Loc, Type, P, S); 1754 break; 1755 case R_MIPS_PC32: 1756 applyMipsPcReloc<E, 32, 0>(Loc, Type, P, S); 1757 break; 1758 case R_MIPS_PCHI16: 1759 if (PairedLoc) 1760 writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedLoc) - P); 1761 else { 1762 warning("Can't find matching R_MIPS_PCLO16 relocation for R_MIPS_PCHI16"); 1763 writeMipsHi16<E>(Loc, S - P); 1764 } 1765 break; 1766 case R_MIPS_PCLO16: 1767 writeMipsLo16<E>(Loc, S + readSignedLo16<E>(Loc) - P); 1768 break; 1769 default: 1770 fatal("unrecognized reloc " + Twine(Type)); 1771 } 1772 } 1773 1774 template <class ELFT> 1775 bool MipsTargetInfo<ELFT>::isHintRel(uint32_t Type) const { 1776 return Type == R_MIPS_JALR; 1777 } 1778 1779 template <class ELFT> 1780 bool MipsTargetInfo<ELFT>::isRelRelative(uint32_t Type) const { 1781 switch (Type) { 1782 default: 1783 return true; 1784 case R_MIPS_26: 1785 case R_MIPS_32: 1786 case R_MIPS_64: 1787 case R_MIPS_HI16: 1788 case R_MIPS_LO16: 1789 return false; 1790 } 1791 } 1792 1793 // _gp is a MIPS-specific ABI-defined symbol which points to 1794 // a location that is relative to GOT. This function returns 1795 // the value for the symbol. 1796 template <class ELFT> typename ELFFile<ELFT>::uintX_t getMipsGpAddr() { 1797 unsigned GPOffset = 0x7ff0; 1798 if (uint64_t V = Out<ELFT>::Got->getVA()) 1799 return V + GPOffset; 1800 return 0; 1801 } 1802 1803 template uint32_t getMipsGpAddr<ELF32LE>(); 1804 template uint32_t getMipsGpAddr<ELF32BE>(); 1805 template uint64_t getMipsGpAddr<ELF64LE>(); 1806 template uint64_t getMipsGpAddr<ELF64BE>(); 1807 1808 template bool TargetInfo::needsCopyRel<ELF32LE>(uint32_t, 1809 const SymbolBody &) const; 1810 template bool TargetInfo::needsCopyRel<ELF32BE>(uint32_t, 1811 const SymbolBody &) const; 1812 template bool TargetInfo::needsCopyRel<ELF64LE>(uint32_t, 1813 const SymbolBody &) const; 1814 template bool TargetInfo::needsCopyRel<ELF64BE>(uint32_t, 1815 const SymbolBody &) const; 1816 1817 template TargetInfo::PltNeed 1818 TargetInfo::needsPlt<ELF32LE>(uint32_t, const SymbolBody &) const; 1819 template TargetInfo::PltNeed 1820 TargetInfo::needsPlt<ELF32BE>(uint32_t, const SymbolBody &) const; 1821 template TargetInfo::PltNeed 1822 TargetInfo::needsPlt<ELF64LE>(uint32_t, const SymbolBody &) const; 1823 template TargetInfo::PltNeed 1824 TargetInfo::needsPlt<ELF64BE>(uint32_t, const SymbolBody &) const; 1825 } 1826 } 1827