1 //===- Target.cpp ---------------------------------------------------------===// 2 // 3 // The LLVM Linker 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Machine-specific things, such as applying relocations, creation of 11 // GOT or PLT entries, etc., are handled in this file. 12 // 13 // Refer the ELF spec for the single letter varaibles, S, A or P, used 14 // in this file. SA is S+A. 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "Target.h" 19 #include "Error.h" 20 #include "InputFiles.h" 21 #include "OutputSections.h" 22 #include "Symbols.h" 23 24 #include "llvm/ADT/ArrayRef.h" 25 #include "llvm/Object/ELF.h" 26 #include "llvm/Support/Endian.h" 27 #include "llvm/Support/ELF.h" 28 29 using namespace llvm; 30 using namespace llvm::object; 31 using namespace llvm::support::endian; 32 using namespace llvm::ELF; 33 34 namespace lld { 35 namespace elf { 36 37 TargetInfo *Target; 38 39 static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); } 40 41 template <unsigned N> static void checkInt(int64_t V, uint32_t Type) { 42 if (isInt<N>(V)) 43 return; 44 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 45 error("relocation " + S + " out of range"); 46 } 47 48 template <unsigned N> static void checkUInt(uint64_t V, uint32_t Type) { 49 if (isUInt<N>(V)) 50 return; 51 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 52 error("relocation " + S + " out of range"); 53 } 54 55 template <unsigned N> static void checkIntUInt(uint64_t V, uint32_t Type) { 56 if (isInt<N>(V) || isUInt<N>(V)) 57 return; 58 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 59 error("relocation " + S + " out of range"); 60 } 61 62 template <unsigned N> static void checkAlignment(uint64_t V, uint32_t Type) { 63 if ((V & (N - 1)) == 0) 64 return; 65 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 66 error("improper alignment for relocation " + S); 67 } 68 69 namespace { 70 class X86TargetInfo final : public TargetInfo { 71 public: 72 X86TargetInfo(); 73 uint64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override; 74 void writeGotPltHeader(uint8_t *Buf) const override; 75 uint32_t getDynRel(uint32_t Type) const override; 76 uint32_t getTlsGotRel(uint32_t Type) const override; 77 bool pointsToLocalDynamicGotEntry(uint32_t Type) const override; 78 bool isTlsLocalDynamicRel(uint32_t Type) const override; 79 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 80 bool isTlsInitialExecRel(uint32_t Type) const override; 81 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 82 void writePltZero(uint8_t *Buf) const override; 83 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 84 int32_t Index, unsigned RelOff) const override; 85 bool isRelRelative(uint32_t Type) const override; 86 bool needsCopyRelImpl(uint32_t Type) const override; 87 bool needsDynRelative(uint32_t Type) const override; 88 bool needsGot(uint32_t Type, const SymbolBody &S) const override; 89 bool needsPltImpl(uint32_t Type) const override; 90 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 91 uint64_t SA) const override; 92 93 size_t relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 94 uint64_t P, uint64_t SA) const override; 95 size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 96 uint64_t P, uint64_t SA) const override; 97 size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 98 uint64_t P, uint64_t SA) const override; 99 size_t relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 100 uint64_t P, uint64_t SA) const override; 101 102 bool isGotRelative(uint32_t Type) const override; 103 bool refersToGotEntry(uint32_t Type) const override; 104 }; 105 106 class X86_64TargetInfo final : public TargetInfo { 107 public: 108 X86_64TargetInfo(); 109 uint32_t getDynRel(uint32_t Type) const override; 110 uint32_t getTlsGotRel(uint32_t Type) const override; 111 bool pointsToLocalDynamicGotEntry(uint32_t Type) const override; 112 bool isTlsLocalDynamicRel(uint32_t Type) const override; 113 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 114 bool isTlsInitialExecRel(uint32_t Type) const override; 115 void writeGotPltHeader(uint8_t *Buf) const override; 116 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 117 void writePltZero(uint8_t *Buf) const override; 118 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 119 int32_t Index, unsigned RelOff) const override; 120 bool needsCopyRelImpl(uint32_t Type) const override; 121 bool needsGot(uint32_t Type, const SymbolBody &S) const override; 122 bool refersToGotEntry(uint32_t Type) const override; 123 bool needsPltImpl(uint32_t Type) const override; 124 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 125 uint64_t SA) const override; 126 bool isRelRelative(uint32_t Type) const override; 127 bool isSizeRel(uint32_t Type) const override; 128 129 size_t relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 130 uint64_t P, uint64_t SA) const override; 131 size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 132 uint64_t P, uint64_t SA) const override; 133 size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 134 uint64_t P, uint64_t SA) const override; 135 size_t relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 136 uint64_t P, uint64_t SA) const override; 137 }; 138 139 class PPCTargetInfo final : public TargetInfo { 140 public: 141 PPCTargetInfo(); 142 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 143 uint64_t SA) const override; 144 bool isRelRelative(uint32_t Type) const override; 145 }; 146 147 class PPC64TargetInfo final : public TargetInfo { 148 public: 149 PPC64TargetInfo(); 150 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 151 int32_t Index, unsigned RelOff) const override; 152 bool needsGot(uint32_t Type, const SymbolBody &S) const override; 153 bool needsPltImpl(uint32_t Type) const override; 154 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 155 uint64_t SA) const override; 156 bool isRelRelative(uint32_t Type) const override; 157 }; 158 159 class AArch64TargetInfo final : public TargetInfo { 160 public: 161 AArch64TargetInfo(); 162 uint32_t getDynRel(uint32_t Type) const override; 163 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 164 bool isTlsInitialExecRel(uint32_t Type) const override; 165 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 166 void writePltZero(uint8_t *Buf) const override; 167 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 168 int32_t Index, unsigned RelOff) const override; 169 uint32_t getTlsGotRel(uint32_t Type) const override; 170 bool isRelRelative(uint32_t Type) const override; 171 bool needsCopyRelImpl(uint32_t Type) const override; 172 bool needsGot(uint32_t Type, const SymbolBody &S) const override; 173 bool refersToGotEntry(uint32_t Type) const override; 174 bool needsPltImpl(uint32_t Type) const override; 175 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 176 uint64_t SA) const override; 177 size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 178 uint64_t P, uint64_t SA) const override; 179 size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 180 uint64_t P, uint64_t SA) const override; 181 182 private: 183 static const uint64_t TcbSize = 16; 184 }; 185 186 class AMDGPUTargetInfo final : public TargetInfo { 187 public: 188 AMDGPUTargetInfo() {} 189 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 190 uint64_t SA) const override; 191 }; 192 193 template <class ELFT> class MipsTargetInfo final : public TargetInfo { 194 public: 195 MipsTargetInfo(); 196 uint64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override; 197 uint32_t getDynRel(uint32_t Type) const override; 198 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 199 void writePltZero(uint8_t *Buf) const override; 200 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 201 int32_t Index, unsigned RelOff) const override; 202 void writeGotHeader(uint8_t *Buf) const override; 203 void writeThunk(uint8_t *Buf, uint64_t S) const override; 204 bool needsCopyRelImpl(uint32_t Type) const override; 205 bool needsGot(uint32_t Type, const SymbolBody &S) const override; 206 bool needsPltImpl(uint32_t Type) const override; 207 bool needsThunk(uint32_t Type, const InputFile &File, 208 const SymbolBody &S) const override; 209 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 210 uint64_t SA) const override; 211 bool isHintRel(uint32_t Type) const override; 212 bool isRelRelative(uint32_t Type) const override; 213 bool refersToGotEntry(uint32_t Type) const override; 214 }; 215 } // anonymous namespace 216 217 TargetInfo *createTarget() { 218 switch (Config->EMachine) { 219 case EM_386: 220 return new X86TargetInfo(); 221 case EM_AARCH64: 222 return new AArch64TargetInfo(); 223 case EM_AMDGPU: 224 return new AMDGPUTargetInfo(); 225 case EM_MIPS: 226 switch (Config->EKind) { 227 case ELF32LEKind: 228 return new MipsTargetInfo<ELF32LE>(); 229 case ELF32BEKind: 230 return new MipsTargetInfo<ELF32BE>(); 231 default: 232 fatal("unsupported MIPS target"); 233 } 234 case EM_PPC: 235 return new PPCTargetInfo(); 236 case EM_PPC64: 237 return new PPC64TargetInfo(); 238 case EM_X86_64: 239 return new X86_64TargetInfo(); 240 } 241 fatal("unknown target machine"); 242 } 243 244 TargetInfo::~TargetInfo() {} 245 246 uint64_t TargetInfo::getImplicitAddend(const uint8_t *Buf, 247 uint32_t Type) const { 248 return 0; 249 } 250 251 bool TargetInfo::canRelaxTls(uint32_t Type, const SymbolBody *S) const { 252 if (Config->Shared || (S && !S->isTls())) 253 return false; 254 255 // We know we are producing an executable. 256 257 // Global-Dynamic relocs can be relaxed to Initial-Exec or Local-Exec 258 // depending on the symbol being locally defined or not. 259 if (isTlsGlobalDynamicRel(Type)) 260 return true; 261 262 // Local-Dynamic relocs can be relaxed to Local-Exec. 263 if (isTlsLocalDynamicRel(Type)) 264 return true; 265 266 // Initial-Exec relocs can be relaxed to Local-Exec if the symbol is locally 267 // defined. 268 if (isTlsInitialExecRel(Type)) 269 return !S->isPreemptible(); 270 271 return false; 272 } 273 274 uint64_t TargetInfo::getVAStart() const { return Config->Pic ? 0 : VAStart; } 275 276 bool TargetInfo::needsCopyRelImpl(uint32_t Type) const { return false; } 277 278 template <typename ELFT> static bool mayNeedCopy(const SymbolBody &S) { 279 if (Config->Shared) 280 return false; 281 auto *SS = dyn_cast<SharedSymbol<ELFT>>(&S); 282 if (!SS) 283 return false; 284 return SS->isObject(); 285 } 286 287 template <class ELFT> 288 bool TargetInfo::needsCopyRel(uint32_t Type, const SymbolBody &S) const { 289 return mayNeedCopy<ELFT>(S) && needsCopyRelImpl(Type); 290 } 291 292 bool TargetInfo::isGotRelative(uint32_t Type) const { return false; } 293 bool TargetInfo::isHintRel(uint32_t Type) const { return false; } 294 bool TargetInfo::isRelRelative(uint32_t Type) const { return true; } 295 bool TargetInfo::isSizeRel(uint32_t Type) const { return false; } 296 297 bool TargetInfo::needsGot(uint32_t Type, const SymbolBody &S) const { 298 return false; 299 } 300 301 bool TargetInfo::needsPltImpl(uint32_t Type) const { return false; } 302 303 bool TargetInfo::refersToGotEntry(uint32_t Type) const { return false; } 304 305 TargetInfo::PltNeed TargetInfo::needsPlt(uint32_t Type, 306 const SymbolBody &S) const { 307 if (S.isGnuIFunc()) 308 return Plt_Explicit; 309 if (S.isPreemptible() && needsPltImpl(Type)) 310 return Plt_Explicit; 311 312 // This handles a non PIC program call to function in a shared library. 313 // In an ideal world, we could just report an error saying the relocation 314 // can overflow at runtime. 315 // In the real world with glibc, crt1.o has a R_X86_64_PC32 pointing to 316 // libc.so. 317 // 318 // The general idea on how to handle such cases is to create a PLT entry 319 // and use that as the function value. 320 // 321 // For the static linking part, we just return true and everything else 322 // will use the the PLT entry as the address. 323 // 324 // The remaining problem is making sure pointer equality still works. We 325 // need the help of the dynamic linker for that. We let it know that we have 326 // a direct reference to a so symbol by creating an undefined symbol with a 327 // non zero st_value. Seeing that, the dynamic linker resolves the symbol to 328 // the value of the symbol we created. This is true even for got entries, so 329 // pointer equality is maintained. To avoid an infinite loop, the only entry 330 // that points to the real function is a dedicated got entry used by the 331 // plt. That is identified by special relocation types (R_X86_64_JUMP_SLOT, 332 // R_386_JMP_SLOT, etc). 333 if (S.isShared()) 334 if (!Config->Pic && S.isFunc() && !refersToGotEntry(Type)) 335 return Plt_Implicit; 336 337 return Plt_No; 338 } 339 340 bool TargetInfo::needsThunk(uint32_t Type, const InputFile &File, 341 const SymbolBody &S) const { 342 return false; 343 } 344 345 bool TargetInfo::isTlsInitialExecRel(uint32_t Type) const { return false; } 346 347 bool TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 348 return false; 349 } 350 351 bool TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { return false; } 352 353 bool TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 354 return false; 355 } 356 357 size_t TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 358 uint64_t P, uint64_t SA, 359 const SymbolBody &S) const { 360 if (isTlsGlobalDynamicRel(Type)) { 361 if (S.isPreemptible()) 362 return relaxTlsGdToIe(Loc, BufEnd, Type, P, SA); 363 return relaxTlsGdToLe(Loc, BufEnd, Type, P, SA); 364 } 365 if (isTlsLocalDynamicRel(Type)) 366 return relaxTlsLdToLe(Loc, BufEnd, Type, P, SA); 367 assert(isTlsInitialExecRel(Type)); 368 return relaxTlsIeToLe(Loc, BufEnd, Type, P, SA); 369 } 370 371 size_t TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 372 uint64_t P, uint64_t SA) const { 373 llvm_unreachable("Should not have claimed to be relaxable"); 374 } 375 376 size_t TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 377 uint64_t P, uint64_t SA) const { 378 llvm_unreachable("Should not have claimed to be relaxable"); 379 } 380 381 size_t TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 382 uint64_t P, uint64_t SA) const { 383 llvm_unreachable("Should not have claimed to be relaxable"); 384 } 385 386 size_t TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 387 uint64_t P, uint64_t SA) const { 388 llvm_unreachable("Should not have claimed to be relaxable"); 389 } 390 391 X86TargetInfo::X86TargetInfo() { 392 CopyRel = R_386_COPY; 393 GotRel = R_386_GLOB_DAT; 394 PltRel = R_386_JUMP_SLOT; 395 IRelativeRel = R_386_IRELATIVE; 396 RelativeRel = R_386_RELATIVE; 397 TlsGotRel = R_386_TLS_TPOFF; 398 TlsModuleIndexRel = R_386_TLS_DTPMOD32; 399 TlsOffsetRel = R_386_TLS_DTPOFF32; 400 UseLazyBinding = true; 401 PltEntrySize = 16; 402 PltZeroSize = 16; 403 } 404 405 bool X86TargetInfo::isRelRelative(uint32_t Type) const { 406 switch (Type) { 407 default: 408 return false; 409 case R_386_PC32: 410 case R_386_PLT32: 411 case R_386_TLS_LDO_32: 412 return true; 413 } 414 } 415 416 void X86TargetInfo::writeGotPltHeader(uint8_t *Buf) const { 417 write32le(Buf, Out<ELF32LE>::Dynamic->getVA()); 418 } 419 420 void X86TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 421 // Entries in .got.plt initially points back to the corresponding 422 // PLT entries with a fixed offset to skip the first instruction. 423 write32le(Buf, Plt + 6); 424 } 425 426 uint32_t X86TargetInfo::getDynRel(uint32_t Type) const { 427 if (Type == R_386_TLS_LE) 428 return R_386_TLS_TPOFF; 429 if (Type == R_386_TLS_LE_32) 430 return R_386_TLS_TPOFF32; 431 return Type; 432 } 433 434 uint32_t X86TargetInfo::getTlsGotRel(uint32_t Type) const { 435 if (Type == R_386_TLS_IE) 436 return Type; 437 return TlsGotRel; 438 } 439 440 bool X86TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 441 return Type == R_386_TLS_GD; 442 } 443 444 bool X86TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { 445 return Type == R_386_TLS_LDO_32 || Type == R_386_TLS_LDM; 446 } 447 448 bool X86TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 449 return Type == R_386_TLS_LDM; 450 } 451 452 bool X86TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 453 return Type == R_386_TLS_IE || Type == R_386_TLS_GOTIE; 454 } 455 456 void X86TargetInfo::writePltZero(uint8_t *Buf) const { 457 // Executable files and shared object files have 458 // separate procedure linkage tables. 459 if (Config->Pic) { 460 const uint8_t V[] = { 461 0xff, 0xb3, 0x04, 0x00, 0x00, 0x00, // pushl 4(%ebx) 462 0xff, 0xa3, 0x08, 0x00, 0x00, 0x00, // jmp *8(%ebx) 463 0x90, 0x90, 0x90, 0x90 // nop; nop; nop; nop 464 }; 465 memcpy(Buf, V, sizeof(V)); 466 return; 467 } 468 469 const uint8_t PltData[] = { 470 0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushl (GOT+4) 471 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *(GOT+8) 472 0x90, 0x90, 0x90, 0x90 // nop; nop; nop; nop 473 }; 474 memcpy(Buf, PltData, sizeof(PltData)); 475 uint32_t Got = Out<ELF32LE>::GotPlt->getVA(); 476 write32le(Buf + 2, Got + 4); 477 write32le(Buf + 8, Got + 8); 478 } 479 480 void X86TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 481 uint64_t PltEntryAddr, int32_t Index, 482 unsigned RelOff) const { 483 const uint8_t Inst[] = { 484 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, // jmp *foo_in_GOT|*foo@GOT(%ebx) 485 0x68, 0x00, 0x00, 0x00, 0x00, // pushl $reloc_offset 486 0xe9, 0x00, 0x00, 0x00, 0x00 // jmp .PLT0@PC 487 }; 488 memcpy(Buf, Inst, sizeof(Inst)); 489 490 // jmp *foo@GOT(%ebx) or jmp *foo_in_GOT 491 Buf[1] = Config->Pic ? 0xa3 : 0x25; 492 uint32_t Got = UseLazyBinding ? Out<ELF32LE>::GotPlt->getVA() 493 : Out<ELF32LE>::Got->getVA(); 494 write32le(Buf + 2, Config->Shared ? GotEntryAddr - Got : GotEntryAddr); 495 write32le(Buf + 7, RelOff); 496 write32le(Buf + 12, -Index * PltEntrySize - PltZeroSize - 16); 497 } 498 499 bool X86TargetInfo::needsCopyRelImpl(uint32_t Type) const { 500 return Type == R_386_32 || Type == R_386_16 || Type == R_386_8; 501 } 502 503 bool X86TargetInfo::needsGot(uint32_t Type, const SymbolBody &S) const { 504 if (S.isTls() && Type == R_386_TLS_GD) 505 return Target->canRelaxTls(Type, &S) && S.isPreemptible(); 506 if (Type == R_386_TLS_GOTIE || Type == R_386_TLS_IE) 507 return !canRelaxTls(Type, &S); 508 return Type == R_386_GOT32 || needsPlt(Type, S); 509 } 510 511 bool X86TargetInfo::needsPltImpl(uint32_t Type) const { 512 return Type == R_386_PLT32; 513 } 514 515 bool X86TargetInfo::isGotRelative(uint32_t Type) const { 516 // This relocation does not require got entry, 517 // but it is relative to got and needs it to be created. 518 // Here we request for that. 519 return Type == R_386_GOTOFF; 520 } 521 522 bool X86TargetInfo::refersToGotEntry(uint32_t Type) const { 523 return Type == R_386_GOT32; 524 } 525 526 uint64_t X86TargetInfo::getImplicitAddend(const uint8_t *Buf, 527 uint32_t Type) const { 528 switch (Type) { 529 default: 530 return 0; 531 case R_386_32: 532 case R_386_GOT32: 533 case R_386_GOTOFF: 534 case R_386_GOTPC: 535 case R_386_PC32: 536 case R_386_PLT32: 537 return read32le(Buf); 538 } 539 } 540 541 void X86TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 542 uint64_t P, uint64_t SA) const { 543 switch (Type) { 544 case R_386_32: 545 write32le(Loc, SA); 546 break; 547 case R_386_GOT32: { 548 uint64_t V = SA - Out<ELF32LE>::Got->getVA() - 549 Out<ELF32LE>::Got->getNumEntries() * 4; 550 checkInt<32>(V, Type); 551 write32le(Loc, V); 552 break; 553 } 554 case R_386_GOTOFF: 555 write32le(Loc, SA - Out<ELF32LE>::Got->getVA()); 556 break; 557 case R_386_GOTPC: 558 write32le(Loc, SA + Out<ELF32LE>::Got->getVA() - P); 559 break; 560 case R_386_PC32: 561 case R_386_PLT32: 562 write32le(Loc, SA - P); 563 break; 564 case R_386_TLS_GD: 565 case R_386_TLS_LDM: 566 case R_386_TLS_TPOFF: { 567 uint64_t V = SA - Out<ELF32LE>::Got->getVA() - 568 Out<ELF32LE>::Got->getNumEntries() * 4; 569 checkInt<32>(V, Type); 570 write32le(Loc, V); 571 break; 572 } 573 case R_386_TLS_IE: 574 case R_386_TLS_LDO_32: 575 write32le(Loc, SA); 576 break; 577 case R_386_TLS_LE: 578 write32le(Loc, SA - Out<ELF32LE>::TlsPhdr->p_memsz); 579 break; 580 case R_386_TLS_LE_32: 581 write32le(Loc, Out<ELF32LE>::TlsPhdr->p_memsz - SA); 582 break; 583 default: 584 fatal("unrecognized reloc " + Twine(Type)); 585 } 586 } 587 588 bool X86TargetInfo::needsDynRelative(uint32_t Type) const { 589 return Config->Shared && Type == R_386_TLS_IE; 590 } 591 592 size_t X86TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, 593 uint32_t Type, uint64_t P, 594 uint64_t SA) const { 595 // GD can be optimized to LE: 596 // leal x@tlsgd(, %ebx, 1), 597 // call __tls_get_addr@plt 598 // Can be converted to: 599 // movl %gs:0,%eax 600 // addl $x@ntpoff,%eax 601 // But gold emits subl $foo@tpoff,%eax instead of addl. 602 // These instructions are completely equal in behavior. 603 // This method generates subl to be consistent with gold. 604 const uint8_t Inst[] = { 605 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax 606 0x81, 0xe8, 0x00, 0x00, 0x00, 0x00 // subl 0(%ebx), %eax 607 }; 608 memcpy(Loc - 3, Inst, sizeof(Inst)); 609 relocateOne(Loc + 5, BufEnd, R_386_32, P, 610 Out<ELF32LE>::TlsPhdr->p_memsz - SA); 611 612 // The next relocation should be against __tls_get_addr, so skip it 613 return 1; 614 } 615 616 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.1 617 // IA-32 Linker Optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 618 // how GD can be optimized to IE: 619 // leal x@tlsgd(, %ebx, 1), 620 // call __tls_get_addr@plt 621 // Is converted to: 622 // movl %gs:0, %eax 623 // addl x@gotntpoff(%ebx), %eax 624 size_t X86TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, 625 uint32_t Type, uint64_t P, 626 uint64_t SA) const { 627 const uint8_t Inst[] = { 628 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax 629 0x03, 0x83, 0x00, 0x00, 0x00, 0x00 // addl 0(%ebx), %eax 630 }; 631 memcpy(Loc - 3, Inst, sizeof(Inst)); 632 relocateOne(Loc + 5, BufEnd, R_386_32, P, 633 SA - Out<ELF32LE>::Got->getVA() - 634 Out<ELF32LE>::Got->getNumEntries() * 4); 635 636 // The next relocation should be against __tls_get_addr, so skip it 637 return 1; 638 } 639 640 // In some conditions, relocations can be optimized to avoid using GOT. 641 // This function does that for Initial Exec to Local Exec case. 642 // Read "ELF Handling For Thread-Local Storage, 5.1 643 // IA-32 Linker Optimizations" (http://www.akkadia.org/drepper/tls.pdf) 644 // by Ulrich Drepper for details. 645 646 size_t X86TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, 647 uint32_t Type, uint64_t P, 648 uint64_t SA) const { 649 // Ulrich's document section 6.2 says that @gotntpoff can 650 // be used with MOVL or ADDL instructions. 651 // @indntpoff is similar to @gotntpoff, but for use in 652 // position dependent code. 653 uint8_t *Inst = Loc - 2; 654 uint8_t *Op = Loc - 1; 655 uint8_t Reg = (Loc[-1] >> 3) & 7; 656 bool IsMov = *Inst == 0x8b; 657 if (Type == R_386_TLS_IE) { 658 // For R_386_TLS_IE relocation we perform the next transformations: 659 // MOVL foo@INDNTPOFF,%EAX is transformed to MOVL $foo,%EAX 660 // MOVL foo@INDNTPOFF,%REG is transformed to MOVL $foo,%REG 661 // ADDL foo@INDNTPOFF,%REG is transformed to ADDL $foo,%REG 662 // First one is special because when EAX is used the sequence is 5 bytes 663 // long, otherwise it is 6 bytes. 664 if (*Op == 0xa1) { 665 *Op = 0xb8; 666 } else { 667 *Inst = IsMov ? 0xc7 : 0x81; 668 *Op = 0xc0 | ((*Op >> 3) & 7); 669 } 670 } else { 671 // R_386_TLS_GOTIE relocation can be optimized to 672 // R_386_TLS_LE so that it does not use GOT. 673 // "MOVL foo@GOTTPOFF(%RIP), %REG" is transformed to "MOVL $foo, %REG". 674 // "ADDL foo@GOTNTPOFF(%RIP), %REG" is transformed to "LEAL foo(%REG), %REG" 675 // Note: gold converts to ADDL instead of LEAL. 676 *Inst = IsMov ? 0xc7 : 0x8d; 677 if (IsMov) 678 *Op = 0xc0 | ((*Op >> 3) & 7); 679 else 680 *Op = 0x80 | Reg | (Reg << 3); 681 } 682 relocateOne(Loc, BufEnd, R_386_TLS_LE, P, SA); 683 684 return 0; 685 } 686 687 size_t X86TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, 688 uint32_t Type, uint64_t P, 689 uint64_t SA) const { 690 if (Type == R_386_TLS_LDO_32) { 691 relocateOne(Loc, BufEnd, R_386_TLS_LE, P, SA); 692 return 0; 693 } 694 695 // LD can be optimized to LE: 696 // leal foo(%reg),%eax 697 // call ___tls_get_addr 698 // Is converted to: 699 // movl %gs:0,%eax 700 // nop 701 // leal 0(%esi,1),%esi 702 const uint8_t Inst[] = { 703 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0,%eax 704 0x90, // nop 705 0x8d, 0x74, 0x26, 0x00 // leal 0(%esi,1),%esi 706 }; 707 memcpy(Loc - 2, Inst, sizeof(Inst)); 708 709 // The next relocation should be against __tls_get_addr, so skip it 710 return 1; 711 } 712 713 X86_64TargetInfo::X86_64TargetInfo() { 714 CopyRel = R_X86_64_COPY; 715 GotRel = R_X86_64_GLOB_DAT; 716 PltRel = R_X86_64_JUMP_SLOT; 717 RelativeRel = R_X86_64_RELATIVE; 718 IRelativeRel = R_X86_64_IRELATIVE; 719 TlsGotRel = R_X86_64_TPOFF64; 720 TlsModuleIndexRel = R_X86_64_DTPMOD64; 721 TlsOffsetRel = R_X86_64_DTPOFF64; 722 UseLazyBinding = true; 723 PltEntrySize = 16; 724 PltZeroSize = 16; 725 } 726 727 void X86_64TargetInfo::writeGotPltHeader(uint8_t *Buf) const { 728 write64le(Buf, Out<ELF64LE>::Dynamic->getVA()); 729 } 730 731 void X86_64TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 732 // See comments in X86TargetInfo::writeGotPlt. 733 write32le(Buf, Plt + 6); 734 } 735 736 void X86_64TargetInfo::writePltZero(uint8_t *Buf) const { 737 const uint8_t PltData[] = { 738 0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushq GOT+8(%rip) 739 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *GOT+16(%rip) 740 0x0f, 0x1f, 0x40, 0x00 // nopl 0x0(rax) 741 }; 742 memcpy(Buf, PltData, sizeof(PltData)); 743 uint64_t Got = Out<ELF64LE>::GotPlt->getVA(); 744 uint64_t Plt = Out<ELF64LE>::Plt->getVA(); 745 write32le(Buf + 2, Got - Plt + 2); // GOT+8 746 write32le(Buf + 8, Got - Plt + 4); // GOT+16 747 } 748 749 void X86_64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 750 uint64_t PltEntryAddr, int32_t Index, 751 unsigned RelOff) const { 752 const uint8_t Inst[] = { 753 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmpq *got(%rip) 754 0x68, 0x00, 0x00, 0x00, 0x00, // pushq <relocation index> 755 0xe9, 0x00, 0x00, 0x00, 0x00 // jmpq plt[0] 756 }; 757 memcpy(Buf, Inst, sizeof(Inst)); 758 759 write32le(Buf + 2, GotEntryAddr - PltEntryAddr - 6); 760 write32le(Buf + 7, Index); 761 write32le(Buf + 12, -Index * PltEntrySize - PltZeroSize - 16); 762 } 763 764 bool X86_64TargetInfo::needsCopyRelImpl(uint32_t Type) const { 765 return Type == R_X86_64_32S || Type == R_X86_64_32 || Type == R_X86_64_PC32 || 766 Type == R_X86_64_64; 767 } 768 769 bool X86_64TargetInfo::refersToGotEntry(uint32_t Type) const { 770 return Type == R_X86_64_GOTPCREL || Type == R_X86_64_GOTPCRELX || 771 Type == R_X86_64_REX_GOTPCRELX; 772 } 773 774 bool X86_64TargetInfo::needsGot(uint32_t Type, const SymbolBody &S) const { 775 if (Type == R_X86_64_TLSGD) 776 return Target->canRelaxTls(Type, &S) && S.isPreemptible(); 777 if (Type == R_X86_64_GOTTPOFF) 778 return !canRelaxTls(Type, &S); 779 return refersToGotEntry(Type) || needsPlt(Type, S); 780 } 781 782 uint32_t X86_64TargetInfo::getDynRel(uint32_t Type) const { 783 if (Type == R_X86_64_PC32 || Type == R_X86_64_32) 784 if (Config->Shared) 785 error(getELFRelocationTypeName(EM_X86_64, Type) + 786 " cannot be a dynamic relocation"); 787 return Type; 788 } 789 790 uint32_t X86_64TargetInfo::getTlsGotRel(uint32_t Type) const { 791 // No other types of TLS relocations requiring GOT should 792 // reach here. 793 assert(Type == R_X86_64_GOTTPOFF); 794 return R_X86_64_PC32; 795 } 796 797 bool X86_64TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 798 return Type == R_X86_64_GOTTPOFF; 799 } 800 801 bool X86_64TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 802 return Type == R_X86_64_TLSGD; 803 } 804 805 bool X86_64TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 806 return Type == R_X86_64_TLSLD; 807 } 808 809 bool X86_64TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { 810 return Type == R_X86_64_DTPOFF32 || Type == R_X86_64_DTPOFF64 || 811 Type == R_X86_64_TLSLD; 812 } 813 814 bool X86_64TargetInfo::needsPltImpl(uint32_t Type) const { 815 return Type == R_X86_64_PLT32; 816 } 817 818 bool X86_64TargetInfo::isRelRelative(uint32_t Type) const { 819 switch (Type) { 820 default: 821 return false; 822 case R_X86_64_DTPOFF32: 823 case R_X86_64_DTPOFF64: 824 case R_X86_64_GOTTPOFF: 825 case R_X86_64_PC8: 826 case R_X86_64_PC16: 827 case R_X86_64_PC32: 828 case R_X86_64_PC64: 829 case R_X86_64_PLT32: 830 case R_X86_64_TPOFF32: 831 return true; 832 } 833 } 834 835 bool X86_64TargetInfo::isSizeRel(uint32_t Type) const { 836 return Type == R_X86_64_SIZE32 || Type == R_X86_64_SIZE64; 837 } 838 839 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 840 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 841 // how GD can be optimized to LE: 842 // .byte 0x66 843 // leaq x@tlsgd(%rip), %rdi 844 // .word 0x6666 845 // rex64 846 // call __tls_get_addr@plt 847 // Is converted to: 848 // mov %fs:0x0,%rax 849 // lea x@tpoff,%rax 850 size_t X86_64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, 851 uint32_t Type, uint64_t P, 852 uint64_t SA) const { 853 const uint8_t Inst[] = { 854 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax 855 0x48, 0x8d, 0x80, 0x00, 0x00, 0x00, 0x00 // lea x@tpoff,%rax 856 }; 857 memcpy(Loc - 4, Inst, sizeof(Inst)); 858 relocateOne(Loc + 8, BufEnd, R_X86_64_TPOFF32, P, SA); 859 860 // The next relocation should be against __tls_get_addr, so skip it 861 return 1; 862 } 863 864 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 865 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 866 // how GD can be optimized to IE: 867 // .byte 0x66 868 // leaq x@tlsgd(%rip), %rdi 869 // .word 0x6666 870 // rex64 871 // call __tls_get_addr@plt 872 // Is converted to: 873 // mov %fs:0x0,%rax 874 // addq x@tpoff,%rax 875 size_t X86_64TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, 876 uint32_t Type, uint64_t P, 877 uint64_t SA) const { 878 const uint8_t Inst[] = { 879 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax 880 0x48, 0x03, 0x05, 0x00, 0x00, 0x00, 0x00 // addq x@tpoff,%rax 881 }; 882 memcpy(Loc - 4, Inst, sizeof(Inst)); 883 relocateOne(Loc + 8, BufEnd, R_X86_64_PC32, P + 12, SA); 884 885 // The next relocation should be against __tls_get_addr, so skip it 886 return 1; 887 } 888 889 // In some conditions, R_X86_64_GOTTPOFF relocation can be optimized to 890 // R_X86_64_TPOFF32 so that it does not use GOT. 891 // This function does that. Read "ELF Handling For Thread-Local Storage, 892 // 5.5 x86-x64 linker optimizations" (http://www.akkadia.org/drepper/tls.pdf) 893 // by Ulrich Drepper for details. 894 size_t X86_64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, 895 uint32_t Type, uint64_t P, 896 uint64_t SA) const { 897 // Ulrich's document section 6.5 says that @gottpoff(%rip) must be 898 // used in MOVQ or ADDQ instructions only. 899 // "MOVQ foo@GOTTPOFF(%RIP), %REG" is transformed to "MOVQ $foo, %REG". 900 // "ADDQ foo@GOTTPOFF(%RIP), %REG" is transformed to "LEAQ foo(%REG), %REG" 901 // (if the register is not RSP/R12) or "ADDQ $foo, %RSP". 902 // Opcodes info can be found at http://ref.x86asm.net/coder64.html#x48. 903 uint8_t *Prefix = Loc - 3; 904 uint8_t *Inst = Loc - 2; 905 uint8_t *RegSlot = Loc - 1; 906 uint8_t Reg = Loc[-1] >> 3; 907 bool IsMov = *Inst == 0x8b; 908 bool RspAdd = !IsMov && Reg == 4; 909 // r12 and rsp registers requires special handling. 910 // Problem is that for other registers, for example leaq 0xXXXXXXXX(%r11),%r11 911 // result out is 7 bytes: 4d 8d 9b XX XX XX XX, 912 // but leaq 0xXXXXXXXX(%r12),%r12 is 8 bytes: 4d 8d a4 24 XX XX XX XX. 913 // The same true for rsp. So we convert to addq for them, saving 1 byte that 914 // we dont have. 915 if (RspAdd) 916 *Inst = 0x81; 917 else 918 *Inst = IsMov ? 0xc7 : 0x8d; 919 if (*Prefix == 0x4c) 920 *Prefix = (IsMov || RspAdd) ? 0x49 : 0x4d; 921 *RegSlot = (IsMov || RspAdd) ? (0xc0 | Reg) : (0x80 | Reg | (Reg << 3)); 922 relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA); 923 return 0; 924 } 925 926 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 927 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 928 // how LD can be optimized to LE: 929 // leaq bar@tlsld(%rip), %rdi 930 // callq __tls_get_addr@PLT 931 // leaq bar@dtpoff(%rax), %rcx 932 // Is converted to: 933 // .word 0x6666 934 // .byte 0x66 935 // mov %fs:0,%rax 936 // leaq bar@tpoff(%rax), %rcx 937 size_t X86_64TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, 938 uint32_t Type, uint64_t P, 939 uint64_t SA) const { 940 if (Type == R_X86_64_DTPOFF64) { 941 write64le(Loc, SA - Out<ELF64LE>::TlsPhdr->p_memsz); 942 return 0; 943 } 944 if (Type == R_X86_64_DTPOFF32) { 945 relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA); 946 return 0; 947 } 948 949 const uint8_t Inst[] = { 950 0x66, 0x66, //.word 0x6666 951 0x66, //.byte 0x66 952 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00 // mov %fs:0,%rax 953 }; 954 memcpy(Loc - 3, Inst, sizeof(Inst)); 955 // The next relocation should be against __tls_get_addr, so skip it 956 return 1; 957 } 958 959 void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 960 uint64_t P, uint64_t SA) const { 961 switch (Type) { 962 case R_X86_64_32: 963 checkUInt<32>(SA, Type); 964 write32le(Loc, SA); 965 break; 966 case R_X86_64_32S: 967 checkInt<32>(SA, Type); 968 write32le(Loc, SA); 969 break; 970 case R_X86_64_64: 971 case R_X86_64_DTPOFF64: 972 write64le(Loc, SA); 973 break; 974 case R_X86_64_DTPOFF32: 975 write32le(Loc, SA); 976 break; 977 case R_X86_64_GOTPCREL: 978 case R_X86_64_GOTPCRELX: 979 case R_X86_64_REX_GOTPCRELX: 980 case R_X86_64_PC32: 981 case R_X86_64_PLT32: 982 case R_X86_64_TLSGD: 983 case R_X86_64_TLSLD: 984 write32le(Loc, SA - P); 985 break; 986 case R_X86_64_SIZE32: 987 write32le(Loc, SA); 988 break; 989 case R_X86_64_SIZE64: 990 write64le(Loc, SA); 991 break; 992 case R_X86_64_TPOFF32: { 993 uint64_t Val = SA - Out<ELF64LE>::TlsPhdr->p_memsz; 994 checkInt<32>(Val, Type); 995 write32le(Loc, Val); 996 break; 997 } 998 default: 999 fatal("unrecognized reloc " + Twine(Type)); 1000 } 1001 } 1002 1003 // Relocation masks following the #lo(value), #hi(value), #ha(value), 1004 // #higher(value), #highera(value), #highest(value), and #highesta(value) 1005 // macros defined in section 4.5.1. Relocation Types of the PPC-elf64abi 1006 // document. 1007 static uint16_t applyPPCLo(uint64_t V) { return V; } 1008 static uint16_t applyPPCHi(uint64_t V) { return V >> 16; } 1009 static uint16_t applyPPCHa(uint64_t V) { return (V + 0x8000) >> 16; } 1010 static uint16_t applyPPCHigher(uint64_t V) { return V >> 32; } 1011 static uint16_t applyPPCHighera(uint64_t V) { return (V + 0x8000) >> 32; } 1012 static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; } 1013 static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; } 1014 1015 PPCTargetInfo::PPCTargetInfo() {} 1016 bool PPCTargetInfo::isRelRelative(uint32_t Type) const { return false; } 1017 1018 void PPCTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1019 uint64_t P, uint64_t SA) const { 1020 switch (Type) { 1021 case R_PPC_ADDR16_HA: 1022 write16be(Loc, applyPPCHa(SA)); 1023 break; 1024 case R_PPC_ADDR16_LO: 1025 write16be(Loc, applyPPCLo(SA)); 1026 break; 1027 default: 1028 fatal("unrecognized reloc " + Twine(Type)); 1029 } 1030 } 1031 1032 PPC64TargetInfo::PPC64TargetInfo() { 1033 GotRel = R_PPC64_GLOB_DAT; 1034 RelativeRel = R_PPC64_RELATIVE; 1035 PltEntrySize = 32; 1036 1037 // We need 64K pages (at least under glibc/Linux, the loader won't 1038 // set different permissions on a finer granularity than that). 1039 PageSize = 65536; 1040 1041 // The PPC64 ELF ABI v1 spec, says: 1042 // 1043 // It is normally desirable to put segments with different characteristics 1044 // in separate 256 Mbyte portions of the address space, to give the 1045 // operating system full paging flexibility in the 64-bit address space. 1046 // 1047 // And because the lowest non-zero 256M boundary is 0x10000000, PPC64 linkers 1048 // use 0x10000000 as the starting address. 1049 VAStart = 0x10000000; 1050 } 1051 1052 uint64_t getPPC64TocBase() { 1053 // The TOC consists of sections .got, .toc, .tocbss, .plt in that 1054 // order. The TOC starts where the first of these sections starts. 1055 1056 // FIXME: This obviously does not do the right thing when there is no .got 1057 // section, but there is a .toc or .tocbss section. 1058 uint64_t TocVA = Out<ELF64BE>::Got->getVA(); 1059 if (!TocVA) 1060 TocVA = Out<ELF64BE>::Plt->getVA(); 1061 1062 // Per the ppc64-elf-linux ABI, The TOC base is TOC value plus 0x8000 1063 // thus permitting a full 64 Kbytes segment. Note that the glibc startup 1064 // code (crt1.o) assumes that you can get from the TOC base to the 1065 // start of the .toc section with only a single (signed) 16-bit relocation. 1066 return TocVA + 0x8000; 1067 } 1068 1069 void PPC64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1070 uint64_t PltEntryAddr, int32_t Index, 1071 unsigned RelOff) const { 1072 uint64_t Off = GotEntryAddr - getPPC64TocBase(); 1073 1074 // FIXME: What we should do, in theory, is get the offset of the function 1075 // descriptor in the .opd section, and use that as the offset from %r2 (the 1076 // TOC-base pointer). Instead, we have the GOT-entry offset, and that will 1077 // be a pointer to the function descriptor in the .opd section. Using 1078 // this scheme is simpler, but requires an extra indirection per PLT dispatch. 1079 1080 write32be(Buf, 0xf8410028); // std %r2, 40(%r1) 1081 write32be(Buf + 4, 0x3d620000 | applyPPCHa(Off)); // addis %r11, %r2, X@ha 1082 write32be(Buf + 8, 0xe98b0000 | applyPPCLo(Off)); // ld %r12, X@l(%r11) 1083 write32be(Buf + 12, 0xe96c0000); // ld %r11,0(%r12) 1084 write32be(Buf + 16, 0x7d6903a6); // mtctr %r11 1085 write32be(Buf + 20, 0xe84c0008); // ld %r2,8(%r12) 1086 write32be(Buf + 24, 0xe96c0010); // ld %r11,16(%r12) 1087 write32be(Buf + 28, 0x4e800420); // bctr 1088 } 1089 1090 bool PPC64TargetInfo::needsGot(uint32_t Type, const SymbolBody &S) const { 1091 if (needsPlt(Type, S)) 1092 return true; 1093 1094 switch (Type) { 1095 default: return false; 1096 case R_PPC64_GOT16: 1097 case R_PPC64_GOT16_DS: 1098 case R_PPC64_GOT16_HA: 1099 case R_PPC64_GOT16_HI: 1100 case R_PPC64_GOT16_LO: 1101 case R_PPC64_GOT16_LO_DS: 1102 return true; 1103 } 1104 } 1105 1106 bool PPC64TargetInfo::needsPltImpl(uint32_t Type) const { 1107 // These are function calls that need to be redirected through a PLT stub. 1108 return Type == R_PPC64_REL24; 1109 } 1110 1111 bool PPC64TargetInfo::isRelRelative(uint32_t Type) const { 1112 switch (Type) { 1113 default: 1114 return true; 1115 case R_PPC64_ADDR64: 1116 case R_PPC64_TOC: 1117 return false; 1118 } 1119 } 1120 1121 void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1122 uint64_t P, uint64_t SA) const { 1123 uint64_t TB = getPPC64TocBase(); 1124 1125 // For a TOC-relative relocation, adjust the addend and proceed in terms of 1126 // the corresponding ADDR16 relocation type. 1127 switch (Type) { 1128 case R_PPC64_TOC16: Type = R_PPC64_ADDR16; SA -= TB; break; 1129 case R_PPC64_TOC16_DS: Type = R_PPC64_ADDR16_DS; SA -= TB; break; 1130 case R_PPC64_TOC16_HA: Type = R_PPC64_ADDR16_HA; SA -= TB; break; 1131 case R_PPC64_TOC16_HI: Type = R_PPC64_ADDR16_HI; SA -= TB; break; 1132 case R_PPC64_TOC16_LO: Type = R_PPC64_ADDR16_LO; SA -= TB; break; 1133 case R_PPC64_TOC16_LO_DS: Type = R_PPC64_ADDR16_LO_DS; SA -= TB; break; 1134 default: break; 1135 } 1136 1137 switch (Type) { 1138 case R_PPC64_ADDR14: { 1139 checkAlignment<4>(SA, Type); 1140 // Preserve the AA/LK bits in the branch instruction 1141 uint8_t AALK = Loc[3]; 1142 write16be(Loc + 2, (AALK & 3) | (SA & 0xfffc)); 1143 break; 1144 } 1145 case R_PPC64_ADDR16: 1146 checkInt<16>(SA, Type); 1147 write16be(Loc, SA); 1148 break; 1149 case R_PPC64_ADDR16_DS: 1150 checkInt<16>(SA, Type); 1151 write16be(Loc, (read16be(Loc) & 3) | (SA & ~3)); 1152 break; 1153 case R_PPC64_ADDR16_HA: 1154 write16be(Loc, applyPPCHa(SA)); 1155 break; 1156 case R_PPC64_ADDR16_HI: 1157 write16be(Loc, applyPPCHi(SA)); 1158 break; 1159 case R_PPC64_ADDR16_HIGHER: 1160 write16be(Loc, applyPPCHigher(SA)); 1161 break; 1162 case R_PPC64_ADDR16_HIGHERA: 1163 write16be(Loc, applyPPCHighera(SA)); 1164 break; 1165 case R_PPC64_ADDR16_HIGHEST: 1166 write16be(Loc, applyPPCHighest(SA)); 1167 break; 1168 case R_PPC64_ADDR16_HIGHESTA: 1169 write16be(Loc, applyPPCHighesta(SA)); 1170 break; 1171 case R_PPC64_ADDR16_LO: 1172 write16be(Loc, applyPPCLo(SA)); 1173 break; 1174 case R_PPC64_ADDR16_LO_DS: 1175 write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(SA) & ~3)); 1176 break; 1177 case R_PPC64_ADDR32: 1178 checkInt<32>(SA, Type); 1179 write32be(Loc, SA); 1180 break; 1181 case R_PPC64_ADDR64: 1182 write64be(Loc, SA); 1183 break; 1184 case R_PPC64_REL16_HA: 1185 write16be(Loc, applyPPCHa(SA - P)); 1186 break; 1187 case R_PPC64_REL16_HI: 1188 write16be(Loc, applyPPCHi(SA - P)); 1189 break; 1190 case R_PPC64_REL16_LO: 1191 write16be(Loc, applyPPCLo(SA - P)); 1192 break; 1193 case R_PPC64_REL24: { 1194 // If we have an undefined weak symbol, we might get here with a symbol 1195 // address of zero. That could overflow, but the code must be unreachable, 1196 // so don't bother doing anything at all. 1197 if (!SA) 1198 break; 1199 1200 uint64_t PltStart = Out<ELF64BE>::Plt->getVA(); 1201 uint64_t PltEnd = PltStart + Out<ELF64BE>::Plt->getSize(); 1202 bool InPlt = PltStart <= SA && SA < PltEnd; 1203 1204 if (!InPlt && Out<ELF64BE>::Opd) { 1205 // If this is a local call, and we currently have the address of a 1206 // function-descriptor, get the underlying code address instead. 1207 uint64_t OpdStart = Out<ELF64BE>::Opd->getVA(); 1208 uint64_t OpdEnd = OpdStart + Out<ELF64BE>::Opd->getSize(); 1209 bool InOpd = OpdStart <= SA && SA < OpdEnd; 1210 1211 if (InOpd) 1212 SA = read64be(&Out<ELF64BE>::OpdBuf[SA - OpdStart]); 1213 } 1214 1215 uint32_t Mask = 0x03FFFFFC; 1216 checkInt<24>(SA - P, Type); 1217 write32be(Loc, (read32be(Loc) & ~Mask) | ((SA - P) & Mask)); 1218 1219 uint32_t Nop = 0x60000000; 1220 if (InPlt && Loc + 8 <= BufEnd && read32be(Loc + 4) == Nop) 1221 write32be(Loc + 4, 0xe8410028); // ld %r2, 40(%r1) 1222 break; 1223 } 1224 case R_PPC64_REL32: 1225 checkInt<32>(SA - P, Type); 1226 write32be(Loc, SA - P); 1227 break; 1228 case R_PPC64_REL64: 1229 write64be(Loc, SA - P); 1230 break; 1231 case R_PPC64_TOC: 1232 write64be(Loc, SA); 1233 break; 1234 default: 1235 fatal("unrecognized reloc " + Twine(Type)); 1236 } 1237 } 1238 1239 AArch64TargetInfo::AArch64TargetInfo() { 1240 CopyRel = R_AARCH64_COPY; 1241 RelativeRel = R_AARCH64_RELATIVE; 1242 IRelativeRel = R_AARCH64_IRELATIVE; 1243 GotRel = R_AARCH64_GLOB_DAT; 1244 PltRel = R_AARCH64_JUMP_SLOT; 1245 TlsGotRel = R_AARCH64_TLS_TPREL64; 1246 TlsModuleIndexRel = R_AARCH64_TLS_DTPMOD64; 1247 TlsOffsetRel = R_AARCH64_TLS_DTPREL64; 1248 UseLazyBinding = true; 1249 PltEntrySize = 16; 1250 PltZeroSize = 32; 1251 } 1252 1253 bool AArch64TargetInfo::isRelRelative(uint32_t Type) const { 1254 switch (Type) { 1255 default: 1256 return false; 1257 case R_AARCH64_ADD_ABS_LO12_NC: 1258 case R_AARCH64_ADR_GOT_PAGE: 1259 case R_AARCH64_ADR_PREL_LO21: 1260 case R_AARCH64_ADR_PREL_PG_HI21: 1261 case R_AARCH64_CALL26: 1262 case R_AARCH64_CONDBR19: 1263 case R_AARCH64_JUMP26: 1264 case R_AARCH64_LDST8_ABS_LO12_NC: 1265 case R_AARCH64_LDST16_ABS_LO12_NC: 1266 case R_AARCH64_LDST32_ABS_LO12_NC: 1267 case R_AARCH64_LDST64_ABS_LO12_NC: 1268 case R_AARCH64_LDST128_ABS_LO12_NC: 1269 case R_AARCH64_PREL32: 1270 case R_AARCH64_PREL64: 1271 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: 1272 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1273 case R_AARCH64_TLSLE_ADD_TPREL_HI12: 1274 case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC: 1275 case R_AARCH64_TSTBR14: 1276 return true; 1277 } 1278 } 1279 1280 bool AArch64TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 1281 return Type == R_AARCH64_TLSDESC_ADR_PAGE21 || 1282 Type == R_AARCH64_TLSDESC_LD64_LO12_NC || 1283 Type == R_AARCH64_TLSDESC_ADD_LO12_NC || 1284 Type == R_AARCH64_TLSDESC_CALL; 1285 } 1286 1287 bool AArch64TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 1288 return Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 || 1289 Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC; 1290 } 1291 1292 uint32_t AArch64TargetInfo::getDynRel(uint32_t Type) const { 1293 if (Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64) 1294 return Type; 1295 StringRef S = getELFRelocationTypeName(EM_AARCH64, Type); 1296 error("relocation " + S + " cannot be used when making a shared object; " 1297 "recompile with -fPIC."); 1298 // Keep it going with a dummy value so that we can find more reloc errors. 1299 return R_AARCH64_ABS32; 1300 } 1301 1302 void AArch64TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 1303 write64le(Buf, Out<ELF64LE>::Plt->getVA()); 1304 } 1305 1306 void AArch64TargetInfo::writePltZero(uint8_t *Buf) const { 1307 const uint8_t PltData[] = { 1308 0xf0, 0x7b, 0xbf, 0xa9, // stp x16, x30, [sp,#-16]! 1309 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[2])) 1310 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[2]))] 1311 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[2])) 1312 0x20, 0x02, 0x1f, 0xd6, // br x17 1313 0x1f, 0x20, 0x03, 0xd5, // nop 1314 0x1f, 0x20, 0x03, 0xd5, // nop 1315 0x1f, 0x20, 0x03, 0xd5 // nop 1316 }; 1317 memcpy(Buf, PltData, sizeof(PltData)); 1318 1319 uint64_t Got = Out<ELF64LE>::GotPlt->getVA(); 1320 uint64_t Plt = Out<ELF64LE>::Plt->getVA(); 1321 relocateOne(Buf + 4, Buf + 8, R_AARCH64_ADR_PREL_PG_HI21, Plt + 4, Got + 16); 1322 relocateOne(Buf + 8, Buf + 12, R_AARCH64_LDST64_ABS_LO12_NC, Plt + 8, 1323 Got + 16); 1324 relocateOne(Buf + 12, Buf + 16, R_AARCH64_ADD_ABS_LO12_NC, Plt + 12, 1325 Got + 16); 1326 } 1327 1328 void AArch64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1329 uint64_t PltEntryAddr, int32_t Index, 1330 unsigned RelOff) const { 1331 const uint8_t Inst[] = { 1332 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[n])) 1333 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[n]))] 1334 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[n])) 1335 0x20, 0x02, 0x1f, 0xd6 // br x17 1336 }; 1337 memcpy(Buf, Inst, sizeof(Inst)); 1338 1339 relocateOne(Buf, Buf + 4, R_AARCH64_ADR_PREL_PG_HI21, PltEntryAddr, 1340 GotEntryAddr); 1341 relocateOne(Buf + 4, Buf + 8, R_AARCH64_LDST64_ABS_LO12_NC, PltEntryAddr + 4, 1342 GotEntryAddr); 1343 relocateOne(Buf + 8, Buf + 12, R_AARCH64_ADD_ABS_LO12_NC, PltEntryAddr + 8, 1344 GotEntryAddr); 1345 } 1346 1347 uint32_t AArch64TargetInfo::getTlsGotRel(uint32_t Type) const { 1348 assert(Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 || 1349 Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC); 1350 return Type; 1351 } 1352 1353 bool AArch64TargetInfo::needsCopyRelImpl(uint32_t Type) const { 1354 switch (Type) { 1355 default: 1356 return false; 1357 case R_AARCH64_ABS16: 1358 case R_AARCH64_ABS32: 1359 case R_AARCH64_ABS64: 1360 case R_AARCH64_ADD_ABS_LO12_NC: 1361 case R_AARCH64_ADR_PREL_LO21: 1362 case R_AARCH64_ADR_PREL_PG_HI21: 1363 case R_AARCH64_LDST8_ABS_LO12_NC: 1364 case R_AARCH64_LDST16_ABS_LO12_NC: 1365 case R_AARCH64_LDST32_ABS_LO12_NC: 1366 case R_AARCH64_LDST64_ABS_LO12_NC: 1367 case R_AARCH64_LDST128_ABS_LO12_NC: 1368 return true; 1369 } 1370 } 1371 1372 bool AArch64TargetInfo::needsGot(uint32_t Type, const SymbolBody &S) const { 1373 switch (Type) { 1374 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: 1375 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1376 return !canRelaxTls(Type, &S); 1377 case R_AARCH64_ADR_GOT_PAGE: 1378 case R_AARCH64_LD64_GOT_LO12_NC: 1379 return true; 1380 default: 1381 return needsPlt(Type, S); 1382 } 1383 } 1384 1385 bool AArch64TargetInfo::refersToGotEntry(uint32_t Type) const { 1386 return Type == R_AARCH64_ADR_GOT_PAGE || Type == R_AARCH64_LD64_GOT_LO12_NC; 1387 } 1388 1389 bool AArch64TargetInfo::needsPltImpl(uint32_t Type) const { 1390 switch (Type) { 1391 default: 1392 return false; 1393 case R_AARCH64_CALL26: 1394 case R_AARCH64_CONDBR19: 1395 case R_AARCH64_JUMP26: 1396 case R_AARCH64_TSTBR14: 1397 return true; 1398 } 1399 } 1400 1401 static void updateAArch64Addr(uint8_t *L, uint64_t Imm) { 1402 uint32_t ImmLo = (Imm & 0x3) << 29; 1403 uint32_t ImmHi = ((Imm & 0x1FFFFC) >> 2) << 5; 1404 uint64_t Mask = (0x3 << 29) | (0x7FFFF << 5); 1405 write32le(L, (read32le(L) & ~Mask) | ImmLo | ImmHi); 1406 } 1407 1408 static inline void updateAArch64Add(uint8_t *L, uint64_t Imm) { 1409 or32le(L, (Imm & 0xFFF) << 10); 1410 } 1411 1412 // Page(Expr) is the page address of the expression Expr, defined 1413 // as (Expr & ~0xFFF). (This applies even if the machine page size 1414 // supported by the platform has a different value.) 1415 static uint64_t getAArch64Page(uint64_t Expr) { 1416 return Expr & (~static_cast<uint64_t>(0xFFF)); 1417 } 1418 1419 void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, 1420 uint32_t Type, uint64_t P, 1421 uint64_t SA) const { 1422 switch (Type) { 1423 case R_AARCH64_ABS16: 1424 checkIntUInt<16>(SA, Type); 1425 write16le(Loc, SA); 1426 break; 1427 case R_AARCH64_ABS32: 1428 checkIntUInt<32>(SA, Type); 1429 write32le(Loc, SA); 1430 break; 1431 case R_AARCH64_ABS64: 1432 write64le(Loc, SA); 1433 break; 1434 case R_AARCH64_ADD_ABS_LO12_NC: 1435 // This relocation stores 12 bits and there's no instruction 1436 // to do it. Instead, we do a 32 bits store of the value 1437 // of r_addend bitwise-or'ed Loc. This assumes that the addend 1438 // bits in Loc are zero. 1439 or32le(Loc, (SA & 0xFFF) << 10); 1440 break; 1441 case R_AARCH64_ADR_GOT_PAGE: { 1442 uint64_t X = getAArch64Page(SA) - getAArch64Page(P); 1443 checkInt<33>(X, Type); 1444 updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12] 1445 break; 1446 } 1447 case R_AARCH64_ADR_PREL_LO21: { 1448 uint64_t X = SA - P; 1449 checkInt<21>(X, Type); 1450 updateAArch64Addr(Loc, X & 0x1FFFFF); 1451 break; 1452 } 1453 case R_AARCH64_ADR_PREL_PG_HI21: 1454 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: { 1455 uint64_t X = getAArch64Page(SA) - getAArch64Page(P); 1456 checkInt<33>(X, Type); 1457 updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12] 1458 break; 1459 } 1460 case R_AARCH64_CALL26: 1461 case R_AARCH64_JUMP26: { 1462 uint64_t X = SA - P; 1463 checkInt<28>(X, Type); 1464 or32le(Loc, (X & 0x0FFFFFFC) >> 2); 1465 break; 1466 } 1467 case R_AARCH64_CONDBR19: { 1468 uint64_t X = SA - P; 1469 checkInt<21>(X, Type); 1470 or32le(Loc, (X & 0x1FFFFC) << 3); 1471 break; 1472 } 1473 case R_AARCH64_LD64_GOT_LO12_NC: 1474 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1475 checkAlignment<8>(SA, Type); 1476 or32le(Loc, (SA & 0xFF8) << 7); 1477 break; 1478 case R_AARCH64_LDST128_ABS_LO12_NC: 1479 or32le(Loc, (SA & 0x0FF8) << 6); 1480 break; 1481 case R_AARCH64_LDST16_ABS_LO12_NC: 1482 or32le(Loc, (SA & 0x0FFC) << 9); 1483 break; 1484 case R_AARCH64_LDST8_ABS_LO12_NC: 1485 or32le(Loc, (SA & 0xFFF) << 10); 1486 break; 1487 case R_AARCH64_LDST32_ABS_LO12_NC: 1488 or32le(Loc, (SA & 0xFFC) << 8); 1489 break; 1490 case R_AARCH64_LDST64_ABS_LO12_NC: 1491 or32le(Loc, (SA & 0xFF8) << 7); 1492 break; 1493 case R_AARCH64_PREL16: 1494 checkIntUInt<16>(SA - P, Type); 1495 write16le(Loc, SA - P); 1496 break; 1497 case R_AARCH64_PREL32: 1498 checkIntUInt<32>(SA - P, Type); 1499 write32le(Loc, SA - P); 1500 break; 1501 case R_AARCH64_PREL64: 1502 write64le(Loc, SA - P); 1503 break; 1504 case R_AARCH64_TSTBR14: { 1505 uint64_t X = SA - P; 1506 checkInt<16>(X, Type); 1507 or32le(Loc, (X & 0xFFFC) << 3); 1508 break; 1509 } 1510 case R_AARCH64_TLSLE_ADD_TPREL_HI12: { 1511 uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA; 1512 checkInt<24>(V, Type); 1513 updateAArch64Add(Loc, (V & 0xFFF000) >> 12); 1514 break; 1515 } 1516 case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC: { 1517 uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA; 1518 updateAArch64Add(Loc, V & 0xFFF); 1519 break; 1520 } 1521 default: 1522 fatal("unrecognized reloc " + Twine(Type)); 1523 } 1524 } 1525 1526 size_t AArch64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, 1527 uint32_t Type, uint64_t P, 1528 uint64_t SA) const { 1529 // TLSDESC Global-Dynamic relocation are in the form: 1530 // adrp x0, :tlsdesc:v [R_AARCH64_TLSDESC_ADR_PAGE21] 1531 // ldr x1, [x0, #:tlsdesc_lo12:v [R_AARCH64_TLSDESC_LD64_LO12_NC] 1532 // add x0, x0, :tlsdesc_los:v [_AARCH64_TLSDESC_ADD_LO12_NC] 1533 // .tlsdesccall [R_AARCH64_TLSDESC_CALL] 1534 // And it can optimized to: 1535 // movz x0, #0x0, lsl #16 1536 // movk x0, #0x10 1537 // nop 1538 // nop 1539 uint64_t TPOff = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align); 1540 uint64_t X = SA + TPOff; 1541 checkUInt<32>(X, Type); 1542 1543 uint32_t NewInst; 1544 switch (Type) { 1545 case R_AARCH64_TLSDESC_ADD_LO12_NC: 1546 case R_AARCH64_TLSDESC_CALL: 1547 // nop 1548 NewInst = 0xd503201f; 1549 break; 1550 case R_AARCH64_TLSDESC_ADR_PAGE21: 1551 // movz 1552 NewInst = 0xd2a00000 | (((X >> 16) & 0xffff) << 5); 1553 break; 1554 case R_AARCH64_TLSDESC_LD64_LO12_NC: 1555 // movk 1556 NewInst = 0xf2800000 | ((X & 0xffff) << 5); 1557 break; 1558 default: 1559 llvm_unreachable("unsupported Relocation for TLS GD to LE relax"); 1560 } 1561 write32le(Loc, NewInst); 1562 1563 return 0; 1564 } 1565 1566 size_t AArch64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, 1567 uint32_t Type, uint64_t P, 1568 uint64_t SA) const { 1569 uint64_t TPOff = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align); 1570 uint64_t X = SA + TPOff; 1571 checkUInt<32>(X, Type); 1572 1573 uint32_t Inst = read32le(Loc); 1574 uint32_t NewInst; 1575 if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21) { 1576 // Generate movz. 1577 unsigned RegNo = (Inst & 0x1f); 1578 NewInst = (0xd2a00000 | RegNo) | (((X >> 16) & 0xffff) << 5); 1579 } else if (Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC) { 1580 // Generate movk 1581 unsigned RegNo = (Inst & 0x1f); 1582 NewInst = (0xf2800000 | RegNo) | ((X & 0xffff) << 5); 1583 } else { 1584 llvm_unreachable("invalid Relocation for TLS IE to LE Relax"); 1585 } 1586 write32le(Loc, NewInst); 1587 1588 return 0; 1589 } 1590 1591 // Implementing relocations for AMDGPU is low priority since most 1592 // programs don't use relocations now. Thus, this function is not 1593 // actually called (relocateOne is called for each relocation). 1594 // That's why the AMDGPU port works without implementing this function. 1595 void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1596 uint64_t P, uint64_t SA) const { 1597 llvm_unreachable("not implemented"); 1598 } 1599 1600 template <class ELFT> MipsTargetInfo<ELFT>::MipsTargetInfo() { 1601 GotHeaderEntriesNum = 2; 1602 GotPltHeaderEntriesNum = 2; 1603 PageSize = 65536; 1604 PltEntrySize = 16; 1605 PltZeroSize = 32; 1606 ThunkSize = 16; 1607 UseLazyBinding = true; 1608 CopyRel = R_MIPS_COPY; 1609 PltRel = R_MIPS_JUMP_SLOT; 1610 RelativeRel = R_MIPS_REL32; 1611 } 1612 1613 template <class ELFT> 1614 uint32_t MipsTargetInfo<ELFT>::getDynRel(uint32_t Type) const { 1615 if (Type == R_MIPS_32 || Type == R_MIPS_64) 1616 return R_MIPS_REL32; 1617 StringRef S = getELFRelocationTypeName(EM_MIPS, Type); 1618 error("relocation " + S + " cannot be used when making a shared object; " 1619 "recompile with -fPIC."); 1620 // Keep it going with a dummy value so that we can find more reloc errors. 1621 return R_MIPS_32; 1622 } 1623 1624 template <class ELFT> 1625 void MipsTargetInfo<ELFT>::writeGotHeader(uint8_t *Buf) const { 1626 typedef typename ELFT::Off Elf_Off; 1627 typedef typename ELFT::uint uintX_t; 1628 1629 // Set the MSB of the second GOT slot. This is not required by any 1630 // MIPS ABI documentation, though. 1631 // 1632 // There is a comment in glibc saying that "The MSB of got[1] of a 1633 // gnu object is set to identify gnu objects," and in GNU gold it 1634 // says "the second entry will be used by some runtime loaders". 1635 // But how this field is being used is unclear. 1636 // 1637 // We are not really willing to mimic other linkers behaviors 1638 // without understanding why they do that, but because all files 1639 // generated by GNU tools have this special GOT value, and because 1640 // we've been doing this for years, it is probably a safe bet to 1641 // keep doing this for now. We really need to revisit this to see 1642 // if we had to do this. 1643 auto *P = reinterpret_cast<Elf_Off *>(Buf); 1644 P[1] = uintX_t(1) << (ELFT::Is64Bits ? 63 : 31); 1645 } 1646 1647 template <class ELFT> 1648 void MipsTargetInfo<ELFT>::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 1649 write32<ELFT::TargetEndianness>(Buf, Out<ELFT>::Plt->getVA()); 1650 } 1651 1652 static uint16_t mipsHigh(uint64_t V) { return (V + 0x8000) >> 16; } 1653 1654 template <endianness E, uint8_t BSIZE, uint8_t SHIFT> 1655 static int64_t getPcRelocAddend(const uint8_t *Loc) { 1656 uint32_t Instr = read32<E>(Loc); 1657 uint32_t Mask = 0xffffffff >> (32 - BSIZE); 1658 return SignExtend64<BSIZE + SHIFT>((Instr & Mask) << SHIFT); 1659 } 1660 1661 template <endianness E, uint8_t BSIZE, uint8_t SHIFT> 1662 static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t P, 1663 uint64_t SA) { 1664 uint32_t Mask = 0xffffffff >> (32 - BSIZE); 1665 uint32_t Instr = read32<E>(Loc); 1666 int64_t V = SA - P; 1667 if (SHIFT > 0) 1668 checkAlignment<(1 << SHIFT)>(V, Type); 1669 checkInt<BSIZE + SHIFT>(V, Type); 1670 write32<E>(Loc, (Instr & ~Mask) | ((V >> SHIFT) & Mask)); 1671 } 1672 1673 template <endianness E> 1674 static void writeMipsHi16(uint8_t *Loc, uint64_t V) { 1675 uint32_t Instr = read32<E>(Loc); 1676 write32<E>(Loc, (Instr & 0xffff0000) | mipsHigh(V)); 1677 } 1678 1679 template <endianness E> 1680 static void writeMipsLo16(uint8_t *Loc, uint64_t V) { 1681 uint32_t Instr = read32<E>(Loc); 1682 write32<E>(Loc, (Instr & 0xffff0000) | (V & 0xffff)); 1683 } 1684 1685 template <endianness E> static int16_t readSignedLo16(const uint8_t *Loc) { 1686 return SignExtend32<16>(read32<E>(Loc) & 0xffff); 1687 } 1688 1689 template <class ELFT> 1690 void MipsTargetInfo<ELFT>::writePltZero(uint8_t *Buf) const { 1691 const endianness E = ELFT::TargetEndianness; 1692 write32<E>(Buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0]) 1693 write32<E>(Buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28) 1694 write32<E>(Buf + 8, 0x279c0000); // addiu $28, $28, %lo(&GOTPLT[0]) 1695 write32<E>(Buf + 12, 0x031cc023); // subu $24, $24, $28 1696 write32<E>(Buf + 16, 0x03e07825); // move $15, $31 1697 write32<E>(Buf + 20, 0x0018c082); // srl $24, $24, 2 1698 write32<E>(Buf + 24, 0x0320f809); // jalr $25 1699 write32<E>(Buf + 28, 0x2718fffe); // subu $24, $24, 2 1700 uint64_t Got = Out<ELFT>::GotPlt->getVA(); 1701 writeMipsHi16<E>(Buf, Got); 1702 writeMipsLo16<E>(Buf + 4, Got); 1703 writeMipsLo16<E>(Buf + 8, Got); 1704 } 1705 1706 template <class ELFT> 1707 void MipsTargetInfo<ELFT>::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1708 uint64_t PltEntryAddr, int32_t Index, 1709 unsigned RelOff) const { 1710 const endianness E = ELFT::TargetEndianness; 1711 write32<E>(Buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry) 1712 write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15) 1713 write32<E>(Buf + 8, 0x03200008); // jr $25 1714 write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry) 1715 writeMipsHi16<E>(Buf, GotEntryAddr); 1716 writeMipsLo16<E>(Buf + 4, GotEntryAddr); 1717 writeMipsLo16<E>(Buf + 12, GotEntryAddr); 1718 } 1719 1720 template <class ELFT> 1721 void MipsTargetInfo<ELFT>::writeThunk(uint8_t *Buf, uint64_t S) const { 1722 // Write MIPS LA25 thunk code to call PIC function from the non-PIC one. 1723 // See MipsTargetInfo::writeThunk for details. 1724 const endianness E = ELFT::TargetEndianness; 1725 write32<E>(Buf, 0x3c190000); // lui $25, %hi(func) 1726 write32<E>(Buf + 4, 0x08000000); // j func 1727 write32<E>(Buf + 8, 0x27390000); // addiu $25, $25, %lo(func) 1728 write32<E>(Buf + 12, 0x00000000); // nop 1729 writeMipsHi16<E>(Buf, S); 1730 write32<E>(Buf + 4, 0x08000000 | (S >> 2)); 1731 writeMipsLo16<E>(Buf + 8, S); 1732 } 1733 1734 template <class ELFT> 1735 bool MipsTargetInfo<ELFT>::needsCopyRelImpl(uint32_t Type) const { 1736 return !isRelRelative(Type) || Type == R_MIPS_LO16; 1737 } 1738 1739 template <class ELFT> 1740 bool MipsTargetInfo<ELFT>::needsGot(uint32_t Type, const SymbolBody &S) const { 1741 return needsPlt(Type, S) || refersToGotEntry(Type); 1742 } 1743 1744 template <class ELFT> 1745 bool MipsTargetInfo<ELFT>::refersToGotEntry(uint32_t Type) const { 1746 return Type == R_MIPS_GOT16 || Type == R_MIPS_CALL16; 1747 } 1748 1749 template <class ELFT> 1750 bool MipsTargetInfo<ELFT>::needsPltImpl(uint32_t Type) const { 1751 return Type == R_MIPS_26; 1752 } 1753 1754 template <class ELFT> 1755 bool MipsTargetInfo<ELFT>::needsThunk(uint32_t Type, const InputFile &File, 1756 const SymbolBody &S) const { 1757 // Any MIPS PIC code function is invoked with its address in register $t9. 1758 // So if we have a branch instruction from non-PIC code to the PIC one 1759 // we cannot make the jump directly and need to create a small stubs 1760 // to save the target function address. 1761 // See page 3-38 ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf 1762 if (Type != R_MIPS_26) 1763 return false; 1764 auto *F = dyn_cast<ELFFileBase<ELFT>>(&File); 1765 if (!F) 1766 return false; 1767 // If current file has PIC code, LA25 stub is not required. 1768 if (F->getObj().getHeader()->e_flags & EF_MIPS_PIC) 1769 return false; 1770 auto *D = dyn_cast<DefinedRegular<ELFT>>(&S); 1771 if (!D || !D->Section) 1772 return false; 1773 // LA25 is required if target file has PIC code 1774 // or target symbol is a PIC symbol. 1775 return (D->Section->getFile()->getObj().getHeader()->e_flags & EF_MIPS_PIC) || 1776 (D->StOther & STO_MIPS_MIPS16) == STO_MIPS_PIC; 1777 } 1778 1779 template <class ELFT> 1780 uint64_t MipsTargetInfo<ELFT>::getImplicitAddend(const uint8_t *Buf, 1781 uint32_t Type) const { 1782 const endianness E = ELFT::TargetEndianness; 1783 switch (Type) { 1784 default: 1785 return 0; 1786 case R_MIPS_32: 1787 case R_MIPS_GPREL32: 1788 return read32<E>(Buf); 1789 case R_MIPS_26: 1790 // FIXME (simon): If the relocation target symbol is not a PLT entry 1791 // we should use another expression for calculation: 1792 // ((A << 2) | (P & 0xf0000000)) >> 2 1793 return SignExtend64<28>((read32<E>(Buf) & 0x3ffffff) << 2); 1794 case R_MIPS_GPREL16: 1795 case R_MIPS_LO16: 1796 case R_MIPS_PCLO16: 1797 case R_MIPS_TLS_DTPREL_HI16: 1798 case R_MIPS_TLS_DTPREL_LO16: 1799 case R_MIPS_TLS_TPREL_HI16: 1800 case R_MIPS_TLS_TPREL_LO16: 1801 return readSignedLo16<E>(Buf); 1802 case R_MIPS_PC16: 1803 return getPcRelocAddend<E, 16, 2>(Buf); 1804 case R_MIPS_PC19_S2: 1805 return getPcRelocAddend<E, 19, 2>(Buf); 1806 case R_MIPS_PC21_S2: 1807 return getPcRelocAddend<E, 21, 2>(Buf); 1808 case R_MIPS_PC26_S2: 1809 return getPcRelocAddend<E, 26, 2>(Buf); 1810 case R_MIPS_PC32: 1811 return getPcRelocAddend<E, 32, 0>(Buf); 1812 } 1813 } 1814 1815 template <class ELFT> 1816 void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint8_t *BufEnd, 1817 uint32_t Type, uint64_t P, 1818 uint64_t SA) const { 1819 const endianness E = ELFT::TargetEndianness; 1820 // Thread pointer and DRP offsets from the start of TLS data area. 1821 // https://www.linux-mips.org/wiki/NPTL 1822 const uint32_t TPOffset = 0x7000; 1823 const uint32_t DTPOffset = 0x8000; 1824 switch (Type) { 1825 case R_MIPS_32: 1826 write32<E>(Loc, SA); 1827 break; 1828 case R_MIPS_26: { 1829 uint32_t Instr = read32<E>(Loc); 1830 write32<E>(Loc, (Instr & ~0x3ffffff) | (SA >> 2)); 1831 break; 1832 } 1833 case R_MIPS_CALL16: 1834 case R_MIPS_GOT16: { 1835 int64_t V = SA - getMipsGpAddr<ELFT>(); 1836 if (Type == R_MIPS_GOT16) 1837 checkInt<16>(V, Type); 1838 writeMipsLo16<E>(Loc, V); 1839 break; 1840 } 1841 case R_MIPS_GPREL16: { 1842 int64_t V = SA - getMipsGpAddr<ELFT>(); 1843 checkInt<16>(V, Type); 1844 writeMipsLo16<E>(Loc, V); 1845 break; 1846 } 1847 case R_MIPS_GPREL32: 1848 write32<E>(Loc, SA - getMipsGpAddr<ELFT>()); 1849 break; 1850 case R_MIPS_HI16: 1851 writeMipsHi16<E>(Loc, SA); 1852 break; 1853 case R_MIPS_JALR: 1854 // Ignore this optimization relocation for now 1855 break; 1856 case R_MIPS_LO16: 1857 writeMipsLo16<E>(Loc, SA); 1858 break; 1859 case R_MIPS_PC16: 1860 applyMipsPcReloc<E, 16, 2>(Loc, Type, P, SA); 1861 break; 1862 case R_MIPS_PC19_S2: 1863 applyMipsPcReloc<E, 19, 2>(Loc, Type, P, SA); 1864 break; 1865 case R_MIPS_PC21_S2: 1866 applyMipsPcReloc<E, 21, 2>(Loc, Type, P, SA); 1867 break; 1868 case R_MIPS_PC26_S2: 1869 applyMipsPcReloc<E, 26, 2>(Loc, Type, P, SA); 1870 break; 1871 case R_MIPS_PC32: 1872 applyMipsPcReloc<E, 32, 0>(Loc, Type, P, SA); 1873 break; 1874 case R_MIPS_PCHI16: 1875 writeMipsHi16<E>(Loc, SA - P); 1876 break; 1877 case R_MIPS_PCLO16: 1878 writeMipsLo16<E>(Loc, SA - P); 1879 break; 1880 case R_MIPS_TLS_DTPREL_HI16: 1881 writeMipsHi16<E>(Loc, SA - DTPOffset); 1882 break; 1883 case R_MIPS_TLS_DTPREL_LO16: 1884 writeMipsLo16<E>(Loc, SA - DTPOffset); 1885 break; 1886 case R_MIPS_TLS_TPREL_HI16: 1887 writeMipsHi16<E>(Loc, SA - TPOffset); 1888 break; 1889 case R_MIPS_TLS_TPREL_LO16: 1890 writeMipsLo16<E>(Loc, SA - TPOffset); 1891 break; 1892 default: 1893 fatal("unrecognized reloc " + Twine(Type)); 1894 } 1895 } 1896 1897 template <class ELFT> 1898 bool MipsTargetInfo<ELFT>::isHintRel(uint32_t Type) const { 1899 return Type == R_MIPS_JALR; 1900 } 1901 1902 template <class ELFT> 1903 bool MipsTargetInfo<ELFT>::isRelRelative(uint32_t Type) const { 1904 switch (Type) { 1905 default: 1906 return true; 1907 case R_MIPS_26: 1908 case R_MIPS_32: 1909 case R_MIPS_64: 1910 case R_MIPS_HI16: 1911 case R_MIPS_TLS_DTPREL_HI16: 1912 case R_MIPS_TLS_DTPREL_LO16: 1913 case R_MIPS_TLS_TPREL_HI16: 1914 case R_MIPS_TLS_TPREL_LO16: 1915 return false; 1916 } 1917 } 1918 1919 // _gp is a MIPS-specific ABI-defined symbol which points to 1920 // a location that is relative to GOT. This function returns 1921 // the value for the symbol. 1922 template <class ELFT> typename ELFT::uint getMipsGpAddr() { 1923 unsigned GPOffset = 0x7ff0; 1924 if (uint64_t V = Out<ELFT>::Got->getVA()) 1925 return V + GPOffset; 1926 return 0; 1927 } 1928 1929 template uint32_t getMipsGpAddr<ELF32LE>(); 1930 template uint32_t getMipsGpAddr<ELF32BE>(); 1931 template uint64_t getMipsGpAddr<ELF64LE>(); 1932 template uint64_t getMipsGpAddr<ELF64BE>(); 1933 1934 template bool TargetInfo::needsCopyRel<ELF32LE>(uint32_t, 1935 const SymbolBody &) const; 1936 template bool TargetInfo::needsCopyRel<ELF32BE>(uint32_t, 1937 const SymbolBody &) const; 1938 template bool TargetInfo::needsCopyRel<ELF64LE>(uint32_t, 1939 const SymbolBody &) const; 1940 template bool TargetInfo::needsCopyRel<ELF64BE>(uint32_t, 1941 const SymbolBody &) const; 1942 } 1943 } 1944