1 //===- Target.cpp ---------------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Machine-specific things, such as applying relocations, creation of 10 // GOT or PLT entries, etc., are handled in this file. 11 // 12 // Refer the ELF spec for the single letter variables, S, A or P, used 13 // in this file. 14 // 15 // Some functions defined in this file has "relaxTls" as part of their names. 16 // They do peephole optimization for TLS variables by rewriting instructions. 17 // They are not part of the ABI but optional optimization, so you can skip 18 // them if you are not interested in how TLS variables are optimized. 19 // See the following paper for the details. 20 // 21 // Ulrich Drepper, ELF Handling For Thread-Local Storage 22 // http://www.akkadia.org/drepper/tls.pdf 23 // 24 //===----------------------------------------------------------------------===// 25 26 #include "Target.h" 27 #include "InputFiles.h" 28 #include "OutputSections.h" 29 #include "SymbolTable.h" 30 #include "Symbols.h" 31 #include "lld/Common/ErrorHandler.h" 32 #include "llvm/Object/ELF.h" 33 34 using namespace llvm; 35 using namespace llvm::object; 36 using namespace llvm::ELF; 37 using namespace lld; 38 using namespace lld::elf; 39 40 TargetInfo *elf::Target; 41 42 std::string lld::toString(RelType Type) { 43 StringRef S = getELFRelocationTypeName(elf::Config->EMachine, Type); 44 if (S == "Unknown") 45 return ("Unknown (" + Twine(Type) + ")").str(); 46 return S; 47 } 48 49 TargetInfo *elf::getTarget() { 50 switch (Config->EMachine) { 51 case EM_386: 52 case EM_IAMCU: 53 return getX86TargetInfo(); 54 case EM_AARCH64: 55 return getAArch64TargetInfo(); 56 case EM_AMDGPU: 57 return getAMDGPUTargetInfo(); 58 case EM_ARM: 59 return getARMTargetInfo(); 60 case EM_AVR: 61 return getAVRTargetInfo(); 62 case EM_HEXAGON: 63 return getHexagonTargetInfo(); 64 case EM_MIPS: 65 switch (Config->EKind) { 66 case ELF32LEKind: 67 return getMipsTargetInfo<ELF32LE>(); 68 case ELF32BEKind: 69 return getMipsTargetInfo<ELF32BE>(); 70 case ELF64LEKind: 71 return getMipsTargetInfo<ELF64LE>(); 72 case ELF64BEKind: 73 return getMipsTargetInfo<ELF64BE>(); 74 default: 75 llvm_unreachable("unsupported MIPS target"); 76 } 77 case EM_MSP430: 78 return getMSP430TargetInfo(); 79 case EM_PPC: 80 return getPPCTargetInfo(); 81 case EM_PPC64: 82 return getPPC64TargetInfo(); 83 case EM_RISCV: 84 return getRISCVTargetInfo(); 85 case EM_SPARCV9: 86 return getSPARCV9TargetInfo(); 87 case EM_X86_64: 88 if (Config->EKind == ELF32LEKind) 89 return getX32TargetInfo(); 90 return getX86_64TargetInfo(); 91 } 92 llvm_unreachable("unknown target machine"); 93 } 94 95 template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *Loc) { 96 for (InputSectionBase *D : InputSections) { 97 auto *IS = cast<InputSection>(D); 98 if (!IS->getParent()) 99 continue; 100 101 uint8_t *ISLoc = Out::BufferStart + IS->getParent()->Offset + IS->OutSecOff; 102 if (ISLoc <= Loc && Loc < ISLoc + IS->getSize()) 103 return {IS, IS->template getLocation<ELFT>(Loc - ISLoc) + ": "}; 104 } 105 return {}; 106 } 107 108 ErrorPlace elf::getErrorPlace(const uint8_t *Loc) { 109 switch (Config->EKind) { 110 case ELF32LEKind: 111 return getErrPlace<ELF32LE>(Loc); 112 case ELF32BEKind: 113 return getErrPlace<ELF32BE>(Loc); 114 case ELF64LEKind: 115 return getErrPlace<ELF64LE>(Loc); 116 case ELF64BEKind: 117 return getErrPlace<ELF64BE>(Loc); 118 default: 119 llvm_unreachable("unknown ELF type"); 120 } 121 } 122 123 TargetInfo::~TargetInfo() {} 124 125 int64_t TargetInfo::getImplicitAddend(const uint8_t *Buf, RelType Type) const { 126 return 0; 127 } 128 129 bool TargetInfo::usesOnlyLowPageBits(RelType Type) const { return false; } 130 131 bool TargetInfo::needsThunk(RelExpr Expr, RelType Type, const InputFile *File, 132 uint64_t BranchAddr, const Symbol &S) const { 133 return false; 134 } 135 136 bool TargetInfo::adjustPrologueForCrossSplitStack(uint8_t *Loc, uint8_t *End, 137 uint8_t StOther) const { 138 llvm_unreachable("Target doesn't support split stacks."); 139 } 140 141 bool TargetInfo::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const { 142 return true; 143 } 144 145 void TargetInfo::writeIgotPlt(uint8_t *Buf, const Symbol &S) const { 146 writeGotPlt(Buf, S); 147 } 148 149 RelExpr TargetInfo::adjustRelaxExpr(RelType Type, const uint8_t *Data, 150 RelExpr Expr) const { 151 return Expr; 152 } 153 154 void TargetInfo::relaxGot(uint8_t *Loc, uint64_t Val) const { 155 llvm_unreachable("Should not have claimed to be relaxable"); 156 } 157 158 void TargetInfo::relaxTlsGdToLe(uint8_t *Loc, RelType Type, 159 uint64_t Val) const { 160 llvm_unreachable("Should not have claimed to be relaxable"); 161 } 162 163 void TargetInfo::relaxTlsGdToIe(uint8_t *Loc, RelType Type, 164 uint64_t Val) const { 165 llvm_unreachable("Should not have claimed to be relaxable"); 166 } 167 168 void TargetInfo::relaxTlsIeToLe(uint8_t *Loc, RelType Type, 169 uint64_t Val) const { 170 llvm_unreachable("Should not have claimed to be relaxable"); 171 } 172 173 void TargetInfo::relaxTlsLdToLe(uint8_t *Loc, RelType Type, 174 uint64_t Val) const { 175 llvm_unreachable("Should not have claimed to be relaxable"); 176 } 177 178 uint64_t TargetInfo::getImageBase() { 179 // Use -image-base if set. Fall back to the target default if not. 180 if (Config->ImageBase) 181 return *Config->ImageBase; 182 return Config->Pic ? 0 : DefaultImageBase; 183 } 184