1 //===- Target.cpp ---------------------------------------------------------===// 2 // 3 // The LLVM Linker 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Machine-specific things, such as applying relocations, creation of 11 // GOT or PLT entries, etc., are handled in this file. 12 // 13 // Refer the ELF spec for the single letter varaibles, S, A or P, used 14 // in this file. SA is S+A. 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "Target.h" 19 #include "Error.h" 20 #include "OutputSections.h" 21 #include "Symbols.h" 22 23 #include "llvm/ADT/ArrayRef.h" 24 #include "llvm/Object/ELF.h" 25 #include "llvm/Support/Endian.h" 26 #include "llvm/Support/ELF.h" 27 28 using namespace llvm; 29 using namespace llvm::object; 30 using namespace llvm::support::endian; 31 using namespace llvm::ELF; 32 33 namespace lld { 34 namespace elf { 35 36 TargetInfo *Target; 37 38 template <endianness E> static void add32(void *P, int32_t V) { 39 write32<E>(P, read32<E>(P) + V); 40 } 41 42 static void add32le(uint8_t *P, int32_t V) { add32<support::little>(P, V); } 43 static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); } 44 45 template <unsigned N> static void checkInt(int64_t V, uint32_t Type) { 46 if (isInt<N>(V)) 47 return; 48 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 49 error("Relocation " + S + " out of range"); 50 } 51 52 template <unsigned N> static void checkUInt(uint64_t V, uint32_t Type) { 53 if (isUInt<N>(V)) 54 return; 55 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 56 error("Relocation " + S + " out of range"); 57 } 58 59 template <unsigned N> static void checkIntUInt(uint64_t V, uint32_t Type) { 60 if (isInt<N>(V) || isUInt<N>(V)) 61 return; 62 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 63 error("Relocation " + S + " out of range"); 64 } 65 66 template <unsigned N> static void checkAlignment(uint64_t V, uint32_t Type) { 67 if ((V & (N - 1)) == 0) 68 return; 69 StringRef S = getELFRelocationTypeName(Config->EMachine, Type); 70 error("Improper alignment for relocation " + S); 71 } 72 73 template <class ELFT> bool isGnuIFunc(const SymbolBody &S) { 74 if (auto *SS = dyn_cast<DefinedElf<ELFT>>(&S)) 75 return SS->Sym.getType() == STT_GNU_IFUNC; 76 return false; 77 } 78 79 namespace { 80 class X86TargetInfo final : public TargetInfo { 81 public: 82 X86TargetInfo(); 83 void writeGotPltHeader(uint8_t *Buf) const override; 84 uint32_t getDynRel(uint32_t Type) const override; 85 uint32_t getTlsGotRel(uint32_t Type) const override; 86 bool pointsToLocalDynamicGotEntry(uint32_t Type) const override; 87 bool isTlsLocalDynamicRel(uint32_t Type) const override; 88 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 89 bool isTlsInitialExecRel(uint32_t Type) const override; 90 bool isTlsDynRel(uint32_t Type, const SymbolBody &S) const override; 91 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 92 void writePltZero(uint8_t *Buf) const override; 93 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 94 int32_t Index, unsigned RelOff) const override; 95 bool needsCopyRelImpl(uint32_t Type) const override; 96 bool needsDynRelative(uint32_t Type) const override; 97 bool needsGot(uint32_t Type, SymbolBody &S) const override; 98 bool needsPltImpl(uint32_t Type) const override; 99 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 100 uint64_t SA, uint64_t ZA = 0, 101 uint8_t *PairedLoc = nullptr) const override; 102 size_t relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 103 uint64_t SA, const SymbolBody *S) const override; 104 bool isGotRelative(uint32_t Type) const override; 105 bool refersToGotEntry(uint32_t Type) const override; 106 107 private: 108 void relocateTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 109 uint64_t SA) const; 110 void relocateTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 111 uint64_t SA) const; 112 void relocateTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 113 uint64_t SA) const; 114 void relocateTlsIeToLe(uint32_t Type, uint8_t *Loc, uint8_t *BufEnd, 115 uint64_t P, uint64_t SA) const; 116 }; 117 118 class X86_64TargetInfo final : public TargetInfo { 119 public: 120 X86_64TargetInfo(); 121 uint32_t getTlsGotRel(uint32_t Type) const override; 122 bool pointsToLocalDynamicGotEntry(uint32_t Type) const override; 123 bool isTlsLocalDynamicRel(uint32_t Type) const override; 124 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 125 bool isTlsInitialExecRel(uint32_t Type) const override; 126 bool isTlsDynRel(uint32_t Type, const SymbolBody &S) const override; 127 void writeGotPltHeader(uint8_t *Buf) const override; 128 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 129 void writePltZero(uint8_t *Buf) const override; 130 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 131 int32_t Index, unsigned RelOff) const override; 132 bool needsCopyRelImpl(uint32_t Type) const override; 133 bool needsGot(uint32_t Type, SymbolBody &S) const override; 134 bool refersToGotEntry(uint32_t Type) const override; 135 bool needsPltImpl(uint32_t Type) const override; 136 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 137 uint64_t SA, uint64_t ZA = 0, 138 uint8_t *PairedLoc = nullptr) const override; 139 bool isRelRelative(uint32_t Type) const override; 140 bool isSizeRel(uint32_t Type) const override; 141 size_t relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 142 uint64_t SA, const SymbolBody *S) const override; 143 144 private: 145 void relocateTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 146 uint64_t SA) const; 147 void relocateTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 148 uint64_t SA) const; 149 void relocateTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 150 uint64_t SA) const; 151 void relocateTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 152 uint64_t SA) const; 153 }; 154 155 class PPCTargetInfo final : public TargetInfo { 156 public: 157 PPCTargetInfo(); 158 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 159 uint64_t SA, uint64_t ZA = 0, 160 uint8_t *PairedLoc = nullptr) const override; 161 bool isRelRelative(uint32_t Type) const override; 162 }; 163 164 class PPC64TargetInfo final : public TargetInfo { 165 public: 166 PPC64TargetInfo(); 167 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 168 int32_t Index, unsigned RelOff) const override; 169 bool needsGot(uint32_t Type, SymbolBody &S) const override; 170 bool needsPltImpl(uint32_t Type) const override; 171 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 172 uint64_t SA, uint64_t ZA = 0, 173 uint8_t *PairedLoc = nullptr) const override; 174 bool isRelRelative(uint32_t Type) const override; 175 }; 176 177 class AArch64TargetInfo final : public TargetInfo { 178 public: 179 AArch64TargetInfo(); 180 uint32_t getDynRel(uint32_t Type) const override; 181 bool isTlsGlobalDynamicRel(uint32_t Type) const override; 182 bool isTlsInitialExecRel(uint32_t Type) const override; 183 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 184 void writePltZero(uint8_t *Buf) const override; 185 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 186 int32_t Index, unsigned RelOff) const override; 187 uint32_t getTlsGotRel(uint32_t Type) const override; 188 bool isTlsDynRel(uint32_t Type, const SymbolBody &S) const override; 189 bool isRelRelative(uint32_t Type) const override; 190 bool needsCopyRelImpl(uint32_t Type) const override; 191 bool needsGot(uint32_t Type, SymbolBody &S) const override; 192 bool needsPltImpl(uint32_t Type) const override; 193 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 194 uint64_t SA, uint64_t ZA = 0, 195 uint8_t *PairedLoc = nullptr) const override; 196 size_t relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 197 uint64_t SA, const SymbolBody *S) const override; 198 199 private: 200 void relocateTlsGdToLe(uint32_t Type, uint8_t *Loc, uint8_t *BufEnd, 201 uint64_t P, uint64_t SA) const; 202 void relocateTlsIeToLe(uint32_t Type, uint8_t *Loc, uint8_t *BufEnd, 203 uint64_t P, uint64_t SA) const; 204 205 static const uint64_t TcbSize = 16; 206 }; 207 208 class AMDGPUTargetInfo final : public TargetInfo { 209 public: 210 AMDGPUTargetInfo() {} 211 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 212 uint64_t SA, uint64_t ZA = 0, 213 uint8_t *PairedLoc = nullptr) const override; 214 }; 215 216 template <class ELFT> class MipsTargetInfo final : public TargetInfo { 217 public: 218 MipsTargetInfo(); 219 uint32_t getDynRel(uint32_t Type) const override; 220 void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override; 221 void writePltZero(uint8_t *Buf) const override; 222 void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, 223 int32_t Index, unsigned RelOff) const override; 224 void writeGotHeader(uint8_t *Buf) const override; 225 bool needsCopyRelImpl(uint32_t Type) const override; 226 bool needsGot(uint32_t Type, SymbolBody &S) const override; 227 bool needsPltImpl(uint32_t Type) const override; 228 void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P, 229 uint64_t S, uint64_t ZA = 0, 230 uint8_t *PairedLoc = nullptr) const override; 231 bool isHintRel(uint32_t Type) const override; 232 bool isRelRelative(uint32_t Type) const override; 233 bool refersToGotEntry(uint32_t Type) const override; 234 }; 235 } // anonymous namespace 236 237 TargetInfo *createTarget() { 238 switch (Config->EMachine) { 239 case EM_386: 240 return new X86TargetInfo(); 241 case EM_AARCH64: 242 return new AArch64TargetInfo(); 243 case EM_AMDGPU: 244 return new AMDGPUTargetInfo(); 245 case EM_MIPS: 246 switch (Config->EKind) { 247 case ELF32LEKind: 248 return new MipsTargetInfo<ELF32LE>(); 249 case ELF32BEKind: 250 return new MipsTargetInfo<ELF32BE>(); 251 default: 252 fatal("Unsupported MIPS target"); 253 } 254 case EM_PPC: 255 return new PPCTargetInfo(); 256 case EM_PPC64: 257 return new PPC64TargetInfo(); 258 case EM_X86_64: 259 return new X86_64TargetInfo(); 260 } 261 fatal("Unknown target machine"); 262 } 263 264 TargetInfo::~TargetInfo() {} 265 266 bool TargetInfo::canRelaxTls(uint32_t Type, const SymbolBody *S) const { 267 if (Config->Shared || (S && !S->IsTls)) 268 return false; 269 270 // We know we are producing an executable. 271 272 // Global-Dynamic relocs can be relaxed to Initial-Exec or Local-Exec 273 // depending on the symbol being locally defined or not. 274 if (isTlsGlobalDynamicRel(Type)) 275 return true; 276 277 // Local-Dynamic relocs can be relaxed to Local-Exec. 278 if (isTlsLocalDynamicRel(Type)) 279 return true; 280 281 // Initial-Exec relocs can be relaxed to Local-Exec if the symbol is locally 282 // defined. 283 if (isTlsInitialExecRel(Type)) 284 return !canBePreempted(S); 285 286 return false; 287 } 288 289 uint64_t TargetInfo::getVAStart() const { return Config->Shared ? 0 : VAStart; } 290 291 bool TargetInfo::needsCopyRelImpl(uint32_t Type) const { return false; } 292 293 template <typename ELFT> static bool mayNeedCopy(const SymbolBody &S) { 294 if (Config->Shared) 295 return false; 296 auto *SS = dyn_cast<SharedSymbol<ELFT>>(&S); 297 if (!SS) 298 return false; 299 return SS->Sym.getType() == STT_OBJECT; 300 } 301 302 template <class ELFT> 303 bool TargetInfo::needsCopyRel(uint32_t Type, const SymbolBody &S) const { 304 return mayNeedCopy<ELFT>(S) && needsCopyRelImpl(Type); 305 } 306 307 bool TargetInfo::isTlsDynRel(uint32_t Type, const SymbolBody &S) const { 308 return false; 309 } 310 311 bool TargetInfo::isGotRelative(uint32_t Type) const { return false; } 312 bool TargetInfo::isHintRel(uint32_t Type) const { return false; } 313 bool TargetInfo::isRelRelative(uint32_t Type) const { return true; } 314 bool TargetInfo::isSizeRel(uint32_t Type) const { return false; } 315 316 bool TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { return false; } 317 318 bool TargetInfo::needsPltImpl(uint32_t Type) const { return false; } 319 320 bool TargetInfo::refersToGotEntry(uint32_t Type) const { return false; } 321 322 template <class ELFT> 323 TargetInfo::PltNeed TargetInfo::needsPlt(uint32_t Type, 324 const SymbolBody &S) const { 325 if (isGnuIFunc<ELFT>(S)) 326 return Plt_Explicit; 327 if (canBePreempted(&S) && needsPltImpl(Type)) 328 return Plt_Explicit; 329 330 // This handles a non PIC program call to function in a shared library. 331 // In an ideal world, we could just report an error saying the relocation 332 // can overflow at runtime. 333 // In the real world with glibc, crt1.o has a R_X86_64_PC32 pointing to 334 // libc.so. 335 // 336 // The general idea on how to handle such cases is to create a PLT entry 337 // and use that as the function value. 338 // 339 // For the static linking part, we just return true and everything else 340 // will use the the PLT entry as the address. 341 // 342 // The remaining problem is making sure pointer equality still works. We 343 // need the help of the dynamic linker for that. We let it know that we have 344 // a direct reference to a so symbol by creating an undefined symbol with a 345 // non zero st_value. Seeing that, the dynamic linker resolves the symbol to 346 // the value of the symbol we created. This is true even for got entries, so 347 // pointer equality is maintained. To avoid an infinite loop, the only entry 348 // that points to the real function is a dedicated got entry used by the 349 // plt. That is identified by special relocation types (R_X86_64_JUMP_SLOT, 350 // R_386_JMP_SLOT, etc). 351 if (auto *SS = dyn_cast<SharedSymbol<ELFT>>(&S)) 352 if (!Config->Shared && SS->Sym.getType() == STT_FUNC && 353 !refersToGotEntry(Type)) 354 return Plt_Implicit; 355 356 return Plt_No; 357 } 358 359 bool TargetInfo::isTlsInitialExecRel(uint32_t Type) const { return false; } 360 361 bool TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 362 return false; 363 } 364 365 bool TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { return false; } 366 367 bool TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 368 return false; 369 } 370 371 size_t TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 372 uint64_t P, uint64_t SA, 373 const SymbolBody *S) const { 374 return 0; 375 } 376 377 X86TargetInfo::X86TargetInfo() { 378 CopyRel = R_386_COPY; 379 GotRel = R_386_GLOB_DAT; 380 PltRel = R_386_JUMP_SLOT; 381 IRelativeRel = R_386_IRELATIVE; 382 RelativeRel = R_386_RELATIVE; 383 TlsGotRel = R_386_TLS_TPOFF; 384 TlsModuleIndexRel = R_386_TLS_DTPMOD32; 385 TlsOffsetRel = R_386_TLS_DTPOFF32; 386 UseLazyBinding = true; 387 PltEntrySize = 16; 388 PltZeroSize = 16; 389 } 390 391 void X86TargetInfo::writeGotPltHeader(uint8_t *Buf) const { 392 write32le(Buf, Out<ELF32LE>::Dynamic->getVA()); 393 } 394 395 void X86TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 396 // Entries in .got.plt initially points back to the corresponding 397 // PLT entries with a fixed offset to skip the first instruction. 398 write32le(Buf, Plt + 6); 399 } 400 401 uint32_t X86TargetInfo::getDynRel(uint32_t Type) const { 402 if (Type == R_386_TLS_LE) 403 return R_386_TLS_TPOFF; 404 if (Type == R_386_TLS_LE_32) 405 return R_386_TLS_TPOFF32; 406 return Type; 407 } 408 409 uint32_t X86TargetInfo::getTlsGotRel(uint32_t Type) const { 410 if (Type == R_386_TLS_IE) 411 return Type; 412 return TlsGotRel; 413 } 414 415 bool X86TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 416 return Type == R_386_TLS_GD; 417 } 418 419 bool X86TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { 420 return Type == R_386_TLS_LDO_32 || Type == R_386_TLS_LDM; 421 } 422 423 bool X86TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 424 return Type == R_386_TLS_LDM; 425 } 426 427 bool X86TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 428 return Type == R_386_TLS_IE || Type == R_386_TLS_GOTIE; 429 } 430 431 bool X86TargetInfo::isTlsDynRel(uint32_t Type, const SymbolBody &S) const { 432 if (Type == R_386_TLS_LE || Type == R_386_TLS_LE_32 || 433 Type == R_386_TLS_GOTIE) 434 return Config->Shared; 435 if (Type == R_386_TLS_IE) 436 return canBePreempted(&S); 437 return Type == R_386_TLS_GD; 438 } 439 440 void X86TargetInfo::writePltZero(uint8_t *Buf) const { 441 // Executable files and shared object files have 442 // separate procedure linkage tables. 443 if (Config->Shared) { 444 const uint8_t V[] = { 445 0xff, 0xb3, 0x04, 0x00, 0x00, 0x00, // pushl 4(%ebx) 446 0xff, 0xa3, 0x08, 0x00, 0x00, 0x00, // jmp *8(%ebx) 447 0x90, 0x90, 0x90, 0x90 // nop; nop; nop; nop 448 }; 449 memcpy(Buf, V, sizeof(V)); 450 return; 451 } 452 453 const uint8_t PltData[] = { 454 0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushl (GOT+4) 455 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *(GOT+8) 456 0x90, 0x90, 0x90, 0x90 // nop; nop; nop; nop 457 }; 458 memcpy(Buf, PltData, sizeof(PltData)); 459 uint32_t Got = Out<ELF32LE>::GotPlt->getVA(); 460 write32le(Buf + 2, Got + 4); 461 write32le(Buf + 8, Got + 8); 462 } 463 464 void X86TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 465 uint64_t PltEntryAddr, int32_t Index, 466 unsigned RelOff) const { 467 const uint8_t Inst[] = { 468 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, // jmp *foo_in_GOT|*foo@GOT(%ebx) 469 0x68, 0x00, 0x00, 0x00, 0x00, // pushl $reloc_offset 470 0xe9, 0x00, 0x00, 0x00, 0x00 // jmp .PLT0@PC 471 }; 472 memcpy(Buf, Inst, sizeof(Inst)); 473 474 // jmp *foo@GOT(%ebx) or jmp *foo_in_GOT 475 Buf[1] = Config->Shared ? 0xa3 : 0x25; 476 uint32_t Got = UseLazyBinding ? Out<ELF32LE>::GotPlt->getVA() 477 : Out<ELF32LE>::Got->getVA(); 478 write32le(Buf + 2, Config->Shared ? GotEntryAddr - Got : GotEntryAddr); 479 write32le(Buf + 7, RelOff); 480 write32le(Buf + 12, -Index * PltEntrySize - PltZeroSize - 16); 481 } 482 483 bool X86TargetInfo::needsCopyRelImpl(uint32_t Type) const { 484 return Type == R_386_32 || Type == R_386_16 || Type == R_386_8; 485 } 486 487 bool X86TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 488 if (S.IsTls && Type == R_386_TLS_GD) 489 return Target->canRelaxTls(Type, &S) && canBePreempted(&S); 490 if (Type == R_386_TLS_GOTIE || Type == R_386_TLS_IE) 491 return !canRelaxTls(Type, &S); 492 return Type == R_386_GOT32 || needsPlt<ELF32LE>(Type, S); 493 } 494 495 bool X86TargetInfo::needsPltImpl(uint32_t Type) const { 496 return Type == R_386_PLT32; 497 } 498 499 bool X86TargetInfo::isGotRelative(uint32_t Type) const { 500 // This relocation does not require got entry, 501 // but it is relative to got and needs it to be created. 502 // Here we request for that. 503 return Type == R_386_GOTOFF; 504 } 505 506 bool X86TargetInfo::refersToGotEntry(uint32_t Type) const { 507 return Type == R_386_GOT32; 508 } 509 510 void X86TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 511 uint64_t P, uint64_t SA, uint64_t ZA, 512 uint8_t *PairedLoc) const { 513 switch (Type) { 514 case R_386_32: 515 add32le(Loc, SA); 516 break; 517 case R_386_GOT32: { 518 uint64_t V = SA - Out<ELF32LE>::Got->getVA() - 519 Out<ELF32LE>::Got->getNumEntries() * 4; 520 checkInt<32>(V, Type); 521 add32le(Loc, V); 522 break; 523 } 524 case R_386_GOTOFF: 525 add32le(Loc, SA - Out<ELF32LE>::Got->getVA()); 526 break; 527 case R_386_GOTPC: 528 add32le(Loc, SA + Out<ELF32LE>::Got->getVA() - P); 529 break; 530 case R_386_PC32: 531 case R_386_PLT32: 532 add32le(Loc, SA - P); 533 break; 534 case R_386_TLS_GD: 535 case R_386_TLS_LDM: 536 case R_386_TLS_TPOFF: { 537 uint64_t V = SA - Out<ELF32LE>::Got->getVA() - 538 Out<ELF32LE>::Got->getNumEntries() * 4; 539 checkInt<32>(V, Type); 540 write32le(Loc, V); 541 break; 542 } 543 case R_386_TLS_IE: 544 case R_386_TLS_LDO_32: 545 write32le(Loc, SA); 546 break; 547 case R_386_TLS_LE: 548 write32le(Loc, SA - Out<ELF32LE>::TlsPhdr->p_memsz); 549 break; 550 case R_386_TLS_LE_32: 551 write32le(Loc, Out<ELF32LE>::TlsPhdr->p_memsz - SA); 552 break; 553 default: 554 fatal("unrecognized reloc " + Twine(Type)); 555 } 556 } 557 558 bool X86TargetInfo::needsDynRelative(uint32_t Type) const { 559 return Config->Shared && Type == R_386_TLS_IE; 560 } 561 562 size_t X86TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 563 uint64_t P, uint64_t SA, 564 const SymbolBody *S) const { 565 switch (Type) { 566 case R_386_TLS_GD: 567 if (canBePreempted(S)) 568 relocateTlsGdToIe(Loc, BufEnd, P, SA); 569 else 570 relocateTlsGdToLe(Loc, BufEnd, P, SA); 571 // The next relocation should be against __tls_get_addr, so skip it 572 return 1; 573 case R_386_TLS_GOTIE: 574 case R_386_TLS_IE: 575 relocateTlsIeToLe(Type, Loc, BufEnd, P, SA); 576 return 0; 577 case R_386_TLS_LDM: 578 relocateTlsLdToLe(Loc, BufEnd, P, SA); 579 // The next relocation should be against __tls_get_addr, so skip it 580 return 1; 581 case R_386_TLS_LDO_32: 582 relocateOne(Loc, BufEnd, R_386_TLS_LE, P, SA); 583 return 0; 584 } 585 llvm_unreachable("Unknown TLS optimization"); 586 } 587 588 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.1 589 // IA-32 Linker Optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 590 // how GD can be optimized to IE: 591 // leal x@tlsgd(, %ebx, 1), 592 // call __tls_get_addr@plt 593 // Is converted to: 594 // movl %gs:0, %eax 595 // addl x@gotntpoff(%ebx), %eax 596 void X86TargetInfo::relocateTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 597 uint64_t SA) const { 598 const uint8_t Inst[] = { 599 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax 600 0x03, 0x83, 0x00, 0x00, 0x00, 0x00 // addl 0(%ebx), %eax 601 }; 602 memcpy(Loc - 3, Inst, sizeof(Inst)); 603 relocateOne(Loc + 5, BufEnd, R_386_32, P, 604 SA - Out<ELF32LE>::Got->getVA() - 605 Out<ELF32LE>::Got->getNumEntries() * 4); 606 } 607 608 // GD can be optimized to LE: 609 // leal x@tlsgd(, %ebx, 1), 610 // call __tls_get_addr@plt 611 // Can be converted to: 612 // movl %gs:0,%eax 613 // addl $x@ntpoff,%eax 614 // But gold emits subl $foo@tpoff,%eax instead of addl. 615 // These instructions are completely equal in behavior. 616 // This method generates subl to be consistent with gold. 617 void X86TargetInfo::relocateTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 618 uint64_t SA) const { 619 const uint8_t Inst[] = { 620 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax 621 0x81, 0xe8, 0x00, 0x00, 0x00, 0x00 // subl 0(%ebx), %eax 622 }; 623 memcpy(Loc - 3, Inst, sizeof(Inst)); 624 relocateOne(Loc + 5, BufEnd, R_386_32, P, 625 Out<ELF32LE>::TlsPhdr->p_memsz - SA); 626 } 627 628 // LD can be optimized to LE: 629 // leal foo(%reg),%eax 630 // call ___tls_get_addr 631 // Is converted to: 632 // movl %gs:0,%eax 633 // nop 634 // leal 0(%esi,1),%esi 635 void X86TargetInfo::relocateTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P, 636 uint64_t SA) const { 637 const uint8_t Inst[] = { 638 0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0,%eax 639 0x90, // nop 640 0x8d, 0x74, 0x26, 0x00 // leal 0(%esi,1),%esi 641 }; 642 memcpy(Loc - 2, Inst, sizeof(Inst)); 643 } 644 645 // In some conditions, relocations can be optimized to avoid using GOT. 646 // This function does that for Initial Exec to Local Exec case. 647 // Read "ELF Handling For Thread-Local Storage, 5.1 648 // IA-32 Linker Optimizations" (http://www.akkadia.org/drepper/tls.pdf) 649 // by Ulrich Drepper for details. 650 void X86TargetInfo::relocateTlsIeToLe(uint32_t Type, uint8_t *Loc, 651 uint8_t *BufEnd, uint64_t P, 652 uint64_t SA) const { 653 // Ulrich's document section 6.2 says that @gotntpoff can 654 // be used with MOVL or ADDL instructions. 655 // @indntpoff is similar to @gotntpoff, but for use in 656 // position dependent code. 657 uint8_t *Inst = Loc - 2; 658 uint8_t *Op = Loc - 1; 659 uint8_t Reg = (Loc[-1] >> 3) & 7; 660 bool IsMov = *Inst == 0x8b; 661 if (Type == R_386_TLS_IE) { 662 // For R_386_TLS_IE relocation we perform the next transformations: 663 // MOVL foo@INDNTPOFF,%EAX is transformed to MOVL $foo,%EAX 664 // MOVL foo@INDNTPOFF,%REG is transformed to MOVL $foo,%REG 665 // ADDL foo@INDNTPOFF,%REG is transformed to ADDL $foo,%REG 666 // First one is special because when EAX is used the sequence is 5 bytes 667 // long, otherwise it is 6 bytes. 668 if (*Op == 0xa1) { 669 *Op = 0xb8; 670 } else { 671 *Inst = IsMov ? 0xc7 : 0x81; 672 *Op = 0xc0 | ((*Op >> 3) & 7); 673 } 674 } else { 675 // R_386_TLS_GOTIE relocation can be optimized to 676 // R_386_TLS_LE so that it does not use GOT. 677 // "MOVL foo@GOTTPOFF(%RIP), %REG" is transformed to "MOVL $foo, %REG". 678 // "ADDL foo@GOTNTPOFF(%RIP), %REG" is transformed to "LEAL foo(%REG), %REG" 679 // Note: gold converts to ADDL instead of LEAL. 680 *Inst = IsMov ? 0xc7 : 0x8d; 681 if (IsMov) 682 *Op = 0xc0 | ((*Op >> 3) & 7); 683 else 684 *Op = 0x80 | Reg | (Reg << 3); 685 } 686 relocateOne(Loc, BufEnd, R_386_TLS_LE, P, SA); 687 } 688 689 X86_64TargetInfo::X86_64TargetInfo() { 690 CopyRel = R_X86_64_COPY; 691 GotRel = R_X86_64_GLOB_DAT; 692 PltRel = R_X86_64_JUMP_SLOT; 693 RelativeRel = R_X86_64_RELATIVE; 694 IRelativeRel = R_X86_64_IRELATIVE; 695 TlsGotRel = R_X86_64_TPOFF64; 696 TlsModuleIndexRel = R_X86_64_DTPMOD64; 697 TlsOffsetRel = R_X86_64_DTPOFF64; 698 UseLazyBinding = true; 699 PltEntrySize = 16; 700 PltZeroSize = 16; 701 } 702 703 void X86_64TargetInfo::writeGotPltHeader(uint8_t *Buf) const { 704 write64le(Buf, Out<ELF64LE>::Dynamic->getVA()); 705 } 706 707 void X86_64TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 708 // See comments in X86TargetInfo::writeGotPlt. 709 write32le(Buf, Plt + 6); 710 } 711 712 void X86_64TargetInfo::writePltZero(uint8_t *Buf) const { 713 const uint8_t PltData[] = { 714 0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushq GOT+8(%rip) 715 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *GOT+16(%rip) 716 0x0f, 0x1f, 0x40, 0x00 // nopl 0x0(rax) 717 }; 718 memcpy(Buf, PltData, sizeof(PltData)); 719 uint64_t Got = Out<ELF64LE>::GotPlt->getVA(); 720 uint64_t Plt = Out<ELF64LE>::Plt->getVA(); 721 write32le(Buf + 2, Got - Plt + 2); // GOT+8 722 write32le(Buf + 8, Got - Plt + 4); // GOT+16 723 } 724 725 void X86_64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 726 uint64_t PltEntryAddr, int32_t Index, 727 unsigned RelOff) const { 728 const uint8_t Inst[] = { 729 0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmpq *got(%rip) 730 0x68, 0x00, 0x00, 0x00, 0x00, // pushq <relocation index> 731 0xe9, 0x00, 0x00, 0x00, 0x00 // jmpq plt[0] 732 }; 733 memcpy(Buf, Inst, sizeof(Inst)); 734 735 write32le(Buf + 2, GotEntryAddr - PltEntryAddr - 6); 736 write32le(Buf + 7, Index); 737 write32le(Buf + 12, -Index * PltEntrySize - PltZeroSize - 16); 738 } 739 740 bool X86_64TargetInfo::needsCopyRelImpl(uint32_t Type) const { 741 return Type == R_X86_64_32S || Type == R_X86_64_32 || Type == R_X86_64_PC32 || 742 Type == R_X86_64_64; 743 } 744 745 bool X86_64TargetInfo::refersToGotEntry(uint32_t Type) const { 746 return Type == R_X86_64_GOTPCREL; 747 } 748 749 bool X86_64TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 750 if (Type == R_X86_64_TLSGD) 751 return Target->canRelaxTls(Type, &S) && canBePreempted(&S); 752 if (Type == R_X86_64_GOTTPOFF) 753 return !canRelaxTls(Type, &S); 754 return refersToGotEntry(Type) || needsPlt<ELF64LE>(Type, S); 755 } 756 757 uint32_t X86_64TargetInfo::getTlsGotRel(uint32_t Type) const { 758 // No other types of TLS relocations requiring GOT should 759 // reach here. 760 assert(Type == R_X86_64_GOTTPOFF); 761 return R_X86_64_PC32; 762 } 763 764 bool X86_64TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 765 return Type == R_X86_64_GOTTPOFF; 766 } 767 768 bool X86_64TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 769 return Type == R_X86_64_TLSGD; 770 } 771 772 bool X86_64TargetInfo::pointsToLocalDynamicGotEntry(uint32_t Type) const { 773 return Type == R_X86_64_TLSLD; 774 } 775 776 bool X86_64TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { 777 return Type == R_X86_64_DTPOFF32 || Type == R_X86_64_TLSLD; 778 } 779 780 bool X86_64TargetInfo::isTlsDynRel(uint32_t Type, const SymbolBody &S) const { 781 return Type == R_X86_64_GOTTPOFF || Type == R_X86_64_TLSGD; 782 } 783 784 bool X86_64TargetInfo::needsPltImpl(uint32_t Type) const { 785 return Type == R_X86_64_PLT32; 786 } 787 788 bool X86_64TargetInfo::isRelRelative(uint32_t Type) const { 789 switch (Type) { 790 default: 791 return false; 792 case R_X86_64_DTPOFF32: 793 case R_X86_64_DTPOFF64: 794 case R_X86_64_PC8: 795 case R_X86_64_PC16: 796 case R_X86_64_PC32: 797 case R_X86_64_PC64: 798 case R_X86_64_PLT32: 799 return true; 800 } 801 } 802 803 bool X86_64TargetInfo::isSizeRel(uint32_t Type) const { 804 return Type == R_X86_64_SIZE32 || Type == R_X86_64_SIZE64; 805 } 806 807 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 808 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 809 // how LD can be optimized to LE: 810 // leaq bar@tlsld(%rip), %rdi 811 // callq __tls_get_addr@PLT 812 // leaq bar@dtpoff(%rax), %rcx 813 // Is converted to: 814 // .word 0x6666 815 // .byte 0x66 816 // mov %fs:0,%rax 817 // leaq bar@tpoff(%rax), %rcx 818 void X86_64TargetInfo::relocateTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, 819 uint64_t P, uint64_t SA) const { 820 const uint8_t Inst[] = { 821 0x66, 0x66, //.word 0x6666 822 0x66, //.byte 0x66 823 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00 // mov %fs:0,%rax 824 }; 825 memcpy(Loc - 3, Inst, sizeof(Inst)); 826 } 827 828 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 829 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 830 // how GD can be optimized to LE: 831 // .byte 0x66 832 // leaq x@tlsgd(%rip), %rdi 833 // .word 0x6666 834 // rex64 835 // call __tls_get_addr@plt 836 // Is converted to: 837 // mov %fs:0x0,%rax 838 // lea x@tpoff,%rax 839 void X86_64TargetInfo::relocateTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, 840 uint64_t P, uint64_t SA) const { 841 const uint8_t Inst[] = { 842 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax 843 0x48, 0x8d, 0x80, 0x00, 0x00, 0x00, 0x00 // lea x@tpoff,%rax 844 }; 845 memcpy(Loc - 4, Inst, sizeof(Inst)); 846 relocateOne(Loc + 8, BufEnd, R_X86_64_TPOFF32, P, SA); 847 } 848 849 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5 850 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows 851 // how GD can be optimized to IE: 852 // .byte 0x66 853 // leaq x@tlsgd(%rip), %rdi 854 // .word 0x6666 855 // rex64 856 // call __tls_get_addr@plt 857 // Is converted to: 858 // mov %fs:0x0,%rax 859 // addq x@tpoff,%rax 860 void X86_64TargetInfo::relocateTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, 861 uint64_t P, uint64_t SA) const { 862 const uint8_t Inst[] = { 863 0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax 864 0x48, 0x03, 0x05, 0x00, 0x00, 0x00, 0x00 // addq x@tpoff,%rax 865 }; 866 memcpy(Loc - 4, Inst, sizeof(Inst)); 867 relocateOne(Loc + 8, BufEnd, R_X86_64_PC32, P + 12, SA); 868 } 869 870 // In some conditions, R_X86_64_GOTTPOFF relocation can be optimized to 871 // R_X86_64_TPOFF32 so that it does not use GOT. 872 // This function does that. Read "ELF Handling For Thread-Local Storage, 873 // 5.5 x86-x64 linker optimizations" (http://www.akkadia.org/drepper/tls.pdf) 874 // by Ulrich Drepper for details. 875 void X86_64TargetInfo::relocateTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, 876 uint64_t P, uint64_t SA) const { 877 // Ulrich's document section 6.5 says that @gottpoff(%rip) must be 878 // used in MOVQ or ADDQ instructions only. 879 // "MOVQ foo@GOTTPOFF(%RIP), %REG" is transformed to "MOVQ $foo, %REG". 880 // "ADDQ foo@GOTTPOFF(%RIP), %REG" is transformed to "LEAQ foo(%REG), %REG" 881 // (if the register is not RSP/R12) or "ADDQ $foo, %RSP". 882 // Opcodes info can be found at http://ref.x86asm.net/coder64.html#x48. 883 uint8_t *Prefix = Loc - 3; 884 uint8_t *Inst = Loc - 2; 885 uint8_t *RegSlot = Loc - 1; 886 uint8_t Reg = Loc[-1] >> 3; 887 bool IsMov = *Inst == 0x8b; 888 bool RspAdd = !IsMov && Reg == 4; 889 // r12 and rsp registers requires special handling. 890 // Problem is that for other registers, for example leaq 0xXXXXXXXX(%r11),%r11 891 // result out is 7 bytes: 4d 8d 9b XX XX XX XX, 892 // but leaq 0xXXXXXXXX(%r12),%r12 is 8 bytes: 4d 8d a4 24 XX XX XX XX. 893 // The same true for rsp. So we convert to addq for them, saving 1 byte that 894 // we dont have. 895 if (RspAdd) 896 *Inst = 0x81; 897 else 898 *Inst = IsMov ? 0xc7 : 0x8d; 899 if (*Prefix == 0x4c) 900 *Prefix = (IsMov || RspAdd) ? 0x49 : 0x4d; 901 *RegSlot = (IsMov || RspAdd) ? (0xc0 | Reg) : (0x80 | Reg | (Reg << 3)); 902 relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA); 903 } 904 905 // This function applies a TLS relocation with an optimization as described 906 // in the Ulrich's document. As a result of rewriting instructions at the 907 // relocation target, relocations immediately follow the TLS relocation (which 908 // would be applied to rewritten instructions) may have to be skipped. 909 // This function returns a number of relocations that need to be skipped. 910 size_t X86_64TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 911 uint64_t P, uint64_t SA, 912 const SymbolBody *S) const { 913 switch (Type) { 914 case R_X86_64_DTPOFF32: 915 relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA); 916 return 0; 917 case R_X86_64_GOTTPOFF: 918 relocateTlsIeToLe(Loc, BufEnd, P, SA); 919 return 0; 920 case R_X86_64_TLSGD: { 921 if (canBePreempted(S)) 922 relocateTlsGdToIe(Loc, BufEnd, P, SA); 923 else 924 relocateTlsGdToLe(Loc, BufEnd, P, SA); 925 // The next relocation should be against __tls_get_addr, so skip it 926 return 1; 927 } 928 case R_X86_64_TLSLD: 929 relocateTlsLdToLe(Loc, BufEnd, P, SA); 930 // The next relocation should be against __tls_get_addr, so skip it 931 return 1; 932 } 933 llvm_unreachable("Unknown TLS optimization"); 934 } 935 936 void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 937 uint64_t P, uint64_t SA, uint64_t ZA, 938 uint8_t *PairedLoc) const { 939 switch (Type) { 940 case R_X86_64_32: 941 checkUInt<32>(SA, Type); 942 write32le(Loc, SA); 943 break; 944 case R_X86_64_32S: 945 checkInt<32>(SA, Type); 946 write32le(Loc, SA); 947 break; 948 case R_X86_64_64: 949 case R_X86_64_DTPOFF64: 950 write64le(Loc, SA); 951 break; 952 case R_X86_64_DTPOFF32: 953 write32le(Loc, SA); 954 break; 955 case R_X86_64_GOTPCREL: 956 case R_X86_64_PC32: 957 case R_X86_64_PLT32: 958 case R_X86_64_TLSGD: 959 case R_X86_64_TLSLD: 960 write32le(Loc, SA - P); 961 break; 962 case R_X86_64_SIZE32: 963 write32le(Loc, ZA); 964 break; 965 case R_X86_64_SIZE64: 966 write64le(Loc, ZA); 967 break; 968 case R_X86_64_TPOFF32: { 969 uint64_t Val = SA - Out<ELF64LE>::TlsPhdr->p_memsz; 970 checkInt<32>(Val, Type); 971 write32le(Loc, Val); 972 break; 973 } 974 default: 975 fatal("unrecognized reloc " + Twine(Type)); 976 } 977 } 978 979 // Relocation masks following the #lo(value), #hi(value), #ha(value), 980 // #higher(value), #highera(value), #highest(value), and #highesta(value) 981 // macros defined in section 4.5.1. Relocation Types of the PPC-elf64abi 982 // document. 983 static uint16_t applyPPCLo(uint64_t V) { return V; } 984 static uint16_t applyPPCHi(uint64_t V) { return V >> 16; } 985 static uint16_t applyPPCHa(uint64_t V) { return (V + 0x8000) >> 16; } 986 static uint16_t applyPPCHigher(uint64_t V) { return V >> 32; } 987 static uint16_t applyPPCHighera(uint64_t V) { return (V + 0x8000) >> 32; } 988 static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; } 989 static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; } 990 991 PPCTargetInfo::PPCTargetInfo() {} 992 bool PPCTargetInfo::isRelRelative(uint32_t Type) const { return false; } 993 994 void PPCTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 995 uint64_t P, uint64_t SA, uint64_t ZA, 996 uint8_t *PairedLoc) const { 997 switch (Type) { 998 case R_PPC_ADDR16_HA: 999 write16be(Loc, applyPPCHa(SA)); 1000 break; 1001 case R_PPC_ADDR16_LO: 1002 write16be(Loc, applyPPCLo(SA)); 1003 break; 1004 default: 1005 fatal("unrecognized reloc " + Twine(Type)); 1006 } 1007 } 1008 1009 PPC64TargetInfo::PPC64TargetInfo() { 1010 GotRel = R_PPC64_GLOB_DAT; 1011 RelativeRel = R_PPC64_RELATIVE; 1012 PltEntrySize = 32; 1013 1014 // We need 64K pages (at least under glibc/Linux, the loader won't 1015 // set different permissions on a finer granularity than that). 1016 PageSize = 65536; 1017 1018 // The PPC64 ELF ABI v1 spec, says: 1019 // 1020 // It is normally desirable to put segments with different characteristics 1021 // in separate 256 Mbyte portions of the address space, to give the 1022 // operating system full paging flexibility in the 64-bit address space. 1023 // 1024 // And because the lowest non-zero 256M boundary is 0x10000000, PPC64 linkers 1025 // use 0x10000000 as the starting address. 1026 VAStart = 0x10000000; 1027 } 1028 1029 uint64_t getPPC64TocBase() { 1030 // The TOC consists of sections .got, .toc, .tocbss, .plt in that 1031 // order. The TOC starts where the first of these sections starts. 1032 1033 // FIXME: This obviously does not do the right thing when there is no .got 1034 // section, but there is a .toc or .tocbss section. 1035 uint64_t TocVA = Out<ELF64BE>::Got->getVA(); 1036 if (!TocVA) 1037 TocVA = Out<ELF64BE>::Plt->getVA(); 1038 1039 // Per the ppc64-elf-linux ABI, The TOC base is TOC value plus 0x8000 1040 // thus permitting a full 64 Kbytes segment. Note that the glibc startup 1041 // code (crt1.o) assumes that you can get from the TOC base to the 1042 // start of the .toc section with only a single (signed) 16-bit relocation. 1043 return TocVA + 0x8000; 1044 } 1045 1046 void PPC64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1047 uint64_t PltEntryAddr, int32_t Index, 1048 unsigned RelOff) const { 1049 uint64_t Off = GotEntryAddr - getPPC64TocBase(); 1050 1051 // FIXME: What we should do, in theory, is get the offset of the function 1052 // descriptor in the .opd section, and use that as the offset from %r2 (the 1053 // TOC-base pointer). Instead, we have the GOT-entry offset, and that will 1054 // be a pointer to the function descriptor in the .opd section. Using 1055 // this scheme is simpler, but requires an extra indirection per PLT dispatch. 1056 1057 write32be(Buf, 0xf8410028); // std %r2, 40(%r1) 1058 write32be(Buf + 4, 0x3d620000 | applyPPCHa(Off)); // addis %r11, %r2, X@ha 1059 write32be(Buf + 8, 0xe98b0000 | applyPPCLo(Off)); // ld %r12, X@l(%r11) 1060 write32be(Buf + 12, 0xe96c0000); // ld %r11,0(%r12) 1061 write32be(Buf + 16, 0x7d6903a6); // mtctr %r11 1062 write32be(Buf + 20, 0xe84c0008); // ld %r2,8(%r12) 1063 write32be(Buf + 24, 0xe96c0010); // ld %r11,16(%r12) 1064 write32be(Buf + 28, 0x4e800420); // bctr 1065 } 1066 1067 bool PPC64TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 1068 if (needsPlt<ELF64BE>(Type, S)) 1069 return true; 1070 1071 switch (Type) { 1072 default: return false; 1073 case R_PPC64_GOT16: 1074 case R_PPC64_GOT16_DS: 1075 case R_PPC64_GOT16_HA: 1076 case R_PPC64_GOT16_HI: 1077 case R_PPC64_GOT16_LO: 1078 case R_PPC64_GOT16_LO_DS: 1079 return true; 1080 } 1081 } 1082 1083 bool PPC64TargetInfo::needsPltImpl(uint32_t Type) const { 1084 // These are function calls that need to be redirected through a PLT stub. 1085 return Type == R_PPC64_REL24; 1086 } 1087 1088 bool PPC64TargetInfo::isRelRelative(uint32_t Type) const { 1089 switch (Type) { 1090 default: 1091 return true; 1092 case R_PPC64_ADDR64: 1093 case R_PPC64_TOC: 1094 return false; 1095 } 1096 } 1097 1098 void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1099 uint64_t P, uint64_t SA, uint64_t ZA, 1100 uint8_t *PairedLoc) const { 1101 uint64_t TB = getPPC64TocBase(); 1102 1103 // For a TOC-relative relocation, adjust the addend and proceed in terms of 1104 // the corresponding ADDR16 relocation type. 1105 switch (Type) { 1106 case R_PPC64_TOC16: Type = R_PPC64_ADDR16; SA -= TB; break; 1107 case R_PPC64_TOC16_DS: Type = R_PPC64_ADDR16_DS; SA -= TB; break; 1108 case R_PPC64_TOC16_HA: Type = R_PPC64_ADDR16_HA; SA -= TB; break; 1109 case R_PPC64_TOC16_HI: Type = R_PPC64_ADDR16_HI; SA -= TB; break; 1110 case R_PPC64_TOC16_LO: Type = R_PPC64_ADDR16_LO; SA -= TB; break; 1111 case R_PPC64_TOC16_LO_DS: Type = R_PPC64_ADDR16_LO_DS; SA -= TB; break; 1112 default: break; 1113 } 1114 1115 switch (Type) { 1116 case R_PPC64_ADDR14: { 1117 checkAlignment<4>(SA, Type); 1118 // Preserve the AA/LK bits in the branch instruction 1119 uint8_t AALK = Loc[3]; 1120 write16be(Loc + 2, (AALK & 3) | (SA & 0xfffc)); 1121 break; 1122 } 1123 case R_PPC64_ADDR16: 1124 checkInt<16>(SA, Type); 1125 write16be(Loc, SA); 1126 break; 1127 case R_PPC64_ADDR16_DS: 1128 checkInt<16>(SA, Type); 1129 write16be(Loc, (read16be(Loc) & 3) | (SA & ~3)); 1130 break; 1131 case R_PPC64_ADDR16_HA: 1132 write16be(Loc, applyPPCHa(SA)); 1133 break; 1134 case R_PPC64_ADDR16_HI: 1135 write16be(Loc, applyPPCHi(SA)); 1136 break; 1137 case R_PPC64_ADDR16_HIGHER: 1138 write16be(Loc, applyPPCHigher(SA)); 1139 break; 1140 case R_PPC64_ADDR16_HIGHERA: 1141 write16be(Loc, applyPPCHighera(SA)); 1142 break; 1143 case R_PPC64_ADDR16_HIGHEST: 1144 write16be(Loc, applyPPCHighest(SA)); 1145 break; 1146 case R_PPC64_ADDR16_HIGHESTA: 1147 write16be(Loc, applyPPCHighesta(SA)); 1148 break; 1149 case R_PPC64_ADDR16_LO: 1150 write16be(Loc, applyPPCLo(SA)); 1151 break; 1152 case R_PPC64_ADDR16_LO_DS: 1153 write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(SA) & ~3)); 1154 break; 1155 case R_PPC64_ADDR32: 1156 checkInt<32>(SA, Type); 1157 write32be(Loc, SA); 1158 break; 1159 case R_PPC64_ADDR64: 1160 write64be(Loc, SA); 1161 break; 1162 case R_PPC64_REL16_HA: 1163 write16be(Loc, applyPPCHa(SA - P)); 1164 break; 1165 case R_PPC64_REL16_HI: 1166 write16be(Loc, applyPPCHi(SA - P)); 1167 break; 1168 case R_PPC64_REL16_LO: 1169 write16be(Loc, applyPPCLo(SA - P)); 1170 break; 1171 case R_PPC64_REL24: { 1172 // If we have an undefined weak symbol, we might get here with a symbol 1173 // address of zero. That could overflow, but the code must be unreachable, 1174 // so don't bother doing anything at all. 1175 if (!SA) 1176 break; 1177 1178 uint64_t PltStart = Out<ELF64BE>::Plt->getVA(); 1179 uint64_t PltEnd = PltStart + Out<ELF64BE>::Plt->getSize(); 1180 bool InPlt = PltStart <= SA && SA < PltEnd; 1181 1182 if (!InPlt && Out<ELF64BE>::Opd) { 1183 // If this is a local call, and we currently have the address of a 1184 // function-descriptor, get the underlying code address instead. 1185 uint64_t OpdStart = Out<ELF64BE>::Opd->getVA(); 1186 uint64_t OpdEnd = OpdStart + Out<ELF64BE>::Opd->getSize(); 1187 bool InOpd = OpdStart <= SA && SA < OpdEnd; 1188 1189 if (InOpd) 1190 SA = read64be(&Out<ELF64BE>::OpdBuf[SA - OpdStart]); 1191 } 1192 1193 uint32_t Mask = 0x03FFFFFC; 1194 checkInt<24>(SA - P, Type); 1195 write32be(Loc, (read32be(Loc) & ~Mask) | ((SA - P) & Mask)); 1196 1197 uint32_t Nop = 0x60000000; 1198 if (InPlt && Loc + 8 <= BufEnd && read32be(Loc + 4) == Nop) 1199 write32be(Loc + 4, 0xe8410028); // ld %r2, 40(%r1) 1200 break; 1201 } 1202 case R_PPC64_REL32: 1203 checkInt<32>(SA - P, Type); 1204 write32be(Loc, SA - P); 1205 break; 1206 case R_PPC64_REL64: 1207 write64be(Loc, SA - P); 1208 break; 1209 case R_PPC64_TOC: 1210 write64be(Loc, SA); 1211 break; 1212 default: 1213 fatal("unrecognized reloc " + Twine(Type)); 1214 } 1215 } 1216 1217 AArch64TargetInfo::AArch64TargetInfo() { 1218 CopyRel = R_AARCH64_COPY; 1219 RelativeRel = R_AARCH64_RELATIVE; 1220 IRelativeRel = R_AARCH64_IRELATIVE; 1221 GotRel = R_AARCH64_GLOB_DAT; 1222 PltRel = R_AARCH64_JUMP_SLOT; 1223 TlsGotRel = R_AARCH64_TLS_TPREL64; 1224 TlsModuleIndexRel = R_AARCH64_TLS_DTPMOD64; 1225 TlsOffsetRel = R_AARCH64_TLS_DTPREL64; 1226 UseLazyBinding = true; 1227 PltEntrySize = 16; 1228 PltZeroSize = 32; 1229 } 1230 1231 bool AArch64TargetInfo::isRelRelative(uint32_t Type) const { 1232 return Type == R_AARCH64_PREL32 || Type == R_AARCH64_ADR_PREL_PG_HI21 || 1233 Type == R_AARCH64_LDST8_ABS_LO12_NC || 1234 Type == R_AARCH64_LDST32_ABS_LO12_NC || 1235 Type == R_AARCH64_LDST64_ABS_LO12_NC || 1236 Type == R_AARCH64_ADD_ABS_LO12_NC || Type == R_AARCH64_CALL26; 1237 } 1238 1239 bool AArch64TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { 1240 return Type == R_AARCH64_TLSDESC_ADR_PAGE21 || 1241 Type == R_AARCH64_TLSDESC_LD64_LO12_NC || 1242 Type == R_AARCH64_TLSDESC_ADD_LO12_NC || 1243 Type == R_AARCH64_TLSDESC_CALL; 1244 } 1245 1246 bool AArch64TargetInfo::isTlsInitialExecRel(uint32_t Type) const { 1247 return Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 || 1248 Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC; 1249 } 1250 1251 uint32_t AArch64TargetInfo::getDynRel(uint32_t Type) const { 1252 if (Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64) 1253 return Type; 1254 StringRef S = getELFRelocationTypeName(EM_AARCH64, Type); 1255 error("Relocation " + S + " cannot be used when making a shared object; " 1256 "recompile with -fPIC."); 1257 // Keep it going with a dummy value so that we can find more reloc errors. 1258 return R_AARCH64_ABS32; 1259 } 1260 1261 void AArch64TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 1262 write64le(Buf, Out<ELF64LE>::Plt->getVA()); 1263 } 1264 1265 void AArch64TargetInfo::writePltZero(uint8_t *Buf) const { 1266 const uint8_t PltData[] = { 1267 0xf0, 0x7b, 0xbf, 0xa9, // stp x16, x30, [sp,#-16]! 1268 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[2])) 1269 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[2]))] 1270 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[2])) 1271 0x20, 0x02, 0x1f, 0xd6, // br x17 1272 0x1f, 0x20, 0x03, 0xd5, // nop 1273 0x1f, 0x20, 0x03, 0xd5, // nop 1274 0x1f, 0x20, 0x03, 0xd5 // nop 1275 }; 1276 memcpy(Buf, PltData, sizeof(PltData)); 1277 1278 uint64_t Got = Out<ELF64LE>::GotPlt->getVA(); 1279 uint64_t Plt = Out<ELF64LE>::Plt->getVA(); 1280 relocateOne(Buf + 4, Buf + 8, R_AARCH64_ADR_PREL_PG_HI21, Plt + 4, Got + 16); 1281 relocateOne(Buf + 8, Buf + 12, R_AARCH64_LDST64_ABS_LO12_NC, Plt + 8, 1282 Got + 16); 1283 relocateOne(Buf + 12, Buf + 16, R_AARCH64_ADD_ABS_LO12_NC, Plt + 12, 1284 Got + 16); 1285 } 1286 1287 void AArch64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1288 uint64_t PltEntryAddr, int32_t Index, 1289 unsigned RelOff) const { 1290 const uint8_t Inst[] = { 1291 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[n])) 1292 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[n]))] 1293 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[n])) 1294 0x20, 0x02, 0x1f, 0xd6 // br x17 1295 }; 1296 memcpy(Buf, Inst, sizeof(Inst)); 1297 1298 relocateOne(Buf, Buf + 4, R_AARCH64_ADR_PREL_PG_HI21, PltEntryAddr, 1299 GotEntryAddr); 1300 relocateOne(Buf + 4, Buf + 8, R_AARCH64_LDST64_ABS_LO12_NC, PltEntryAddr + 4, 1301 GotEntryAddr); 1302 relocateOne(Buf + 8, Buf + 12, R_AARCH64_ADD_ABS_LO12_NC, PltEntryAddr + 8, 1303 GotEntryAddr); 1304 } 1305 1306 uint32_t AArch64TargetInfo::getTlsGotRel(uint32_t Type) const { 1307 assert(Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 || 1308 Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC); 1309 return Type; 1310 } 1311 1312 bool AArch64TargetInfo::isTlsDynRel(uint32_t Type, const SymbolBody &S) const { 1313 return Type == R_AARCH64_TLSDESC_ADR_PAGE21 || 1314 Type == R_AARCH64_TLSDESC_LD64_LO12_NC || 1315 Type == R_AARCH64_TLSDESC_ADD_LO12_NC || 1316 Type == R_AARCH64_TLSDESC_CALL || 1317 Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 || 1318 Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC; 1319 } 1320 1321 bool AArch64TargetInfo::needsCopyRelImpl(uint32_t Type) const { 1322 switch (Type) { 1323 default: 1324 return false; 1325 case R_AARCH64_ABS16: 1326 case R_AARCH64_ABS32: 1327 case R_AARCH64_ABS64: 1328 case R_AARCH64_ADD_ABS_LO12_NC: 1329 case R_AARCH64_ADR_PREL_LO21: 1330 case R_AARCH64_ADR_PREL_PG_HI21: 1331 case R_AARCH64_LDST8_ABS_LO12_NC: 1332 case R_AARCH64_LDST16_ABS_LO12_NC: 1333 case R_AARCH64_LDST32_ABS_LO12_NC: 1334 case R_AARCH64_LDST64_ABS_LO12_NC: 1335 case R_AARCH64_LDST128_ABS_LO12_NC: 1336 return true; 1337 } 1338 } 1339 1340 bool AArch64TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const { 1341 switch (Type) { 1342 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1343 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: 1344 case R_AARCH64_ADR_GOT_PAGE: 1345 case R_AARCH64_LD64_GOT_LO12_NC: 1346 return true; 1347 default: 1348 return needsPlt<ELF64LE>(Type, S); 1349 } 1350 } 1351 1352 bool AArch64TargetInfo::needsPltImpl(uint32_t Type) const { 1353 switch (Type) { 1354 default: 1355 return false; 1356 case R_AARCH64_CALL26: 1357 case R_AARCH64_CONDBR19: 1358 case R_AARCH64_JUMP26: 1359 case R_AARCH64_TSTBR14: 1360 return true; 1361 } 1362 } 1363 1364 static void updateAArch64Addr(uint8_t *L, uint64_t Imm) { 1365 uint32_t ImmLo = (Imm & 0x3) << 29; 1366 uint32_t ImmHi = ((Imm & 0x1FFFFC) >> 2) << 5; 1367 uint64_t Mask = (0x3 << 29) | (0x7FFFF << 5); 1368 write32le(L, (read32le(L) & ~Mask) | ImmLo | ImmHi); 1369 } 1370 1371 static inline void updateAArch64Add(uint8_t *L, uint64_t Imm) { 1372 or32le(L, (Imm & 0xFFF) << 10); 1373 } 1374 1375 // Page(Expr) is the page address of the expression Expr, defined 1376 // as (Expr & ~0xFFF). (This applies even if the machine page size 1377 // supported by the platform has a different value.) 1378 static uint64_t getAArch64Page(uint64_t Expr) { 1379 return Expr & (~static_cast<uint64_t>(0xFFF)); 1380 } 1381 1382 void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, 1383 uint32_t Type, uint64_t P, uint64_t SA, 1384 uint64_t ZA, uint8_t *PairedLoc) const { 1385 switch (Type) { 1386 case R_AARCH64_ABS16: 1387 checkIntUInt<16>(SA, Type); 1388 write16le(Loc, SA); 1389 break; 1390 case R_AARCH64_ABS32: 1391 checkIntUInt<32>(SA, Type); 1392 write32le(Loc, SA); 1393 break; 1394 case R_AARCH64_ABS64: 1395 write64le(Loc, SA); 1396 break; 1397 case R_AARCH64_ADD_ABS_LO12_NC: 1398 // This relocation stores 12 bits and there's no instruction 1399 // to do it. Instead, we do a 32 bits store of the value 1400 // of r_addend bitwise-or'ed Loc. This assumes that the addend 1401 // bits in Loc are zero. 1402 or32le(Loc, (SA & 0xFFF) << 10); 1403 break; 1404 case R_AARCH64_ADR_GOT_PAGE: { 1405 uint64_t X = getAArch64Page(SA) - getAArch64Page(P); 1406 checkInt<33>(X, Type); 1407 updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12] 1408 break; 1409 } 1410 case R_AARCH64_ADR_PREL_LO21: { 1411 uint64_t X = SA - P; 1412 checkInt<21>(X, Type); 1413 updateAArch64Addr(Loc, X & 0x1FFFFF); 1414 break; 1415 } 1416 case R_AARCH64_ADR_PREL_PG_HI21: 1417 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: { 1418 uint64_t X = getAArch64Page(SA) - getAArch64Page(P); 1419 checkInt<33>(X, Type); 1420 updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12] 1421 break; 1422 } 1423 case R_AARCH64_CALL26: 1424 case R_AARCH64_JUMP26: { 1425 uint64_t X = SA - P; 1426 checkInt<28>(X, Type); 1427 or32le(Loc, (X & 0x0FFFFFFC) >> 2); 1428 break; 1429 } 1430 case R_AARCH64_CONDBR19: { 1431 uint64_t X = SA - P; 1432 checkInt<21>(X, Type); 1433 or32le(Loc, (X & 0x1FFFFC) << 3); 1434 break; 1435 } 1436 case R_AARCH64_LD64_GOT_LO12_NC: 1437 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1438 checkAlignment<8>(SA, Type); 1439 or32le(Loc, (SA & 0xFF8) << 7); 1440 break; 1441 case R_AARCH64_LDST128_ABS_LO12_NC: 1442 or32le(Loc, (SA & 0x0FF8) << 6); 1443 break; 1444 case R_AARCH64_LDST16_ABS_LO12_NC: 1445 or32le(Loc, (SA & 0x0FFC) << 9); 1446 break; 1447 case R_AARCH64_LDST8_ABS_LO12_NC: 1448 or32le(Loc, (SA & 0xFFF) << 10); 1449 break; 1450 case R_AARCH64_LDST32_ABS_LO12_NC: 1451 or32le(Loc, (SA & 0xFFC) << 8); 1452 break; 1453 case R_AARCH64_LDST64_ABS_LO12_NC: 1454 or32le(Loc, (SA & 0xFF8) << 7); 1455 break; 1456 case R_AARCH64_PREL16: 1457 checkIntUInt<16>(SA - P, Type); 1458 write16le(Loc, SA - P); 1459 break; 1460 case R_AARCH64_PREL32: 1461 checkIntUInt<32>(SA - P, Type); 1462 write32le(Loc, SA - P); 1463 break; 1464 case R_AARCH64_PREL64: 1465 write64le(Loc, SA - P); 1466 break; 1467 case R_AARCH64_TSTBR14: { 1468 uint64_t X = SA - P; 1469 checkInt<16>(X, Type); 1470 or32le(Loc, (X & 0xFFFC) << 3); 1471 break; 1472 } 1473 case R_AARCH64_TLSLE_ADD_TPREL_HI12: { 1474 uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA; 1475 checkInt<24>(V, Type); 1476 updateAArch64Add(Loc, (V & 0xFFF000) >> 12); 1477 break; 1478 } 1479 case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC: { 1480 uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA; 1481 updateAArch64Add(Loc, V & 0xFFF); 1482 break; 1483 } 1484 default: 1485 fatal("unrecognized reloc " + Twine(Type)); 1486 } 1487 } 1488 1489 size_t AArch64TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1490 uint64_t P, uint64_t SA, 1491 const SymbolBody *S) const { 1492 switch (Type) { 1493 case R_AARCH64_TLSDESC_ADR_PAGE21: 1494 case R_AARCH64_TLSDESC_LD64_LO12_NC: 1495 case R_AARCH64_TLSDESC_ADD_LO12_NC: 1496 case R_AARCH64_TLSDESC_CALL: { 1497 if (canBePreempted(S)) 1498 fatal("Unsupported TLS optimization"); 1499 uint64_t X = S ? S->getVA<ELF64LE>() : SA; 1500 relocateTlsGdToLe(Type, Loc, BufEnd, P, X); 1501 return 0; 1502 } 1503 case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: 1504 case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: 1505 relocateTlsIeToLe(Type, Loc, BufEnd, P, S->getVA<ELF64LE>()); 1506 return 0; 1507 } 1508 llvm_unreachable("Unknown TLS optimization"); 1509 } 1510 1511 // Global-Dynamic relocations can be relaxed to Local-Exec if both binary is 1512 // an executable and target is final (can notbe preempted). 1513 void AArch64TargetInfo::relocateTlsGdToLe(uint32_t Type, uint8_t *Loc, 1514 uint8_t *BufEnd, uint64_t P, 1515 uint64_t SA) const { 1516 // TLSDESC Global-Dynamic relocation are in the form: 1517 // adrp x0, :tlsdesc:v [R_AARCH64_TLSDESC_ADR_PAGE21] 1518 // ldr x1, [x0, #:tlsdesc_lo12:v [R_AARCH64_TLSDESC_LD64_LO12_NC] 1519 // add x0, x0, :tlsdesc_los:v [_AARCH64_TLSDESC_ADD_LO12_NC] 1520 // .tlsdesccall [R_AARCH64_TLSDESC_CALL] 1521 // And it can optimized to: 1522 // movz x0, #0x0, lsl #16 1523 // movk x0, #0x10 1524 // nop 1525 // nop 1526 1527 uint64_t TPOff = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align); 1528 uint64_t X = SA + TPOff; 1529 checkUInt<32>(X, Type); 1530 1531 uint32_t NewInst; 1532 switch (Type) { 1533 case R_AARCH64_TLSDESC_ADD_LO12_NC: 1534 case R_AARCH64_TLSDESC_CALL: 1535 // nop 1536 NewInst = 0xd503201f; 1537 break; 1538 case R_AARCH64_TLSDESC_ADR_PAGE21: 1539 // movz 1540 NewInst = 0xd2a00000 | (((X >> 16) & 0xffff) << 5); 1541 break; 1542 case R_AARCH64_TLSDESC_LD64_LO12_NC: 1543 // movk 1544 NewInst = 0xf2800000 | ((X & 0xffff) << 5); 1545 break; 1546 default: 1547 llvm_unreachable("Unsupported Relocation for TLS GD to LE relax"); 1548 } 1549 write32le(Loc, NewInst); 1550 } 1551 1552 // Initial-Exec relocations can be relaxed to Local-Exec if symbol is final 1553 // (can not be preempted). 1554 void AArch64TargetInfo::relocateTlsIeToLe(uint32_t Type, uint8_t *Loc, 1555 uint8_t *BufEnd, uint64_t P, 1556 uint64_t SA) const { 1557 uint64_t TPOff = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align); 1558 uint64_t X = SA + TPOff; 1559 checkUInt<32>(X, Type); 1560 1561 uint32_t Inst = read32le(Loc); 1562 uint32_t NewInst; 1563 if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21) { 1564 // Generate movz. 1565 unsigned RegNo = (Inst & 0x1f); 1566 NewInst = (0xd2a00000 | RegNo) | (((X >> 16) & 0xffff) << 5); 1567 } else if (Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC) { 1568 // Generate movk 1569 unsigned RegNo = (Inst & 0x1f); 1570 NewInst = (0xf2800000 | RegNo) | ((X & 0xffff) << 5); 1571 } else { 1572 llvm_unreachable("Invalid Relocation for TLS IE to LE Relax"); 1573 } 1574 write32le(Loc, NewInst); 1575 } 1576 1577 // Implementing relocations for AMDGPU is low priority since most 1578 // programs don't use relocations now. Thus, this function is not 1579 // actually called (relocateOne is called for each relocation). 1580 // That's why the AMDGPU port works without implementing this function. 1581 void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, 1582 uint64_t P, uint64_t SA, uint64_t ZA, 1583 uint8_t *PairedLoc) const { 1584 llvm_unreachable("not implemented"); 1585 } 1586 1587 template <class ELFT> MipsTargetInfo<ELFT>::MipsTargetInfo() { 1588 GotHeaderEntriesNum = 2; 1589 GotPltHeaderEntriesNum = 2; 1590 PageSize = 65536; 1591 PltEntrySize = 16; 1592 PltZeroSize = 32; 1593 UseLazyBinding = true; 1594 CopyRel = R_MIPS_COPY; 1595 PltRel = R_MIPS_JUMP_SLOT; 1596 RelativeRel = R_MIPS_REL32; 1597 } 1598 1599 template <class ELFT> 1600 uint32_t MipsTargetInfo<ELFT>::getDynRel(uint32_t Type) const { 1601 if (Type == R_MIPS_32 || Type == R_MIPS_64) 1602 return R_MIPS_REL32; 1603 StringRef S = getELFRelocationTypeName(EM_MIPS, Type); 1604 error("Relocation " + S + " cannot be used when making a shared object; " 1605 "recompile with -fPIC."); 1606 // Keep it going with a dummy value so that we can find more reloc errors. 1607 return R_MIPS_32; 1608 } 1609 1610 template <class ELFT> 1611 void MipsTargetInfo<ELFT>::writeGotHeader(uint8_t *Buf) const { 1612 typedef typename ELFFile<ELFT>::Elf_Off Elf_Off; 1613 typedef typename ELFFile<ELFT>::uintX_t uintX_t; 1614 1615 // Set the MSB of the second GOT slot. This is not required by any 1616 // MIPS ABI documentation, though. 1617 // 1618 // There is a comment in glibc saying that "The MSB of got[1] of a 1619 // gnu object is set to identify gnu objects," and in GNU gold it 1620 // says "the second entry will be used by some runtime loaders". 1621 // But how this field is being used is unclear. 1622 // 1623 // We are not really willing to mimic other linkers behaviors 1624 // without understanding why they do that, but because all files 1625 // generated by GNU tools have this special GOT value, and because 1626 // we've been doing this for years, it is probably a safe bet to 1627 // keep doing this for now. We really need to revisit this to see 1628 // if we had to do this. 1629 auto *P = reinterpret_cast<Elf_Off *>(Buf); 1630 P[1] = uintX_t(1) << (ELFT::Is64Bits ? 63 : 31); 1631 } 1632 1633 template <class ELFT> 1634 void MipsTargetInfo<ELFT>::writeGotPlt(uint8_t *Buf, uint64_t Plt) const { 1635 write32<ELFT::TargetEndianness>(Buf, Out<ELFT>::Plt->getVA()); 1636 } 1637 1638 static uint16_t mipsHigh(uint64_t V) { return (V + 0x8000) >> 16; } 1639 1640 template <endianness E, uint8_t BSIZE, uint8_t SHIFT> 1641 static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t P, 1642 uint64_t S) { 1643 uint32_t Mask = 0xffffffff >> (32 - BSIZE); 1644 uint32_t Instr = read32<E>(Loc); 1645 int64_t A = SignExtend64<BSIZE + SHIFT>((Instr & Mask) << SHIFT); 1646 if (SHIFT > 0) 1647 checkAlignment<(1 << SHIFT)>(S + A, Type); 1648 int64_t V = S + A - P; 1649 checkInt<BSIZE + SHIFT>(V, Type); 1650 write32<E>(Loc, (Instr & ~Mask) | ((V >> SHIFT) & Mask)); 1651 } 1652 1653 template <endianness E> 1654 static void writeMipsHi16(uint8_t *Loc, uint64_t V) { 1655 uint32_t Instr = read32<E>(Loc); 1656 write32<E>(Loc, (Instr & 0xffff0000) | mipsHigh(V)); 1657 } 1658 1659 template <endianness E> 1660 static void writeMipsLo16(uint8_t *Loc, uint64_t V) { 1661 uint32_t Instr = read32<E>(Loc); 1662 write32<E>(Loc, (Instr & 0xffff0000) | (V & 0xffff)); 1663 } 1664 1665 template <endianness E> static int16_t readSignedLo16(uint8_t *Loc) { 1666 return SignExtend32<16>(read32<E>(Loc) & 0xffff); 1667 } 1668 1669 template <endianness E> 1670 static int64_t readMipsAHL(uint8_t *HiLoc, uint8_t *LoLoc) { 1671 return ((read32<E>(HiLoc) & 0xffff) << 16) + readSignedLo16<E>(LoLoc); 1672 } 1673 1674 template <class ELFT> 1675 void MipsTargetInfo<ELFT>::writePltZero(uint8_t *Buf) const { 1676 const endianness E = ELFT::TargetEndianness; 1677 write32<E>(Buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0]) 1678 write32<E>(Buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28) 1679 write32<E>(Buf + 8, 0x279c0000); // addiu $28, $28, %lo(&GOTPLT[0]) 1680 write32<E>(Buf + 12, 0x031cc023); // subu $24, $24, $28 1681 write32<E>(Buf + 16, 0x03e07825); // move $15, $31 1682 write32<E>(Buf + 20, 0x0018c082); // srl $24, $24, 2 1683 write32<E>(Buf + 24, 0x0320f809); // jalr $25 1684 write32<E>(Buf + 28, 0x2718fffe); // subu $24, $24, 2 1685 uint64_t Got = Out<ELFT>::GotPlt->getVA(); 1686 writeMipsHi16<E>(Buf, Got); 1687 writeMipsLo16<E>(Buf + 4, Got); 1688 writeMipsLo16<E>(Buf + 8, Got); 1689 } 1690 1691 template <class ELFT> 1692 void MipsTargetInfo<ELFT>::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, 1693 uint64_t PltEntryAddr, int32_t Index, 1694 unsigned RelOff) const { 1695 const endianness E = ELFT::TargetEndianness; 1696 write32<E>(Buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry) 1697 write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15) 1698 write32<E>(Buf + 8, 0x03200008); // jr $25 1699 write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry) 1700 writeMipsHi16<E>(Buf, GotEntryAddr); 1701 writeMipsLo16<E>(Buf + 4, GotEntryAddr); 1702 writeMipsLo16<E>(Buf + 12, GotEntryAddr); 1703 } 1704 1705 template <class ELFT> 1706 bool MipsTargetInfo<ELFT>::needsCopyRelImpl(uint32_t Type) const { 1707 return !isRelRelative(Type); 1708 } 1709 1710 template <class ELFT> 1711 bool MipsTargetInfo<ELFT>::needsGot(uint32_t Type, SymbolBody &S) const { 1712 return needsPlt<ELFT>(Type, S) || refersToGotEntry(Type); 1713 } 1714 1715 template <class ELFT> 1716 bool MipsTargetInfo<ELFT>::refersToGotEntry(uint32_t Type) const { 1717 return Type == R_MIPS_GOT16 || Type == R_MIPS_CALL16; 1718 } 1719 1720 template <class ELFT> 1721 bool MipsTargetInfo<ELFT>::needsPltImpl(uint32_t Type) const { 1722 return Type == R_MIPS_26; 1723 } 1724 1725 template <class ELFT> 1726 void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint8_t *BufEnd, 1727 uint32_t Type, uint64_t P, uint64_t S, 1728 uint64_t ZA, uint8_t *PairedLoc) const { 1729 const endianness E = ELFT::TargetEndianness; 1730 switch (Type) { 1731 case R_MIPS_32: 1732 add32<E>(Loc, S); 1733 break; 1734 case R_MIPS_26: { 1735 uint32_t Instr = read32<E>(Loc); 1736 // FIXME (simon): If the relocation target symbol is not a PLT entry 1737 // we should use another expression for calculation: 1738 // ((A << 2) | (P & 0xf0000000)) >> 2 1739 S += SignExtend64<28>((Instr & 0x3ffffff) << 2); 1740 write32<E>(Loc, (Instr & ~0x3ffffff) | (S >> 2)); 1741 break; 1742 } 1743 case R_MIPS_CALL16: 1744 case R_MIPS_GOT16: { 1745 int64_t V = S - getMipsGpAddr<ELFT>(); 1746 if (Type == R_MIPS_GOT16) 1747 checkInt<16>(V, Type); 1748 writeMipsLo16<E>(Loc, V); 1749 break; 1750 } 1751 case R_MIPS_GPREL16: { 1752 int64_t V = S + readSignedLo16<E>(Loc) - getMipsGpAddr<ELFT>(); 1753 checkInt<16>(V, Type); 1754 writeMipsLo16<E>(Loc, V); 1755 break; 1756 } 1757 case R_MIPS_GPREL32: 1758 write32<E>(Loc, S + int32_t(read32<E>(Loc)) - getMipsGpAddr<ELFT>()); 1759 break; 1760 case R_MIPS_HI16: 1761 if (PairedLoc) 1762 writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedLoc)); 1763 else { 1764 warning("Can't find matching R_MIPS_LO16 relocation for R_MIPS_HI16"); 1765 writeMipsHi16<E>(Loc, S); 1766 } 1767 break; 1768 case R_MIPS_JALR: 1769 // Ignore this optimization relocation for now 1770 break; 1771 case R_MIPS_LO16: 1772 writeMipsLo16<E>(Loc, S + readSignedLo16<E>(Loc)); 1773 break; 1774 case R_MIPS_PC16: 1775 applyMipsPcReloc<E, 16, 2>(Loc, Type, P, S); 1776 break; 1777 case R_MIPS_PC19_S2: 1778 applyMipsPcReloc<E, 19, 2>(Loc, Type, P, S); 1779 break; 1780 case R_MIPS_PC21_S2: 1781 applyMipsPcReloc<E, 21, 2>(Loc, Type, P, S); 1782 break; 1783 case R_MIPS_PC26_S2: 1784 applyMipsPcReloc<E, 26, 2>(Loc, Type, P, S); 1785 break; 1786 case R_MIPS_PC32: 1787 applyMipsPcReloc<E, 32, 0>(Loc, Type, P, S); 1788 break; 1789 case R_MIPS_PCHI16: 1790 if (PairedLoc) 1791 writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedLoc) - P); 1792 else { 1793 warning("Can't find matching R_MIPS_PCLO16 relocation for R_MIPS_PCHI16"); 1794 writeMipsHi16<E>(Loc, S - P); 1795 } 1796 break; 1797 case R_MIPS_PCLO16: 1798 writeMipsLo16<E>(Loc, S + readSignedLo16<E>(Loc) - P); 1799 break; 1800 default: 1801 fatal("unrecognized reloc " + Twine(Type)); 1802 } 1803 } 1804 1805 template <class ELFT> 1806 bool MipsTargetInfo<ELFT>::isHintRel(uint32_t Type) const { 1807 return Type == R_MIPS_JALR; 1808 } 1809 1810 template <class ELFT> 1811 bool MipsTargetInfo<ELFT>::isRelRelative(uint32_t Type) const { 1812 switch (Type) { 1813 default: 1814 return true; 1815 case R_MIPS_26: 1816 case R_MIPS_32: 1817 case R_MIPS_64: 1818 case R_MIPS_HI16: 1819 case R_MIPS_LO16: 1820 return false; 1821 } 1822 } 1823 1824 // _gp is a MIPS-specific ABI-defined symbol which points to 1825 // a location that is relative to GOT. This function returns 1826 // the value for the symbol. 1827 template <class ELFT> typename ELFFile<ELFT>::uintX_t getMipsGpAddr() { 1828 unsigned GPOffset = 0x7ff0; 1829 if (uint64_t V = Out<ELFT>::Got->getVA()) 1830 return V + GPOffset; 1831 return 0; 1832 } 1833 1834 template bool isGnuIFunc<ELF32LE>(const SymbolBody &S); 1835 template bool isGnuIFunc<ELF32BE>(const SymbolBody &S); 1836 template bool isGnuIFunc<ELF64LE>(const SymbolBody &S); 1837 template bool isGnuIFunc<ELF64BE>(const SymbolBody &S); 1838 1839 template uint32_t getMipsGpAddr<ELF32LE>(); 1840 template uint32_t getMipsGpAddr<ELF32BE>(); 1841 template uint64_t getMipsGpAddr<ELF64LE>(); 1842 template uint64_t getMipsGpAddr<ELF64BE>(); 1843 1844 template bool TargetInfo::needsCopyRel<ELF32LE>(uint32_t, 1845 const SymbolBody &) const; 1846 template bool TargetInfo::needsCopyRel<ELF32BE>(uint32_t, 1847 const SymbolBody &) const; 1848 template bool TargetInfo::needsCopyRel<ELF64LE>(uint32_t, 1849 const SymbolBody &) const; 1850 template bool TargetInfo::needsCopyRel<ELF64BE>(uint32_t, 1851 const SymbolBody &) const; 1852 1853 template TargetInfo::PltNeed 1854 TargetInfo::needsPlt<ELF32LE>(uint32_t, const SymbolBody &) const; 1855 template TargetInfo::PltNeed 1856 TargetInfo::needsPlt<ELF32BE>(uint32_t, const SymbolBody &) const; 1857 template TargetInfo::PltNeed 1858 TargetInfo::needsPlt<ELF64LE>(uint32_t, const SymbolBody &) const; 1859 template TargetInfo::PltNeed 1860 TargetInfo::needsPlt<ELF64BE>(uint32_t, const SymbolBody &) const; 1861 } 1862 } 1863