xref: /llvm-project-15.0.7/lld/ELF/Arch/PPC.cpp (revision 2e97d2aa)
1 //===- PPC.cpp ------------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "OutputSections.h"
10 #include "Symbols.h"
11 #include "SyntheticSections.h"
12 #include "Target.h"
13 #include "lld/Common/ErrorHandler.h"
14 #include "llvm/Support/Endian.h"
15 
16 using namespace llvm;
17 using namespace llvm::support::endian;
18 using namespace llvm::ELF;
19 using namespace lld;
20 using namespace lld::elf;
21 
22 namespace {
23 class PPC final : public TargetInfo {
24 public:
25   PPC();
26   RelExpr getRelExpr(RelType Type, const Symbol &S,
27                      const uint8_t *Loc) const override;
28   RelType getDynRel(RelType Type) const override;
29   void writeGotHeader(uint8_t *Buf) const override;
30   void writePltHeader(uint8_t *Buf) const override {
31     llvm_unreachable("should call writePPC32GlinkSection() instead");
32   }
33   void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
34     int32_t Index, unsigned RelOff) const override {
35     llvm_unreachable("should call writePPC32GlinkSection() instead");
36   }
37   void writeGotPlt(uint8_t *Buf, const Symbol &S) const override;
38   bool needsThunk(RelExpr Expr, RelType RelocType, const InputFile *File,
39                   uint64_t BranchAddr, const Symbol &S) const override;
40   uint32_t getThunkSectionSpacing() const override;
41   bool inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const override;
42   void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
43   RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
44                           RelExpr Expr) const override;
45   int getTlsGdRelaxSkip(RelType Type) const override;
46   void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
47   void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
48   void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
49   void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
50 };
51 } // namespace
52 
53 static uint16_t lo(uint32_t V) { return V; }
54 static uint16_t ha(uint32_t V) { return (V + 0x8000) >> 16; }
55 
56 static uint32_t readFromHalf16(const uint8_t *Loc) {
57   return read32(Config->IsLE ? Loc : Loc - 2);
58 }
59 
60 static void writeFromHalf16(uint8_t *Loc, uint32_t Insn) {
61   write32(Config->IsLE ? Loc : Loc - 2, Insn);
62 }
63 
64 void elf::writePPC32GlinkSection(uint8_t *Buf, size_t NumEntries) {
65   // On PPC Secure PLT ABI, bl foo@plt jumps to a call stub, which loads an
66   // absolute address from a specific .plt slot (usually called .got.plt on
67   // other targets) and jumps there.
68   //
69   // a) With immediate binding (BIND_NOW), the .plt entry is resolved at load
70   // time. The .glink section is not used.
71   // b) With lazy binding, the .plt entry points to a `b PLTresolve`
72   // instruction in .glink, filled in by PPC::writeGotPlt().
73 
74   // Write N `b PLTresolve` first.
75   for (size_t I = 0; I != NumEntries; ++I)
76     write32(Buf + 4 * I, 0x48000000 | 4 * (NumEntries - I));
77   Buf += 4 * NumEntries;
78 
79   // Then write PLTresolve(), which has two forms: PIC and non-PIC. PLTresolve()
80   // computes the PLT index (by computing the distance from the landing b to
81   // itself) and calls _dl_runtime_resolve() (in glibc).
82   uint32_t GOT = In.Got->getVA();
83   uint32_t Glink = In.Plt->getVA(); // VA of .glink
84   const uint8_t *End = Buf + 64;
85   if (Config->Pic) {
86     uint32_t AfterBcl = In.Plt->getSize() - Target->PltHeaderSize + 12;
87     uint32_t GotBcl = GOT + 4 - (Glink + AfterBcl);
88     write32(Buf + 0, 0x3d6b0000 | ha(AfterBcl));  // addis r11,r11,1f-glink@ha
89     write32(Buf + 4, 0x7c0802a6);                 // mflr r0
90     write32(Buf + 8, 0x429f0005);                 // bcl 20,30,.+4
91     write32(Buf + 12, 0x396b0000 | lo(AfterBcl)); // 1: addi r11,r11,1b-.glink@l
92     write32(Buf + 16, 0x7d8802a6);                // mflr r12
93     write32(Buf + 20, 0x7c0803a6);                // mtlr r0
94     write32(Buf + 24, 0x7d6c5850);                // sub r11,r11,r12
95     write32(Buf + 28, 0x3d8c0000 | ha(GotBcl));   // addis 12,12,GOT+4-1b@ha
96     if (ha(GotBcl) == ha(GotBcl + 4)) {
97       write32(Buf + 32, 0x800c0000 | lo(GotBcl)); // lwz r0,r12,GOT+4-1b@l(r12)
98       write32(Buf + 36,
99               0x818c0000 | lo(GotBcl + 4));       // lwz r12,r12,GOT+8-1b@l(r12)
100     } else {
101       write32(Buf + 32, 0x840c0000 | lo(GotBcl)); // lwzu r0,r12,GOT+4-1b@l(r12)
102       write32(Buf + 36, 0x818c0000 | 4);          // lwz r12,r12,4(r12)
103     }
104     write32(Buf + 40, 0x7c0903a6);                // mtctr 0
105     write32(Buf + 44, 0x7c0b5a14);                // add r0,11,11
106     write32(Buf + 48, 0x7d605a14);                // add r11,0,11
107     write32(Buf + 52, 0x4e800420);                // bctr
108     Buf += 56;
109   } else {
110     write32(Buf + 0, 0x3d800000 | ha(GOT + 4));   // lis     r12,GOT+4@ha
111     write32(Buf + 4, 0x3d6b0000 | ha(-Glink));    // addis   r11,r11,-Glink@ha
112     if (ha(GOT + 4) == ha(GOT + 8))
113       write32(Buf + 8, 0x800c0000 | lo(GOT + 4)); // lwz r0,GOT+4@l(r12)
114     else
115       write32(Buf + 8, 0x840c0000 | lo(GOT + 4)); // lwzu r0,GOT+4@l(r12)
116     write32(Buf + 12, 0x396b0000 | lo(-Glink));   // addi    r11,r11,-Glink@l
117     write32(Buf + 16, 0x7c0903a6);                // mtctr   r0
118     write32(Buf + 20, 0x7c0b5a14);                // add     r0,r11,r11
119     if (ha(GOT + 4) == ha(GOT + 8))
120       write32(Buf + 24, 0x818c0000 | lo(GOT + 8)); // lwz r12,GOT+8@ha(r12)
121     else
122       write32(Buf + 24, 0x818c0000 | 4);          // lwz r12,4(r12)
123     write32(Buf + 28, 0x7d605a14);                // add     r11,r0,r11
124     write32(Buf + 32, 0x4e800420);                // bctr
125     Buf += 36;
126   }
127 
128   // Pad with nop. They should not be executed.
129   for (; Buf < End; Buf += 4)
130     write32(Buf, 0x60000000);
131 }
132 
133 PPC::PPC() {
134   GotRel = R_PPC_GLOB_DAT;
135   NoneRel = R_PPC_NONE;
136   PltRel = R_PPC_JMP_SLOT;
137   RelativeRel = R_PPC_RELATIVE;
138   IRelativeRel = R_PPC_IRELATIVE;
139   SymbolicRel = R_PPC_ADDR32;
140   GotBaseSymInGotPlt = false;
141   GotHeaderEntriesNum = 3;
142   GotPltHeaderEntriesNum = 0;
143   PltHeaderSize = 64; // size of PLTresolve in .glink
144   PltEntrySize = 4;
145 
146   NeedsThunks = true;
147 
148   TlsModuleIndexRel = R_PPC_DTPMOD32;
149   TlsOffsetRel = R_PPC_DTPREL32;
150   TlsGotRel = R_PPC_TPREL32;
151 
152   DefaultMaxPageSize = 65536;
153   DefaultImageBase = 0x10000000;
154 
155   write32(TrapInstr.data(), 0x7fe00008);
156 }
157 
158 void PPC::writeGotHeader(uint8_t *Buf) const {
159   // _GLOBAL_OFFSET_TABLE_[0] = _DYNAMIC
160   // glibc stores _dl_runtime_resolve in _GLOBAL_OFFSET_TABLE_[1],
161   // link_map in _GLOBAL_OFFSET_TABLE_[2].
162   write32(Buf, Main->Dynamic->getVA());
163 }
164 
165 void PPC::writeGotPlt(uint8_t *Buf, const Symbol &S) const {
166   // Address of the symbol resolver stub in .glink .
167   write32(Buf, In.Plt->getVA() + 4 * S.PltIndex);
168 }
169 
170 bool PPC::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
171                      uint64_t BranchAddr, const Symbol &S) const {
172   if (Type != R_PPC_REL24 && Type != R_PPC_PLTREL24)
173     return false;
174   if (S.isInPlt())
175     return true;
176   if (S.isUndefWeak())
177     return false;
178   return !(Expr == R_PC && PPC::inBranchRange(Type, BranchAddr, S.getVA()));
179 }
180 
181 uint32_t PPC::getThunkSectionSpacing() const { return 0x2000000; }
182 
183 bool PPC::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const {
184   uint64_t Offset = Dst - Src;
185   if (Type == R_PPC_REL24 || Type == R_PPC_PLTREL24)
186     return isInt<26>(Offset);
187   llvm_unreachable("unsupported relocation type used in branch");
188 }
189 
190 RelExpr PPC::getRelExpr(RelType Type, const Symbol &S,
191                         const uint8_t *Loc) const {
192   switch (Type) {
193   case R_PPC_DTPREL16:
194   case R_PPC_DTPREL16_HA:
195   case R_PPC_DTPREL16_HI:
196   case R_PPC_DTPREL16_LO:
197   case R_PPC_DTPREL32:
198     return R_DTPREL;
199   case R_PPC_REL14:
200   case R_PPC_REL32:
201   case R_PPC_LOCAL24PC:
202   case R_PPC_REL16_LO:
203   case R_PPC_REL16_HI:
204   case R_PPC_REL16_HA:
205     return R_PC;
206   case R_PPC_GOT16:
207     return R_GOT_OFF;
208   case R_PPC_REL24:
209     return R_PLT_PC;
210   case R_PPC_PLTREL24:
211     return R_PPC32_PLTREL;
212   case R_PPC_GOT_TLSGD16:
213     return R_TLSGD_GOT;
214   case R_PPC_GOT_TLSLD16:
215     return R_TLSLD_GOT;
216   case R_PPC_GOT_TPREL16:
217     return R_GOT_OFF;
218   case R_PPC_TLS:
219     return R_TLSIE_HINT;
220   case R_PPC_TLSGD:
221     return R_TLSDESC_CALL;
222   case R_PPC_TLSLD:
223     return R_TLSLD_HINT;
224   case R_PPC_TPREL16:
225   case R_PPC_TPREL16_HA:
226   case R_PPC_TPREL16_LO:
227   case R_PPC_TPREL16_HI:
228     return R_TLS;
229   default:
230     return R_ABS;
231   }
232 }
233 
234 RelType PPC::getDynRel(RelType Type) const {
235   if (Type == R_PPC_ADDR32)
236     return Type;
237   return R_PPC_NONE;
238 }
239 
240 static std::pair<RelType, uint64_t> fromDTPREL(RelType Type, uint64_t Val) {
241   uint64_t DTPBiasedVal = Val - 0x8000;
242   switch (Type) {
243   case R_PPC_DTPREL16:
244     return {R_PPC64_ADDR16, DTPBiasedVal};
245   case R_PPC_DTPREL16_HA:
246     return {R_PPC_ADDR16_HA, DTPBiasedVal};
247   case R_PPC_DTPREL16_HI:
248     return {R_PPC_ADDR16_HI, DTPBiasedVal};
249   case R_PPC_DTPREL16_LO:
250     return {R_PPC_ADDR16_LO, DTPBiasedVal};
251   case R_PPC_DTPREL32:
252     return {R_PPC_ADDR32, DTPBiasedVal};
253   default:
254     return {Type, Val};
255   }
256 }
257 
258 void PPC::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
259   RelType NewType;
260   std::tie(NewType, Val) = fromDTPREL(Type, Val);
261   switch (NewType) {
262   case R_PPC_ADDR16:
263     checkIntUInt(Loc, Val, 16, Type);
264     write16(Loc, Val);
265     break;
266   case R_PPC_GOT16:
267   case R_PPC_GOT_TLSGD16:
268   case R_PPC_GOT_TLSLD16:
269   case R_PPC_GOT_TPREL16:
270   case R_PPC_TPREL16:
271     checkInt(Loc, Val, 16, Type);
272     write16(Loc, Val);
273     break;
274   case R_PPC_ADDR16_HA:
275   case R_PPC_DTPREL16_HA:
276   case R_PPC_GOT_TLSGD16_HA:
277   case R_PPC_GOT_TLSLD16_HA:
278   case R_PPC_GOT_TPREL16_HA:
279   case R_PPC_REL16_HA:
280   case R_PPC_TPREL16_HA:
281     write16(Loc, ha(Val));
282     break;
283   case R_PPC_ADDR16_HI:
284   case R_PPC_DTPREL16_HI:
285   case R_PPC_GOT_TLSGD16_HI:
286   case R_PPC_GOT_TLSLD16_HI:
287   case R_PPC_GOT_TPREL16_HI:
288   case R_PPC_REL16_HI:
289   case R_PPC_TPREL16_HI:
290     write16(Loc, Val >> 16);
291     break;
292   case R_PPC_ADDR16_LO:
293   case R_PPC_DTPREL16_LO:
294   case R_PPC_GOT_TLSGD16_LO:
295   case R_PPC_GOT_TLSLD16_LO:
296   case R_PPC_GOT_TPREL16_LO:
297   case R_PPC_REL16_LO:
298   case R_PPC_TPREL16_LO:
299     write16(Loc, Val);
300     break;
301   case R_PPC_ADDR32:
302   case R_PPC_REL32:
303     write32(Loc, Val);
304     break;
305   case R_PPC_REL14: {
306     uint32_t Mask = 0x0000FFFC;
307     checkInt(Loc, Val, 16, Type);
308     checkAlignment(Loc, Val, 4, Type);
309     write32(Loc, (read32(Loc) & ~Mask) | (Val & Mask));
310     break;
311   }
312   case R_PPC_REL24:
313   case R_PPC_LOCAL24PC:
314   case R_PPC_PLTREL24: {
315     uint32_t Mask = 0x03FFFFFC;
316     checkInt(Loc, Val, 26, Type);
317     checkAlignment(Loc, Val, 4, Type);
318     write32(Loc, (read32(Loc) & ~Mask) | (Val & Mask));
319     break;
320   }
321   default:
322     error(getErrorLocation(Loc) + "unrecognized relocation " + toString(Type));
323   }
324 }
325 
326 RelExpr PPC::adjustRelaxExpr(RelType Type, const uint8_t *Data,
327                              RelExpr Expr) const {
328   if (Expr == R_RELAX_TLS_GD_TO_IE)
329     return R_RELAX_TLS_GD_TO_IE_GOT_OFF;
330   if (Expr == R_RELAX_TLS_LD_TO_LE)
331     return R_RELAX_TLS_LD_TO_LE_ABS;
332   return Expr;
333 }
334 
335 int PPC::getTlsGdRelaxSkip(RelType Type) const {
336   // A __tls_get_addr call instruction is marked with 2 relocations:
337   //
338   //   R_PPC_TLSGD / R_PPC_TLSLD: marker relocation
339   //   R_PPC_REL24: __tls_get_addr
340   //
341   // After the relaxation we no longer call __tls_get_addr and should skip both
342   // relocations to not create a false dependence on __tls_get_addr being
343   // defined.
344   if (Type == R_PPC_TLSGD || Type == R_PPC_TLSLD)
345     return 2;
346   return 1;
347 }
348 
349 void PPC::relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const {
350   switch (Type) {
351   case R_PPC_GOT_TLSGD16: {
352     // addi rT, rA, x@got@tlsgd --> lwz rT, x@got@tprel(rA)
353     uint32_t Insn = readFromHalf16(Loc);
354     writeFromHalf16(Loc, 0x80000000 | (Insn & 0x03ff0000));
355     relocateOne(Loc, R_PPC_GOT_TPREL16, Val);
356     break;
357   }
358   case R_PPC_TLSGD:
359     // bl __tls_get_addr(x@tldgd) --> add r3, r3, r2
360     write32(Loc, 0x7c631214);
361     break;
362   default:
363     llvm_unreachable("unsupported relocation for TLS GD to IE relaxation");
364   }
365 }
366 
367 void PPC::relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
368   switch (Type) {
369   case R_PPC_GOT_TLSGD16:
370     // addi r3, r31, x@got@tlsgd --> addis r3, r2, x@tprel@ha
371     writeFromHalf16(Loc, 0x3c620000 | ha(Val));
372     break;
373   case R_PPC_TLSGD:
374     // bl __tls_get_addr(x@tldgd) --> add r3, r3, x@tprel@l
375     write32(Loc, 0x38630000 | lo(Val));
376     break;
377   default:
378     llvm_unreachable("unsupported relocation for TLS GD to LE relaxation");
379   }
380 }
381 
382 void PPC::relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
383   switch (Type) {
384   case R_PPC_GOT_TLSLD16:
385     // addi r3, rA, x@got@tlsgd --> addis r3, r2, 0
386     writeFromHalf16(Loc, 0x3c620000);
387     break;
388   case R_PPC_TLSLD:
389     // r3+x@dtprel computes r3+x-0x8000, while we want it to compute r3+x@tprel
390     // = r3+x-0x7000, so add 4096 to r3.
391     // bl __tls_get_addr(x@tlsld) --> addi r3, r3, 4096
392     write32(Loc, 0x38631000);
393     break;
394   case R_PPC_DTPREL16:
395   case R_PPC_DTPREL16_HA:
396   case R_PPC_DTPREL16_HI:
397   case R_PPC_DTPREL16_LO:
398     relocateOne(Loc, Type, Val);
399     break;
400   default:
401     llvm_unreachable("unsupported relocation for TLS LD to LE relaxation");
402   }
403 }
404 
405 void PPC::relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
406   switch (Type) {
407   case R_PPC_GOT_TPREL16: {
408     // lwz rT, x@got@tprel(rA) --> addis rT, r2, x@tprel@ha
409     uint32_t RT = readFromHalf16(Loc) & 0x03e00000;
410     writeFromHalf16(Loc, 0x3c020000 | RT | ha(Val));
411     break;
412   }
413   case R_PPC_TLS: {
414     uint32_t Insn = read32(Loc);
415     if (Insn >> 26 != 31)
416       error("unrecognized instruction for IE to LE R_PPC_TLS");
417     // addi rT, rT, x@tls --> addi rT, rT, x@tprel@l
418     uint32_t DFormOp = getPPCDFormOp((read32(Loc) & 0x000007fe) >> 1);
419     if (DFormOp == 0)
420       error("unrecognized instruction for IE to LE R_PPC_TLS");
421     write32(Loc, (DFormOp << 26) | (Insn & 0x03ff0000) | lo(Val));
422     break;
423   }
424   default:
425     llvm_unreachable("unsupported relocation for TLS IE to LE relaxation");
426   }
427 }
428 
429 TargetInfo *elf::getPPCTargetInfo() {
430   static PPC Target;
431   return &Target;
432 }
433