1 //===-- Hexagon.cpp -------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "InputFiles.h"
10 #include "Symbols.h"
11 #include "SyntheticSections.h"
12 #include "Target.h"
13 #include "lld/Common/ErrorHandler.h"
14 #include "llvm/BinaryFormat/ELF.h"
15 #include "llvm/Object/ELF.h"
16 #include "llvm/Support/Endian.h"
17 
18 using namespace llvm;
19 using namespace llvm::object;
20 using namespace llvm::support::endian;
21 using namespace llvm::ELF;
22 
23 namespace lld {
24 namespace elf {
25 
26 namespace {
27 class Hexagon final : public TargetInfo {
28 public:
29   Hexagon();
30   uint32_t calcEFlags() const override;
31   RelExpr getRelExpr(RelType type, const Symbol &s,
32                      const uint8_t *loc) const override;
33   RelType getDynRel(RelType type) const override;
34   void relocate(uint8_t *loc, const Relocation &rel,
35                 uint64_t val) const override;
36   void writePltHeader(uint8_t *buf) const override;
37   void writePlt(uint8_t *buf, const Symbol &sym,
38                 uint64_t pltEntryAddr) const override;
39 };
40 } // namespace
41 
42 Hexagon::Hexagon() {
43   pltRel = R_HEX_JMP_SLOT;
44   relativeRel = R_HEX_RELATIVE;
45   gotRel = R_HEX_GLOB_DAT;
46   symbolicRel = R_HEX_32;
47 
48   // The zero'th GOT entry is reserved for the address of _DYNAMIC.  The
49   // next 3 are reserved for the dynamic loader.
50   gotPltHeaderEntriesNum = 4;
51 
52   pltEntrySize = 16;
53   pltHeaderSize = 32;
54 
55   // Hexagon Linux uses 64K pages by default.
56   defaultMaxPageSize = 0x10000;
57   noneRel = R_HEX_NONE;
58   tlsGotRel = R_HEX_TPREL_32;
59   tlsModuleIndexRel = R_HEX_DTPMOD_32;
60   tlsOffsetRel = R_HEX_DTPREL_32;
61 }
62 
63 uint32_t Hexagon::calcEFlags() const {
64   assert(!objectFiles.empty());
65 
66   // The architecture revision must always be equal to or greater than
67   // greatest revision in the list of inputs.
68   uint32_t ret = 0;
69   for (InputFile *f : objectFiles) {
70     uint32_t eflags = cast<ObjFile<ELF32LE>>(f)->getObj().getHeader()->e_flags;
71     if (eflags > ret)
72       ret = eflags;
73   }
74   return ret;
75 }
76 
77 static uint32_t applyMask(uint32_t mask, uint32_t data) {
78   uint32_t result = 0;
79   size_t off = 0;
80 
81   for (size_t bit = 0; bit != 32; ++bit) {
82     uint32_t valBit = (data >> off) & 1;
83     uint32_t maskBit = (mask >> bit) & 1;
84     if (maskBit) {
85       result |= (valBit << bit);
86       ++off;
87     }
88   }
89   return result;
90 }
91 
92 RelExpr Hexagon::getRelExpr(RelType type, const Symbol &s,
93                             const uint8_t *loc) const {
94   switch (type) {
95   case R_HEX_NONE:
96     return R_NONE;
97   case R_HEX_6_X:
98   case R_HEX_8_X:
99   case R_HEX_9_X:
100   case R_HEX_10_X:
101   case R_HEX_11_X:
102   case R_HEX_12_X:
103   case R_HEX_16_X:
104   case R_HEX_32:
105   case R_HEX_32_6_X:
106   case R_HEX_HI16:
107   case R_HEX_LO16:
108   case R_HEX_DTPREL_32:
109     return R_ABS;
110   case R_HEX_B9_PCREL:
111   case R_HEX_B13_PCREL:
112   case R_HEX_B15_PCREL:
113   case R_HEX_6_PCREL_X:
114   case R_HEX_32_PCREL:
115     return R_PC;
116   case R_HEX_B9_PCREL_X:
117   case R_HEX_B15_PCREL_X:
118   case R_HEX_B22_PCREL:
119   case R_HEX_PLT_B22_PCREL:
120   case R_HEX_B22_PCREL_X:
121   case R_HEX_B32_PCREL_X:
122   case R_HEX_GD_PLT_B22_PCREL:
123     return R_PLT_PC;
124   case R_HEX_IE_32_6_X:
125   case R_HEX_IE_16_X:
126   case R_HEX_IE_HI16:
127   case R_HEX_IE_LO16:
128     return R_GOT;
129   case R_HEX_GD_GOT_11_X:
130   case R_HEX_GD_GOT_16_X:
131   case R_HEX_GD_GOT_32_6_X:
132     return R_TLSGD_GOTPLT;
133   case R_HEX_GOTREL_11_X:
134   case R_HEX_GOTREL_16_X:
135   case R_HEX_GOTREL_32_6_X:
136   case R_HEX_GOTREL_HI16:
137   case R_HEX_GOTREL_LO16:
138     return R_GOTPLTREL;
139   case R_HEX_GOT_11_X:
140   case R_HEX_GOT_16_X:
141   case R_HEX_GOT_32_6_X:
142     return R_GOTPLT;
143   case R_HEX_IE_GOT_11_X:
144   case R_HEX_IE_GOT_16_X:
145   case R_HEX_IE_GOT_32_6_X:
146   case R_HEX_IE_GOT_HI16:
147   case R_HEX_IE_GOT_LO16:
148     config->hasStaticTlsModel = true;
149     return R_GOTPLT;
150   case R_HEX_TPREL_11_X:
151   case R_HEX_TPREL_16:
152   case R_HEX_TPREL_16_X:
153   case R_HEX_TPREL_32_6_X:
154   case R_HEX_TPREL_HI16:
155   case R_HEX_TPREL_LO16:
156     return R_TLS;
157   default:
158     error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
159           ") against symbol " + toString(s));
160     return R_NONE;
161   }
162 }
163 
164 static bool isDuplex(uint32_t insn) {
165   // Duplex forms have a fixed mask and parse bits 15:14 are always
166   // zero.  Non-duplex insns will always have at least one bit set in the
167   // parse field.
168   return (0xC000 & insn) == 0;
169 }
170 
171 static uint32_t findMaskR6(uint32_t insn) {
172   // There are (arguably too) many relocation masks for the DSP's
173   // R_HEX_6_X type.  The table below is used to select the correct mask
174   // for the given instruction.
175   struct InstructionMask {
176     uint32_t cmpMask;
177     uint32_t relocMask;
178   };
179 
180   static const InstructionMask r6[] = {
181       {0x38000000, 0x0000201f}, {0x39000000, 0x0000201f},
182       {0x3e000000, 0x00001f80}, {0x3f000000, 0x00001f80},
183       {0x40000000, 0x000020f8}, {0x41000000, 0x000007e0},
184       {0x42000000, 0x000020f8}, {0x43000000, 0x000007e0},
185       {0x44000000, 0x000020f8}, {0x45000000, 0x000007e0},
186       {0x46000000, 0x000020f8}, {0x47000000, 0x000007e0},
187       {0x6a000000, 0x00001f80}, {0x7c000000, 0x001f2000},
188       {0x9a000000, 0x00000f60}, {0x9b000000, 0x00000f60},
189       {0x9c000000, 0x00000f60}, {0x9d000000, 0x00000f60},
190       {0x9f000000, 0x001f0100}, {0xab000000, 0x0000003f},
191       {0xad000000, 0x0000003f}, {0xaf000000, 0x00030078},
192       {0xd7000000, 0x006020e0}, {0xd8000000, 0x006020e0},
193       {0xdb000000, 0x006020e0}, {0xdf000000, 0x006020e0}};
194 
195   if (isDuplex(insn))
196     return 0x03f00000;
197 
198   for (InstructionMask i : r6)
199     if ((0xff000000 & insn) == i.cmpMask)
200       return i.relocMask;
201 
202   error("unrecognized instruction for R_HEX_6 relocation: 0x" +
203         utohexstr(insn));
204   return 0;
205 }
206 
207 static uint32_t findMaskR8(uint32_t insn) {
208   if ((0xff000000 & insn) == 0xde000000)
209     return 0x00e020e8;
210   if ((0xff000000 & insn) == 0x3c000000)
211     return 0x0000207f;
212   return 0x00001fe0;
213 }
214 
215 static uint32_t findMaskR11(uint32_t insn) {
216   if ((0xff000000 & insn) == 0xa1000000)
217     return 0x060020ff;
218   return 0x06003fe0;
219 }
220 
221 static uint32_t findMaskR16(uint32_t insn) {
222   if ((0xff000000 & insn) == 0x48000000)
223     return 0x061f20ff;
224   if ((0xff000000 & insn) == 0x49000000)
225     return 0x061f3fe0;
226   if ((0xff000000 & insn) == 0x78000000)
227     return 0x00df3fe0;
228   if ((0xff000000 & insn) == 0xb0000000)
229     return 0x0fe03fe0;
230 
231   if (isDuplex(insn))
232     return 0x03f00000;
233 
234   error("unrecognized instruction for R_HEX_16_X relocation: 0x" +
235         utohexstr(insn));
236   return 0;
237 }
238 
239 static void or32le(uint8_t *p, int32_t v) { write32le(p, read32le(p) | v); }
240 
241 void Hexagon::relocate(uint8_t *loc, const Relocation &rel,
242                        uint64_t val) const {
243   switch (rel.type) {
244   case R_HEX_NONE:
245     break;
246   case R_HEX_6_PCREL_X:
247   case R_HEX_6_X:
248     or32le(loc, applyMask(findMaskR6(read32le(loc)), val));
249     break;
250   case R_HEX_8_X:
251     or32le(loc, applyMask(findMaskR8(read32le(loc)), val));
252     break;
253   case R_HEX_9_X:
254     or32le(loc, applyMask(0x00003fe0, val & 0x3f));
255     break;
256   case R_HEX_10_X:
257     or32le(loc, applyMask(0x00203fe0, val & 0x3f));
258     break;
259   case R_HEX_11_X:
260   case R_HEX_GD_GOT_11_X:
261   case R_HEX_IE_GOT_11_X:
262   case R_HEX_GOT_11_X:
263   case R_HEX_GOTREL_11_X:
264   case R_HEX_TPREL_11_X:
265     or32le(loc, applyMask(findMaskR11(read32le(loc)), val & 0x3f));
266     break;
267   case R_HEX_12_X:
268     or32le(loc, applyMask(0x000007e0, val));
269     break;
270   case R_HEX_16_X: // These relocs only have 6 effective bits.
271   case R_HEX_IE_16_X:
272   case R_HEX_IE_GOT_16_X:
273   case R_HEX_GD_GOT_16_X:
274   case R_HEX_GOT_16_X:
275   case R_HEX_GOTREL_16_X:
276   case R_HEX_TPREL_16_X:
277     or32le(loc, applyMask(findMaskR16(read32le(loc)), val & 0x3f));
278     break;
279   case R_HEX_TPREL_16:
280     or32le(loc, applyMask(findMaskR16(read32le(loc)), val & 0xffff));
281     break;
282   case R_HEX_32:
283   case R_HEX_32_PCREL:
284   case R_HEX_DTPREL_32:
285     or32le(loc, val);
286     break;
287   case R_HEX_32_6_X:
288   case R_HEX_GD_GOT_32_6_X:
289   case R_HEX_GOT_32_6_X:
290   case R_HEX_GOTREL_32_6_X:
291   case R_HEX_IE_GOT_32_6_X:
292   case R_HEX_IE_32_6_X:
293   case R_HEX_TPREL_32_6_X:
294     or32le(loc, applyMask(0x0fff3fff, val >> 6));
295     break;
296   case R_HEX_B9_PCREL:
297     checkInt(loc, val, 11, rel);
298     or32le(loc, applyMask(0x003000fe, val >> 2));
299     break;
300   case R_HEX_B9_PCREL_X:
301     or32le(loc, applyMask(0x003000fe, val & 0x3f));
302     break;
303   case R_HEX_B13_PCREL:
304     checkInt(loc, val, 15, rel);
305     or32le(loc, applyMask(0x00202ffe, val >> 2));
306     break;
307   case R_HEX_B15_PCREL:
308     checkInt(loc, val, 17, rel);
309     or32le(loc, applyMask(0x00df20fe, val >> 2));
310     break;
311   case R_HEX_B15_PCREL_X:
312     or32le(loc, applyMask(0x00df20fe, val & 0x3f));
313     break;
314   case R_HEX_GD_PLT_B22_PCREL:
315   case R_HEX_B22_PCREL:
316   case R_HEX_PLT_B22_PCREL:
317     checkInt(loc, val, 22, rel);
318     or32le(loc, applyMask(0x1ff3ffe, val >> 2));
319     break;
320   case R_HEX_B22_PCREL_X:
321     or32le(loc, applyMask(0x1ff3ffe, val & 0x3f));
322     break;
323   case R_HEX_B32_PCREL_X:
324     or32le(loc, applyMask(0x0fff3fff, val >> 6));
325     break;
326   case R_HEX_GOTREL_HI16:
327   case R_HEX_HI16:
328   case R_HEX_IE_GOT_HI16:
329   case R_HEX_IE_HI16:
330   case R_HEX_TPREL_HI16:
331     or32le(loc, applyMask(0x00c03fff, val >> 16));
332     break;
333   case R_HEX_GOTREL_LO16:
334   case R_HEX_LO16:
335   case R_HEX_IE_GOT_LO16:
336   case R_HEX_IE_LO16:
337   case R_HEX_TPREL_LO16:
338     or32le(loc, applyMask(0x00c03fff, val));
339     break;
340   default:
341     llvm_unreachable("unknown relocation");
342   }
343 }
344 
345 void Hexagon::writePltHeader(uint8_t *buf) const {
346   const uint8_t pltData[] = {
347       0x00, 0x40, 0x00, 0x00, // { immext (#0)
348       0x1c, 0xc0, 0x49, 0x6a, //   r28 = add (pc, ##GOT0@PCREL) } # @GOT0
349       0x0e, 0x42, 0x9c, 0xe2, // { r14 -= add (r28, #16)  # offset of GOTn
350       0x4f, 0x40, 0x9c, 0x91, //   r15 = memw (r28 + #8)  # object ID at GOT2
351       0x3c, 0xc0, 0x9c, 0x91, //   r28 = memw (r28 + #4) }# dynamic link at GOT1
352       0x0e, 0x42, 0x0e, 0x8c, // { r14 = asr (r14, #2)    # index of PLTn
353       0x00, 0xc0, 0x9c, 0x52, //   jumpr r28 }            # call dynamic linker
354       0x0c, 0xdb, 0x00, 0x54, // trap0(#0xdb) # bring plt0 into 16byte alignment
355   };
356   memcpy(buf, pltData, sizeof(pltData));
357 
358   // Offset from PLT0 to the GOT.
359   uint64_t off = in.gotPlt->getVA() - in.plt->getVA();
360   relocateNoSym(buf, R_HEX_B32_PCREL_X, off);
361   relocateNoSym(buf + 4, R_HEX_6_PCREL_X, off);
362 }
363 
364 void Hexagon::writePlt(uint8_t *buf, const Symbol &sym,
365                        uint64_t pltEntryAddr) const {
366   const uint8_t inst[] = {
367       0x00, 0x40, 0x00, 0x00, // { immext (#0)
368       0x0e, 0xc0, 0x49, 0x6a, //   r14 = add (pc, ##GOTn@PCREL) }
369       0x1c, 0xc0, 0x8e, 0x91, // r28 = memw (r14)
370       0x00, 0xc0, 0x9c, 0x52, // jumpr r28
371   };
372   memcpy(buf, inst, sizeof(inst));
373 
374   uint64_t gotPltEntryAddr = sym.getGotPltVA();
375   relocateNoSym(buf, R_HEX_B32_PCREL_X, gotPltEntryAddr - pltEntryAddr);
376   relocateNoSym(buf + 4, R_HEX_6_PCREL_X, gotPltEntryAddr - pltEntryAddr);
377 }
378 
379 RelType Hexagon::getDynRel(RelType type) const {
380   if (type == R_HEX_32)
381     return type;
382   return R_HEX_NONE;
383 }
384 
385 TargetInfo *getHexagonTargetInfo() {
386   static Hexagon target;
387   return &target;
388 }
389 
390 } // namespace elf
391 } // namespace lld
392