1 //===-- Hexagon.cpp -------------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "InputFiles.h" 10 #include "Symbols.h" 11 #include "SyntheticSections.h" 12 #include "Target.h" 13 #include "lld/Common/ErrorHandler.h" 14 #include "llvm/BinaryFormat/ELF.h" 15 #include "llvm/Object/ELF.h" 16 #include "llvm/Support/Endian.h" 17 18 using namespace llvm; 19 using namespace llvm::object; 20 using namespace llvm::support::endian; 21 using namespace llvm::ELF; 22 23 namespace lld { 24 namespace elf { 25 26 namespace { 27 class Hexagon final : public TargetInfo { 28 public: 29 Hexagon(); 30 uint32_t calcEFlags() const override; 31 RelExpr getRelExpr(RelType type, const Symbol &s, 32 const uint8_t *loc) const override; 33 RelType getDynRel(RelType type) const override; 34 void relocate(uint8_t *loc, const Relocation &rel, 35 uint64_t val) const override; 36 void writePltHeader(uint8_t *buf) const override; 37 void writePlt(uint8_t *buf, const Symbol &sym, 38 uint64_t pltEntryAddr) const override; 39 }; 40 } // namespace 41 42 Hexagon::Hexagon() { 43 pltRel = R_HEX_JMP_SLOT; 44 relativeRel = R_HEX_RELATIVE; 45 gotRel = R_HEX_GLOB_DAT; 46 symbolicRel = R_HEX_32; 47 48 // The zero'th GOT entry is reserved for the address of _DYNAMIC. The 49 // next 3 are reserved for the dynamic loader. 50 gotPltHeaderEntriesNum = 4; 51 52 pltEntrySize = 16; 53 pltHeaderSize = 32; 54 55 // Hexagon Linux uses 64K pages by default. 56 defaultMaxPageSize = 0x10000; 57 noneRel = R_HEX_NONE; 58 tlsGotRel = R_HEX_TPREL_32; 59 tlsModuleIndexRel = R_HEX_DTPMOD_32; 60 tlsOffsetRel = R_HEX_DTPREL_32; 61 } 62 63 uint32_t Hexagon::calcEFlags() const { 64 assert(!objectFiles.empty()); 65 66 // The architecture revision must always be equal to or greater than 67 // greatest revision in the list of inputs. 68 uint32_t ret = 0; 69 for (InputFile *f : objectFiles) { 70 uint32_t eflags = cast<ObjFile<ELF32LE>>(f)->getObj().getHeader()->e_flags; 71 if (eflags > ret) 72 ret = eflags; 73 } 74 return ret; 75 } 76 77 static uint32_t applyMask(uint32_t mask, uint32_t data) { 78 uint32_t result = 0; 79 size_t off = 0; 80 81 for (size_t bit = 0; bit != 32; ++bit) { 82 uint32_t valBit = (data >> off) & 1; 83 uint32_t maskBit = (mask >> bit) & 1; 84 if (maskBit) { 85 result |= (valBit << bit); 86 ++off; 87 } 88 } 89 return result; 90 } 91 92 RelExpr Hexagon::getRelExpr(RelType type, const Symbol &s, 93 const uint8_t *loc) const { 94 switch (type) { 95 case R_HEX_NONE: 96 return R_NONE; 97 case R_HEX_6_X: 98 case R_HEX_8_X: 99 case R_HEX_9_X: 100 case R_HEX_10_X: 101 case R_HEX_11_X: 102 case R_HEX_12_X: 103 case R_HEX_16_X: 104 case R_HEX_32: 105 case R_HEX_32_6_X: 106 case R_HEX_HI16: 107 case R_HEX_LO16: 108 case R_HEX_DTPREL_32: 109 return R_ABS; 110 case R_HEX_B9_PCREL: 111 case R_HEX_B13_PCREL: 112 case R_HEX_B15_PCREL: 113 case R_HEX_6_PCREL_X: 114 case R_HEX_32_PCREL: 115 return R_PC; 116 case R_HEX_B9_PCREL_X: 117 case R_HEX_B15_PCREL_X: 118 case R_HEX_B22_PCREL: 119 case R_HEX_PLT_B22_PCREL: 120 case R_HEX_B22_PCREL_X: 121 case R_HEX_B32_PCREL_X: 122 return R_PLT_PC; 123 case R_HEX_IE_32_6_X: 124 case R_HEX_IE_16_X: 125 case R_HEX_IE_HI16: 126 case R_HEX_IE_LO16: 127 return R_GOT; 128 case R_HEX_GD_GOT_11_X: 129 case R_HEX_GD_GOT_16_X: 130 case R_HEX_GD_GOT_32_6_X: 131 return R_TLSGD_GOTPLT; 132 case R_HEX_GOTREL_11_X: 133 case R_HEX_GOTREL_16_X: 134 case R_HEX_GOTREL_32_6_X: 135 case R_HEX_GOTREL_HI16: 136 case R_HEX_GOTREL_LO16: 137 return R_GOTPLTREL; 138 case R_HEX_GOT_11_X: 139 case R_HEX_GOT_16_X: 140 case R_HEX_GOT_32_6_X: 141 return R_GOTPLT; 142 case R_HEX_IE_GOT_11_X: 143 case R_HEX_IE_GOT_16_X: 144 case R_HEX_IE_GOT_32_6_X: 145 case R_HEX_IE_GOT_HI16: 146 case R_HEX_IE_GOT_LO16: 147 config->hasStaticTlsModel = true; 148 return R_GOTPLT; 149 case R_HEX_TPREL_11_X: 150 case R_HEX_TPREL_16: 151 case R_HEX_TPREL_16_X: 152 case R_HEX_TPREL_32_6_X: 153 case R_HEX_TPREL_HI16: 154 case R_HEX_TPREL_LO16: 155 return R_TLS; 156 default: 157 error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) + 158 ") against symbol " + toString(s)); 159 return R_NONE; 160 } 161 } 162 163 static uint32_t findMaskR6(uint32_t insn) { 164 // There are (arguably too) many relocation masks for the DSP's 165 // R_HEX_6_X type. The table below is used to select the correct mask 166 // for the given instruction. 167 struct InstructionMask { 168 uint32_t cmpMask; 169 uint32_t relocMask; 170 }; 171 172 static const InstructionMask r6[] = { 173 {0x38000000, 0x0000201f}, {0x39000000, 0x0000201f}, 174 {0x3e000000, 0x00001f80}, {0x3f000000, 0x00001f80}, 175 {0x40000000, 0x000020f8}, {0x41000000, 0x000007e0}, 176 {0x42000000, 0x000020f8}, {0x43000000, 0x000007e0}, 177 {0x44000000, 0x000020f8}, {0x45000000, 0x000007e0}, 178 {0x46000000, 0x000020f8}, {0x47000000, 0x000007e0}, 179 {0x6a000000, 0x00001f80}, {0x7c000000, 0x001f2000}, 180 {0x9a000000, 0x00000f60}, {0x9b000000, 0x00000f60}, 181 {0x9c000000, 0x00000f60}, {0x9d000000, 0x00000f60}, 182 {0x9f000000, 0x001f0100}, {0xab000000, 0x0000003f}, 183 {0xad000000, 0x0000003f}, {0xaf000000, 0x00030078}, 184 {0xd7000000, 0x006020e0}, {0xd8000000, 0x006020e0}, 185 {0xdb000000, 0x006020e0}, {0xdf000000, 0x006020e0}}; 186 187 // Duplex forms have a fixed mask and parse bits 15:14 are always 188 // zero. Non-duplex insns will always have at least one bit set in the 189 // parse field. 190 if ((0xC000 & insn) == 0x0) 191 return 0x03f00000; 192 193 for (InstructionMask i : r6) 194 if ((0xff000000 & insn) == i.cmpMask) 195 return i.relocMask; 196 197 error("unrecognized instruction for R_HEX_6 relocation: 0x" + 198 utohexstr(insn)); 199 return 0; 200 } 201 202 static uint32_t findMaskR8(uint32_t insn) { 203 if ((0xff000000 & insn) == 0xde000000) 204 return 0x00e020e8; 205 if ((0xff000000 & insn) == 0x3c000000) 206 return 0x0000207f; 207 return 0x00001fe0; 208 } 209 210 static uint32_t findMaskR11(uint32_t insn) { 211 if ((0xff000000 & insn) == 0xa1000000) 212 return 0x060020ff; 213 return 0x06003fe0; 214 } 215 216 static uint32_t findMaskR16(uint32_t insn) { 217 if ((0xff000000 & insn) == 0x48000000) 218 return 0x061f20ff; 219 if ((0xff000000 & insn) == 0x49000000) 220 return 0x061f3fe0; 221 if ((0xff000000 & insn) == 0x78000000) 222 return 0x00df3fe0; 223 if ((0xff000000 & insn) == 0xb0000000) 224 return 0x0fe03fe0; 225 226 error("unrecognized instruction for R_HEX_16_X relocation: 0x" + 227 utohexstr(insn)); 228 return 0; 229 } 230 231 static void or32le(uint8_t *p, int32_t v) { write32le(p, read32le(p) | v); } 232 233 void Hexagon::relocate(uint8_t *loc, const Relocation &rel, 234 uint64_t val) const { 235 switch (rel.type) { 236 case R_HEX_NONE: 237 break; 238 case R_HEX_6_PCREL_X: 239 case R_HEX_6_X: 240 or32le(loc, applyMask(findMaskR6(read32le(loc)), val)); 241 break; 242 case R_HEX_8_X: 243 or32le(loc, applyMask(findMaskR8(read32le(loc)), val)); 244 break; 245 case R_HEX_9_X: 246 or32le(loc, applyMask(0x00003fe0, val & 0x3f)); 247 break; 248 case R_HEX_10_X: 249 or32le(loc, applyMask(0x00203fe0, val & 0x3f)); 250 break; 251 case R_HEX_11_X: 252 case R_HEX_GD_GOT_11_X: 253 case R_HEX_IE_GOT_11_X: 254 case R_HEX_GOT_11_X: 255 case R_HEX_GOTREL_11_X: 256 case R_HEX_TPREL_11_X: 257 or32le(loc, applyMask(findMaskR11(read32le(loc)), val & 0x3f)); 258 break; 259 case R_HEX_12_X: 260 or32le(loc, applyMask(0x000007e0, val)); 261 break; 262 case R_HEX_16_X: // These relocs only have 6 effective bits. 263 case R_HEX_IE_16_X: 264 case R_HEX_IE_GOT_16_X: 265 case R_HEX_GD_GOT_16_X: 266 case R_HEX_GOT_16_X: 267 case R_HEX_GOTREL_16_X: 268 case R_HEX_TPREL_16_X: 269 or32le(loc, applyMask(findMaskR16(read32le(loc)), val & 0x3f)); 270 break; 271 case R_HEX_TPREL_16: 272 or32le(loc, applyMask(findMaskR16(read32le(loc)), val & 0xffff)); 273 break; 274 case R_HEX_32: 275 case R_HEX_32_PCREL: 276 case R_HEX_DTPREL_32: 277 or32le(loc, val); 278 break; 279 case R_HEX_32_6_X: 280 case R_HEX_GD_GOT_32_6_X: 281 case R_HEX_GOT_32_6_X: 282 case R_HEX_GOTREL_32_6_X: 283 case R_HEX_IE_GOT_32_6_X: 284 case R_HEX_IE_32_6_X: 285 case R_HEX_TPREL_32_6_X: 286 or32le(loc, applyMask(0x0fff3fff, val >> 6)); 287 break; 288 case R_HEX_B9_PCREL: 289 checkInt(loc, val, 11, rel); 290 or32le(loc, applyMask(0x003000fe, val >> 2)); 291 break; 292 case R_HEX_B9_PCREL_X: 293 or32le(loc, applyMask(0x003000fe, val & 0x3f)); 294 break; 295 case R_HEX_B13_PCREL: 296 checkInt(loc, val, 15, rel); 297 or32le(loc, applyMask(0x00202ffe, val >> 2)); 298 break; 299 case R_HEX_B15_PCREL: 300 checkInt(loc, val, 17, rel); 301 or32le(loc, applyMask(0x00df20fe, val >> 2)); 302 break; 303 case R_HEX_B15_PCREL_X: 304 or32le(loc, applyMask(0x00df20fe, val & 0x3f)); 305 break; 306 case R_HEX_B22_PCREL: 307 case R_HEX_PLT_B22_PCREL: 308 checkInt(loc, val, 22, rel); 309 or32le(loc, applyMask(0x1ff3ffe, val >> 2)); 310 break; 311 case R_HEX_B22_PCREL_X: 312 or32le(loc, applyMask(0x1ff3ffe, val & 0x3f)); 313 break; 314 case R_HEX_B32_PCREL_X: 315 or32le(loc, applyMask(0x0fff3fff, val >> 6)); 316 break; 317 case R_HEX_GOTREL_HI16: 318 case R_HEX_HI16: 319 case R_HEX_IE_GOT_HI16: 320 case R_HEX_IE_HI16: 321 case R_HEX_TPREL_HI16: 322 or32le(loc, applyMask(0x00c03fff, val >> 16)); 323 break; 324 case R_HEX_GOTREL_LO16: 325 case R_HEX_LO16: 326 case R_HEX_IE_GOT_LO16: 327 case R_HEX_IE_LO16: 328 case R_HEX_TPREL_LO16: 329 or32le(loc, applyMask(0x00c03fff, val)); 330 break; 331 default: 332 llvm_unreachable("unknown relocation"); 333 } 334 } 335 336 void Hexagon::writePltHeader(uint8_t *buf) const { 337 const uint8_t pltData[] = { 338 0x00, 0x40, 0x00, 0x00, // { immext (#0) 339 0x1c, 0xc0, 0x49, 0x6a, // r28 = add (pc, ##GOT0@PCREL) } # @GOT0 340 0x0e, 0x42, 0x9c, 0xe2, // { r14 -= add (r28, #16) # offset of GOTn 341 0x4f, 0x40, 0x9c, 0x91, // r15 = memw (r28 + #8) # object ID at GOT2 342 0x3c, 0xc0, 0x9c, 0x91, // r28 = memw (r28 + #4) }# dynamic link at GOT1 343 0x0e, 0x42, 0x0e, 0x8c, // { r14 = asr (r14, #2) # index of PLTn 344 0x00, 0xc0, 0x9c, 0x52, // jumpr r28 } # call dynamic linker 345 0x0c, 0xdb, 0x00, 0x54, // trap0(#0xdb) # bring plt0 into 16byte alignment 346 }; 347 memcpy(buf, pltData, sizeof(pltData)); 348 349 // Offset from PLT0 to the GOT. 350 uint64_t off = in.gotPlt->getVA() - in.plt->getVA(); 351 relocateNoSym(buf, R_HEX_B32_PCREL_X, off); 352 relocateNoSym(buf + 4, R_HEX_6_PCREL_X, off); 353 } 354 355 void Hexagon::writePlt(uint8_t *buf, const Symbol &sym, 356 uint64_t pltEntryAddr) const { 357 const uint8_t inst[] = { 358 0x00, 0x40, 0x00, 0x00, // { immext (#0) 359 0x0e, 0xc0, 0x49, 0x6a, // r14 = add (pc, ##GOTn@PCREL) } 360 0x1c, 0xc0, 0x8e, 0x91, // r28 = memw (r14) 361 0x00, 0xc0, 0x9c, 0x52, // jumpr r28 362 }; 363 memcpy(buf, inst, sizeof(inst)); 364 365 uint64_t gotPltEntryAddr = sym.getGotPltVA(); 366 relocateNoSym(buf, R_HEX_B32_PCREL_X, gotPltEntryAddr - pltEntryAddr); 367 relocateNoSym(buf + 4, R_HEX_6_PCREL_X, gotPltEntryAddr - pltEntryAddr); 368 } 369 370 RelType Hexagon::getDynRel(RelType type) const { 371 if (type == R_HEX_32) 372 return type; 373 return R_HEX_NONE; 374 } 375 376 TargetInfo *getHexagonTargetInfo() { 377 static Hexagon target; 378 return ⌖ 379 } 380 381 } // namespace elf 382 } // namespace lld 383