1 //===- Chunks.cpp ---------------------------------------------------------===// 2 // 3 // The LLVM Linker 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "Chunks.h" 11 #include "Error.h" 12 #include "InputFiles.h" 13 #include "Symbols.h" 14 #include "llvm/ADT/Twine.h" 15 #include "llvm/BinaryFormat/COFF.h" 16 #include "llvm/Object/COFF.h" 17 #include "llvm/Support/Debug.h" 18 #include "llvm/Support/Endian.h" 19 #include "llvm/Support/raw_ostream.h" 20 #include <algorithm> 21 22 using namespace llvm; 23 using namespace llvm::object; 24 using namespace llvm::support::endian; 25 using namespace llvm::COFF; 26 using llvm::support::ulittle32_t; 27 28 namespace lld { 29 namespace coff { 30 31 SectionChunk::SectionChunk(ObjectFile *F, const coff_section *H) 32 : Chunk(SectionKind), Repl(this), Header(H), File(F), 33 Relocs(File->getCOFFObj()->getRelocations(Header)), 34 NumRelocs(std::distance(Relocs.begin(), Relocs.end())) { 35 // Initialize SectionName. 36 File->getCOFFObj()->getSectionName(Header, SectionName); 37 38 Align = Header->getAlignment(); 39 40 // Chunks may be discarded during comdat merging. 41 Discarded = false; 42 43 // If linker GC is disabled, every chunk starts out alive. If linker GC is 44 // enabled, treat non-comdat sections as roots. Generally optimized object 45 // files will be built with -ffunction-sections or /Gy, so most things worth 46 // stripping will be in a comdat. 47 Live = !Config->DoGC || !isCOMDAT(); 48 } 49 50 static void add16(uint8_t *P, int16_t V) { write16le(P, read16le(P) + V); } 51 static void add32(uint8_t *P, int32_t V) { write32le(P, read32le(P) + V); } 52 static void add64(uint8_t *P, int64_t V) { write64le(P, read64le(P) + V); } 53 static void or16(uint8_t *P, uint16_t V) { write16le(P, read16le(P) | V); } 54 55 static void applySecRel(const SectionChunk *Sec, uint8_t *Off, Defined *Sym) { 56 // Don't apply section relative relocations to absolute symbols in codeview 57 // debug info sections. MSVC does not treat such relocations as fatal errors, 58 // and they can be found in the standard library for linker-provided symbols 59 // like __guard_fids_table and __safe_se_handler_table. 60 if (!(isa<DefinedAbsolute>(Sym) && Sec->isCodeView())) 61 add32(Off, Sym->getSecrel()); 62 } 63 64 void SectionChunk::applyRelX64(uint8_t *Off, uint16_t Type, Defined *Sym, 65 uint64_t P) const { 66 uint64_t S = Sym->getRVA(); 67 switch (Type) { 68 case IMAGE_REL_AMD64_ADDR32: add32(Off, S + Config->ImageBase); break; 69 case IMAGE_REL_AMD64_ADDR64: add64(Off, S + Config->ImageBase); break; 70 case IMAGE_REL_AMD64_ADDR32NB: add32(Off, S); break; 71 case IMAGE_REL_AMD64_REL32: add32(Off, S - P - 4); break; 72 case IMAGE_REL_AMD64_REL32_1: add32(Off, S - P - 5); break; 73 case IMAGE_REL_AMD64_REL32_2: add32(Off, S - P - 6); break; 74 case IMAGE_REL_AMD64_REL32_3: add32(Off, S - P - 7); break; 75 case IMAGE_REL_AMD64_REL32_4: add32(Off, S - P - 8); break; 76 case IMAGE_REL_AMD64_REL32_5: add32(Off, S - P - 9); break; 77 case IMAGE_REL_AMD64_SECTION: add16(Off, Sym->getSectionIndex()); break; 78 case IMAGE_REL_AMD64_SECREL: applySecRel(this, Off, Sym); break; 79 default: 80 fatal("unsupported relocation type 0x" + Twine::utohexstr(Type)); 81 } 82 } 83 84 void SectionChunk::applyRelX86(uint8_t *Off, uint16_t Type, Defined *Sym, 85 uint64_t P) const { 86 uint64_t S = Sym->getRVA(); 87 switch (Type) { 88 case IMAGE_REL_I386_ABSOLUTE: break; 89 case IMAGE_REL_I386_DIR32: add32(Off, S + Config->ImageBase); break; 90 case IMAGE_REL_I386_DIR32NB: add32(Off, S); break; 91 case IMAGE_REL_I386_REL32: add32(Off, S - P - 4); break; 92 case IMAGE_REL_I386_SECTION: add16(Off, Sym->getSectionIndex()); break; 93 case IMAGE_REL_I386_SECREL: applySecRel(this, Off, Sym); break; 94 default: 95 fatal("unsupported relocation type 0x" + Twine::utohexstr(Type)); 96 } 97 } 98 99 static void applyMOV(uint8_t *Off, uint16_t V) { 100 write16le(Off, (read16le(Off) & 0xfbf0) | ((V & 0x800) >> 1) | ((V >> 12) & 0xf)); 101 write16le(Off + 2, (read16le(Off + 2) & 0x8f00) | ((V & 0x700) << 4) | (V & 0xff)); 102 } 103 104 static uint16_t readMOV(uint8_t *Off) { 105 uint16_t Opcode1 = read16le(Off); 106 uint16_t Opcode2 = read16le(Off + 2); 107 uint16_t Imm = (Opcode2 & 0x00ff) | ((Opcode2 >> 4) & 0x0700); 108 Imm |= ((Opcode1 << 1) & 0x0800) | ((Opcode1 & 0x000f) << 12); 109 return Imm; 110 } 111 112 static void applyMOV32T(uint8_t *Off, uint32_t V) { 113 uint16_t ImmW = readMOV(Off); // read MOVW operand 114 uint16_t ImmT = readMOV(Off + 4); // read MOVT operand 115 uint32_t Imm = ImmW | (ImmT << 16); 116 V += Imm; // add the immediate offset 117 applyMOV(Off, V); // set MOVW operand 118 applyMOV(Off + 4, V >> 16); // set MOVT operand 119 } 120 121 static void applyBranch20T(uint8_t *Off, int32_t V) { 122 uint32_t S = V < 0 ? 1 : 0; 123 uint32_t J1 = (V >> 19) & 1; 124 uint32_t J2 = (V >> 18) & 1; 125 or16(Off, (S << 10) | ((V >> 12) & 0x3f)); 126 or16(Off + 2, (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff)); 127 } 128 129 static void applyBranch24T(uint8_t *Off, int32_t V) { 130 if (!isInt<25>(V)) 131 fatal("relocation out of range"); 132 uint32_t S = V < 0 ? 1 : 0; 133 uint32_t J1 = ((~V >> 23) & 1) ^ S; 134 uint32_t J2 = ((~V >> 22) & 1) ^ S; 135 or16(Off, (S << 10) | ((V >> 12) & 0x3ff)); 136 // Clear out the J1 and J2 bits which may be set. 137 write16le(Off + 2, (read16le(Off + 2) & 0xd000) | (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff)); 138 } 139 140 void SectionChunk::applyRelARM(uint8_t *Off, uint16_t Type, Defined *Sym, 141 uint64_t P) const { 142 uint64_t S = Sym->getRVA(); 143 // Pointer to thumb code must have the LSB set. 144 if (Sym->isExecutable()) 145 S |= 1; 146 switch (Type) { 147 case IMAGE_REL_ARM_ADDR32: add32(Off, S + Config->ImageBase); break; 148 case IMAGE_REL_ARM_ADDR32NB: add32(Off, S); break; 149 case IMAGE_REL_ARM_MOV32T: applyMOV32T(Off, S + Config->ImageBase); break; 150 case IMAGE_REL_ARM_BRANCH20T: applyBranch20T(Off, S - P - 4); break; 151 case IMAGE_REL_ARM_BRANCH24T: applyBranch24T(Off, S - P - 4); break; 152 case IMAGE_REL_ARM_BLX23T: applyBranch24T(Off, S - P - 4); break; 153 case IMAGE_REL_ARM_SECREL: applySecRel(this, Off, Sym); break; 154 default: 155 fatal("unsupported relocation type 0x" + Twine::utohexstr(Type)); 156 } 157 } 158 159 void SectionChunk::writeTo(uint8_t *Buf) const { 160 if (!hasData()) 161 return; 162 // Copy section contents from source object file to output file. 163 ArrayRef<uint8_t> A = getContents(); 164 memcpy(Buf + OutputSectionOff, A.data(), A.size()); 165 166 // Apply relocations. 167 for (const coff_relocation &Rel : Relocs) { 168 uint8_t *Off = Buf + OutputSectionOff + Rel.VirtualAddress; 169 SymbolBody *Body = File->getSymbolBody(Rel.SymbolTableIndex); 170 Defined *Sym = cast<Defined>(Body); 171 uint64_t P = RVA + Rel.VirtualAddress; 172 switch (Config->Machine) { 173 case AMD64: 174 applyRelX64(Off, Rel.Type, Sym, P); 175 break; 176 case I386: 177 applyRelX86(Off, Rel.Type, Sym, P); 178 break; 179 case ARMNT: 180 applyRelARM(Off, Rel.Type, Sym, P); 181 break; 182 default: 183 llvm_unreachable("unknown machine type"); 184 } 185 } 186 } 187 188 void SectionChunk::addAssociative(SectionChunk *Child) { 189 AssocChildren.push_back(Child); 190 } 191 192 static uint8_t getBaserelType(const coff_relocation &Rel) { 193 switch (Config->Machine) { 194 case AMD64: 195 if (Rel.Type == IMAGE_REL_AMD64_ADDR64) 196 return IMAGE_REL_BASED_DIR64; 197 return IMAGE_REL_BASED_ABSOLUTE; 198 case I386: 199 if (Rel.Type == IMAGE_REL_I386_DIR32) 200 return IMAGE_REL_BASED_HIGHLOW; 201 return IMAGE_REL_BASED_ABSOLUTE; 202 case ARMNT: 203 if (Rel.Type == IMAGE_REL_ARM_ADDR32) 204 return IMAGE_REL_BASED_HIGHLOW; 205 if (Rel.Type == IMAGE_REL_ARM_MOV32T) 206 return IMAGE_REL_BASED_ARM_MOV32T; 207 return IMAGE_REL_BASED_ABSOLUTE; 208 default: 209 llvm_unreachable("unknown machine type"); 210 } 211 } 212 213 // Windows-specific. 214 // Collect all locations that contain absolute addresses, which need to be 215 // fixed by the loader if load-time relocation is needed. 216 // Only called when base relocation is enabled. 217 void SectionChunk::getBaserels(std::vector<Baserel> *Res) { 218 for (const coff_relocation &Rel : Relocs) { 219 uint8_t Ty = getBaserelType(Rel); 220 if (Ty == IMAGE_REL_BASED_ABSOLUTE) 221 continue; 222 SymbolBody *Body = File->getSymbolBody(Rel.SymbolTableIndex); 223 if (isa<DefinedAbsolute>(Body)) 224 continue; 225 Res->emplace_back(RVA + Rel.VirtualAddress, Ty); 226 } 227 } 228 229 bool SectionChunk::hasData() const { 230 return !(Header->Characteristics & IMAGE_SCN_CNT_UNINITIALIZED_DATA); 231 } 232 233 uint32_t SectionChunk::getPermissions() const { 234 return Header->Characteristics & PermMask; 235 } 236 237 bool SectionChunk::isCOMDAT() const { 238 return Header->Characteristics & IMAGE_SCN_LNK_COMDAT; 239 } 240 241 void SectionChunk::printDiscardedMessage() const { 242 // Removed by dead-stripping. If it's removed by ICF, ICF already 243 // printed out the name, so don't repeat that here. 244 if (Sym && this == Repl) { 245 if (Discarded) 246 message("Discarded comdat symbol " + Sym->getName()); 247 else if (!Live) 248 message("Discarded " + Sym->getName()); 249 } 250 } 251 252 StringRef SectionChunk::getDebugName() { 253 if (Sym) 254 return Sym->getName(); 255 return ""; 256 } 257 258 ArrayRef<uint8_t> SectionChunk::getContents() const { 259 ArrayRef<uint8_t> A; 260 File->getCOFFObj()->getSectionContents(Header, A); 261 return A; 262 } 263 264 void SectionChunk::replace(SectionChunk *Other) { 265 Other->Repl = Repl; 266 Other->Live = false; 267 } 268 269 CommonChunk::CommonChunk(const COFFSymbolRef S) : Sym(S) { 270 // Common symbols are aligned on natural boundaries up to 32 bytes. 271 // This is what MSVC link.exe does. 272 Align = std::min(uint64_t(32), PowerOf2Ceil(Sym.getValue())); 273 } 274 275 uint32_t CommonChunk::getPermissions() const { 276 return IMAGE_SCN_CNT_UNINITIALIZED_DATA | IMAGE_SCN_MEM_READ | 277 IMAGE_SCN_MEM_WRITE; 278 } 279 280 void StringChunk::writeTo(uint8_t *Buf) const { 281 memcpy(Buf + OutputSectionOff, Str.data(), Str.size()); 282 } 283 284 ImportThunkChunkX64::ImportThunkChunkX64(Defined *S) : ImpSymbol(S) { 285 // Intel Optimization Manual says that all branch targets 286 // should be 16-byte aligned. MSVC linker does this too. 287 Align = 16; 288 } 289 290 void ImportThunkChunkX64::writeTo(uint8_t *Buf) const { 291 memcpy(Buf + OutputSectionOff, ImportThunkX86, sizeof(ImportThunkX86)); 292 // The first two bytes is a JMP instruction. Fill its operand. 293 write32le(Buf + OutputSectionOff + 2, ImpSymbol->getRVA() - RVA - getSize()); 294 } 295 296 void ImportThunkChunkX86::getBaserels(std::vector<Baserel> *Res) { 297 Res->emplace_back(getRVA() + 2); 298 } 299 300 void ImportThunkChunkX86::writeTo(uint8_t *Buf) const { 301 memcpy(Buf + OutputSectionOff, ImportThunkX86, sizeof(ImportThunkX86)); 302 // The first two bytes is a JMP instruction. Fill its operand. 303 write32le(Buf + OutputSectionOff + 2, 304 ImpSymbol->getRVA() + Config->ImageBase); 305 } 306 307 void ImportThunkChunkARM::getBaserels(std::vector<Baserel> *Res) { 308 Res->emplace_back(getRVA(), IMAGE_REL_BASED_ARM_MOV32T); 309 } 310 311 void ImportThunkChunkARM::writeTo(uint8_t *Buf) const { 312 memcpy(Buf + OutputSectionOff, ImportThunkARM, sizeof(ImportThunkARM)); 313 // Fix mov.w and mov.t operands. 314 applyMOV32T(Buf + OutputSectionOff, ImpSymbol->getRVA() + Config->ImageBase); 315 } 316 317 void LocalImportChunk::getBaserels(std::vector<Baserel> *Res) { 318 Res->emplace_back(getRVA()); 319 } 320 321 size_t LocalImportChunk::getSize() const { 322 return Config->is64() ? 8 : 4; 323 } 324 325 void LocalImportChunk::writeTo(uint8_t *Buf) const { 326 if (Config->is64()) { 327 write64le(Buf + OutputSectionOff, Sym->getRVA() + Config->ImageBase); 328 } else { 329 write32le(Buf + OutputSectionOff, Sym->getRVA() + Config->ImageBase); 330 } 331 } 332 333 void SEHTableChunk::writeTo(uint8_t *Buf) const { 334 ulittle32_t *Begin = reinterpret_cast<ulittle32_t *>(Buf + OutputSectionOff); 335 size_t Cnt = 0; 336 for (Defined *D : Syms) 337 Begin[Cnt++] = D->getRVA(); 338 std::sort(Begin, Begin + Cnt); 339 } 340 341 // Windows-specific. This class represents a block in .reloc section. 342 // The format is described here. 343 // 344 // On Windows, each DLL is linked against a fixed base address and 345 // usually loaded to that address. However, if there's already another 346 // DLL that overlaps, the loader has to relocate it. To do that, DLLs 347 // contain .reloc sections which contain offsets that need to be fixed 348 // up at runtime. If the loader finds that a DLL cannot be loaded to its 349 // desired base address, it loads it to somewhere else, and add <actual 350 // base address> - <desired base address> to each offset that is 351 // specified by the .reloc section. In ELF terms, .reloc sections 352 // contain relative relocations in REL format (as opposed to RELA.) 353 // 354 // This already significantly reduces the size of relocations compared 355 // to ELF .rel.dyn, but Windows does more to reduce it (probably because 356 // it was invented for PCs in the late '80s or early '90s.) Offsets in 357 // .reloc are grouped by page where the page size is 12 bits, and 358 // offsets sharing the same page address are stored consecutively to 359 // represent them with less space. This is very similar to the page 360 // table which is grouped by (multiple stages of) pages. 361 // 362 // For example, let's say we have 0x00030, 0x00500, 0x00700, 0x00A00, 363 // 0x20004, and 0x20008 in a .reloc section for x64. The uppermost 4 364 // bits have a type IMAGE_REL_BASED_DIR64 or 0xA. In the section, they 365 // are represented like this: 366 // 367 // 0x00000 -- page address (4 bytes) 368 // 16 -- size of this block (4 bytes) 369 // 0xA030 -- entries (2 bytes each) 370 // 0xA500 371 // 0xA700 372 // 0xAA00 373 // 0x20000 -- page address (4 bytes) 374 // 12 -- size of this block (4 bytes) 375 // 0xA004 -- entries (2 bytes each) 376 // 0xA008 377 // 378 // Usually we have a lot of relocations for each page, so the number of 379 // bytes for one .reloc entry is close to 2 bytes on average. 380 BaserelChunk::BaserelChunk(uint32_t Page, Baserel *Begin, Baserel *End) { 381 // Block header consists of 4 byte page RVA and 4 byte block size. 382 // Each entry is 2 byte. Last entry may be padding. 383 Data.resize(alignTo((End - Begin) * 2 + 8, 4)); 384 uint8_t *P = Data.data(); 385 write32le(P, Page); 386 write32le(P + 4, Data.size()); 387 P += 8; 388 for (Baserel *I = Begin; I != End; ++I) { 389 write16le(P, (I->Type << 12) | (I->RVA - Page)); 390 P += 2; 391 } 392 } 393 394 void BaserelChunk::writeTo(uint8_t *Buf) const { 395 memcpy(Buf + OutputSectionOff, Data.data(), Data.size()); 396 } 397 398 uint8_t Baserel::getDefaultType() { 399 switch (Config->Machine) { 400 case AMD64: 401 return IMAGE_REL_BASED_DIR64; 402 case I386: 403 return IMAGE_REL_BASED_HIGHLOW; 404 default: 405 llvm_unreachable("unknown machine type"); 406 } 407 } 408 409 } // namespace coff 410 } // namespace lld 411