1 //===-- tsan_interface_atomic.cpp -----------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file is a part of ThreadSanitizer (TSan), a race detector. 10 // 11 //===----------------------------------------------------------------------===// 12 13 // ThreadSanitizer atomic operations are based on C++11/C1x standards. 14 // For background see C++11 standard. A slightly older, publicly 15 // available draft of the standard (not entirely up-to-date, but close enough 16 // for casual browsing) is available here: 17 // http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3242.pdf 18 // The following page contains more background information: 19 // http://www.hpl.hp.com/personal/Hans_Boehm/c++mm/ 20 21 #include "sanitizer_common/sanitizer_placement_new.h" 22 #include "sanitizer_common/sanitizer_stacktrace.h" 23 #include "sanitizer_common/sanitizer_mutex.h" 24 #include "tsan_flags.h" 25 #include "tsan_interface.h" 26 #include "tsan_rtl.h" 27 28 using namespace __tsan; 29 30 #if !SANITIZER_GO && __TSAN_HAS_INT128 31 // Protects emulation of 128-bit atomic operations. 32 static StaticSpinMutex mutex128; 33 #endif 34 35 static bool IsLoadOrder(morder mo) { 36 return mo == mo_relaxed || mo == mo_consume 37 || mo == mo_acquire || mo == mo_seq_cst; 38 } 39 40 static bool IsStoreOrder(morder mo) { 41 return mo == mo_relaxed || mo == mo_release || mo == mo_seq_cst; 42 } 43 44 static bool IsReleaseOrder(morder mo) { 45 return mo == mo_release || mo == mo_acq_rel || mo == mo_seq_cst; 46 } 47 48 static bool IsAcquireOrder(morder mo) { 49 return mo == mo_consume || mo == mo_acquire 50 || mo == mo_acq_rel || mo == mo_seq_cst; 51 } 52 53 static bool IsAcqRelOrder(morder mo) { 54 return mo == mo_acq_rel || mo == mo_seq_cst; 55 } 56 57 template<typename T> T func_xchg(volatile T *v, T op) { 58 T res = __sync_lock_test_and_set(v, op); 59 // __sync_lock_test_and_set does not contain full barrier. 60 __sync_synchronize(); 61 return res; 62 } 63 64 template<typename T> T func_add(volatile T *v, T op) { 65 return __sync_fetch_and_add(v, op); 66 } 67 68 template<typename T> T func_sub(volatile T *v, T op) { 69 return __sync_fetch_and_sub(v, op); 70 } 71 72 template<typename T> T func_and(volatile T *v, T op) { 73 return __sync_fetch_and_and(v, op); 74 } 75 76 template<typename T> T func_or(volatile T *v, T op) { 77 return __sync_fetch_and_or(v, op); 78 } 79 80 template<typename T> T func_xor(volatile T *v, T op) { 81 return __sync_fetch_and_xor(v, op); 82 } 83 84 template<typename T> T func_nand(volatile T *v, T op) { 85 // clang does not support __sync_fetch_and_nand. 86 T cmp = *v; 87 for (;;) { 88 T newv = ~(cmp & op); 89 T cur = __sync_val_compare_and_swap(v, cmp, newv); 90 if (cmp == cur) 91 return cmp; 92 cmp = cur; 93 } 94 } 95 96 template<typename T> T func_cas(volatile T *v, T cmp, T xch) { 97 return __sync_val_compare_and_swap(v, cmp, xch); 98 } 99 100 // clang does not support 128-bit atomic ops. 101 // Atomic ops are executed under tsan internal mutex, 102 // here we assume that the atomic variables are not accessed 103 // from non-instrumented code. 104 #if !defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16) && !SANITIZER_GO \ 105 && __TSAN_HAS_INT128 106 a128 func_xchg(volatile a128 *v, a128 op) { 107 SpinMutexLock lock(&mutex128); 108 a128 cmp = *v; 109 *v = op; 110 return cmp; 111 } 112 113 a128 func_add(volatile a128 *v, a128 op) { 114 SpinMutexLock lock(&mutex128); 115 a128 cmp = *v; 116 *v = cmp + op; 117 return cmp; 118 } 119 120 a128 func_sub(volatile a128 *v, a128 op) { 121 SpinMutexLock lock(&mutex128); 122 a128 cmp = *v; 123 *v = cmp - op; 124 return cmp; 125 } 126 127 a128 func_and(volatile a128 *v, a128 op) { 128 SpinMutexLock lock(&mutex128); 129 a128 cmp = *v; 130 *v = cmp & op; 131 return cmp; 132 } 133 134 a128 func_or(volatile a128 *v, a128 op) { 135 SpinMutexLock lock(&mutex128); 136 a128 cmp = *v; 137 *v = cmp | op; 138 return cmp; 139 } 140 141 a128 func_xor(volatile a128 *v, a128 op) { 142 SpinMutexLock lock(&mutex128); 143 a128 cmp = *v; 144 *v = cmp ^ op; 145 return cmp; 146 } 147 148 a128 func_nand(volatile a128 *v, a128 op) { 149 SpinMutexLock lock(&mutex128); 150 a128 cmp = *v; 151 *v = ~(cmp & op); 152 return cmp; 153 } 154 155 a128 func_cas(volatile a128 *v, a128 cmp, a128 xch) { 156 SpinMutexLock lock(&mutex128); 157 a128 cur = *v; 158 if (cur == cmp) 159 *v = xch; 160 return cur; 161 } 162 #endif 163 164 template<typename T> 165 static int SizeLog() { 166 if (sizeof(T) <= 1) 167 return kSizeLog1; 168 else if (sizeof(T) <= 2) 169 return kSizeLog2; 170 else if (sizeof(T) <= 4) 171 return kSizeLog4; 172 else 173 return kSizeLog8; 174 // For 16-byte atomics we also use 8-byte memory access, 175 // this leads to false negatives only in very obscure cases. 176 } 177 178 #if !SANITIZER_GO 179 static atomic_uint8_t *to_atomic(const volatile a8 *a) { 180 return reinterpret_cast<atomic_uint8_t *>(const_cast<a8 *>(a)); 181 } 182 183 static atomic_uint16_t *to_atomic(const volatile a16 *a) { 184 return reinterpret_cast<atomic_uint16_t *>(const_cast<a16 *>(a)); 185 } 186 #endif 187 188 static atomic_uint32_t *to_atomic(const volatile a32 *a) { 189 return reinterpret_cast<atomic_uint32_t *>(const_cast<a32 *>(a)); 190 } 191 192 static atomic_uint64_t *to_atomic(const volatile a64 *a) { 193 return reinterpret_cast<atomic_uint64_t *>(const_cast<a64 *>(a)); 194 } 195 196 static memory_order to_mo(morder mo) { 197 switch (mo) { 198 case mo_relaxed: return memory_order_relaxed; 199 case mo_consume: return memory_order_consume; 200 case mo_acquire: return memory_order_acquire; 201 case mo_release: return memory_order_release; 202 case mo_acq_rel: return memory_order_acq_rel; 203 case mo_seq_cst: return memory_order_seq_cst; 204 } 205 CHECK(0); 206 return memory_order_seq_cst; 207 } 208 209 template<typename T> 210 static T NoTsanAtomicLoad(const volatile T *a, morder mo) { 211 return atomic_load(to_atomic(a), to_mo(mo)); 212 } 213 214 #if __TSAN_HAS_INT128 && !SANITIZER_GO 215 static a128 NoTsanAtomicLoad(const volatile a128 *a, morder mo) { 216 SpinMutexLock lock(&mutex128); 217 return *a; 218 } 219 #endif 220 221 template <typename T> 222 static T AtomicLoad(ThreadState *thr, uptr pc, const volatile T *a, 223 morder mo) NO_THREAD_SAFETY_ANALYSIS { 224 CHECK(IsLoadOrder(mo)); 225 // This fast-path is critical for performance. 226 // Assume the access is atomic. 227 if (!IsAcquireOrder(mo)) { 228 MemoryReadAtomic(thr, pc, (uptr)a, SizeLog<T>()); 229 return NoTsanAtomicLoad(a, mo); 230 } 231 // Don't create sync object if it does not exist yet. For example, an atomic 232 // pointer is initialized to nullptr and then periodically acquire-loaded. 233 T v = NoTsanAtomicLoad(a, mo); 234 SyncVar *s = ctx->metamap.GetIfExistsAndLock((uptr)a, false); 235 if (s) { 236 AcquireImpl(thr, pc, &s->clock); 237 // Re-read under sync mutex because we need a consistent snapshot 238 // of the value and the clock we acquire. 239 v = NoTsanAtomicLoad(a, mo); 240 s->mtx.ReadUnlock(); 241 } 242 MemoryReadAtomic(thr, pc, (uptr)a, SizeLog<T>()); 243 return v; 244 } 245 246 template<typename T> 247 static void NoTsanAtomicStore(volatile T *a, T v, morder mo) { 248 atomic_store(to_atomic(a), v, to_mo(mo)); 249 } 250 251 #if __TSAN_HAS_INT128 && !SANITIZER_GO 252 static void NoTsanAtomicStore(volatile a128 *a, a128 v, morder mo) { 253 SpinMutexLock lock(&mutex128); 254 *a = v; 255 } 256 #endif 257 258 template <typename T> 259 static void AtomicStore(ThreadState *thr, uptr pc, volatile T *a, T v, 260 morder mo) NO_THREAD_SAFETY_ANALYSIS { 261 CHECK(IsStoreOrder(mo)); 262 MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>()); 263 // This fast-path is critical for performance. 264 // Assume the access is atomic. 265 // Strictly saying even relaxed store cuts off release sequence, 266 // so must reset the clock. 267 if (!IsReleaseOrder(mo)) { 268 NoTsanAtomicStore(a, v, mo); 269 return; 270 } 271 __sync_synchronize(); 272 SyncVar *s = ctx->metamap.GetOrCreateAndLock(thr, pc, (uptr)a, true); 273 thr->fast_state.IncrementEpoch(); 274 // Can't increment epoch w/o writing to the trace as well. 275 TraceAddEvent(thr, thr->fast_state, EventTypeMop, 0); 276 ReleaseStoreImpl(thr, pc, &s->clock); 277 NoTsanAtomicStore(a, v, mo); 278 s->mtx.Unlock(); 279 } 280 281 template <typename T, T (*F)(volatile T *v, T op)> 282 static T AtomicRMW(ThreadState *thr, uptr pc, volatile T *a, T v, 283 morder mo) NO_THREAD_SAFETY_ANALYSIS { 284 MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>()); 285 SyncVar *s = 0; 286 if (mo != mo_relaxed) { 287 s = ctx->metamap.GetOrCreateAndLock(thr, pc, (uptr)a, true); 288 thr->fast_state.IncrementEpoch(); 289 // Can't increment epoch w/o writing to the trace as well. 290 TraceAddEvent(thr, thr->fast_state, EventTypeMop, 0); 291 if (IsAcqRelOrder(mo)) 292 AcquireReleaseImpl(thr, pc, &s->clock); 293 else if (IsReleaseOrder(mo)) 294 ReleaseImpl(thr, pc, &s->clock); 295 else if (IsAcquireOrder(mo)) 296 AcquireImpl(thr, pc, &s->clock); 297 } 298 v = F(a, v); 299 if (s) 300 s->mtx.Unlock(); 301 return v; 302 } 303 304 template<typename T> 305 static T NoTsanAtomicExchange(volatile T *a, T v, morder mo) { 306 return func_xchg(a, v); 307 } 308 309 template<typename T> 310 static T NoTsanAtomicFetchAdd(volatile T *a, T v, morder mo) { 311 return func_add(a, v); 312 } 313 314 template<typename T> 315 static T NoTsanAtomicFetchSub(volatile T *a, T v, morder mo) { 316 return func_sub(a, v); 317 } 318 319 template<typename T> 320 static T NoTsanAtomicFetchAnd(volatile T *a, T v, morder mo) { 321 return func_and(a, v); 322 } 323 324 template<typename T> 325 static T NoTsanAtomicFetchOr(volatile T *a, T v, morder mo) { 326 return func_or(a, v); 327 } 328 329 template<typename T> 330 static T NoTsanAtomicFetchXor(volatile T *a, T v, morder mo) { 331 return func_xor(a, v); 332 } 333 334 template<typename T> 335 static T NoTsanAtomicFetchNand(volatile T *a, T v, morder mo) { 336 return func_nand(a, v); 337 } 338 339 template<typename T> 340 static T AtomicExchange(ThreadState *thr, uptr pc, volatile T *a, T v, 341 morder mo) { 342 return AtomicRMW<T, func_xchg>(thr, pc, a, v, mo); 343 } 344 345 template<typename T> 346 static T AtomicFetchAdd(ThreadState *thr, uptr pc, volatile T *a, T v, 347 morder mo) { 348 return AtomicRMW<T, func_add>(thr, pc, a, v, mo); 349 } 350 351 template<typename T> 352 static T AtomicFetchSub(ThreadState *thr, uptr pc, volatile T *a, T v, 353 morder mo) { 354 return AtomicRMW<T, func_sub>(thr, pc, a, v, mo); 355 } 356 357 template<typename T> 358 static T AtomicFetchAnd(ThreadState *thr, uptr pc, volatile T *a, T v, 359 morder mo) { 360 return AtomicRMW<T, func_and>(thr, pc, a, v, mo); 361 } 362 363 template<typename T> 364 static T AtomicFetchOr(ThreadState *thr, uptr pc, volatile T *a, T v, 365 morder mo) { 366 return AtomicRMW<T, func_or>(thr, pc, a, v, mo); 367 } 368 369 template<typename T> 370 static T AtomicFetchXor(ThreadState *thr, uptr pc, volatile T *a, T v, 371 morder mo) { 372 return AtomicRMW<T, func_xor>(thr, pc, a, v, mo); 373 } 374 375 template<typename T> 376 static T AtomicFetchNand(ThreadState *thr, uptr pc, volatile T *a, T v, 377 morder mo) { 378 return AtomicRMW<T, func_nand>(thr, pc, a, v, mo); 379 } 380 381 template<typename T> 382 static bool NoTsanAtomicCAS(volatile T *a, T *c, T v, morder mo, morder fmo) { 383 return atomic_compare_exchange_strong(to_atomic(a), c, v, to_mo(mo)); 384 } 385 386 #if __TSAN_HAS_INT128 387 static bool NoTsanAtomicCAS(volatile a128 *a, a128 *c, a128 v, 388 morder mo, morder fmo) { 389 a128 old = *c; 390 a128 cur = func_cas(a, old, v); 391 if (cur == old) 392 return true; 393 *c = cur; 394 return false; 395 } 396 #endif 397 398 template<typename T> 399 static T NoTsanAtomicCAS(volatile T *a, T c, T v, morder mo, morder fmo) { 400 NoTsanAtomicCAS(a, &c, v, mo, fmo); 401 return c; 402 } 403 404 template <typename T> 405 static bool AtomicCAS(ThreadState *thr, uptr pc, volatile T *a, T *c, T v, morder mo, 406 morder fmo) NO_THREAD_SAFETY_ANALYSIS { 407 // 31.7.2.18: "The failure argument shall not be memory_order_release 408 // nor memory_order_acq_rel". LLVM (2021-05) fallbacks to Monotonic 409 // (mo_relaxed) when those are used. 410 CHECK(IsLoadOrder(fmo)); 411 412 MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>()); 413 SyncVar *s = 0; 414 bool write_lock = IsReleaseOrder(mo); 415 416 if (mo != mo_relaxed || fmo != mo_relaxed) 417 s = ctx->metamap.GetOrCreateAndLock(thr, pc, (uptr)a, write_lock); 418 419 T cc = *c; 420 T pr = func_cas(a, cc, v); 421 bool success = pr == cc; 422 if (!success) { 423 *c = pr; 424 mo = fmo; 425 } 426 427 if (s) { 428 thr->fast_state.IncrementEpoch(); 429 // Can't increment epoch w/o writing to the trace as well. 430 TraceAddEvent(thr, thr->fast_state, EventTypeMop, 0); 431 432 if (success && IsAcqRelOrder(mo)) 433 AcquireReleaseImpl(thr, pc, &s->clock); 434 else if (success && IsReleaseOrder(mo)) 435 ReleaseImpl(thr, pc, &s->clock); 436 else if (IsAcquireOrder(mo)) 437 AcquireImpl(thr, pc, &s->clock); 438 439 if (write_lock) 440 s->mtx.Unlock(); 441 else 442 s->mtx.ReadUnlock(); 443 } 444 445 return success; 446 } 447 448 template<typename T> 449 static T AtomicCAS(ThreadState *thr, uptr pc, 450 volatile T *a, T c, T v, morder mo, morder fmo) { 451 AtomicCAS(thr, pc, a, &c, v, mo, fmo); 452 return c; 453 } 454 455 #if !SANITIZER_GO 456 static void NoTsanAtomicFence(morder mo) { 457 __sync_synchronize(); 458 } 459 460 static void AtomicFence(ThreadState *thr, uptr pc, morder mo) { 461 // FIXME(dvyukov): not implemented. 462 __sync_synchronize(); 463 } 464 #endif 465 466 // Interface functions follow. 467 #if !SANITIZER_GO 468 469 // C/C++ 470 471 static morder convert_morder(morder mo) { 472 if (flags()->force_seq_cst_atomics) 473 return (morder)mo_seq_cst; 474 475 // Filter out additional memory order flags: 476 // MEMMODEL_SYNC = 1 << 15 477 // __ATOMIC_HLE_ACQUIRE = 1 << 16 478 // __ATOMIC_HLE_RELEASE = 1 << 17 479 // 480 // HLE is an optimization, and we pretend that elision always fails. 481 // MEMMODEL_SYNC is used when lowering __sync_ atomics, 482 // since we use __sync_ atomics for actual atomic operations, 483 // we can safely ignore it as well. It also subtly affects semantics, 484 // but we don't model the difference. 485 return (morder)(mo & 0x7fff); 486 } 487 488 # define ATOMIC_IMPL(func, ...) \ 489 ThreadState *const thr = cur_thread(); \ 490 ProcessPendingSignals(thr); \ 491 if (UNLIKELY(thr->ignore_sync || thr->ignore_interceptors)) \ 492 return NoTsanAtomic##func(__VA_ARGS__); \ 493 mo = convert_morder(mo); \ 494 return Atomic##func(thr, GET_CALLER_PC(), __VA_ARGS__); 495 496 extern "C" { 497 SANITIZER_INTERFACE_ATTRIBUTE 498 a8 __tsan_atomic8_load(const volatile a8 *a, morder mo) { 499 ATOMIC_IMPL(Load, a, mo); 500 } 501 502 SANITIZER_INTERFACE_ATTRIBUTE 503 a16 __tsan_atomic16_load(const volatile a16 *a, morder mo) { 504 ATOMIC_IMPL(Load, a, mo); 505 } 506 507 SANITIZER_INTERFACE_ATTRIBUTE 508 a32 __tsan_atomic32_load(const volatile a32 *a, morder mo) { 509 ATOMIC_IMPL(Load, a, mo); 510 } 511 512 SANITIZER_INTERFACE_ATTRIBUTE 513 a64 __tsan_atomic64_load(const volatile a64 *a, morder mo) { 514 ATOMIC_IMPL(Load, a, mo); 515 } 516 517 #if __TSAN_HAS_INT128 518 SANITIZER_INTERFACE_ATTRIBUTE 519 a128 __tsan_atomic128_load(const volatile a128 *a, morder mo) { 520 ATOMIC_IMPL(Load, a, mo); 521 } 522 #endif 523 524 SANITIZER_INTERFACE_ATTRIBUTE 525 void __tsan_atomic8_store(volatile a8 *a, a8 v, morder mo) { 526 ATOMIC_IMPL(Store, a, v, mo); 527 } 528 529 SANITIZER_INTERFACE_ATTRIBUTE 530 void __tsan_atomic16_store(volatile a16 *a, a16 v, morder mo) { 531 ATOMIC_IMPL(Store, a, v, mo); 532 } 533 534 SANITIZER_INTERFACE_ATTRIBUTE 535 void __tsan_atomic32_store(volatile a32 *a, a32 v, morder mo) { 536 ATOMIC_IMPL(Store, a, v, mo); 537 } 538 539 SANITIZER_INTERFACE_ATTRIBUTE 540 void __tsan_atomic64_store(volatile a64 *a, a64 v, morder mo) { 541 ATOMIC_IMPL(Store, a, v, mo); 542 } 543 544 #if __TSAN_HAS_INT128 545 SANITIZER_INTERFACE_ATTRIBUTE 546 void __tsan_atomic128_store(volatile a128 *a, a128 v, morder mo) { 547 ATOMIC_IMPL(Store, a, v, mo); 548 } 549 #endif 550 551 SANITIZER_INTERFACE_ATTRIBUTE 552 a8 __tsan_atomic8_exchange(volatile a8 *a, a8 v, morder mo) { 553 ATOMIC_IMPL(Exchange, a, v, mo); 554 } 555 556 SANITIZER_INTERFACE_ATTRIBUTE 557 a16 __tsan_atomic16_exchange(volatile a16 *a, a16 v, morder mo) { 558 ATOMIC_IMPL(Exchange, a, v, mo); 559 } 560 561 SANITIZER_INTERFACE_ATTRIBUTE 562 a32 __tsan_atomic32_exchange(volatile a32 *a, a32 v, morder mo) { 563 ATOMIC_IMPL(Exchange, a, v, mo); 564 } 565 566 SANITIZER_INTERFACE_ATTRIBUTE 567 a64 __tsan_atomic64_exchange(volatile a64 *a, a64 v, morder mo) { 568 ATOMIC_IMPL(Exchange, a, v, mo); 569 } 570 571 #if __TSAN_HAS_INT128 572 SANITIZER_INTERFACE_ATTRIBUTE 573 a128 __tsan_atomic128_exchange(volatile a128 *a, a128 v, morder mo) { 574 ATOMIC_IMPL(Exchange, a, v, mo); 575 } 576 #endif 577 578 SANITIZER_INTERFACE_ATTRIBUTE 579 a8 __tsan_atomic8_fetch_add(volatile a8 *a, a8 v, morder mo) { 580 ATOMIC_IMPL(FetchAdd, a, v, mo); 581 } 582 583 SANITIZER_INTERFACE_ATTRIBUTE 584 a16 __tsan_atomic16_fetch_add(volatile a16 *a, a16 v, morder mo) { 585 ATOMIC_IMPL(FetchAdd, a, v, mo); 586 } 587 588 SANITIZER_INTERFACE_ATTRIBUTE 589 a32 __tsan_atomic32_fetch_add(volatile a32 *a, a32 v, morder mo) { 590 ATOMIC_IMPL(FetchAdd, a, v, mo); 591 } 592 593 SANITIZER_INTERFACE_ATTRIBUTE 594 a64 __tsan_atomic64_fetch_add(volatile a64 *a, a64 v, morder mo) { 595 ATOMIC_IMPL(FetchAdd, a, v, mo); 596 } 597 598 #if __TSAN_HAS_INT128 599 SANITIZER_INTERFACE_ATTRIBUTE 600 a128 __tsan_atomic128_fetch_add(volatile a128 *a, a128 v, morder mo) { 601 ATOMIC_IMPL(FetchAdd, a, v, mo); 602 } 603 #endif 604 605 SANITIZER_INTERFACE_ATTRIBUTE 606 a8 __tsan_atomic8_fetch_sub(volatile a8 *a, a8 v, morder mo) { 607 ATOMIC_IMPL(FetchSub, a, v, mo); 608 } 609 610 SANITIZER_INTERFACE_ATTRIBUTE 611 a16 __tsan_atomic16_fetch_sub(volatile a16 *a, a16 v, morder mo) { 612 ATOMIC_IMPL(FetchSub, a, v, mo); 613 } 614 615 SANITIZER_INTERFACE_ATTRIBUTE 616 a32 __tsan_atomic32_fetch_sub(volatile a32 *a, a32 v, morder mo) { 617 ATOMIC_IMPL(FetchSub, a, v, mo); 618 } 619 620 SANITIZER_INTERFACE_ATTRIBUTE 621 a64 __tsan_atomic64_fetch_sub(volatile a64 *a, a64 v, morder mo) { 622 ATOMIC_IMPL(FetchSub, a, v, mo); 623 } 624 625 #if __TSAN_HAS_INT128 626 SANITIZER_INTERFACE_ATTRIBUTE 627 a128 __tsan_atomic128_fetch_sub(volatile a128 *a, a128 v, morder mo) { 628 ATOMIC_IMPL(FetchSub, a, v, mo); 629 } 630 #endif 631 632 SANITIZER_INTERFACE_ATTRIBUTE 633 a8 __tsan_atomic8_fetch_and(volatile a8 *a, a8 v, morder mo) { 634 ATOMIC_IMPL(FetchAnd, a, v, mo); 635 } 636 637 SANITIZER_INTERFACE_ATTRIBUTE 638 a16 __tsan_atomic16_fetch_and(volatile a16 *a, a16 v, morder mo) { 639 ATOMIC_IMPL(FetchAnd, a, v, mo); 640 } 641 642 SANITIZER_INTERFACE_ATTRIBUTE 643 a32 __tsan_atomic32_fetch_and(volatile a32 *a, a32 v, morder mo) { 644 ATOMIC_IMPL(FetchAnd, a, v, mo); 645 } 646 647 SANITIZER_INTERFACE_ATTRIBUTE 648 a64 __tsan_atomic64_fetch_and(volatile a64 *a, a64 v, morder mo) { 649 ATOMIC_IMPL(FetchAnd, a, v, mo); 650 } 651 652 #if __TSAN_HAS_INT128 653 SANITIZER_INTERFACE_ATTRIBUTE 654 a128 __tsan_atomic128_fetch_and(volatile a128 *a, a128 v, morder mo) { 655 ATOMIC_IMPL(FetchAnd, a, v, mo); 656 } 657 #endif 658 659 SANITIZER_INTERFACE_ATTRIBUTE 660 a8 __tsan_atomic8_fetch_or(volatile a8 *a, a8 v, morder mo) { 661 ATOMIC_IMPL(FetchOr, a, v, mo); 662 } 663 664 SANITIZER_INTERFACE_ATTRIBUTE 665 a16 __tsan_atomic16_fetch_or(volatile a16 *a, a16 v, morder mo) { 666 ATOMIC_IMPL(FetchOr, a, v, mo); 667 } 668 669 SANITIZER_INTERFACE_ATTRIBUTE 670 a32 __tsan_atomic32_fetch_or(volatile a32 *a, a32 v, morder mo) { 671 ATOMIC_IMPL(FetchOr, a, v, mo); 672 } 673 674 SANITIZER_INTERFACE_ATTRIBUTE 675 a64 __tsan_atomic64_fetch_or(volatile a64 *a, a64 v, morder mo) { 676 ATOMIC_IMPL(FetchOr, a, v, mo); 677 } 678 679 #if __TSAN_HAS_INT128 680 SANITIZER_INTERFACE_ATTRIBUTE 681 a128 __tsan_atomic128_fetch_or(volatile a128 *a, a128 v, morder mo) { 682 ATOMIC_IMPL(FetchOr, a, v, mo); 683 } 684 #endif 685 686 SANITIZER_INTERFACE_ATTRIBUTE 687 a8 __tsan_atomic8_fetch_xor(volatile a8 *a, a8 v, morder mo) { 688 ATOMIC_IMPL(FetchXor, a, v, mo); 689 } 690 691 SANITIZER_INTERFACE_ATTRIBUTE 692 a16 __tsan_atomic16_fetch_xor(volatile a16 *a, a16 v, morder mo) { 693 ATOMIC_IMPL(FetchXor, a, v, mo); 694 } 695 696 SANITIZER_INTERFACE_ATTRIBUTE 697 a32 __tsan_atomic32_fetch_xor(volatile a32 *a, a32 v, morder mo) { 698 ATOMIC_IMPL(FetchXor, a, v, mo); 699 } 700 701 SANITIZER_INTERFACE_ATTRIBUTE 702 a64 __tsan_atomic64_fetch_xor(volatile a64 *a, a64 v, morder mo) { 703 ATOMIC_IMPL(FetchXor, a, v, mo); 704 } 705 706 #if __TSAN_HAS_INT128 707 SANITIZER_INTERFACE_ATTRIBUTE 708 a128 __tsan_atomic128_fetch_xor(volatile a128 *a, a128 v, morder mo) { 709 ATOMIC_IMPL(FetchXor, a, v, mo); 710 } 711 #endif 712 713 SANITIZER_INTERFACE_ATTRIBUTE 714 a8 __tsan_atomic8_fetch_nand(volatile a8 *a, a8 v, morder mo) { 715 ATOMIC_IMPL(FetchNand, a, v, mo); 716 } 717 718 SANITIZER_INTERFACE_ATTRIBUTE 719 a16 __tsan_atomic16_fetch_nand(volatile a16 *a, a16 v, morder mo) { 720 ATOMIC_IMPL(FetchNand, a, v, mo); 721 } 722 723 SANITIZER_INTERFACE_ATTRIBUTE 724 a32 __tsan_atomic32_fetch_nand(volatile a32 *a, a32 v, morder mo) { 725 ATOMIC_IMPL(FetchNand, a, v, mo); 726 } 727 728 SANITIZER_INTERFACE_ATTRIBUTE 729 a64 __tsan_atomic64_fetch_nand(volatile a64 *a, a64 v, morder mo) { 730 ATOMIC_IMPL(FetchNand, a, v, mo); 731 } 732 733 #if __TSAN_HAS_INT128 734 SANITIZER_INTERFACE_ATTRIBUTE 735 a128 __tsan_atomic128_fetch_nand(volatile a128 *a, a128 v, morder mo) { 736 ATOMIC_IMPL(FetchNand, a, v, mo); 737 } 738 #endif 739 740 SANITIZER_INTERFACE_ATTRIBUTE 741 int __tsan_atomic8_compare_exchange_strong(volatile a8 *a, a8 *c, a8 v, 742 morder mo, morder fmo) { 743 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 744 } 745 746 SANITIZER_INTERFACE_ATTRIBUTE 747 int __tsan_atomic16_compare_exchange_strong(volatile a16 *a, a16 *c, a16 v, 748 morder mo, morder fmo) { 749 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 750 } 751 752 SANITIZER_INTERFACE_ATTRIBUTE 753 int __tsan_atomic32_compare_exchange_strong(volatile a32 *a, a32 *c, a32 v, 754 morder mo, morder fmo) { 755 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 756 } 757 758 SANITIZER_INTERFACE_ATTRIBUTE 759 int __tsan_atomic64_compare_exchange_strong(volatile a64 *a, a64 *c, a64 v, 760 morder mo, morder fmo) { 761 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 762 } 763 764 #if __TSAN_HAS_INT128 765 SANITIZER_INTERFACE_ATTRIBUTE 766 int __tsan_atomic128_compare_exchange_strong(volatile a128 *a, a128 *c, a128 v, 767 morder mo, morder fmo) { 768 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 769 } 770 #endif 771 772 SANITIZER_INTERFACE_ATTRIBUTE 773 int __tsan_atomic8_compare_exchange_weak(volatile a8 *a, a8 *c, a8 v, 774 morder mo, morder fmo) { 775 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 776 } 777 778 SANITIZER_INTERFACE_ATTRIBUTE 779 int __tsan_atomic16_compare_exchange_weak(volatile a16 *a, a16 *c, a16 v, 780 morder mo, morder fmo) { 781 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 782 } 783 784 SANITIZER_INTERFACE_ATTRIBUTE 785 int __tsan_atomic32_compare_exchange_weak(volatile a32 *a, a32 *c, a32 v, 786 morder mo, morder fmo) { 787 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 788 } 789 790 SANITIZER_INTERFACE_ATTRIBUTE 791 int __tsan_atomic64_compare_exchange_weak(volatile a64 *a, a64 *c, a64 v, 792 morder mo, morder fmo) { 793 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 794 } 795 796 #if __TSAN_HAS_INT128 797 SANITIZER_INTERFACE_ATTRIBUTE 798 int __tsan_atomic128_compare_exchange_weak(volatile a128 *a, a128 *c, a128 v, 799 morder mo, morder fmo) { 800 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 801 } 802 #endif 803 804 SANITIZER_INTERFACE_ATTRIBUTE 805 a8 __tsan_atomic8_compare_exchange_val(volatile a8 *a, a8 c, a8 v, 806 morder mo, morder fmo) { 807 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 808 } 809 810 SANITIZER_INTERFACE_ATTRIBUTE 811 a16 __tsan_atomic16_compare_exchange_val(volatile a16 *a, a16 c, a16 v, 812 morder mo, morder fmo) { 813 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 814 } 815 816 SANITIZER_INTERFACE_ATTRIBUTE 817 a32 __tsan_atomic32_compare_exchange_val(volatile a32 *a, a32 c, a32 v, 818 morder mo, morder fmo) { 819 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 820 } 821 822 SANITIZER_INTERFACE_ATTRIBUTE 823 a64 __tsan_atomic64_compare_exchange_val(volatile a64 *a, a64 c, a64 v, 824 morder mo, morder fmo) { 825 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 826 } 827 828 #if __TSAN_HAS_INT128 829 SANITIZER_INTERFACE_ATTRIBUTE 830 a128 __tsan_atomic128_compare_exchange_val(volatile a128 *a, a128 c, a128 v, 831 morder mo, morder fmo) { 832 ATOMIC_IMPL(CAS, a, c, v, mo, fmo); 833 } 834 #endif 835 836 SANITIZER_INTERFACE_ATTRIBUTE 837 void __tsan_atomic_thread_fence(morder mo) { ATOMIC_IMPL(Fence, mo); } 838 839 SANITIZER_INTERFACE_ATTRIBUTE 840 void __tsan_atomic_signal_fence(morder mo) { 841 } 842 } // extern "C" 843 844 #else // #if !SANITIZER_GO 845 846 // Go 847 848 # define ATOMIC(func, ...) \ 849 if (thr->ignore_sync) { \ 850 NoTsanAtomic##func(__VA_ARGS__); \ 851 } else { \ 852 FuncEntry(thr, cpc); \ 853 Atomic##func(thr, pc, __VA_ARGS__); \ 854 FuncExit(thr); \ 855 } 856 857 # define ATOMIC_RET(func, ret, ...) \ 858 if (thr->ignore_sync) { \ 859 (ret) = NoTsanAtomic##func(__VA_ARGS__); \ 860 } else { \ 861 FuncEntry(thr, cpc); \ 862 (ret) = Atomic##func(thr, pc, __VA_ARGS__); \ 863 FuncExit(thr); \ 864 } 865 866 extern "C" { 867 SANITIZER_INTERFACE_ATTRIBUTE 868 void __tsan_go_atomic32_load(ThreadState *thr, uptr cpc, uptr pc, u8 *a) { 869 ATOMIC_RET(Load, *(a32*)(a+8), *(a32**)a, mo_acquire); 870 } 871 872 SANITIZER_INTERFACE_ATTRIBUTE 873 void __tsan_go_atomic64_load(ThreadState *thr, uptr cpc, uptr pc, u8 *a) { 874 ATOMIC_RET(Load, *(a64*)(a+8), *(a64**)a, mo_acquire); 875 } 876 877 SANITIZER_INTERFACE_ATTRIBUTE 878 void __tsan_go_atomic32_store(ThreadState *thr, uptr cpc, uptr pc, u8 *a) { 879 ATOMIC(Store, *(a32**)a, *(a32*)(a+8), mo_release); 880 } 881 882 SANITIZER_INTERFACE_ATTRIBUTE 883 void __tsan_go_atomic64_store(ThreadState *thr, uptr cpc, uptr pc, u8 *a) { 884 ATOMIC(Store, *(a64**)a, *(a64*)(a+8), mo_release); 885 } 886 887 SANITIZER_INTERFACE_ATTRIBUTE 888 void __tsan_go_atomic32_fetch_add(ThreadState *thr, uptr cpc, uptr pc, u8 *a) { 889 ATOMIC_RET(FetchAdd, *(a32*)(a+16), *(a32**)a, *(a32*)(a+8), mo_acq_rel); 890 } 891 892 SANITIZER_INTERFACE_ATTRIBUTE 893 void __tsan_go_atomic64_fetch_add(ThreadState *thr, uptr cpc, uptr pc, u8 *a) { 894 ATOMIC_RET(FetchAdd, *(a64*)(a+16), *(a64**)a, *(a64*)(a+8), mo_acq_rel); 895 } 896 897 SANITIZER_INTERFACE_ATTRIBUTE 898 void __tsan_go_atomic32_exchange(ThreadState *thr, uptr cpc, uptr pc, u8 *a) { 899 ATOMIC_RET(Exchange, *(a32*)(a+16), *(a32**)a, *(a32*)(a+8), mo_acq_rel); 900 } 901 902 SANITIZER_INTERFACE_ATTRIBUTE 903 void __tsan_go_atomic64_exchange(ThreadState *thr, uptr cpc, uptr pc, u8 *a) { 904 ATOMIC_RET(Exchange, *(a64*)(a+16), *(a64**)a, *(a64*)(a+8), mo_acq_rel); 905 } 906 907 SANITIZER_INTERFACE_ATTRIBUTE 908 void __tsan_go_atomic32_compare_exchange( 909 ThreadState *thr, uptr cpc, uptr pc, u8 *a) { 910 a32 cur = 0; 911 a32 cmp = *(a32*)(a+8); 912 ATOMIC_RET(CAS, cur, *(a32**)a, cmp, *(a32*)(a+12), mo_acq_rel, mo_acquire); 913 *(bool*)(a+16) = (cur == cmp); 914 } 915 916 SANITIZER_INTERFACE_ATTRIBUTE 917 void __tsan_go_atomic64_compare_exchange( 918 ThreadState *thr, uptr cpc, uptr pc, u8 *a) { 919 a64 cur = 0; 920 a64 cmp = *(a64*)(a+8); 921 ATOMIC_RET(CAS, cur, *(a64**)a, cmp, *(a64*)(a+16), mo_acq_rel, mo_acquire); 922 *(bool*)(a+24) = (cur == cmp); 923 } 924 } // extern "C" 925 #endif // #if !SANITIZER_GO 926