1 // Check code generation 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-pc-linux-gnu -fopenmp -fopenmp-version=51 -emit-llvm %s -o - | FileCheck %s --check-prefix=IR 3 4 // Check same results after serialization round-trip 5 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-pc-linux-gnu -fopenmp -fopenmp-version=51 -emit-pch -o %t %s 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-pc-linux-gnu -fopenmp -fopenmp-version=51 -include-pch %t -emit-llvm %s -o - | FileCheck %s --check-prefix=IR 7 // expected-no-diagnostics 8 9 #ifndef HEADER 10 #define HEADER 11 12 // placeholder for loop body code. 13 extern "C" void body(...) {} 14 15 16 // IR-LABEL: @func( 17 // IR-NEXT: [[ENTRY:.*]]: 18 // IR-NEXT: %[[START_ADDR:.+]] = alloca i32, align 4 19 // IR-NEXT: %[[END_ADDR:.+]] = alloca i32, align 4 20 // IR-NEXT: %[[STEP_ADDR:.+]] = alloca i32, align 4 21 // IR-NEXT: %[[DOTOMP_IV:.+]] = alloca i32, align 4 22 // IR-NEXT: %[[TMP:.+]] = alloca i32, align 4 23 // IR-NEXT: %[[I:.+]] = alloca i32, align 4 24 // IR-NEXT: %[[DOTCAPTURE_EXPR_:.+]] = alloca i32, align 4 25 // IR-NEXT: %[[DOTCAPTURE_EXPR_1:.+]] = alloca i32, align 4 26 // IR-NEXT: %[[DOTCAPTURE_EXPR_2:.+]] = alloca i32, align 4 27 // IR-NEXT: %[[DOTCAPTURE_EXPR_3:.+]] = alloca i32, align 4 28 // IR-NEXT: %[[DOTUNROLLED_IV_I:.+]] = alloca i32, align 4 29 // IR-NEXT: %[[DOTCAPTURE_EXPR_6:.+]] = alloca i32, align 4 30 // IR-NEXT: %[[DOTCAPTURE_EXPR_8:.+]] = alloca i32, align 4 31 // IR-NEXT: %[[DOTCAPTURE_EXPR_12:.+]] = alloca i32, align 4 32 // IR-NEXT: %[[DOTCAPTURE_EXPR_14:.+]] = alloca i32, align 4 33 // IR-NEXT: %[[DOTUNROLLED_IV__UNROLLED_IV_I:.+]] = alloca i32, align 4 34 // IR-NEXT: %[[DOTOMP_LB:.+]] = alloca i32, align 4 35 // IR-NEXT: %[[DOTOMP_UB:.+]] = alloca i32, align 4 36 // IR-NEXT: %[[DOTOMP_STRIDE:.+]] = alloca i32, align 4 37 // IR-NEXT: %[[DOTOMP_IS_LAST:.+]] = alloca i32, align 4 38 // IR-NEXT: %[[DOTUNROLLED_IV__UNROLLED_IV_I18:.+]] = alloca i32, align 4 39 // IR-NEXT: %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I:.+]] = alloca i32, align 4 40 // IR-NEXT: %[[DOTUNROLL_INNER_IV_I:.+]] = alloca i32, align 4 41 // IR-NEXT: %[[TMP0:.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @2) 42 // IR-NEXT: store i32 %[[START:.+]], i32* %[[START_ADDR]], align 4 43 // IR-NEXT: store i32 %[[END:.+]], i32* %[[END_ADDR]], align 4 44 // IR-NEXT: store i32 %[[STEP:.+]], i32* %[[STEP_ADDR]], align 4 45 // IR-NEXT: %[[TMP1:.+]] = load i32, i32* %[[START_ADDR]], align 4 46 // IR-NEXT: store i32 %[[TMP1]], i32* %[[I]], align 4 47 // IR-NEXT: %[[TMP2:.+]] = load i32, i32* %[[START_ADDR]], align 4 48 // IR-NEXT: store i32 %[[TMP2]], i32* %[[DOTCAPTURE_EXPR_]], align 4 49 // IR-NEXT: %[[TMP3:.+]] = load i32, i32* %[[END_ADDR]], align 4 50 // IR-NEXT: store i32 %[[TMP3]], i32* %[[DOTCAPTURE_EXPR_1]], align 4 51 // IR-NEXT: %[[TMP4:.+]] = load i32, i32* %[[STEP_ADDR]], align 4 52 // IR-NEXT: store i32 %[[TMP4]], i32* %[[DOTCAPTURE_EXPR_2]], align 4 53 // IR-NEXT: %[[TMP5:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_1]], align 4 54 // IR-NEXT: %[[TMP6:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_]], align 4 55 // IR-NEXT: %[[SUB:.+]] = sub i32 %[[TMP5]], %[[TMP6]] 56 // IR-NEXT: %[[SUB4:.+]] = sub i32 %[[SUB]], 1 57 // IR-NEXT: %[[TMP7:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_2]], align 4 58 // IR-NEXT: %[[ADD:.+]] = add i32 %[[SUB4]], %[[TMP7]] 59 // IR-NEXT: %[[TMP8:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_2]], align 4 60 // IR-NEXT: %[[DIV:.+]] = udiv i32 %[[ADD]], %[[TMP8]] 61 // IR-NEXT: %[[SUB5:.+]] = sub i32 %[[DIV]], 1 62 // IR-NEXT: store i32 %[[SUB5]], i32* %[[DOTCAPTURE_EXPR_3]], align 4 63 // IR-NEXT: store i32 0, i32* %[[DOTUNROLLED_IV_I]], align 4 64 // IR-NEXT: %[[TMP9:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_3]], align 4 65 // IR-NEXT: %[[ADD7:.+]] = add i32 %[[TMP9]], 1 66 // IR-NEXT: store i32 %[[ADD7]], i32* %[[DOTCAPTURE_EXPR_6]], align 4 67 // IR-NEXT: %[[TMP10:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_6]], align 4 68 // IR-NEXT: %[[SUB9:.+]] = sub i32 %[[TMP10]], -1 69 // IR-NEXT: %[[DIV10:.+]] = udiv i32 %[[SUB9]], 2 70 // IR-NEXT: %[[SUB11:.+]] = sub i32 %[[DIV10]], 1 71 // IR-NEXT: store i32 %[[SUB11]], i32* %[[DOTCAPTURE_EXPR_8]], align 4 72 // IR-NEXT: %[[TMP11:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_8]], align 4 73 // IR-NEXT: %[[ADD13:.+]] = add i32 %[[TMP11]], 1 74 // IR-NEXT: store i32 %[[ADD13]], i32* %[[DOTCAPTURE_EXPR_12]], align 4 75 // IR-NEXT: %[[TMP12:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_12]], align 4 76 // IR-NEXT: %[[SUB15:.+]] = sub i32 %[[TMP12]], -1 77 // IR-NEXT: %[[DIV16:.+]] = udiv i32 %[[SUB15]], 2 78 // IR-NEXT: %[[SUB17:.+]] = sub i32 %[[DIV16]], 1 79 // IR-NEXT: store i32 %[[SUB17]], i32* %[[DOTCAPTURE_EXPR_14]], align 4 80 // IR-NEXT: store i32 0, i32* %[[DOTUNROLLED_IV__UNROLLED_IV_I]], align 4 81 // IR-NEXT: %[[TMP13:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_12]], align 4 82 // IR-NEXT: %[[CMP:.+]] = icmp ult i32 0, %[[TMP13]] 83 // IR-NEXT: br i1 %[[CMP]], label %[[OMP_PRECOND_THEN:.+]], label %[[OMP_PRECOND_END:.+]] 84 // IR-EMPTY: 85 // IR-NEXT: [[OMP_PRECOND_THEN]]: 86 // IR-NEXT: store i32 0, i32* %[[DOTOMP_LB]], align 4 87 // IR-NEXT: %[[TMP14:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_14]], align 4 88 // IR-NEXT: store i32 %[[TMP14]], i32* %[[DOTOMP_UB]], align 4 89 // IR-NEXT: store i32 1, i32* %[[DOTOMP_STRIDE]], align 4 90 // IR-NEXT: store i32 0, i32* %[[DOTOMP_IS_LAST]], align 4 91 // IR-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @1, i32 %[[TMP0]], i32 34, i32* %[[DOTOMP_IS_LAST]], i32* %[[DOTOMP_LB]], i32* %[[DOTOMP_UB]], i32* %[[DOTOMP_STRIDE]], i32 1, i32 1) 92 // IR-NEXT: %[[TMP15:.+]] = load i32, i32* %[[DOTOMP_UB]], align 4 93 // IR-NEXT: %[[TMP16:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_14]], align 4 94 // IR-NEXT: %[[CMP19:.+]] = icmp ugt i32 %[[TMP15]], %[[TMP16]] 95 // IR-NEXT: br i1 %[[CMP19]], label %[[COND_TRUE:.+]], label %[[COND_FALSE:.+]] 96 // IR-EMPTY: 97 // IR-NEXT: [[COND_TRUE]]: 98 // IR-NEXT: %[[TMP17:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_14]], align 4 99 // IR-NEXT: br label %[[COND_END:.+]] 100 // IR-EMPTY: 101 // IR-NEXT: [[COND_FALSE]]: 102 // IR-NEXT: %[[TMP18:.+]] = load i32, i32* %[[DOTOMP_UB]], align 4 103 // IR-NEXT: br label %[[COND_END]] 104 // IR-EMPTY: 105 // IR-NEXT: [[COND_END]]: 106 // IR-NEXT: %[[COND:.+]] = phi i32 [ %[[TMP17]], %[[COND_TRUE]] ], [ %[[TMP18]], %[[COND_FALSE]] ] 107 // IR-NEXT: store i32 %[[COND]], i32* %[[DOTOMP_UB]], align 4 108 // IR-NEXT: %[[TMP19:.+]] = load i32, i32* %[[DOTOMP_LB]], align 4 109 // IR-NEXT: store i32 %[[TMP19]], i32* %[[DOTOMP_IV]], align 4 110 // IR-NEXT: br label %[[OMP_INNER_FOR_COND:.+]] 111 // IR-EMPTY: 112 // IR-NEXT: [[OMP_INNER_FOR_COND]]: 113 // IR-NEXT: %[[TMP20:.+]] = load i32, i32* %[[DOTOMP_IV]], align 4 114 // IR-NEXT: %[[TMP21:.+]] = load i32, i32* %[[DOTOMP_UB]], align 4 115 // IR-NEXT: %[[ADD20:.+]] = add i32 %[[TMP21]], 1 116 // IR-NEXT: %[[CMP21:.+]] = icmp ult i32 %[[TMP20]], %[[ADD20]] 117 // IR-NEXT: br i1 %[[CMP21]], label %[[OMP_INNER_FOR_BODY:.+]], label %[[OMP_INNER_FOR_END:.+]] 118 // IR-EMPTY: 119 // IR-NEXT: [[OMP_INNER_FOR_BODY]]: 120 // IR-NEXT: %[[TMP22:.+]] = load i32, i32* %[[DOTOMP_IV]], align 4 121 // IR-NEXT: %[[MUL:.+]] = mul i32 %[[TMP22]], 2 122 // IR-NEXT: %[[ADD22:.+]] = add i32 0, %[[MUL]] 123 // IR-NEXT: store i32 %[[ADD22]], i32* %[[DOTUNROLLED_IV__UNROLLED_IV_I18]], align 4 124 // IR-NEXT: %[[TMP23:.+]] = load i32, i32* %[[DOTUNROLLED_IV__UNROLLED_IV_I18]], align 4 125 // IR-NEXT: store i32 %[[TMP23]], i32* %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4 126 // IR-NEXT: br label %[[FOR_COND:.+]] 127 // IR-EMPTY: 128 // IR-NEXT: [[FOR_COND]]: 129 // IR-NEXT: %[[TMP24:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4 130 // IR-NEXT: %[[TMP25:.+]] = load i32, i32* %[[DOTUNROLLED_IV__UNROLLED_IV_I18]], align 4 131 // IR-NEXT: %[[ADD23:.+]] = add i32 %[[TMP25]], 2 132 // IR-NEXT: %[[CMP24:.+]] = icmp ult i32 %[[TMP24]], %[[ADD23]] 133 // IR-NEXT: br i1 %[[CMP24]], label %[[LAND_RHS:.+]], label %[[LAND_END:.+]] 134 // IR-EMPTY: 135 // IR-NEXT: [[LAND_RHS]]: 136 // IR-NEXT: %[[TMP26:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4 137 // IR-NEXT: %[[TMP27:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_8]], align 4 138 // IR-NEXT: %[[ADD25:.+]] = add i32 %[[TMP27]], 1 139 // IR-NEXT: %[[CMP26:.+]] = icmp ult i32 %[[TMP26]], %[[ADD25]] 140 // IR-NEXT: br label %[[LAND_END]] 141 // IR-EMPTY: 142 // IR-NEXT: [[LAND_END]]: 143 // IR-NEXT: %[[TMP28:.+]] = phi i1 [ false, %[[FOR_COND]] ], [ %[[CMP26]], %[[LAND_RHS]] ] 144 // IR-NEXT: br i1 %[[TMP28]], label %[[FOR_BODY:.+]], label %[[FOR_END41:.+]] 145 // IR-EMPTY: 146 // IR-NEXT: [[FOR_BODY]]: 147 // IR-NEXT: %[[TMP29:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4 148 // IR-NEXT: %[[MUL27:.+]] = mul i32 %[[TMP29]], 2 149 // IR-NEXT: %[[ADD28:.+]] = add i32 0, %[[MUL27]] 150 // IR-NEXT: store i32 %[[ADD28]], i32* %[[DOTUNROLLED_IV_I]], align 4 151 // IR-NEXT: %[[TMP30:.+]] = load i32, i32* %[[DOTUNROLLED_IV_I]], align 4 152 // IR-NEXT: store i32 %[[TMP30]], i32* %[[DOTUNROLL_INNER_IV_I]], align 4 153 // IR-NEXT: br label %[[FOR_COND29:.+]] 154 // IR-EMPTY: 155 // IR-NEXT: [[FOR_COND29]]: 156 // IR-NEXT: %[[TMP31:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV_I]], align 4 157 // IR-NEXT: %[[TMP32:.+]] = load i32, i32* %[[DOTUNROLLED_IV_I]], align 4 158 // IR-NEXT: %[[ADD30:.+]] = add i32 %[[TMP32]], 2 159 // IR-NEXT: %[[CMP31:.+]] = icmp ult i32 %[[TMP31]], %[[ADD30]] 160 // IR-NEXT: br i1 %[[CMP31]], label %[[LAND_RHS32:.+]], label %[[LAND_END35:.+]] 161 // IR-EMPTY: 162 // IR-NEXT: [[LAND_RHS32]]: 163 // IR-NEXT: %[[TMP33:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV_I]], align 4 164 // IR-NEXT: %[[TMP34:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_3]], align 4 165 // IR-NEXT: %[[ADD33:.+]] = add i32 %[[TMP34]], 1 166 // IR-NEXT: %[[CMP34:.+]] = icmp ult i32 %[[TMP33]], %[[ADD33]] 167 // IR-NEXT: br label %[[LAND_END35]] 168 // IR-EMPTY: 169 // IR-NEXT: [[LAND_END35]]: 170 // IR-NEXT: %[[TMP35:.+]] = phi i1 [ false, %[[FOR_COND29]] ], [ %[[CMP34]], %[[LAND_RHS32]] ] 171 // IR-NEXT: br i1 %[[TMP35]], label %[[FOR_BODY36:.+]], label %[[FOR_END:.+]] 172 // IR-EMPTY: 173 // IR-NEXT: [[FOR_BODY36]]: 174 // IR-NEXT: %[[TMP36:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_]], align 4 175 // IR-NEXT: %[[TMP37:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV_I]], align 4 176 // IR-NEXT: %[[TMP38:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_2]], align 4 177 // IR-NEXT: %[[MUL37:.+]] = mul i32 %[[TMP37]], %[[TMP38]] 178 // IR-NEXT: %[[ADD38:.+]] = add i32 %[[TMP36]], %[[MUL37]] 179 // IR-NEXT: store i32 %[[ADD38]], i32* %[[I]], align 4 180 // IR-NEXT: %[[TMP39:.+]] = load i32, i32* %[[START_ADDR]], align 4 181 // IR-NEXT: %[[TMP40:.+]] = load i32, i32* %[[END_ADDR]], align 4 182 // IR-NEXT: %[[TMP41:.+]] = load i32, i32* %[[STEP_ADDR]], align 4 183 // IR-NEXT: %[[TMP42:.+]] = load i32, i32* %[[I]], align 4 184 // IR-NEXT: call void (...) @body(i32 noundef %[[TMP39]], i32 noundef %[[TMP40]], i32 noundef %[[TMP41]], i32 noundef %[[TMP42]]) 185 // IR-NEXT: br label %[[FOR_INC:.+]] 186 // IR-EMPTY: 187 // IR-NEXT: [[FOR_INC]]: 188 // IR-NEXT: %[[TMP43:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV_I]], align 4 189 // IR-NEXT: %[[INC:.+]] = add i32 %[[TMP43]], 1 190 // IR-NEXT: store i32 %[[INC]], i32* %[[DOTUNROLL_INNER_IV_I]], align 4 191 // IR-NEXT: br label %[[FOR_COND29]], !llvm.loop ![[LOOP2:[0-9]+]] 192 // IR-EMPTY: 193 // IR-NEXT: [[FOR_END]]: 194 // IR-NEXT: br label %[[FOR_INC39:.+]] 195 // IR-EMPTY: 196 // IR-NEXT: [[FOR_INC39]]: 197 // IR-NEXT: %[[TMP44:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4 198 // IR-NEXT: %[[INC40:.+]] = add i32 %[[TMP44]], 1 199 // IR-NEXT: store i32 %[[INC40]], i32* %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4 200 // IR-NEXT: br label %[[FOR_COND]], !llvm.loop ![[LOOP5:[0-9]+]] 201 // IR-EMPTY: 202 // IR-NEXT: [[FOR_END41]]: 203 // IR-NEXT: br label %[[OMP_BODY_CONTINUE:.+]] 204 // IR-EMPTY: 205 // IR-NEXT: [[OMP_BODY_CONTINUE]]: 206 // IR-NEXT: br label %[[OMP_INNER_FOR_INC:.+]] 207 // IR-EMPTY: 208 // IR-NEXT: [[OMP_INNER_FOR_INC]]: 209 // IR-NEXT: %[[TMP45:.+]] = load i32, i32* %[[DOTOMP_IV]], align 4 210 // IR-NEXT: %[[ADD42:.+]] = add i32 %[[TMP45]], 1 211 // IR-NEXT: store i32 %[[ADD42]], i32* %[[DOTOMP_IV]], align 4 212 // IR-NEXT: br label %[[OMP_INNER_FOR_COND]] 213 // IR-EMPTY: 214 // IR-NEXT: [[OMP_INNER_FOR_END]]: 215 // IR-NEXT: br label %[[OMP_LOOP_EXIT:.+]] 216 // IR-EMPTY: 217 // IR-NEXT: [[OMP_LOOP_EXIT]]: 218 // IR-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @1, i32 %[[TMP0]]) 219 // IR-NEXT: br label %[[OMP_PRECOND_END]] 220 // IR-EMPTY: 221 // IR-NEXT: [[OMP_PRECOND_END]]: 222 // IR-NEXT: call void @__kmpc_barrier(%struct.ident_t* @3, i32 %[[TMP0]]) 223 // IR-NEXT: ret void 224 // IR-NEXT: } 225 extern "C" void func(int start, int end, int step) { 226 #pragma omp for 227 #pragma omp unroll partial 228 #pragma omp unroll partial 229 for (int i = start; i < end; i+=step) 230 body(start, end, step, i); 231 } 232 233 #endif /* HEADER */ 234 235 236 // IR: ![[LOOP2]] = distinct !{![[LOOP2]], ![[LOOPPROP3:[0-9]+]], ![[LOOPPROP4:[0-9]+]]} 237 // IR: ![[LOOPPROP3]] = !{!"llvm.loop.mustprogress"} 238 // IR: ![[LOOPPROP4]] = !{!"llvm.loop.unroll.count", i32 2} 239 // IR: ![[LOOP5]] = distinct !{![[LOOP5]], ![[LOOPPROP3]], ![[LOOPPROP4]]} 240