1 // Check code generation 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-pc-linux-gnu -fopenmp -fopenmp-version=51 -emit-llvm %s -o - | FileCheck %s --check-prefix=IR 3 4 // Check same results after serialization round-trip 5 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-pc-linux-gnu -fopenmp -fopenmp-version=51 -emit-pch -o %t %s 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-pc-linux-gnu -fopenmp -fopenmp-version=51 -include-pch %t -emit-llvm %s -o - | FileCheck %s --check-prefix=IR 7 // expected-no-diagnostics 8 9 // Account for multiple transformations of a loop before consumed by 10 // #pragma omp for. 11 12 #ifndef HEADER 13 #define HEADER 14 15 // placeholder for loop body code. 16 extern "C" void body(...) {} 17 18 19 // IR-LABEL: @func( 20 // IR-NEXT: [[ENTRY:.*]]: 21 // IR-NEXT: %[[START_ADDR:.+]] = alloca i32, align 4 22 // IR-NEXT: %[[END_ADDR:.+]] = alloca i32, align 4 23 // IR-NEXT: %[[STEP_ADDR:.+]] = alloca i32, align 4 24 // IR-NEXT: %[[DOTOMP_IV:.+]] = alloca i32, align 4 25 // IR-NEXT: %[[TMP:.+]] = alloca i32, align 4 26 // IR-NEXT: %[[I:.+]] = alloca i32, align 4 27 // IR-NEXT: %[[DOTCAPTURE_EXPR_:.+]] = alloca i32, align 4 28 // IR-NEXT: %[[DOTCAPTURE_EXPR_1:.+]] = alloca i32, align 4 29 // IR-NEXT: %[[DOTCAPTURE_EXPR_2:.+]] = alloca i32, align 4 30 // IR-NEXT: %[[DOTCAPTURE_EXPR_3:.+]] = alloca i32, align 4 31 // IR-NEXT: %[[DOTFLOOR_0_IV_I:.+]] = alloca i32, align 4 32 // IR-NEXT: %[[DOTCAPTURE_EXPR_6:.+]] = alloca i32, align 4 33 // IR-NEXT: %[[DOTCAPTURE_EXPR_8:.+]] = alloca i32, align 4 34 // IR-NEXT: %[[DOTCAPTURE_EXPR_12:.+]] = alloca i32, align 4 35 // IR-NEXT: %[[DOTCAPTURE_EXPR_14:.+]] = alloca i32, align 4 36 // IR-NEXT: %[[DOTFLOOR_0_IV__FLOOR_0_IV_I:.+]] = alloca i32, align 4 37 // IR-NEXT: %[[DOTOMP_LB:.+]] = alloca i32, align 4 38 // IR-NEXT: %[[DOTOMP_UB:.+]] = alloca i32, align 4 39 // IR-NEXT: %[[DOTOMP_STRIDE:.+]] = alloca i32, align 4 40 // IR-NEXT: %[[DOTOMP_IS_LAST:.+]] = alloca i32, align 4 41 // IR-NEXT: %[[DOTFLOOR_0_IV__FLOOR_0_IV_I18:.+]] = alloca i32, align 4 42 // IR-NEXT: %[[DOTTILE_0_IV__FLOOR_0_IV_I:.+]] = alloca i32, align 4 43 // IR-NEXT: %[[DOTTILE_0_IV_I:.+]] = alloca i32, align 4 44 // IR-NEXT: %[[TMP0:.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @2) 45 // IR-NEXT: store i32 %[[START:.+]], i32* %[[START_ADDR]], align 4 46 // IR-NEXT: store i32 %[[END:.+]], i32* %[[END_ADDR]], align 4 47 // IR-NEXT: store i32 %[[STEP:.+]], i32* %[[STEP_ADDR]], align 4 48 // IR-NEXT: %[[TMP1:.+]] = load i32, i32* %[[START_ADDR]], align 4 49 // IR-NEXT: store i32 %[[TMP1]], i32* %[[I]], align 4 50 // IR-NEXT: %[[TMP2:.+]] = load i32, i32* %[[START_ADDR]], align 4 51 // IR-NEXT: store i32 %[[TMP2]], i32* %[[DOTCAPTURE_EXPR_]], align 4 52 // IR-NEXT: %[[TMP3:.+]] = load i32, i32* %[[END_ADDR]], align 4 53 // IR-NEXT: store i32 %[[TMP3]], i32* %[[DOTCAPTURE_EXPR_1]], align 4 54 // IR-NEXT: %[[TMP4:.+]] = load i32, i32* %[[STEP_ADDR]], align 4 55 // IR-NEXT: store i32 %[[TMP4]], i32* %[[DOTCAPTURE_EXPR_2]], align 4 56 // IR-NEXT: %[[TMP5:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_1]], align 4 57 // IR-NEXT: %[[TMP6:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_]], align 4 58 // IR-NEXT: %[[SUB:.+]] = sub i32 %[[TMP5]], %[[TMP6]] 59 // IR-NEXT: %[[SUB4:.+]] = sub i32 %[[SUB]], 1 60 // IR-NEXT: %[[TMP7:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_2]], align 4 61 // IR-NEXT: %[[ADD:.+]] = add i32 %[[SUB4]], %[[TMP7]] 62 // IR-NEXT: %[[TMP8:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_2]], align 4 63 // IR-NEXT: %[[DIV:.+]] = udiv i32 %[[ADD]], %[[TMP8]] 64 // IR-NEXT: %[[SUB5:.+]] = sub i32 %[[DIV]], 1 65 // IR-NEXT: store i32 %[[SUB5]], i32* %[[DOTCAPTURE_EXPR_3]], align 4 66 // IR-NEXT: store i32 0, i32* %[[DOTFLOOR_0_IV_I]], align 4 67 // IR-NEXT: %[[TMP9:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_3]], align 4 68 // IR-NEXT: %[[ADD7:.+]] = add i32 %[[TMP9]], 1 69 // IR-NEXT: store i32 %[[ADD7]], i32* %[[DOTCAPTURE_EXPR_6]], align 4 70 // IR-NEXT: %[[TMP10:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_6]], align 4 71 // IR-NEXT: %[[SUB9:.+]] = sub i32 %[[TMP10]], -3 72 // IR-NEXT: %[[DIV10:.+]] = udiv i32 %[[SUB9]], 4 73 // IR-NEXT: %[[SUB11:.+]] = sub i32 %[[DIV10]], 1 74 // IR-NEXT: store i32 %[[SUB11]], i32* %[[DOTCAPTURE_EXPR_8]], align 4 75 // IR-NEXT: %[[TMP11:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_8]], align 4 76 // IR-NEXT: %[[ADD13:.+]] = add i32 %[[TMP11]], 1 77 // IR-NEXT: store i32 %[[ADD13]], i32* %[[DOTCAPTURE_EXPR_12]], align 4 78 // IR-NEXT: %[[TMP12:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_12]], align 4 79 // IR-NEXT: %[[SUB15:.+]] = sub i32 %[[TMP12]], -2 80 // IR-NEXT: %[[DIV16:.+]] = udiv i32 %[[SUB15]], 3 81 // IR-NEXT: %[[SUB17:.+]] = sub i32 %[[DIV16]], 1 82 // IR-NEXT: store i32 %[[SUB17]], i32* %[[DOTCAPTURE_EXPR_14]], align 4 83 // IR-NEXT: store i32 0, i32* %[[DOTFLOOR_0_IV__FLOOR_0_IV_I]], align 4 84 // IR-NEXT: %[[TMP13:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_12]], align 4 85 // IR-NEXT: %[[CMP:.+]] = icmp ult i32 0, %[[TMP13]] 86 // IR-NEXT: br i1 %[[CMP]], label %[[OMP_PRECOND_THEN:.+]], label %[[OMP_PRECOND_END:.+]] 87 // IR-EMPTY: 88 // IR-NEXT: [[OMP_PRECOND_THEN]]: 89 // IR-NEXT: store i32 0, i32* %[[DOTOMP_LB]], align 4 90 // IR-NEXT: %[[TMP14:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_14]], align 4 91 // IR-NEXT: store i32 %[[TMP14]], i32* %[[DOTOMP_UB]], align 4 92 // IR-NEXT: store i32 1, i32* %[[DOTOMP_STRIDE]], align 4 93 // IR-NEXT: store i32 0, i32* %[[DOTOMP_IS_LAST]], align 4 94 // IR-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @1, i32 %[[TMP0]], i32 34, i32* %[[DOTOMP_IS_LAST]], i32* %[[DOTOMP_LB]], i32* %[[DOTOMP_UB]], i32* %[[DOTOMP_STRIDE]], i32 1, i32 1) 95 // IR-NEXT: %[[TMP15:.+]] = load i32, i32* %[[DOTOMP_UB]], align 4 96 // IR-NEXT: %[[TMP16:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_14]], align 4 97 // IR-NEXT: %[[CMP19:.+]] = icmp ugt i32 %[[TMP15]], %[[TMP16]] 98 // IR-NEXT: br i1 %[[CMP19]], label %[[COND_TRUE:.+]], label %[[COND_FALSE:.+]] 99 // IR-EMPTY: 100 // IR-NEXT: [[COND_TRUE]]: 101 // IR-NEXT: %[[TMP17:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_14]], align 4 102 // IR-NEXT: br label %[[COND_END:.+]] 103 // IR-EMPTY: 104 // IR-NEXT: [[COND_FALSE]]: 105 // IR-NEXT: %[[TMP18:.+]] = load i32, i32* %[[DOTOMP_UB]], align 4 106 // IR-NEXT: br label %[[COND_END]] 107 // IR-EMPTY: 108 // IR-NEXT: [[COND_END]]: 109 // IR-NEXT: %[[COND:.+]] = phi i32 [ %[[TMP17]], %[[COND_TRUE]] ], [ %[[TMP18]], %[[COND_FALSE]] ] 110 // IR-NEXT: store i32 %[[COND]], i32* %[[DOTOMP_UB]], align 4 111 // IR-NEXT: %[[TMP19:.+]] = load i32, i32* %[[DOTOMP_LB]], align 4 112 // IR-NEXT: store i32 %[[TMP19]], i32* %[[DOTOMP_IV]], align 4 113 // IR-NEXT: br label %[[OMP_INNER_FOR_COND:.+]] 114 // IR-EMPTY: 115 // IR-NEXT: [[OMP_INNER_FOR_COND]]: 116 // IR-NEXT: %[[TMP20:.+]] = load i32, i32* %[[DOTOMP_IV]], align 4 117 // IR-NEXT: %[[TMP21:.+]] = load i32, i32* %[[DOTOMP_UB]], align 4 118 // IR-NEXT: %[[ADD20:.+]] = add i32 %[[TMP21]], 1 119 // IR-NEXT: %[[CMP21:.+]] = icmp ult i32 %[[TMP20]], %[[ADD20]] 120 // IR-NEXT: br i1 %[[CMP21]], label %[[OMP_INNER_FOR_BODY:.+]], label %[[OMP_INNER_FOR_END:.+]] 121 // IR-EMPTY: 122 // IR-NEXT: [[OMP_INNER_FOR_BODY]]: 123 // IR-NEXT: %[[TMP22:.+]] = load i32, i32* %[[DOTOMP_IV]], align 4 124 // IR-NEXT: %[[MUL:.+]] = mul i32 %[[TMP22]], 3 125 // IR-NEXT: %[[ADD22:.+]] = add i32 0, %[[MUL]] 126 // IR-NEXT: store i32 %[[ADD22]], i32* %[[DOTFLOOR_0_IV__FLOOR_0_IV_I18]], align 4 127 // IR-NEXT: %[[TMP23:.+]] = load i32, i32* %[[DOTFLOOR_0_IV__FLOOR_0_IV_I18]], align 4 128 // IR-NEXT: store i32 %[[TMP23]], i32* %[[DOTTILE_0_IV__FLOOR_0_IV_I]], align 4 129 // IR-NEXT: br label %[[FOR_COND:.+]] 130 // IR-EMPTY: 131 // IR-NEXT: [[FOR_COND]]: 132 // IR-NEXT: %[[TMP24:.+]] = load i32, i32* %[[DOTTILE_0_IV__FLOOR_0_IV_I]], align 4 133 // IR-NEXT: %[[TMP25:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_8]], align 4 134 // IR-NEXT: %[[ADD23:.+]] = add i32 %[[TMP25]], 1 135 // IR-NEXT: %[[TMP26:.+]] = load i32, i32* %[[DOTFLOOR_0_IV__FLOOR_0_IV_I18]], align 4 136 // IR-NEXT: %[[ADD24:.+]] = add i32 %[[TMP26]], 3 137 // IR-NEXT: %[[CMP25:.+]] = icmp ult i32 %[[ADD23]], %[[ADD24]] 138 // IR-NEXT: br i1 %[[CMP25]], label %[[COND_TRUE26:.+]], label %[[COND_FALSE28:.+]] 139 // IR-EMPTY: 140 // IR-NEXT: [[COND_TRUE26]]: 141 // IR-NEXT: %[[TMP27:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_8]], align 4 142 // IR-NEXT: %[[ADD27:.+]] = add i32 %[[TMP27]], 1 143 // IR-NEXT: br label %[[COND_END30:.+]] 144 // IR-EMPTY: 145 // IR-NEXT: [[COND_FALSE28]]: 146 // IR-NEXT: %[[TMP28:.+]] = load i32, i32* %[[DOTFLOOR_0_IV__FLOOR_0_IV_I18]], align 4 147 // IR-NEXT: %[[ADD29:.+]] = add i32 %[[TMP28]], 3 148 // IR-NEXT: br label %[[COND_END30]] 149 // IR-EMPTY: 150 // IR-NEXT: [[COND_END30]]: 151 // IR-NEXT: %[[COND31:.+]] = phi i32 [ %[[ADD27]], %[[COND_TRUE26]] ], [ %[[ADD29]], %[[COND_FALSE28]] ] 152 // IR-NEXT: %[[CMP32:.+]] = icmp ult i32 %[[TMP24]], %[[COND31]] 153 // IR-NEXT: br i1 %[[CMP32]], label %[[FOR_BODY:.+]], label %[[FOR_END51:.+]] 154 // IR-EMPTY: 155 // IR-NEXT: [[FOR_BODY]]: 156 // IR-NEXT: %[[TMP29:.+]] = load i32, i32* %[[DOTTILE_0_IV__FLOOR_0_IV_I]], align 4 157 // IR-NEXT: %[[MUL33:.+]] = mul i32 %[[TMP29]], 4 158 // IR-NEXT: %[[ADD34:.+]] = add i32 0, %[[MUL33]] 159 // IR-NEXT: store i32 %[[ADD34]], i32* %[[DOTFLOOR_0_IV_I]], align 4 160 // IR-NEXT: %[[TMP30:.+]] = load i32, i32* %[[DOTFLOOR_0_IV_I]], align 4 161 // IR-NEXT: store i32 %[[TMP30]], i32* %[[DOTTILE_0_IV_I]], align 4 162 // IR-NEXT: br label %[[FOR_COND35:.+]] 163 // IR-EMPTY: 164 // IR-NEXT: [[FOR_COND35]]: 165 // IR-NEXT: %[[TMP31:.+]] = load i32, i32* %[[DOTTILE_0_IV_I]], align 4 166 // IR-NEXT: %[[TMP32:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_3]], align 4 167 // IR-NEXT: %[[ADD36:.+]] = add i32 %[[TMP32]], 1 168 // IR-NEXT: %[[TMP33:.+]] = load i32, i32* %[[DOTFLOOR_0_IV_I]], align 4 169 // IR-NEXT: %[[ADD37:.+]] = add nsw i32 %[[TMP33]], 4 170 // IR-NEXT: %[[CMP38:.+]] = icmp ult i32 %[[ADD36]], %[[ADD37]] 171 // IR-NEXT: br i1 %[[CMP38]], label %[[COND_TRUE39:.+]], label %[[COND_FALSE41:.+]] 172 // IR-EMPTY: 173 // IR-NEXT: [[COND_TRUE39]]: 174 // IR-NEXT: %[[TMP34:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_3]], align 4 175 // IR-NEXT: %[[ADD40:.+]] = add i32 %[[TMP34]], 1 176 // IR-NEXT: br label %[[COND_END43:.+]] 177 // IR-EMPTY: 178 // IR-NEXT: [[COND_FALSE41]]: 179 // IR-NEXT: %[[TMP35:.+]] = load i32, i32* %[[DOTFLOOR_0_IV_I]], align 4 180 // IR-NEXT: %[[ADD42:.+]] = add nsw i32 %[[TMP35]], 4 181 // IR-NEXT: br label %[[COND_END43]] 182 // IR-EMPTY: 183 // IR-NEXT: [[COND_END43]]: 184 // IR-NEXT: %[[COND44:.+]] = phi i32 [ %[[ADD40]], %[[COND_TRUE39]] ], [ %[[ADD42]], %[[COND_FALSE41]] ] 185 // IR-NEXT: %[[CMP45:.+]] = icmp ult i32 %[[TMP31]], %[[COND44]] 186 // IR-NEXT: br i1 %[[CMP45]], label %[[FOR_BODY46:.+]], label %[[FOR_END:.+]] 187 // IR-EMPTY: 188 // IR-NEXT: [[FOR_BODY46]]: 189 // IR-NEXT: %[[TMP36:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_]], align 4 190 // IR-NEXT: %[[TMP37:.+]] = load i32, i32* %[[DOTTILE_0_IV_I]], align 4 191 // IR-NEXT: %[[TMP38:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_2]], align 4 192 // IR-NEXT: %[[MUL47:.+]] = mul i32 %[[TMP37]], %[[TMP38]] 193 // IR-NEXT: %[[ADD48:.+]] = add i32 %[[TMP36]], %[[MUL47]] 194 // IR-NEXT: store i32 %[[ADD48]], i32* %[[I]], align 4 195 // IR-NEXT: %[[TMP39:.+]] = load i32, i32* %[[START_ADDR]], align 4 196 // IR-NEXT: %[[TMP40:.+]] = load i32, i32* %[[END_ADDR]], align 4 197 // IR-NEXT: %[[TMP41:.+]] = load i32, i32* %[[STEP_ADDR]], align 4 198 // IR-NEXT: %[[TMP42:.+]] = load i32, i32* %[[I]], align 4 199 // IR-NEXT: call void (...) @body(i32 noundef %[[TMP39]], i32 noundef %[[TMP40]], i32 noundef %[[TMP41]], i32 noundef %[[TMP42]]) 200 // IR-NEXT: br label %[[FOR_INC:.+]] 201 // IR-EMPTY: 202 // IR-NEXT: [[FOR_INC]]: 203 // IR-NEXT: %[[TMP43:.+]] = load i32, i32* %[[DOTTILE_0_IV_I]], align 4 204 // IR-NEXT: %[[INC:.+]] = add nsw i32 %[[TMP43]], 1 205 // IR-NEXT: store i32 %[[INC]], i32* %[[DOTTILE_0_IV_I]], align 4 206 // IR-NEXT: br label %[[FOR_COND35]], !llvm.loop ![[LOOP2:[0-9]+]] 207 // IR-EMPTY: 208 // IR-NEXT: [[FOR_END]]: 209 // IR-NEXT: br label %[[FOR_INC49:.+]] 210 // IR-EMPTY: 211 // IR-NEXT: [[FOR_INC49]]: 212 // IR-NEXT: %[[TMP44:.+]] = load i32, i32* %[[DOTTILE_0_IV__FLOOR_0_IV_I]], align 4 213 // IR-NEXT: %[[INC50:.+]] = add i32 %[[TMP44]], 1 214 // IR-NEXT: store i32 %[[INC50]], i32* %[[DOTTILE_0_IV__FLOOR_0_IV_I]], align 4 215 // IR-NEXT: br label %[[FOR_COND]], !llvm.loop ![[LOOP4:[0-9]+]] 216 // IR-EMPTY: 217 // IR-NEXT: [[FOR_END51]]: 218 // IR-NEXT: br label %[[OMP_BODY_CONTINUE:.+]] 219 // IR-EMPTY: 220 // IR-NEXT: [[OMP_BODY_CONTINUE]]: 221 // IR-NEXT: br label %[[OMP_INNER_FOR_INC:.+]] 222 // IR-EMPTY: 223 // IR-NEXT: [[OMP_INNER_FOR_INC]]: 224 // IR-NEXT: %[[TMP45:.+]] = load i32, i32* %[[DOTOMP_IV]], align 4 225 // IR-NEXT: %[[ADD52:.+]] = add i32 %[[TMP45]], 1 226 // IR-NEXT: store i32 %[[ADD52]], i32* %[[DOTOMP_IV]], align 4 227 // IR-NEXT: br label %[[OMP_INNER_FOR_COND]] 228 // IR-EMPTY: 229 // IR-NEXT: [[OMP_INNER_FOR_END]]: 230 // IR-NEXT: br label %[[OMP_LOOP_EXIT:.+]] 231 // IR-EMPTY: 232 // IR-NEXT: [[OMP_LOOP_EXIT]]: 233 // IR-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @1, i32 %[[TMP0]]) 234 // IR-NEXT: br label %[[OMP_PRECOND_END]] 235 // IR-EMPTY: 236 // IR-NEXT: [[OMP_PRECOND_END]]: 237 // IR-NEXT: call void @__kmpc_barrier(%struct.ident_t* @3, i32 %[[TMP0]]) 238 // IR-NEXT: ret void 239 // IR-NEXT: } 240 extern "C" void func(int start, int end, int step) { 241 #pragma omp for 242 #pragma omp tile sizes(3) 243 #pragma omp tile sizes(4) 244 for (int i = start; i < end; i += step) 245 body(start, end, step, i); 246 } 247 248 #endif /* HEADER */ 249 // IR: ![[META0:[0-9]+]] = !{i32 1, !"wchar_size", i32 4} 250 // IR: ![[META1:[0-9]+]] = !{!"{{[^"]*}}"} 251 // IR: ![[LOOP2]] = distinct !{![[LOOP2]], ![[LOOPPROP3:[0-9]+]]} 252 // IR: ![[LOOPPROP3]] = !{!"llvm.loop.mustprogress"} 253 // IR: ![[LOOP4]] = distinct !{![[LOOP4]], ![[LOOPPROP3]]} 254