1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -fnoopenmp-use-tls -DBODY -triple x86_64-unknown-unknown -x c++ -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefixes=CHECK1 3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fnoopenmp-use-tls -DBODY -triple x86_64-unknown-unknown -x c++ -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefixes=CHECK2 4 5 // RUN: %clang_cc1 -verify -fopenmp-simd -fnoopenmp-use-tls -DBODY -triple x86_64-unknown-unknown -x c++ -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD1 %s 6 // RUN: %clang_cc1 -fopenmp-simd -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 7 // RUN: %clang_cc1 -fopenmp-simd -fnoopenmp-use-tls -DBODY -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD2 %s 8 // RUN: %clang_cc1 -verify -fopenmp -DBODY -triple x86_64-unknown-unknown -x c++ -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefixes=CHECK-TLS1 9 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -DBODY -triple x86_64-unknown-unknown -x c++ -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefixes=CHECK-TLS2 10 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 11 // RUN: %clang_cc1 -fopenmp -DBODY -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefixes=CHECK-TLS3 %s 12 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 13 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -DBODY -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefixes=CHECK-TLS4 %s 14 15 // RUN: %clang_cc1 -verify -fopenmp-simd -DBODY -triple x86_64-unknown-unknown -x c++ -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD3 %s 16 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 17 // RUN: %clang_cc1 -fopenmp-simd -DBODY -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD4 %s 18 19 // RUN: %clang_cc1 -fopenmp -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 20 // RUN: %clang_cc1 -fopenmp -fnoopenmp-use-tls -DBODY -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefixes=DEBUG1 %s 21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 22 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fnoopenmp-use-tls -DBODY -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefixes=DEBUG2 %s 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 struct S1 { 28 int a; 29 S1() 30 : a(0) { 31 } 32 S1(int a) 33 : a(a) { 34 } 35 S1(const S1 &s) { 36 a = 12 + s.a; 37 } 38 ~S1() { 39 a = 0; 40 } 41 }; 42 43 struct S2 { 44 int a; 45 double b; 46 S2() 47 : a(0) { 48 } 49 S2(int a) 50 : a(a) { 51 } 52 S2(const S2 &s) { 53 a = 12 + s.a; 54 } 55 ~S2() { 56 a = 0; 57 } 58 }; 59 60 struct S3 { 61 int a; 62 float b; 63 S3() 64 : a(0) { 65 } 66 S3(int a) 67 : a(a) { 68 } 69 S3(const S3 &s) { 70 a = 12 + s.a; 71 } 72 ~S3() { 73 a = 0; 74 } 75 }; 76 77 struct S4 { 78 int a, b; 79 S4() 80 : a(0) { 81 } 82 S4(int a) 83 : a(a) { 84 } 85 S4(const S4 &s) { 86 a = 12 + s.a; 87 } 88 ~S4() { 89 a = 0; 90 } 91 }; 92 93 struct S5 { 94 int a, b, c; 95 S5() 96 : a(0) { 97 } 98 S5(int a) 99 : a(a) { 100 } 101 S5(const S5 &s) { 102 a = 12 + s.a; 103 } 104 ~S5() { 105 a = 0; 106 } 107 }; 108 109 // CHECK-DAG: [[GS1:@.+]] = internal global [[S1]] zeroinitializer 110 // CHECK-DAG: [[GS1]].cache. = common{{.*}} global i8** null 111 // CHECK-DAG: [[DEFAULT_LOC:@.+]] = private unnamed_addr constant [[IDENT]] { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* {{@.+}}, i32 0, i32 0) } 112 // CHECK-DAG: [[GS2:@.+]] = internal global [[S2]] zeroinitializer 113 // CHECK-DAG: [[ARR_X:@.+]] ={{.*}} global [2 x [3 x [[S1]]]] zeroinitializer 114 // CHECK-DAG: [[ARR_X]].cache. = common{{.*}} global i8** null 115 // CHECK-DAG: [[SM:@.+]] = internal global [[SMAIN]] zeroinitializer 116 // CHECK-DAG: [[SM]].cache. = common{{.*}} global i8** null 117 // CHECK-DAG: [[STATIC_S:@.+]] = external global [[S3]] 118 // CHECK-DAG: [[STATIC_S]].cache. = common{{.*}} global i8** null 119 // CHECK-DAG: [[GS3:@.+]] = external global [[S5]] 120 // CHECK-DAG: [[GS3]].cache. = common{{.*}} global i8** null 121 // CHECK-DAG: [[ST_INT_ST:@.+]] = linkonce_odr global i32 23 122 // CHECK-DAG: [[ST_INT_ST]].cache. = common{{.*}} global i8** null 123 // CHECK-DAG: [[ST_FLOAT_ST:@.+]] = linkonce_odr global float 2.300000e+01 124 // CHECK-DAG: [[ST_FLOAT_ST]].cache. = common{{.*}} global i8** null 125 // CHECK-DAG: [[ST_S4_ST:@.+]] = linkonce_odr global %struct.S4 zeroinitializer 126 // CHECK-DAG: [[ST_S4_ST]].cache. = common{{.*}} global i8** null 127 // CHECK-NOT: .cache. = common{{.*}} global i8** null 128 // There is no cache for gs2 - it is not threadprivate. Check that there is only 129 // 8 caches created (for Static::s, gs1, gs3, arr_x, main::sm, ST<int>::st, 130 // ST<float>::st, ST<S4>::st) 131 // CHECK-DEBUG-DAG: [[GS1:@.+]] = internal global [[S1]] zeroinitializer 132 // CHECK-DEBUG-DAG: [[GS2:@.+]] = internal global [[S2]] zeroinitializer 133 // CHECK-DEBUG-DAG: [[ARR_X:@.+]] ={{.*}} global [2 x [3 x [[S1]]]] zeroinitializer 134 // CHECK-DEBUG-DAG: [[SM:@.+]] = internal global [[SMAIN]] zeroinitializer 135 // CHECK-DEBUG-DAG: [[STATIC_S:@.+]] = external global [[S3]] 136 // CHECK-DEBUG-DAG: [[GS3:@.+]] = external global [[S5]] 137 // CHECK-DEBUG-DAG: [[ST_INT_ST:@.+]] = linkonce_odr global i32 23 138 // CHECK-DEBUG-DAG: [[ST_FLOAT_ST:@.+]] = linkonce_odr global float 2.300000e+01 139 // CHECK-DEBUG-DAG: [[ST_S4_ST:@.+]] = linkonce_odr global %struct.S4 zeroinitializer 140 141 // CHECK-DEBUG-DAG: [[LOC1:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;;249;1;;\00" 142 // CHECK-DEBUG-DAG: [[ID1:@.*]] = private unnamed_addr constant %struct.ident_t { {{.*}} [[LOC1]] 143 // CHECK-DEBUG-DAG: [[LOC2:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;;304;1;;\00" 144 // CHECK-DEBUG-DAG: [[ID2:@.*]] = private unnamed_addr constant %struct.ident_t { {{.*}} [[LOC2]] 145 // CHECK-DEBUG-DAG: [[LOC3:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;;422;19;;\00" 146 // CHECK-DEBUG-DAG: [[LOC4:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;main;459;1;;\00" 147 // CHECK-DEBUG-DAG: [[LOC5:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;main;476;9;;\00" 148 // CHECK-DEBUG-DAG: [[LOC6:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;main;498;10;;\00" 149 // CHECK-DEBUG-DAG: [[LOC7:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;main;521;10;;\00" 150 // CHECK-DEBUG-DAG: [[LOC8:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;main;557;10;;\00" 151 // CHECK-DEBUG-DAG: [[LOC9:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;main;586;10;;\00" 152 // CHECK-DEBUG-DAG: [[LOC10:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;main;606;10;;\00" 153 // CHECK-DEBUG-DAG: [[LOC11:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;main;629;27;;\00" 154 // CHECK-DEBUG-DAG: [[LOC12:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;main;652;10;;\00" 155 // CHECK-DEBUG-DAG: [[LOC13:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;foobar;774;9;;\00" 156 // CHECK-DEBUG-DAG: [[LOC14:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;foobar;797;10;;\00" 157 // CHECK-DEBUG-DAG: [[LOC15:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;foobar;833;10;;\00" 158 // CHECK-DEBUG-DAG: [[LOC16:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;foobar;862;10;;\00" 159 // CHECK-DEBUG-DAG: [[LOC17:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;foobar;882;10;;\00" 160 // CHECK-DEBUG-DAG: [[LOC18:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;foobar;905;27;;\00" 161 // CHECK-DEBUG-DAG: [[LOC19:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;foobar;928;10;;\00" 162 // CHECK-DEBUG-DAG: [[LOC20:@.*]] = private unnamed_addr constant [{{[0-9]+}} x i8] c";{{.*}}threadprivate_codegen.cpp;;363;1;;\00" 163 164 // CHECK-TLS-DAG: [[GS1:@.+]] = internal thread_local global [[S1]] zeroinitializer 165 // CHECK-TLS-DAG: [[GS2:@.+]] = internal global [[S2]] zeroinitializer 166 // CHECK-TLS-DAG: [[ARR_X:@.+]] ={{.*}} thread_local global [2 x [3 x [[S1]]]] zeroinitializer 167 // CHECK-TLS-DAG: [[SM:@.+]] = internal thread_local global [[SMAIN]] zeroinitializer 168 // CHECK-TLS-DAG: [[SM_GUARD:@_ZGVZ4mainE2sm]] = internal thread_local global i8 0 169 // CHECK-TLS-DAG: [[STATIC_S:@.+]] = external thread_local global [[S3]] 170 // CHECK-TLS-DAG: [[GS3:@.+]] = external thread_local global [[S5]] 171 // CHECK-TLS-DAG: [[ST_INT_ST:@.+]] = linkonce_odr thread_local global i32 23 172 // CHECK-TLS-DAG: [[ST_FLOAT_ST:@.+]] = linkonce_odr thread_local global float 2.300000e+01 173 // CHECK-TLS-DAG: [[ST_S4_ST:@.+]] = linkonce_odr thread_local global %struct.S4 zeroinitializer 174 // CHECK-TLS-DAG: [[ST_S4_ST_GUARD:@_ZGVN2STI2S4E2stE]] = linkonce_odr thread_local global i64 0 175 // CHECK-TLS-DAG: @__tls_guard = internal thread_local global i8 0 176 // CHECK-TLS-DAG: @__dso_handle = external hidden global i8 177 // CHECK-TLS-DAG: [[GS1_TLS_INIT:@_ZTHL3gs1]] = internal alias void (), void ()* @__tls_init 178 // CHECK-TLS-DAG: [[ARR_X_TLS_INIT:@_ZTH5arr_x]] ={{.*}} alias void (), void ()* @__tls_init 179 // CHECK-TLS-DAG: [[ST_S4_ST_TLS_INIT:@_ZTHN2STI2S4E2stE]] = linkonce_odr alias void (), void ()* [[ST_S4_ST_CXX_INIT:@[^, ]*]] 180 181 // OMP50-TLS: define internal void [[GS1_CXX_INIT:@.*]]() 182 // OMP50-TLS: call void [[GS1_CTOR1:@.*]]([[S1]]* {{[^,]*}} [[GS1]], i32 5) 183 // OMP50-TLS: call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void ([[S1]]*)* [[GS1_DTOR1:.*]] to void (i8*)*), i8* bitcast ([[S1]]* [[GS1]] to i8*) 184 // OMP50-TLS: } 185 // OMP50-TLS: define {{.*}}void [[GS1_CTOR1]]([[S1]]* {{.*}}, i32 {{.*}}) 186 // OMP50-TLS: call void [[GS1_CTOR2:@.*]]([[S1]]* {{.*}}, i32 {{.*}}) 187 // OMP50-TLS: } 188 // OMP50-TLS: define {{.*}}void [[GS1_DTOR1]]([[S1]]* {{.*}}) 189 // OMP50-TLS: call void [[GS1_DTOR2:@.*]]([[S1]]* {{.*}}) 190 // OMP50-TLS: } 191 // OMP50-TLS: define {{.*}}void [[GS1_CTOR2]]([[S1]]* {{.*}}, i32 {{.*}}) 192 // OMP50-TLS: define {{.*}}void [[GS1_DTOR2]]([[S1]]* {{.*}}) 193 194 // OMP50-TLS: define internal void [[GS2_CXX_INIT:@.*]]() 195 // OMP50-TLS: call void [[GS2_CTOR1:@.*]]([[S2]]* {{[^,]*}} [[GS2]], i32 27) 196 // OMP50-TLS: call i32 @__cxa_atexit(void (i8*)* bitcast (void ([[S2]]*)* [[GS2_DTOR1:.*]] to void (i8*)*), i8* bitcast ([[S2]]* [[GS2]] to i8*) 197 // OMP50-TLS: } 198 // OMP50-TLS: define {{.*}}void [[GS2_CTOR1]]([[S2]]* {{.*}}, i32 {{.*}}) 199 // OMP50-TLS: call void [[GS2_CTOR2:@.*]]([[S2]]* {{.*}}, i32 {{.*}}) 200 // OMP50-TLS: } 201 // OMP50-TLS: define {{.*}}void [[GS2_DTOR1]]([[S2]]* {{.*}}) 202 // OMP50-TLS: call void [[GS2_DTOR2:@.*]]([[S2]]* {{.*}}) 203 // OMP50-TLS: } 204 // OMP50-TLS: define {{.*}}void [[GS2_CTOR2]]([[S2]]* {{.*}}, i32 {{.*}}) 205 // OMP50-TLS: define {{.*}}void [[GS2_DTOR2]]([[S2]]* {{.*}}) 206 207 // OMP50-TLS: define internal void [[ARR_X_CXX_INIT:@.*]]() 208 // OMP50-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 0), i{{.*}} 1) 209 // OMP50-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 1), i{{.*}} 2) 210 // OMP50-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 2), i{{.*}} 3) 211 // OMP50-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 0), i{{.*}} 4) 212 // OMP50-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 1), i{{.*}} 5) 213 // OMP50-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 2), i{{.*}} 6) 214 // OMP50-TLS: call i32 @__cxa_thread_atexit(void (i8*)* [[ARR_X_CXX_DTOR:@[^,]+]] 215 // OMP50-TLS: define internal void [[ARR_X_CXX_DTOR]](i8* %0) 216 // OMP50-TLS: void [[GS1_DTOR1]]([[S1]]* {{.*}}) 217 218 struct Static { 219 static S3 s; 220 #pragma omp threadprivate(s) 221 }; 222 223 static S1 gs1(5); 224 #pragma omp threadprivate(gs1) 225 #pragma omp threadprivate(gs1) 226 // CHECK: define {{.*}} [[S1_CTOR:@.*]]([[S1]]* {{.*}}, 227 // CHECK: define {{.*}} [[S1_DTOR:@.*]]([[S1]]* {{.*}}) 228 // CHECK: define internal {{.*}}i8* [[GS1_CTOR:@\.__kmpc_global_ctor_\..*]](i8* %0) 229 // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], 230 // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 231 // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S1]]* 232 // CHECK-NEXT: call {{.*}} [[S1_CTOR]]([[S1]]* {{[^,]*}} [[RES]], {{.*}} 5) 233 // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 234 // CHECK: ret i8* [[ARG]] 235 // CHECK-NEXT: } 236 // CHECK: define internal {{.*}}void [[GS1_DTOR:@\.__kmpc_global_dtor_\..*]](i8* %0) 237 // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], 238 // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 239 // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S1]]* 240 // CHECK-NEXT: call {{.*}} [[S1_DTOR]]([[S1]]* {{[^,]*}} [[RES]]) 241 // CHECK-NEXT: ret void 242 // CHECK-NEXT: } 243 // CHECK: define internal {{.*}}void [[GS1_INIT:@\.__omp_threadprivate_init_\..*]]() 244 // CHECK: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[DEFAULT_LOC]], i8* bitcast ([[S1]]* [[GS1]] to i8*), i8* (i8*)* [[GS1_CTOR]], i8* (i8*, i8*)* null, void (i8*)* [[GS1_DTOR]]) 245 // CHECK-NEXT: ret void 246 // CHECK-NEXT: } 247 248 249 250 // CHECK-DEBUG: @__kmpc_global_thread_num 251 // CHECK-DEBUG: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[ID1]], i8* bitcast ([[S1]]* [[GS1]] to i8*), i8* (i8*)* [[GS1_CTOR:@\.__kmpc_global_ctor_\..*]], i8* (i8*, i8*)* null, void (i8*)* [[GS1_DTOR:@\.__kmpc_global_dtor_\..*]]) 252 // CHECK-DEBUG: define internal {{.*}}i8* [[GS1_CTOR]](i8* %0) 253 // CHECK-DEBUG: store i8* %0, i8** [[ARG_ADDR:%.*]], 254 // CHECK-DEBUG: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 255 // CHECK-DEBUG: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S1]]* 256 // CHECK-DEBUG-NEXT: call {{.*}} [[S1_CTOR:@.+]]([[S1]]* {{[^,]*}} [[RES]], {{.*}} 5){{.*}}, !dbg 257 // CHECK-DEBUG: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 258 // CHECK-DEBUG: ret i8* [[ARG]] 259 // CHECK-DEBUG-NEXT: } 260 // CHECK-DEBUG: define {{.*}} [[S1_CTOR]]([[S1]]* {{.*}}, 261 // CHECK-DEBUG: define internal {{.*}}void [[GS1_DTOR]](i8* %0) 262 // CHECK-DEBUG: store i8* %0, i8** [[ARG_ADDR:%.*]], 263 // CHECK-DEBUG: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 264 // CHECK-DEBUG: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S1]]* 265 // CHECK-DEBUG-NEXT: call {{.*}} [[S1_DTOR:@.+]]([[S1]]* {{[^,]*}} [[RES]]){{.*}}, !dbg 266 // CHECK-DEBUG-NEXT: ret void 267 // CHECK-DEBUG-NEXT: } 268 // CHECK-DEBUG: define {{.*}} [[S1_DTOR]]([[S1]]* {{.*}}) 269 static S2 gs2(27); 270 // CHECK: define {{.*}} [[S2_CTOR:@.*]]([[S2]]* {{.*}}, 271 // CHECK: define {{.*}} [[S2_DTOR:@.*]]([[S2]]* {{.*}}) 272 // No another call for S2 constructor because it is not threadprivate 273 // CHECK-NOT: call {{.*}} [[S2_CTOR]]([[S2]]* 274 // CHECK-DEBUG: define {{.*}} [[S2_CTOR:@.*]]([[S2]]* {{.*}}, 275 // CHECK-DEBUG: define {{.*}} [[S2_DTOR:@.*]]([[S2]]* {{.*}}) 276 // No another call for S2 constructor because it is not threadprivate 277 // CHECK-DEBUG-NOT: call {{.*}} [[S2_CTOR]]([[S2]]* 278 S1 arr_x[2][3] = { { 1, 2, 3 }, { 4, 5, 6 } }; 279 #pragma omp threadprivate(arr_x) 280 // CHECK: define internal {{.*}}i8* [[ARR_X_CTOR:@\.__kmpc_global_ctor_\..*]](i8* %0) 281 // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], 282 // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 283 // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [2 x [3 x [[S1]]]]* 284 // CHECK: [[ARR1:%.*]] = getelementptr inbounds [2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[RES]], i{{.*}} 0, i{{.*}} 0 285 // CHECK: [[ARR:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR1]], i{{.*}} 0, i{{.*}} 0 286 // CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* {{[^,]*}} [[ARR]], [[INT]] {{.*}}1) 287 // CHECK: [[ARR_ELEMENT:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR]], i{{.*}} 1 288 // CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* {{[^,]*}} [[ARR_ELEMENT]], [[INT]] {{.*}}2) 289 // CHECK: [[ARR_ELEMENT2:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_ELEMENT]], i{{.*}} 1 290 // CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* {{[^,]*}} [[ARR_ELEMENT2]], [[INT]] {{.*}}3) 291 // CHECK: [[ARR_ELEMENT3:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR1]], i{{.*}} 1 292 // CHECK: [[ARR_:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR_ELEMENT3]], i{{.*}} 0, i{{.*}} 0 293 // CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* {{[^,]*}} [[ARR_]], [[INT]] {{.*}}4) 294 // CHECK: [[ARR_ELEMENT:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_]], i{{.*}} 1 295 // CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* {{[^,]*}} [[ARR_ELEMENT]], [[INT]] {{.*}}5) 296 // CHECK: [[ARR_ELEMENT2:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_ELEMENT]], i{{.*}} 1 297 // CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* {{[^,]*}} [[ARR_ELEMENT2]], [[INT]] {{.*}}6) 298 // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 299 // CHECK: ret i8* [[ARG]] 300 // CHECK: } 301 // CHECK: define internal {{.*}}void [[ARR_X_DTOR:@\.__kmpc_global_dtor_\..*]](i8* %0) 302 // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], 303 // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 304 // CHECK: [[ARR_BEGIN:%.*]] = bitcast i8* [[ARG]] to [[S1]]* 305 // CHECK-NEXT: [[ARR_CUR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_BEGIN]], i{{.*}} 6 306 // CHECK-NEXT: br label %[[ARR_LOOP:.*]] 307 // CHECK: {{.*}}[[ARR_LOOP]]{{.*}} 308 // CHECK-NEXT: [[ARR_ELEMENTPAST:%.*]] = phi [[S1]]* [ [[ARR_CUR]], {{.*}} ], [ [[ARR_ELEMENT:%.*]], {{.*}} ] 309 // CHECK-NEXT: [[ARR_ELEMENT:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_ELEMENTPAST]], i{{.*}} -1 310 // CHECK-NEXT: {{call|invoke}} {{.*}} [[S1_DTOR]]([[S1]]* {{[^,]*}} [[ARR_ELEMENT]]) 311 // CHECK: [[ARR_DONE:%.*]] = icmp eq [[S1]]* [[ARR_ELEMENT]], [[ARR_BEGIN]] 312 // CHECK-NEXT: br i1 [[ARR_DONE]], label %[[ARR_EXIT:.*]], label %[[ARR_LOOP]] 313 // CHECK: {{.*}}[[ARR_EXIT]]{{.*}} 314 // CHECK-NEXT: ret void 315 // CHECK: } 316 // CHECK: define internal {{.*}}void [[ARR_X_INIT:@\.__omp_threadprivate_init_\..*]]() 317 // CHECK: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[DEFAULT_LOC]], i8* bitcast ([2 x [3 x [[S1]]]]* [[ARR_X]] to i8*), i8* (i8*)* [[ARR_X_CTOR]], i8* (i8*, i8*)* null, void (i8*)* [[ARR_X_DTOR]]) 318 // CHECK-NEXT: ret void 319 // CHECK-NEXT: } 320 321 322 323 // CHECK-DEBUG: @__kmpc_global_thread_num 324 // CHECK-DEBUG: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[ID2]], i8* bitcast ([2 x [3 x [[S1]]]]* [[ARR_X]] to i8*), i8* (i8*)* [[ARR_X_CTOR:@\.__kmpc_global_ctor_\..*]], i8* (i8*, i8*)* null, void (i8*)* [[ARR_X_DTOR:@\.__kmpc_global_dtor_\..*]]) 325 // CHECK-DEBUG: define internal {{.*}}i8* [[ARR_X_CTOR]](i8* %0) 326 // CHECK-DEBUG: } 327 // CHECK-DEBUG: define internal {{.*}}void [[ARR_X_DTOR]](i8* %0) 328 // CHECK-DEBUG: } 329 extern S5 gs3; 330 #pragma omp threadprivate(gs3) 331 // No call for S5 constructor because gs3 has just declaration, not a definition. 332 // CHECK-NOT: call {{.*}}([[S5]]* 333 // CHECK-DEBUG-NOT: call {{.*}}([[S5]]* 334 335 template <class T> 336 struct ST { 337 static T st; 338 #pragma omp threadprivate(st) 339 }; 340 341 342 343 344 345 // OMP50-DEBUG: @__kmpc_global_thread_num 346 // OMP50-DEBUG: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* {{.*}}, i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*), i8* (i8*)* [[ST_S4_ST_CTOR:@\.__kmpc_global_ctor_\..+]], i8* (i8*, i8*)* null, void (i8*)* [[ST_S4_ST_DTOR:@\.__kmpc_global_dtor_\..+]]) 347 // OMP50-DEBUG: define internal {{.*}}i8* [[ST_S4_ST_CTOR]](i8* %0) 348 // OMP50-DEBUG: } 349 // OMP50-DEBUG: define {{.*}} [[S4_CTOR:@.*]]([[S4]]* {{.*}}, 350 // OMP50-DEBUG: define internal {{.*}}void [[ST_S4_ST_DTOR]](i8* %0) 351 // OMP50-DEBUG: } 352 // OMP50-DEBUG: define {{.*}} [[S4_DTOR:@.*]]([[S4]]* {{.*}}) 353 354 // OMP50: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[DEFAULT_LOC]], i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*), i8* (i8*)* [[ST_S4_ST_CTOR:@\.__kmpc_global_ctor_\..+]], i8* (i8*, i8*)* null, void (i8*)* [[ST_S4_ST_DTOR:@\.__kmpc_global_dtor_\..+]]) 355 // OMP50: define internal {{.*}}i8* [[ST_S4_ST_CTOR]](i8* %0) 356 // OMP50: store i8* %0, i8** [[ARG_ADDR:%.*]], 357 // OMP50: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 358 // OMP50: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S4]]* 359 // OMP50-NEXT: call {{.*}} [[S4_CTOR:@.+]]([[S4]]* {{[^,]*}} [[RES]], {{.*}} 23) 360 // OMP50: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 361 // OMP50-NEXT: ret i8* [[ARG]] 362 // OMP50-NEXT: } 363 // OMP50: define {{.*}} [[S4_CTOR]]([[S4]]* {{.*}}, 364 // OMP50: define internal {{.*}}void [[ST_S4_ST_DTOR]](i8* %0) 365 // OMP50: store i8* %0, i8** [[ARG_ADDR:%.*]], 366 // OMP50: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 367 // OMP50: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S4]]* 368 // OMP50-NEXT: call {{.*}} [[S4_DTOR:@.+]]([[S4]]* {{[^,]*}} [[RES]]) 369 // OMP50-NEXT: ret void 370 // OMP50-NEXT: } 371 // OMP50: define {{.*}} [[S4_DTOR]]([[S4]]* {{[^,]*}} {{.*}}) 372 template <class T> 373 T ST<T>::st(23); 374 375 // CHECK-LABEL: @main() 376 // CHECK-DEBUG-LABEL: @main() 377 int main() { 378 379 int Res; 380 struct Smain { 381 int a; 382 double b, c; 383 Smain() 384 : a(0) { 385 } 386 Smain(int a) 387 : a(a) { 388 } 389 Smain(const Smain &s) { 390 a = 12 + s.a; 391 } 392 ~Smain() { 393 a = 0; 394 } 395 }; 396 397 static Smain sm(gs1.a); 398 // CHECK: [[THREAD_NUM:%.+]] = call {{.*}}i32 @__kmpc_global_thread_num([[IDENT]]* [[DEFAULT_LOC]]) 399 // CHECK: call {{.*}}i{{.*}} @__cxa_guard_acquire 400 // CHECK: call {{.*}}i32 @__kmpc_global_thread_num([[IDENT]]* [[DEFAULT_LOC]]) 401 // CHECK: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[DEFAULT_LOC]], i8* bitcast ([[SMAIN]]* [[SM]] to i8*), i8* (i8*)* [[SM_CTOR:@\.__kmpc_global_ctor_\..+]], i8* (i8*, i8*)* null, void (i8*)* [[SM_DTOR:@\.__kmpc_global_dtor_\..+]]) 402 // CHECK: [[GS1_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[S1]]* [[GS1]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[GS1]].cache.) 403 // CHECK-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* 404 // CHECK-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 405 // CHECK-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] 406 // CHECK-NEXT: invoke {{.*}} [[SMAIN_CTOR:.*]]([[SMAIN]]* {{[^,]*}} [[SM]], [[INT]] {{.*}}[[GS1_A]]) 407 // CHECK: call {{.*}}void @__cxa_guard_release 408 409 410 411 // CHECK-DEBUG: call {{.*}}i{{.*}} @__cxa_guard_acquire 412 // CHECK-DEBUG: call {{.*}}i32 @__kmpc_global_thread_num([[IDENT]]* [[KMPC_LOC:@.+]]) 413 // CHECK-DEBUG: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[KMPC_LOC]], i8* bitcast ([[SMAIN]]* [[SM]] to i8*), i8* (i8*)* [[SM_CTOR:@\.__kmpc_global_ctor_\..+]], i8* (i8*, i8*)* null, void (i8*)* [[SM_DTOR:@\.__kmpc_global_dtor_\..+]]) 414 // CHECK-DEBUG: [[GS1_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[S1]]* [[GS1]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 415 416 417 // CHECK-DEBUG-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* 418 // CHECK-DEBUG-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 419 // CHECK-DEBUG-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] 420 // CHECK-DEBUG-NEXT: invoke {{.*}} [[SMAIN_CTOR:.*]]([[SMAIN]]* {{[^,]*}} [[SM]], [[INT]] {{.*}}[[GS1_A]]) 421 // CHECK-DEBUG: call {{.*}}void @__cxa_guard_release 422 // CHECK-TLS: [[IS_INIT_INT:%.*]] = load i8, i8* [[SM_GUARD]] 423 // CHECK-TLS-NEXT: [[IS_INIT_BOOL:%.*]] = icmp eq i8 [[IS_INIT_INT]], 0 424 // CHECK-TLS-NEXT: br i1 [[IS_INIT_BOOL]], label %[[INIT_LABEL:.*]], label %[[INIT_DONE:[^,]+]]{{.*}} 425 // CHECK-TLS: [[INIT_LABEL]] 426 // CHECK-TLS-NEXT: [[GS1_ADDR:%.*]] = call [[S1]]* [[GS1_TLS_INITD:@[^,]+]] 427 // CHECK-TLS-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i32 0, i32 0 428 // CHECK-TLS-NEXT: [[GS1_A_VAL:%.*]] = load i32, i32* [[GS1_A_ADDR]] 429 // CHECK-TLS-NEXT: call void [[SM_CTOR1:@.*]]([[SMAIN]]* {{[^,]*}} [[SM]], i32 [[GS1_A_VAL]]) 430 // CHECK-TLS-NEXT: call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void ([[SMAIN]]*)* [[SM_DTOR1:@.*]] to void (i8*)*), i8* bitcast ([[SMAIN]]* [[SM]] to i8*), i8* @__dso_handle) 431 // CHECK-TLS-NEXT: store i8 1, i8* [[SM_GUARD]] 432 // CHECK-TLS-NEXT: br label %[[INIT_DONE]] 433 // CHECK-TLS: [[INIT_DONE]] 434 #pragma omp threadprivate(sm) 435 // CHECK: [[STATIC_S_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[S3]]* [[STATIC_S]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[STATIC_S]].cache.) 436 // CHECK-NEXT: [[STATIC_S_ADDR:%.*]] = bitcast i8* [[STATIC_S_TEMP_ADDR]] to [[S3]]* 437 // CHECK-NEXT: [[STATIC_S_A_ADDR:%.*]] = getelementptr inbounds [[S3]], [[S3]]* [[STATIC_S_ADDR]], i{{.*}} 0, i{{.*}} 0 438 // CHECK-NEXT: [[STATIC_S_A:%.*]] = load [[INT]], [[INT]]* [[STATIC_S_A_ADDR]] 439 // CHECK-NEXT: store [[INT]] [[STATIC_S_A]], [[INT]]* [[RES_ADDR:[^,]+]] 440 // CHECK-DEBUG:[[STATIC_S_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[S3]]* [[STATIC_S]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 441 442 443 // CHECK-DEBUG-NEXT: [[STATIC_S_ADDR:%.*]] = bitcast i8* [[STATIC_S_TEMP_ADDR]] to [[S3]]* 444 // CHECK-DEBUG-NEXT: [[STATIC_S_A_ADDR:%.*]] = getelementptr inbounds [[S3]], [[S3]]* [[STATIC_S_ADDR]], i{{.*}} 0, i{{.*}} 0 445 // CHECK-DEBUG-NEXT: [[STATIC_S_A:%.*]] = load [[INT]], [[INT]]* [[STATIC_S_A_ADDR]] 446 // CHECK-DEBUG-NEXT: store [[INT]] [[STATIC_S_A]], [[INT]]* [[RES_ADDR:[^,]+]] 447 // CHECK-TLS: [[STATIC_S_ADDR:%.*]] = call [[S3]]* [[STATIC_S_TLS_INITD:@[^,]+]] 448 // CHECK-TLS-NEXT: [[STATIC_S_A_ADDR:%.*]] = getelementptr inbounds [[S3]], [[S3]]* [[STATIC_S_ADDR]], i{{.*}} 0, i{{.*}} 0 449 // CHECK-TLS-NEXT: [[STATIC_S_A:%.*]] = load i32, i32* [[STATIC_S_A_ADDR]] 450 // CHECK-TLS-NEXT: store i32 [[STATIC_S_A]], i32* [[RES_ADDR:[^,]+]] 451 Res = Static::s.a; 452 // CHECK: [[SM_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[SMAIN]]* [[SM]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[SM]].cache.) 453 // CHECK-NEXT: [[SM_ADDR:%.*]] = bitcast i8* [[SM_TEMP_ADDR]] to [[SMAIN]]* 454 // CHECK-NEXT: [[SM_A_ADDR:%.*]] = getelementptr inbounds [[SMAIN]], [[SMAIN]]* [[SM_ADDR]], i{{.*}} 0, i{{.*}} 0 455 // CHECK-NEXT: [[SM_A:%.*]] = load [[INT]], [[INT]]* [[SM_A_ADDR]] 456 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 457 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[SM_A]] 458 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 459 // CHECK-DEBUG-NEXT: [[SM_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[SMAIN]]* [[SM]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 460 461 462 // CHECK-DEBUG-NEXT: [[SM_ADDR:%.*]] = bitcast i8* [[SM_TEMP_ADDR]] to [[SMAIN]]* 463 // CHECK-DEBUG-NEXT: [[SM_A_ADDR:%.*]] = getelementptr inbounds [[SMAIN]], [[SMAIN]]* [[SM_ADDR]], i{{.*}} 0, i{{.*}} 0 464 // CHECK-DEBUG-NEXT: [[SM_A:%.*]] = load [[INT]], [[INT]]* [[SM_A_ADDR]] 465 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 466 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[SM_A]] 467 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 468 // [[SM]] was initialized already, so it can be used directly 469 // CHECK-TLS: [[SM_A:%.*]] = load i32, i32* getelementptr inbounds ([[SMAIN]], [[SMAIN]]* [[SM]], i{{.*}} 0, i{{.*}} 0) 470 // CHECK-TLS-NEXT: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 471 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} i32 [[RES]], [[SM_A]] 472 // CHECK-TLS-NEXT: store i32 [[ADD]], i32* [[RES_ADDR]] 473 Res += sm.a; 474 // CHECK: [[GS1_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[S1]]* [[GS1]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[GS1]].cache.) 475 // CHECK-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* 476 // CHECK-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 477 // CHECK-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] 478 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 479 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS1_A]] 480 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 481 // CHECK-DEBUG-NEXT: [[GS1_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[S1]]* [[GS1]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 482 483 484 // CHECK-DEBUG-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* 485 // CHECK-DEBUG-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 486 // CHECK-DEBUG-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] 487 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 488 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS1_A]] 489 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 490 // CHECK-TLS: [[GS1_ADDR:%.*]] = call [[S1]]* [[GS1_TLS_INITD]] 491 // CHECK-TLS-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 492 // CHECK-TLS-NEXT: [[GS1_A:%.*]] = load i32, i32* [[GS1_A_ADDR]] 493 // CHECK-TLS-NEXT: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 494 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} i32 [[RES]], [[GS1_A]] 495 // CHECK-TLS-NEXT: store i32 [[ADD]], i32* [[RES_ADDR]] 496 Res += gs1.a; 497 // CHECK: [[GS2_A:%.*]] = load [[INT]], [[INT]]* getelementptr inbounds ([[S2]], [[S2]]* [[GS2]], i{{.*}} 0, i{{.*}} 0) 498 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 499 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS2_A]] 500 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 501 // CHECK-DEBUG: [[GS2_A:%.*]] = load [[INT]], [[INT]]* getelementptr inbounds ([[S2]], [[S2]]* [[GS2]], i{{.*}} 0, i{{.*}} 0) 502 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 503 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS2_A]] 504 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 505 // CHECK-TLS: [[GS2_A:%.*]] = load [[INT]], [[INT]]* getelementptr inbounds ([[S2]], [[S2]]* [[GS2]], i{{.*}} 0, i{{.*}} 0) 506 // CHECK-TLS-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 507 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS2_A]] 508 // CHECK-TLS-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 509 Res += gs2.a; 510 // CHECK: [[GS3_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[S5]]* [[GS3]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[GS3]].cache.) 511 // CHECK-NEXT: [[GS3_ADDR:%.*]] = bitcast i8* [[GS3_TEMP_ADDR]] to [[S5]]* 512 // CHECK-NEXT: [[GS3_A_ADDR:%.*]] = getelementptr inbounds [[S5]], [[S5]]* [[GS3_ADDR]], i{{.*}} 0, i{{.*}} 0 513 // CHECK-NEXT: [[GS3_A:%.*]] = load [[INT]], [[INT]]* [[GS3_A_ADDR]] 514 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 515 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS3_A]] 516 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 517 // CHECK-DEBUG-NEXT: [[GS3_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[S5]]* [[GS3]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 518 519 520 // CHECK-DEBUG-NEXT: [[GS3_ADDR:%.*]] = bitcast i8* [[GS3_TEMP_ADDR]] to [[S5]]* 521 // CHECK-DEBUG-NEXT: [[GS3_A_ADDR:%.*]] = getelementptr inbounds [[S5]], [[S5]]* [[GS3_ADDR]], i{{.*}} 0, i{{.*}} 0 522 // CHECK-DEBUG-NEXT: [[GS3_A:%.*]] = load [[INT]], [[INT]]* [[GS3_A_ADDR]] 523 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 524 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS3_A]] 525 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 526 // CHECK-TLS: [[GS3_ADDR:%.*]] = call [[S5]]* [[GS3_TLS_INITD:[^,]+]] 527 // CHECK-TLS-NEXT: [[GS3_A_ADDR:%.*]] = getelementptr inbounds [[S5]], [[S5]]* [[GS3_ADDR]], i{{.*}} 0, i{{.*}} 0 528 // CHECK-TLS-NEXT: [[GS3_A:%.*]] = load i32, i32* [[GS3_A_ADDR]] 529 // CHECK-TLS-NEXT: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 530 // CHECK-TLS-NEXT: [[ADD:%.*]] = add nsw i32 [[RES]], [[GS3_A]] 531 // CHECK-TLS-NEXT: store i32 [[ADD]], i32* [[RES_ADDR]] 532 Res += gs3.a; 533 // CHECK: [[ARR_X_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([2 x [3 x [[S1]]]]* [[ARR_X]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[ARR_X]].cache.) 534 // CHECK-NEXT: [[ARR_X_ADDR:%.*]] = bitcast i8* [[ARR_X_TEMP_ADDR]] to [2 x [3 x [[S1]]]]* 535 // CHECK-NEXT: [[ARR_X_1_ADDR:%.*]] = getelementptr inbounds [2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X_ADDR]], i{{.*}} 0, i{{.*}} 1 536 // CHECK-NEXT: [[ARR_X_1_1_ADDR:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR_X_1_ADDR]], i{{.*}} 0, i{{.*}} 1 537 // CHECK-NEXT: [[ARR_X_1_1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_X_1_1_ADDR]], i{{.*}} 0, i{{.*}} 0 538 // CHECK-NEXT: [[ARR_X_1_1_A:%.*]] = load [[INT]], [[INT]]* [[ARR_X_1_1_A_ADDR]] 539 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 540 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ARR_X_1_1_A]] 541 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 542 // CHECK-DEBUG-NEXT: [[ARR_X_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([2 x [3 x [[S1]]]]* [[ARR_X]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 543 544 545 // CHECK-DEBUG-NEXT: [[ARR_X_ADDR:%.*]] = bitcast i8* [[ARR_X_TEMP_ADDR]] to [2 x [3 x [[S1]]]]* 546 // CHECK-DEBUG-NEXT: [[ARR_X_1_ADDR:%.*]] = getelementptr inbounds [2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X_ADDR]], i{{.*}} 0, i{{.*}} 1 547 // CHECK-DEBUG-NEXT: [[ARR_X_1_1_ADDR:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR_X_1_ADDR]], i{{.*}} 0, i{{.*}} 1 548 // CHECK-DEBUG-NEXT: [[ARR_X_1_1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_X_1_1_ADDR]], i{{.*}} 0, i{{.*}} 0 549 // CHECK-DEBUG-NEXT: [[ARR_X_1_1_A:%.*]] = load [[INT]], [[INT]]* [[ARR_X_1_1_A_ADDR]] 550 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 551 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ARR_X_1_1_A]] 552 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 553 // CHECK-TLS: [[ARR_X_ADDR:%.*]] = call [2 x [3 x [[S1]]]]* [[ARR_X_TLS_INITD:[^,]+]] 554 // CHECK-TLS-NEXT: [[ARR_X_1_ADDR:%.*]] = getelementptr inbounds [2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X_ADDR]], i{{.*}} 0, i{{.*}} 1 555 // CHECK-TLS-NEXT: [[ARR_X_1_1_ADDR:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR_X_1_ADDR]], i{{.*}} 0, i{{.*}} 1 556 // CHECK-TLS-NEXT: [[ARR_X_1_1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_X_1_1_ADDR]], i{{.*}} 0, i{{.*}} 0 557 // CHECK-TLS-NEXT: [[ARR_X_1_1_A:%.*]] = load i32, i32* [[ARR_X_1_1_A_ADDR]] 558 // CHECK-TLS-NEXT: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 559 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} i32 [[RES]], [[ARR_X_1_1_A]] 560 // CHECK-TLS-NEXT: store i32 [[ADD]], i32* [[RES_ADDR]] 561 Res += arr_x[1][1].a; 562 // CHECK: [[ST_INT_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[INT]]* [[ST_INT_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[ST_INT_ST]].cache.) 563 // CHECK-NEXT: [[ST_INT_ST_ADDR:%.*]] = bitcast i8* [[ST_INT_ST_TEMP_ADDR]] to [[INT]]* 564 // CHECK-NEXT: [[ST_INT_ST_VAL:%.*]] = load [[INT]], [[INT]]* [[ST_INT_ST_ADDR]] 565 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 566 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ST_INT_ST_VAL]] 567 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 568 // CHECK-DEBUG-NEXT: [[ST_INT_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[INT]]* [[ST_INT_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 569 570 571 // CHECK-DEBUG-NEXT: [[ST_INT_ST_ADDR:%.*]] = bitcast i8* [[ST_INT_ST_TEMP_ADDR]] to [[INT]]* 572 // CHECK-DEBUG-NEXT: [[ST_INT_ST_VAL:%.*]] = load [[INT]], [[INT]]* [[ST_INT_ST_ADDR]] 573 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 574 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ST_INT_ST_VAL]] 575 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 576 // CHECK-TLS: [[ST_INT_ST_VAL:%.*]] = load i32, i32* [[ST_INT_ST_ADDR:[^,]+]] 577 // CHECK-TLS-NEXT: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 578 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} i32 [[RES]], [[ST_INT_ST_VAL]] 579 // CHECK-TLS-NEXT: store i32 [[ADD]], i32* [[RES_ADDR]] 580 Res += ST<int>::st; 581 // CHECK: [[ST_FLOAT_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast (float* [[ST_FLOAT_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[ST_FLOAT_ST]].cache.) 582 // CHECK-NEXT: [[ST_FLOAT_ST_ADDR:%.*]] = bitcast i8* [[ST_FLOAT_ST_TEMP_ADDR]] to float* 583 // CHECK-NEXT: [[ST_FLOAT_ST_VAL:%.*]] = load float, float* [[ST_FLOAT_ST_ADDR]] 584 // CHECK-NEXT: [[FLOAT_TO_INT_CONV:%.*]] = fptosi float [[ST_FLOAT_ST_VAL]] to [[INT]] 585 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 586 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[FLOAT_TO_INT_CONV]] 587 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 588 // CHECK-DEBUG-NEXT: [[ST_FLOAT_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast (float* [[ST_FLOAT_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 589 590 591 // CHECK-DEBUG-NEXT: [[ST_FLOAT_ST_ADDR:%.*]] = bitcast i8* [[ST_FLOAT_ST_TEMP_ADDR]] to float* 592 // CHECK-DEBUG-NEXT: [[ST_FLOAT_ST_VAL:%.*]] = load float, float* [[ST_FLOAT_ST_ADDR]] 593 // CHECK-DEBUG-NEXT: [[FLOAT_TO_INT_CONV:%.*]] = fptosi float [[ST_FLOAT_ST_VAL]] to [[INT]] 594 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 595 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[FLOAT_TO_INT_CONV]] 596 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 597 // CHECK-TLS: [[ST_FLOAT_ST_VAL:%.*]] = load float, float* [[ST_FLOAT_ST_ADDR:[^,]+]] 598 // CHECK-TLS-NEXT: [[FLOAT_TO_INT_CONV:%.*]] = fptosi float [[ST_FLOAT_ST_VAL]] to i32 599 // CHECK-TLS-NEXT: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 600 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} i32 [[RES]], [[FLOAT_TO_INT_CONV]] 601 // CHECK-TLS-NEXT: store i32 [[ADD]], i32* [[RES_ADDR]] 602 Res += static_cast<int>(ST<float>::st); 603 // CHECK: [[ST_S4_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[ST_S4_ST]].cache.) 604 // CHECK-NEXT: [[ST_S4_ST_ADDR:%.*]] = bitcast i8* [[ST_S4_ST_TEMP_ADDR]] to [[S4]]* 605 // CHECK-NEXT: [[ST_S4_ST_A_ADDR:%.*]] = getelementptr inbounds [[S4]], [[S4]]* [[ST_S4_ST_ADDR]], i{{.*}} 0, i{{.*}} 0 606 // CHECK-NEXT: [[ST_S4_ST_A:%.*]] = load [[INT]], [[INT]]* [[ST_S4_ST_A_ADDR]] 607 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 608 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ST_S4_ST_A]] 609 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 610 // CHECK-DEBUG-NEXT: [[ST_S4_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 611 612 613 // CHECK-DEBUG-NEXT: [[ST_S4_ST_ADDR:%.*]] = bitcast i8* [[ST_S4_ST_TEMP_ADDR]] to [[S4]]* 614 // CHECK-DEBUG-NEXT: [[ST_S4_ST_A_ADDR:%.*]] = getelementptr inbounds [[S4]], [[S4]]* [[ST_S4_ST_ADDR]], i{{.*}} 0, i{{.*}} 0 615 // CHECK-DEBUG-NEXT: [[ST_S4_ST_A:%.*]] = load [[INT]], [[INT]]* [[ST_S4_ST_A_ADDR]] 616 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 617 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ST_S4_ST_A]] 618 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 619 // CHECK-TLS: [[ST_S4_ST_ADDR:%.*]] = call [[S4]]* [[ST_S4_ST_TLS_INITD:[^,]+]] 620 // CHECK-TLS-NEXT: [[ST_S4_ST_A_ADDR:%.*]] = getelementptr inbounds [[S4]], [[S4]]* [[ST_S4_ST_ADDR]], i{{.*}} 0, i{{.*}} 0 621 // CHECK-TLS-NEXT: [[ST_S4_ST_A:%.*]] = load i32, i32* [[ST_S4_ST_A_ADDR]] 622 // CHECK-TLS-NEXT: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 623 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} i32 [[RES]], [[ST_S4_ST_A]] 624 // CHECK-TLS-NEXT: store i32 [[ADD]], i32* [[RES_ADDR]] 625 Res += ST<S4>::st.a; 626 // CHECK: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 627 // CHECK-NEXT: ret [[INT]] [[RES]] 628 // CHECK-DEBUG: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 629 // CHECK-DEBUG-NEXT: ret [[INT]] [[RES]] 630 // CHECK-TLS: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 631 // CHECK-TLS-NEXT: ret i32 [[RES]] 632 return Res; 633 } 634 // CHECK: } 635 636 // CHECK: define internal {{.*}}i8* [[SM_CTOR]](i8* %0) 637 // CHECK: [[THREAD_NUM:%.+]] = call {{.*}}i32 @__kmpc_global_thread_num([[IDENT]]* [[DEFAULT_LOC]]) 638 // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], 639 // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 640 // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [[SMAIN]]* 641 // CHECK: [[GS1_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[S1]]* [[GS1]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[GS1]].cache.) 642 // CHECK-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* 643 // CHECK-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 644 // CHECK-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] 645 // CHECK-NEXT: call {{.*}} [[SMAIN_CTOR:@.+]]([[SMAIN]]* {{[^,]*}} [[RES]], [[INT]] {{.*}}[[GS1_A]]) 646 // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 647 // CHECK-NEXT: ret i8* [[ARG]] 648 // CHECK-NEXT: } 649 // CHECK: define {{.*}} [[SMAIN_CTOR]]([[SMAIN]]* {{.*}}, 650 // CHECK: define internal {{.*}}void [[SM_DTOR]](i8* %0) 651 // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], 652 // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 653 // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [[SMAIN]]* 654 // CHECK-NEXT: call {{.*}} [[SMAIN_DTOR:@.+]]([[SMAIN]]* {{[^,]*}} [[RES]]) 655 // CHECK-NEXT: ret void 656 // CHECK-NEXT: } 657 // CHECK: define {{.*}} [[SMAIN_DTOR]]([[SMAIN]]* {{.*}}) 658 // CHECK-DEBUG: define internal {{.*}}i8* [[SM_CTOR]](i8* %0) 659 // CHECK-DEBUG: [[THREAD_NUM:%.+]] = call {{.*}}i32 @__kmpc_global_thread_num([[IDENT]]* {{.*}}) 660 661 662 663 // CHECK-DEBUG: store i8* %0, i8** [[ARG_ADDR:%.*]], 664 // CHECK-DEBUG: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 665 // CHECK-DEBUG: [[RES:%.*]] = bitcast i8* [[ARG]] to [[SMAIN]]* 666 // CHECK-DEBUG: [[GS1_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[S1]]* [[GS1]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 667 668 669 // CHECK-DEBUG-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* 670 // CHECK-DEBUG-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 671 // CHECK-DEBUG-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] 672 // CHECK-DEBUG-NEXT: call {{.*}} [[SMAIN_CTOR:@.+]]([[SMAIN]]* {{[^,]*}} [[RES]], [[INT]] {{.*}}[[GS1_A]]) 673 // CHECK-DEBUG: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 674 // CHECK-DEBUG-NEXT: ret i8* [[ARG]] 675 // CHECK-DEBUG-NEXT: } 676 // CHECK-DEBUG: define {{.*}} [[SMAIN_CTOR]]([[SMAIN]]* {{.*}}, 677 // CHECK-DEBUG: define internal {{.*}} [[SM_DTOR:@.+]](i8* %0) 678 // CHECK-DEBUG: call {{.*}} [[SMAIN_DTOR:@.+]]([[SMAIN]]* 679 // CHECK-DEBUG: } 680 // CHECK-DEBUG: define {{.*}} [[SMAIN_DTOR]]([[SMAIN]]* {{.*}}) 681 // CHECK-TLS: define internal [[S1]]* [[GS1_TLS_INITD]] {{#[0-9]+}} { 682 // CHECK-TLS-NEXT: call void [[GS1_TLS_INIT]] 683 // CHECK-TLS-NEXT: ret [[S1]]* [[GS1]] 684 // CHECK-TLS-NEXT: } 685 // CHECK-TLS: define internal void [[SM_CTOR1]]([[SMAIN]]* {{[^,]*}} %this, i32 {{.*}}) {{.*}} { 686 // CHECK-TLS: void [[SM_CTOR2:@.*]]([[SMAIN]]* {{.*}}, i32 {{.*}}) 687 // CHECK-TLS: } 688 // CHECK-TLS: define internal void [[SM_DTOR1]]([[SMAIN]]* {{[^,]*}} %this) {{.*}} { 689 // CHECK-TLS: void [[SM_DTOR2:@.*]]([[SMAIN]]* {{.*}}) 690 // CHECK-TLS: } 691 // CHECK-TLS: define {{.*}} [[S3]]* [[STATIC_S_TLS_INITD]] 692 // CHECK-TLS: call void [[STATIC_S_TLS_INIT:[^,]+]] 693 // CHECK-TLS: ret [[S3]]* [[STATIC_S]] 694 // CHECK-TLS: } 695 // CHECK-TLS: define {{.*}} [[S5]]* [[GS3_TLS_INITD]] 696 // CHECK-TLS: call void [[GS3_TLS_INIT:@[^,]+]] 697 // CHECK-TLS: ret [[S5]]* [[GS3]] 698 // CHECK-TLS: } 699 // CHECK-TLS: define {{.*}} [2 x [3 x [[S1]]]]* [[ARR_X_TLS_INITD]] 700 // CHECK-TLS: call void [[ARR_X_TLS_INIT]] 701 // CHECK-TLS: ret [2 x [3 x [[S1]]]]* [[ARR_X]] 702 // CHECK-TLS: } 703 // CHECK-TLS: define {{.*}} [[S4]]* [[ST_S4_ST_TLS_INITD]] {{#[0-9]+}} comdat { 704 // CHECK-TLS: call void [[ST_S4_ST_TLS_INIT]] 705 // CHECK-TLS: ret [[S4]]* [[ST_S4_ST]] 706 // CHECK-TLS: } 707 708 #endif 709 // OMP50-TLS: define {{.*}}void [[SM_CTOR2]]([[SMAIN]]* {{.*}}, i32 {{.*}}) 710 // OMP50-TLS: define {{.*}}void [[SM_DTOR2]]([[SMAIN]]* {{.*}}) 711 712 #ifdef BODY 713 // CHECK-LABEL: @{{.*}}foobar{{.*}}() 714 // CHECK-DEBUG-LABEL: @{{.*}}foobar{{.*}}() 715 // CHECK-TLS-LABEL: @{{.*}}foobar{{.*}}() 716 int foobar() { 717 718 int Res; 719 // CHECK: [[THREAD_NUM:%.+]] = call {{.*}}i32 @__kmpc_global_thread_num([[IDENT]]* [[DEFAULT_LOC]]) 720 // CHECK: [[STATIC_S_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[S3]]* [[STATIC_S]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[STATIC_S]].cache.) 721 // CHECK-NEXT: [[STATIC_S_ADDR:%.*]] = bitcast i8* [[STATIC_S_TEMP_ADDR]] to [[S3]]* 722 // CHECK-NEXT: [[STATIC_S_A_ADDR:%.*]] = getelementptr inbounds [[S3]], [[S3]]* [[STATIC_S_ADDR]], i{{.*}} 0, i{{.*}} 0 723 // CHECK-NEXT: [[STATIC_S_A:%.*]] = load [[INT]], [[INT]]* [[STATIC_S_A_ADDR]] 724 // CHECK-NEXT: store [[INT]] [[STATIC_S_A]], [[INT]]* [[RES_ADDR:[^,]+]] 725 // CHECK-DEBUG: [[THREAD_NUM:%.+]] = call {{.*}}i32 @__kmpc_global_thread_num([[IDENT]]* {{.*}}) 726 // CHECK-DEBUG: [[STATIC_S_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[S3]]* [[STATIC_S]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 727 728 729 730 731 // CHECK-DEBUG-NEXT: [[STATIC_S_ADDR:%.*]] = bitcast i8* [[STATIC_S_TEMP_ADDR]] to [[S3]]* 732 // CHECK-DEBUG-NEXT: [[STATIC_S_A_ADDR:%.*]] = getelementptr inbounds [[S3]], [[S3]]* [[STATIC_S_ADDR]], i{{.*}} 0, i{{.*}} 0 733 // CHECK-DEBUG-NEXT: [[STATIC_S_A:%.*]] = load [[INT]], [[INT]]* [[STATIC_S_A_ADDR]] 734 // CHECK-DEBUG-NEXT: store [[INT]] [[STATIC_S_A]], [[INT]]* [[RES_ADDR:[^,]+]] 735 // CHECK-TLS: [[STATIC_S_ADDR:%.*]] = call [[S3]]* [[STATIC_S_TLS_INITD]] 736 // CHECK-TLS-NEXT: [[STATIC_S_A_ADDR:%.*]] = getelementptr inbounds [[S3]], [[S3]]* [[STATIC_S_ADDR]], i{{.*}} 0, i{{.*}} 0 737 // CHECK-TLS-NEXT: [[STATIC_S_A:%.*]] = load i32, i32* [[STATIC_S_A_ADDR]] 738 // CHECK-TLS-NEXT: store i32 [[STATIC_S_A]], i32* [[RES_ADDR:[^,]+]] 739 Res = Static::s.a; 740 // CHECK: [[GS1_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[S1]]* [[GS1]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[GS1]].cache.) 741 // CHECK-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* 742 // CHECK-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 743 // CHECK-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] 744 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 745 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS1_A]] 746 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 747 // CHECK-DEBUG-NEXT: [[GS1_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[S1]]* [[GS1]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 748 749 750 // CHECK-DEBUG-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* 751 // CHECK-DEBUG-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 752 // CHECK-DEBUG-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] 753 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 754 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS1_A]] 755 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 756 // CHECK-TLS: [[GS1_ADDR:%.*]] = call [[S1]]* [[GS1_TLS_INITD]] 757 // CHECK-TLS-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 758 // CHECK-TLS-NEXT: [[GS1_A:%.*]] = load i32, i32* [[GS1_A_ADDR]] 759 // CHECK-TLS-NEXT: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 760 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} i32 [[RES]], [[GS1_A]] 761 // CHECK-TLS-NEXT: store i32 [[ADD]], i32* [[RES_ADDR]] 762 Res += gs1.a; 763 // CHECK: [[GS2_A:%.*]] = load [[INT]], [[INT]]* getelementptr inbounds ([[S2]], [[S2]]* [[GS2]], i{{.*}} 0, i{{.*}} 0) 764 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 765 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS2_A]] 766 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 767 // CHECK-DEBUG: [[GS2_A:%.*]] = load [[INT]], [[INT]]* getelementptr inbounds ([[S2]], [[S2]]* [[GS2]], i{{.*}} 0, i{{.*}} 0) 768 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 769 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS2_A]] 770 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 771 // CHECK-TLS: [[GS2_A:%.*]] = load i32, i32* getelementptr inbounds ([[S2]], [[S2]]* [[GS2]], i{{.*}} 0, i{{.*}} 0) 772 // CHECK-TLS-NEXT: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 773 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} i32 [[RES]], [[GS2_A]] 774 // CHECK-TLS-NEXT: store i32 [[ADD]], i32* [[RES:.+]] 775 Res += gs2.a; 776 // CHECK: [[GS3_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[S5]]* [[GS3]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[GS3]].cache.) 777 // CHECK-NEXT: [[GS3_ADDR:%.*]] = bitcast i8* [[GS3_TEMP_ADDR]] to [[S5]]* 778 // CHECK-NEXT: [[GS3_A_ADDR:%.*]] = getelementptr inbounds [[S5]], [[S5]]* [[GS3_ADDR]], i{{.*}} 0, i{{.*}} 0 779 // CHECK-NEXT: [[GS3_A:%.*]] = load [[INT]], [[INT]]* [[GS3_A_ADDR]] 780 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 781 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS3_A]] 782 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 783 // CHECK-DEBUG-NEXT: [[GS3_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[S5]]* [[GS3]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 784 785 786 // CHECK-DEBUG-NEXT: [[GS3_ADDR:%.*]] = bitcast i8* [[GS3_TEMP_ADDR]] to [[S5]]* 787 // CHECK-DEBUG-NEXT: [[GS3_A_ADDR:%.*]] = getelementptr inbounds [[S5]], [[S5]]* [[GS3_ADDR]], i{{.*}} 0, i{{.*}} 0 788 // CHECK-DEBUG-NEXT: [[GS3_A:%.*]] = load [[INT]], [[INT]]* [[GS3_A_ADDR]] 789 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 790 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[GS3_A]] 791 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 792 // CHECK-TLS: [[GS3_ADDR:%.*]] = call [[S5]]* [[GS3_TLS_INITD]] 793 // CHECK-TLS-DEBUG: [[GS3_A_ADDR:%.*]] = getelementptr inbounds [[S5]], [[S5]]* [[GS3_ADDR]], i{{.*}} 0, i{{.*}} 0 794 // CHECK-TLS-DEBUG: [[GS3_A:%.*]] = load i32, i32* [[GS3_A_ADDR]] 795 // CHECK-TLS-DEBUG: [[RES:%.*]] = load i32, i32* [[RES_ADDR]] 796 // CHECK-TLS-DEBUG: [[ADD:%.*]]= add nsw i32 [[RES]], [[GS3_A]] 797 // CHECK-TLS-DEBUG: store i32 [[ADD]], i32* [[RES_ADDR]] 798 Res += gs3.a; 799 // CHECK: [[ARR_X_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([2 x [3 x [[S1]]]]* [[ARR_X]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[ARR_X]].cache.) 800 // CHECK-NEXT: [[ARR_X_ADDR:%.*]] = bitcast i8* [[ARR_X_TEMP_ADDR]] to [2 x [3 x [[S1]]]]* 801 // CHECK-NEXT: [[ARR_X_1_ADDR:%.*]] = getelementptr inbounds [2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X_ADDR]], i{{.*}} 0, i{{.*}} 1 802 // CHECK-NEXT: [[ARR_X_1_1_ADDR:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR_X_1_ADDR]], i{{.*}} 0, i{{.*}} 1 803 // CHECK-NEXT: [[ARR_X_1_1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_X_1_1_ADDR]], i{{.*}} 0, i{{.*}} 0 804 // CHECK-NEXT: [[ARR_X_1_1_A:%.*]] = load [[INT]], [[INT]]* [[ARR_X_1_1_A_ADDR]] 805 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 806 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ARR_X_1_1_A]] 807 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 808 // CHECK-DEBUG-NEXT: [[ARR_X_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([2 x [3 x [[S1]]]]* [[ARR_X]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 809 810 811 // CHECK-DEBUG-NEXT: [[ARR_X_ADDR:%.*]] = bitcast i8* [[ARR_X_TEMP_ADDR]] to [2 x [3 x [[S1]]]]* 812 // CHECK-DEBUG-NEXT: [[ARR_X_1_ADDR:%.*]] = getelementptr inbounds [2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X_ADDR]], i{{.*}} 0, i{{.*}} 1 813 // CHECK-DEBUG-NEXT: [[ARR_X_1_1_ADDR:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR_X_1_ADDR]], i{{.*}} 0, i{{.*}} 1 814 // CHECK-DEBUG-NEXT: [[ARR_X_1_1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_X_1_1_ADDR]], i{{.*}} 0, i{{.*}} 0 815 // CHECK-DEBUG-NEXT: [[ARR_X_1_1_A:%.*]] = load [[INT]], [[INT]]* [[ARR_X_1_1_A_ADDR]] 816 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 817 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ARR_X_1_1_A]] 818 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 819 // CHECK-TLS: [[ARR_X_ADDR:%.*]] = call [2 x [3 x [[S1]]]]* [[ARR_X_TLS_INITD]] 820 // CHECK-TLS-NEXT: [[ARR_X_1_ADDR:%.*]] = getelementptr inbounds [2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X_ADDR]], i{{.*}} 0, i{{.*}} 1 821 // CHECK-TLS-NEXT: [[ARR_X_1_1_ADDR:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR_X_1_ADDR]], i{{.*}} 0, i{{.*}} 1 822 // CHECK-TLS-NEXT: [[ARR_X_1_1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_X_1_1_ADDR]], i{{.*}} 0, i{{.*}} 0 823 // CHECK-TLS-NEXT: [[ARR_X_1_1_A:%.*]] = load [[INT]], [[INT]]* [[ARR_X_1_1_A_ADDR]] 824 // CHECK-TLS-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 825 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ARR_X_1_1_A]] 826 // CHECK-TLS-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 827 Res += arr_x[1][1].a; 828 // CHECK: [[ST_INT_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[INT]]* [[ST_INT_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[ST_INT_ST]].cache.) 829 // CHECK-NEXT: [[ST_INT_ST_ADDR:%.*]] = bitcast i8* [[ST_INT_ST_TEMP_ADDR]] to [[INT]]* 830 // CHECK-NEXT: [[ST_INT_ST_VAL:%.*]] = load [[INT]], [[INT]]* [[ST_INT_ST_ADDR]] 831 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 832 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ST_INT_ST_VAL]] 833 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 834 // CHECK-DEBUG-NEXT: [[ST_INT_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[INT]]* [[ST_INT_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 835 836 837 // CHECK-DEBUG-NEXT: [[ST_INT_ST_ADDR:%.*]] = bitcast i8* [[ST_INT_ST_TEMP_ADDR]] to [[INT]]* 838 // CHECK-DEBUG-NEXT: [[ST_INT_ST_VAL:%.*]] = load [[INT]], [[INT]]* [[ST_INT_ST_ADDR]] 839 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 840 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ST_INT_ST_VAL]] 841 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 842 // OMP45-TLS: [[ST_INT_ST_VAL:%.*]] = load [[INT]], [[INT]]* [[ST_INT_ST_ADDR:[^,]+]] 843 // OMP45-TLS-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 844 // OMP45-TLS-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ST_INT_ST_VAL]] 845 // OMP45-TLS-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 846 Res += ST<int>::st; 847 // CHECK: [[ST_FLOAT_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast (float* [[ST_FLOAT_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[ST_FLOAT_ST]].cache.) 848 // CHECK-NEXT: [[ST_FLOAT_ST_ADDR:%.*]] = bitcast i8* [[ST_FLOAT_ST_TEMP_ADDR]] to float* 849 // CHECK-NEXT: [[ST_FLOAT_ST_VAL:%.*]] = load float, float* [[ST_FLOAT_ST_ADDR]] 850 // CHECK-NEXT: [[FLOAT_TO_INT_CONV:%.*]] = fptosi float [[ST_FLOAT_ST_VAL]] to [[INT]] 851 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 852 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[FLOAT_TO_INT_CONV]] 853 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 854 // CHECK-DEBUG-NEXT: [[ST_FLOAT_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast (float* [[ST_FLOAT_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 855 856 857 // CHECK-DEBUG-NEXT: [[ST_FLOAT_ST_ADDR:%.*]] = bitcast i8* [[ST_FLOAT_ST_TEMP_ADDR]] to float* 858 // CHECK-DEBUG-NEXT: [[ST_FLOAT_ST_VAL:%.*]] = load float, float* [[ST_FLOAT_ST_ADDR]] 859 // CHECK-DEBUG-NEXT: [[FLOAT_TO_INT_CONV:%.*]] = fptosi float [[ST_FLOAT_ST_VAL]] to [[INT]] 860 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 861 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[FLOAT_TO_INT_CONV]] 862 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 863 // OMP45-TLS: [[ST_FLOAT_ST_VAL:%.*]] = load float, float* [[ST_FLOAT_ST_ADDR:[^,]+]] 864 // OMP45-TLS-NEXT: [[FLOAT_TO_INT_CONV:%.*]] = fptosi float [[ST_FLOAT_ST_VAL]] to [[INT]] 865 // OMP45-TLS-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 866 // OMP45-TLS-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[FLOAT_TO_INT_CONV]] 867 // OMP45-TLS-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 868 Res += static_cast<int>(ST<float>::st); 869 // CHECK: [[ST_S4_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* [[DEFAULT_LOC]], i32 {{.*}}, i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** [[ST_S4_ST]].cache.) 870 // CHECK-NEXT: [[ST_S4_ST_ADDR:%.*]] = bitcast i8* [[ST_S4_ST_TEMP_ADDR]] to [[S4]]* 871 // CHECK-NEXT: [[ST_S4_ST_A_ADDR:%.*]] = getelementptr inbounds [[S4]], [[S4]]* [[ST_S4_ST_ADDR]], i{{.*}} 0, i{{.*}} 0 872 // CHECK-NEXT: [[ST_S4_ST_A:%.*]] = load [[INT]], [[INT]]* [[ST_S4_ST_A_ADDR]] 873 // CHECK-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 874 // CHECK-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ST_S4_ST_A]] 875 // CHECK-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 876 // CHECK-DEBUG-NEXT: [[ST_S4_ST_TEMP_ADDR:%.*]] = call {{.*}}i8* @__kmpc_threadprivate_cached([[IDENT]]* {{.*}}, i32 {{.*}}, i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*), i{{.*}} {{[0-9]+}}, i8*** 877 878 879 // CHECK-DEBUG-NEXT: [[ST_S4_ST_ADDR:%.*]] = bitcast i8* [[ST_S4_ST_TEMP_ADDR]] to [[S4]]* 880 // CHECK-DEBUG-NEXT: [[ST_S4_ST_A_ADDR:%.*]] = getelementptr inbounds [[S4]], [[S4]]* [[ST_S4_ST_ADDR]], i{{.*}} 0, i{{.*}} 0 881 // CHECK-DEBUG-NEXT: [[ST_S4_ST_A:%.*]] = load [[INT]], [[INT]]* [[ST_S4_ST_A_ADDR]] 882 // CHECK-DEBUG-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 883 // CHECK-DEBUG-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ST_S4_ST_A]] 884 // CHECK-DEBUG-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 885 // CHECK-TLS: [[ST_S4_ST_ADDR:%.*]] = call [[S4]]* [[ST_S4_ST_TLS_INITD]] 886 // CHECK-TLS-NEXT: [[ST_S4_ST_A_ADDR:%.*]] = getelementptr inbounds [[S4]], [[S4]]* [[ST_S4_ST_ADDR]], i{{.*}} 0, i{{.*}} 0 887 // CHECK-TLS-NEXT: [[ST_S4_ST_A:%.*]] = load [[INT]], [[INT]]* [[ST_S4_ST_A_ADDR]] 888 // CHECK-TLS-NEXT: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 889 // CHECK-TLS-NEXT: [[ADD:%.*]] = add {{.*}} [[INT]] [[RES]], [[ST_S4_ST_A]] 890 // CHECK-TLS-NEXT: store [[INT]] [[ADD]], [[INT]]* [[RES:.+]] 891 Res += ST<S4>::st.a; 892 // CHECK: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 893 // CHECK-NEXT: ret [[INT]] [[RES]] 894 // CHECK-DEBUG: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 895 // CHECK-DEBUG-NEXT: ret [[INT]] [[RES]] 896 // CHECK-TLS: [[RES:%.*]] = load [[INT]], [[INT]]* [[RES_ADDR]] 897 // CHECK-TLS-NEXT: ret [[INT]] [[RES]] 898 return Res; 899 } 900 #endif 901 902 // OMP45: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[DEFAULT_LOC]], i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*), i8* (i8*)* [[ST_S4_ST_CTOR:@\.__kmpc_global_ctor_\..+]], i8* (i8*, i8*)* null, void (i8*)* [[ST_S4_ST_DTOR:@\.__kmpc_global_dtor_\..+]]) 903 // OMP45: define internal {{.*}}i8* [[ST_S4_ST_CTOR]](i8* %0) 904 // OMP45: store i8* %0, i8** [[ARG_ADDR:%.*]], 905 // OMP45: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 906 // OMP45: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S4]]* 907 // OMP45-NEXT: call {{.*}} [[S4_CTOR:@.+]]([[S4]]* {{[^,]*}} [[RES]], {{.*}} 23) 908 // OMP45: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 909 // OMP45-NEXT: ret i8* [[ARG]] 910 // OMP45-NEXT: } 911 // OMP45: define {{.*}} [[S4_CTOR]]([[S4]]* {{.*}}, 912 // OMP45: define internal {{.*}}void [[ST_S4_ST_DTOR]](i8* %0) 913 // OMP45: store i8* %0, i8** [[ARG_ADDR:%.*]], 914 // OMP45: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] 915 // OMP45: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S4]]* 916 // OMP45-NEXT: call {{.*}} [[S4_DTOR:@.+]]([[S4]]* {{[^,]*}} [[RES]]) 917 // OMP45-NEXT: ret void 918 // OMP45-NEXT: } 919 // OMP45: define {{.*}} [[S4_DTOR]]([[S4]]* {{.*}}) 920 921 922 923 924 // OMP45-DEBUG: @__kmpc_global_thread_num 925 // OMP45-DEBUG: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* {{.*}}, i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*), i8* (i8*)* [[ST_S4_ST_CTOR:@\.__kmpc_global_ctor_\..+]], i8* (i8*, i8*)* null, void (i8*)* [[ST_S4_ST_DTOR:@\.__kmpc_global_dtor_\..+]]) 926 // OMP45-DEBUG: define internal {{.*}}i8* [[ST_S4_ST_CTOR]](i8* %0) 927 // OMP45-DEBUG: } 928 // OMP45-DEBUG: define {{.*}} [[S4_CTOR:@.*]]([[S4]]* {{.*}}, 929 // OMP45-DEBUG: define internal {{.*}}void [[ST_S4_ST_DTOR]](i8* %0) 930 // OMP45-DEBUG: } 931 // OMP45-DEBUG: define {{.*}} [[S4_DTOR:@.*]]([[S4]]* {{.*}}) 932 933 // CHECK: define internal {{.*}}void {{@.*}}() 934 // CHECK-DAG: call {{.*}}void [[GS1_INIT]]() 935 // CHECK-DAG: call {{.*}}void [[ARR_X_INIT]]() 936 // CHECK: ret void 937 // CHECK-DEBUG: define internal {{.*}}void {{@.*}}() 938 // CHECK-DEBUG: ret void 939 940 // OMP45-TLS: define internal void [[GS1_CXX_INIT:@.*]]() 941 // OMP45-TLS: call void [[GS1_CTOR1:@.*]]([[S1]]* {{[^,]*}} [[GS1]], i32 5) 942 // OMP45-TLS: call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void ([[S1]]*)* [[GS1_DTOR1:.*]] to void (i8*)*), i8* bitcast ([[S1]]* [[GS1]] to i8*) 943 // OMP45-TLS: } 944 // OMP45-TLS: define {{.*}}void [[GS1_CTOR1]]([[S1]]* {{.*}}, i32 {{.*}}) 945 // OMP45-TLS: call void [[GS1_CTOR2:@.*]]([[S1]]* {{.*}}, i32 {{.*}}) 946 // OMP45-TLS: } 947 // OMP45-TLS: define {{.*}}void [[GS1_DTOR1]]([[S1]]* {{.*}}) 948 // OMP45-TLS: call void [[GS1_DTOR2:@.*]]([[S1]]* {{.*}}) 949 // OMP45-TLS: } 950 // OMP45-TLS: define {{.*}}void [[GS1_CTOR2]]([[S1]]* {{.*}}, i32 {{.*}}) 951 // OMP45-TLS: define {{.*}}void [[GS1_DTOR2]]([[S1]]* {{.*}}) 952 953 // OMP45-TLS: define internal void [[GS2_CXX_INIT:@.*]]() 954 // OMP45-TLS: call void [[GS2_CTOR1:@.*]]([[S2]]* {{[^,]*}} [[GS2]], i32 27) 955 // OMP45-TLS: call i32 @__cxa_atexit(void (i8*)* bitcast (void ([[S2]]*)* [[GS2_DTOR1:.*]] to void (i8*)*), i8* bitcast ([[S2]]* [[GS2]] to i8*) 956 // OMP45-TLS: } 957 // OMP45-TLS: define {{.*}}void [[GS2_CTOR1]]([[S2]]* {{.*}}, i32 {{.*}}) 958 // OMP45-TLS: call void [[GS2_CTOR2:@.*]]([[S2]]* {{.*}}, i32 {{.*}}) 959 // OMP45-TLS: } 960 // OMP45-TLS: define {{.*}}void [[GS2_DTOR1]]([[S2]]* {{.*}}) 961 // OMP45-TLS: call void [[GS2_DTOR2:@.*]]([[S2]]* {{.*}}) 962 // OMP45-TLS: } 963 // OMP45-TLS: define {{.*}}void [[GS2_CTOR2]]([[S2]]* {{.*}}, i32 {{.*}}) 964 // OMP45-TLS: define {{.*}}void [[GS2_DTOR2]]([[S2]]* {{.*}}) 965 966 // OMP45-TLS: define internal void [[ARR_X_CXX_INIT:@.*]]() 967 // OMP45-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 0), i{{.*}} 1) 968 // OMP45-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 1), i{{.*}} 2) 969 // OMP45-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 2), i{{.*}} 3) 970 // OMP45-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 0), i{{.*}} 4) 971 // OMP45-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 1), i{{.*}} 5) 972 // OMP45-TLS: invoke void [[GS1_CTOR1]]([[S1]]* {{[^,]*}} getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 2), i{{.*}} 6) 973 // OMP45-TLS: call i32 @__cxa_thread_atexit(void (i8*)* [[ARR_X_CXX_DTOR:@[^,]+]] 974 // OMP45-TLS: define internal void [[ARR_X_CXX_DTOR]](i8* %0) 975 // OMP45-TLS: void [[GS1_DTOR1]]([[S1]]* {{.*}}) 976 977 // OMP45-TLS: define {{.*}}void [[SM_CTOR2]]([[SMAIN]]* {{.*}}, i32 {{.*}}) 978 // OMP45-TLS: define {{.*}}void [[SM_DTOR2]]([[SMAIN]]* {{.*}}) 979 980 // OMP45-TLS: define internal void [[ST_S4_ST_CXX_INIT]]() 981 // OMP45-TLS: call void [[ST_S4_ST_CTOR1:@.*]]([[S4]]* {{[^,]*}} [[ST_S4_ST]], i32 23) 982 // OMP45-TLS: call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void ([[S4]]*)* [[ST_S4_ST_DTOR1:.*]] to void (i8*)*), i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*) 983 // OMP45-TLS: } 984 // OMP45-TLS: define {{.*}}void [[ST_S4_ST_CTOR1]]([[S4]]* {{.*}}, i32 {{.*}}) 985 // OMP45-TLS: call void [[ST_S4_ST_CTOR2:@.*]]([[S4]]* {{.*}}, i32 {{.*}}) 986 // OMP45-TLS: } 987 // OMP45-TLS: define {{.*}}void [[ST_S4_ST_DTOR1]]([[S4]]* {{.*}}) 988 // OMP45-TLS: call void [[ST_S4_ST_DTOR2:@.*]]([[S4]]* {{.*}}) 989 // OMP45-TLS: } 990 // OMP45-TLS: define {{.*}}void [[ST_S4_ST_CTOR2]]([[S4]]* {{.*}}, i32 {{.*}}) 991 // OMP45-TLS: define {{.*}}void [[ST_S4_ST_DTOR2]]([[S4]]* {{.*}}) 992 993 // OMP50-TLS: define internal void [[ST_S4_ST_CXX_INIT]]() 994 // OMP50-TLS: call void [[ST_S4_ST_CTOR1:@.*]]([[S4]]* {{[^,]*}} [[ST_S4_ST]], i32 23) 995 996 // OMP50-TLS: call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void ([[S4]]*)* [[ST_S4_ST_DTOR1:.*]] to void (i8*)*), i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*) 997 // OMP50-TLS: } 998 // OMP50-TLS: define {{.*}}void [[ST_S4_ST_CTOR1]]([[S4]]* {{.*}}, i32 {{.*}}) 999 // OMP50-TLS: call void [[ST_S4_ST_CTOR2:@.*]]([[S4]]* {{.*}}, i32 {{.*}}) 1000 // OMP50-TLS: } 1001 // OMP50-TLS: define {{.*}}void [[ST_S4_ST_DTOR1]]([[S4]]* {{.*}}) 1002 // OMP50-TLS: call void [[ST_S4_ST_DTOR2:@.*]]([[S4]]* {{.*}}) 1003 // OMP50-TLS: } 1004 // OMP50-TLS: define {{.*}}void [[ST_S4_ST_CTOR2]]([[S4]]* {{.*}}, i32 {{.*}}) 1005 // OMP50-TLS: define {{.*}}void [[ST_S4_ST_DTOR2]]([[S4]]* {{.*}}) 1006 1007 // CHECK-TLS: define internal void @__tls_init() 1008 // CHECK-TLS: [[GRD:%.*]] = load i8, i8* @__tls_guard 1009 // CHECK-TLS-NEXT: [[IS_INIT:%.*]] = icmp eq i8 [[GRD]], 0 1010 // CHECK-TLS-NEXT: br i1 [[IS_INIT]], label %[[INIT_LABEL:[^,]+]], label %[[DONE_LABEL:[^,]+]]{{.*}} 1011 // CHECK-TLS: [[INIT_LABEL]] 1012 // CHECK-TLS-NEXT: store i8 1, i8* @__tls_guard 1013 // CHECK-TLS: call void [[GS1_CXX_INIT]] 1014 // CHECK-TLS-NOT: call void [[GS2_CXX_INIT]] 1015 // CHECK-TLS: call void [[ARR_X_CXX_INIT]] 1016 // CHECK-TLS-NOT: call void [[ST_S4_ST_CXX_INIT]] 1017 // CHECK-TLS: [[DONE_LABEL]] 1018 1019 // CHECK-TLS-DAG: declare {{.*}} void [[GS3_TLS_INIT]] 1020 // CHECK-TLS-DAG: declare {{.*}} void [[STATIC_S_TLS_INIT]] 1021 // CHECK1-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_. 1022 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { 1023 // CHECK1-NEXT: entry: 1024 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1025 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1026 // CHECK1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1027 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S1* 1028 // CHECK1-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[TMP2]], i32 5) 1029 // CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1030 // CHECK1-NEXT: ret i8* [[TMP3]] 1031 // 1032 // 1033 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 1034 // CHECK1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1035 // CHECK1-NEXT: entry: 1036 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1037 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1038 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1039 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1040 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1041 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1042 // CHECK1-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 1043 // CHECK1-NEXT: ret void 1044 // 1045 // 1046 // CHECK1-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_. 1047 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 1048 // CHECK1-NEXT: entry: 1049 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1050 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1051 // CHECK1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1052 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S1* 1053 // CHECK1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[TMP2]]) #[[ATTR3:[0-9]+]] 1054 // CHECK1-NEXT: ret void 1055 // 1056 // 1057 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 1058 // CHECK1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 { 1059 // CHECK1-NEXT: entry: 1060 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1061 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1062 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1063 // CHECK1-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 1064 // CHECK1-NEXT: ret void 1065 // 1066 // 1067 // CHECK1-LABEL: define {{[^@]+}}@.__omp_threadprivate_init_. 1068 // CHECK1-SAME: () #[[ATTR0]] { 1069 // CHECK1-NEXT: entry: 1070 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 1071 // CHECK1-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB1]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* (i8*)* @.__kmpc_global_ctor_., i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_.) 1072 // CHECK1-NEXT: ret void 1073 // 1074 // 1075 // CHECK1-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..1 1076 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1077 // CHECK1-NEXT: entry: 1078 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1079 // CHECK1-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 1080 // CHECK1-NEXT: [[ARRAYINIT_ENDOFINIT2:%.*]] = alloca %struct.S1*, align 8 1081 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 1082 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 1083 // CHECK1-NEXT: [[ARRAYINIT_ENDOFINIT9:%.*]] = alloca %struct.S1*, align 8 1084 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1085 // CHECK1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1086 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to [2 x [3 x %struct.S1]]* 1087 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP2]], i64 0, i64 0 1088 // CHECK1-NEXT: store [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1089 // CHECK1-NEXT: [[ARRAYINIT_BEGIN1:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 0, i64 0 1090 // CHECK1-NEXT: store %struct.S1* [[ARRAYINIT_BEGIN1]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8 1091 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN1]], i32 1) 1092 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 1093 // CHECK1: invoke.cont: 1094 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYINIT_BEGIN1]], i64 1 1095 // CHECK1-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8 1096 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 1097 // CHECK1-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]] 1098 // CHECK1: invoke.cont3: 1099 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT4:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_ELEMENT]], i64 1 1100 // CHECK1-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT4]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8 1101 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT4]], i32 3) 1102 // CHECK1-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 1103 // CHECK1: invoke.cont5: 1104 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT7:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 1 1105 // CHECK1-NEXT: store [3 x %struct.S1]* [[ARRAYINIT_ELEMENT7]], [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1106 // CHECK1-NEXT: [[ARRAYINIT_BEGIN8:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_ELEMENT7]], i64 0, i64 0 1107 // CHECK1-NEXT: store %struct.S1* [[ARRAYINIT_BEGIN8]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8 1108 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN8]], i32 4) 1109 // CHECK1-NEXT: to label [[INVOKE_CONT11:%.*]] unwind label [[LPAD10:%.*]] 1110 // CHECK1: invoke.cont11: 1111 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT12:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_BEGIN8]], i64 1 1112 // CHECK1-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT12]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8 1113 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT12]], i32 5) 1114 // CHECK1-NEXT: to label [[INVOKE_CONT13:%.*]] unwind label [[LPAD10]] 1115 // CHECK1: invoke.cont13: 1116 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT14:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_ELEMENT12]], i64 1 1117 // CHECK1-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT14]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8 1118 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT14]], i32 6) 1119 // CHECK1-NEXT: to label [[INVOKE_CONT15:%.*]] unwind label [[LPAD10]] 1120 // CHECK1: invoke.cont15: 1121 // CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1122 // CHECK1-NEXT: ret i8* [[TMP3]] 1123 // CHECK1: lpad: 1124 // CHECK1-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 1125 // CHECK1-NEXT: cleanup 1126 // CHECK1-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 1127 // CHECK1-NEXT: store i8* [[TMP5]], i8** [[EXN_SLOT]], align 8 1128 // CHECK1-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 1 1129 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[EHSELECTOR_SLOT]], align 4 1130 // CHECK1-NEXT: [[TMP7:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8 1131 // CHECK1-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* [[ARRAYINIT_BEGIN1]], [[TMP7]] 1132 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY:%.*]] 1133 // CHECK1: arraydestroy.body: 1134 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP7]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1135 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1136 // CHECK1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 1137 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], [[ARRAYINIT_BEGIN1]] 1138 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6]], label [[ARRAYDESTROY_BODY]] 1139 // CHECK1: arraydestroy.done6: 1140 // CHECK1-NEXT: br label [[EHCLEANUP:%.*]] 1141 // CHECK1: lpad10: 1142 // CHECK1-NEXT: [[TMP8:%.*]] = landingpad { i8*, i32 } 1143 // CHECK1-NEXT: cleanup 1144 // CHECK1-NEXT: [[TMP9:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 0 1145 // CHECK1-NEXT: store i8* [[TMP9]], i8** [[EXN_SLOT]], align 8 1146 // CHECK1-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 1 1147 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[EHSELECTOR_SLOT]], align 4 1148 // CHECK1-NEXT: [[TMP11:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8 1149 // CHECK1-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* [[ARRAYINIT_BEGIN8]], [[TMP11]] 1150 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]] 1151 // CHECK1: arraydestroy.body17: 1152 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[TMP11]], [[LPAD10]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 1153 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1 1154 // CHECK1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]] 1155 // CHECK1-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], [[ARRAYINIT_BEGIN8]] 1156 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]] 1157 // CHECK1: arraydestroy.done21: 1158 // CHECK1-NEXT: br label [[EHCLEANUP]] 1159 // CHECK1: ehcleanup: 1160 // CHECK1-NEXT: [[TMP12:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1161 // CHECK1-NEXT: [[PAD_ARRAYBEGIN:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 0, i64 0 1162 // CHECK1-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP12]], i64 0, i64 0 1163 // CHECK1-NEXT: [[ARRAYDESTROY_ISEMPTY22:%.*]] = icmp eq %struct.S1* [[PAD_ARRAYBEGIN]], [[PAD_ARRAYEND]] 1164 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY22]], label [[ARRAYDESTROY_DONE27:%.*]], label [[ARRAYDESTROY_BODY23:%.*]] 1165 // CHECK1: arraydestroy.body23: 1166 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST24:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT25:%.*]], [[ARRAYDESTROY_BODY23]] ] 1167 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT25]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST24]], i64 -1 1168 // CHECK1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT25]]) #[[ATTR3]] 1169 // CHECK1-NEXT: [[ARRAYDESTROY_DONE26:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT25]], [[PAD_ARRAYBEGIN]] 1170 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE26]], label [[ARRAYDESTROY_DONE27]], label [[ARRAYDESTROY_BODY23]] 1171 // CHECK1: arraydestroy.done27: 1172 // CHECK1-NEXT: br label [[EH_RESUME:%.*]] 1173 // CHECK1: eh.resume: 1174 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 1175 // CHECK1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 1176 // CHECK1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 1177 // CHECK1-NEXT: [[LPAD_VAL28:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 1178 // CHECK1-NEXT: resume { i8*, i32 } [[LPAD_VAL28]] 1179 // 1180 // 1181 // CHECK1-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..2 1182 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 1183 // CHECK1-NEXT: entry: 1184 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1185 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1186 // CHECK1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1187 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = bitcast i8* [[TMP1]] to %struct.S1* 1188 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAY_BEGIN]], i64 6 1189 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1190 // CHECK1: arraydestroy.body: 1191 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1192 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1193 // CHECK1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 1194 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1195 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1196 // CHECK1: arraydestroy.done1: 1197 // CHECK1-NEXT: ret void 1198 // 1199 // 1200 // CHECK1-LABEL: define {{[^@]+}}@.__omp_threadprivate_init_..3 1201 // CHECK1-SAME: () #[[ATTR0]] { 1202 // CHECK1-NEXT: entry: 1203 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1204 // CHECK1-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB1]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i8* (i8*)* @.__kmpc_global_ctor_..1, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..2) 1205 // CHECK1-NEXT: ret void 1206 // 1207 // 1208 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init 1209 // CHECK1-SAME: () #[[ATTR0]] { 1210 // CHECK1-NEXT: entry: 1211 // CHECK1-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5) 1212 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR3]] 1213 // CHECK1-NEXT: ret void 1214 // 1215 // 1216 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 1217 // CHECK1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1218 // CHECK1-NEXT: entry: 1219 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1220 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1221 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1222 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1223 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1224 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 1225 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1226 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 1227 // CHECK1-NEXT: ret void 1228 // 1229 // 1230 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 1231 // CHECK1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1232 // CHECK1-NEXT: entry: 1233 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1234 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1235 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1236 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 1237 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1238 // CHECK1-NEXT: ret void 1239 // 1240 // 1241 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.4 1242 // CHECK1-SAME: () #[[ATTR0]] { 1243 // CHECK1-NEXT: entry: 1244 // CHECK1-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27) 1245 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR3]] 1246 // CHECK1-NEXT: ret void 1247 // 1248 // 1249 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 1250 // CHECK1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1251 // CHECK1-NEXT: entry: 1252 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 1253 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1254 // CHECK1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 1255 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1256 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 1257 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1258 // CHECK1-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]) 1259 // CHECK1-NEXT: ret void 1260 // 1261 // 1262 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 1263 // CHECK1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1264 // CHECK1-NEXT: entry: 1265 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 1266 // CHECK1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 1267 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 1268 // CHECK1-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR3]] 1269 // CHECK1-NEXT: ret void 1270 // 1271 // 1272 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 1273 // CHECK1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1274 // CHECK1-NEXT: entry: 1275 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 1276 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1277 // CHECK1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 1278 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1279 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 1280 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 1281 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1282 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 1283 // CHECK1-NEXT: ret void 1284 // 1285 // 1286 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 1287 // CHECK1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1288 // CHECK1-NEXT: entry: 1289 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 1290 // CHECK1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 1291 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 1292 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 1293 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8 1294 // CHECK1-NEXT: ret void 1295 // 1296 // 1297 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.5 1298 // CHECK1-SAME: () #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1299 // CHECK1-NEXT: entry: 1300 // CHECK1-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 1301 // CHECK1-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 1302 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 1303 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 1304 // CHECK1-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 1305 // CHECK1-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1306 // CHECK1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 1307 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 1308 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 1309 // CHECK1: invoke.cont: 1310 // CHECK1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 1311 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 1312 // CHECK1-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]] 1313 // CHECK1: invoke.cont2: 1314 // CHECK1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 1315 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 1316 // CHECK1-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]] 1317 // CHECK1: invoke.cont3: 1318 // CHECK1-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1319 // CHECK1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 1320 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 1321 // CHECK1-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]] 1322 // CHECK1: invoke.cont7: 1323 // CHECK1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 1324 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 1325 // CHECK1-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]] 1326 // CHECK1: invoke.cont8: 1327 // CHECK1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 1328 // CHECK1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 1329 // CHECK1-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]] 1330 // CHECK1: invoke.cont9: 1331 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR3]] 1332 // CHECK1-NEXT: ret void 1333 // CHECK1: lpad: 1334 // CHECK1-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 1335 // CHECK1-NEXT: cleanup 1336 // CHECK1-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0 1337 // CHECK1-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8 1338 // CHECK1-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1 1339 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4 1340 // CHECK1-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 1341 // CHECK1-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]] 1342 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]] 1343 // CHECK1: arraydestroy.body: 1344 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1345 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1346 // CHECK1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 1347 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 1348 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]] 1349 // CHECK1: arraydestroy.done4: 1350 // CHECK1-NEXT: br label [[EHCLEANUP:%.*]] 1351 // CHECK1: lpad6: 1352 // CHECK1-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 1353 // CHECK1-NEXT: cleanup 1354 // CHECK1-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0 1355 // CHECK1-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8 1356 // CHECK1-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1 1357 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4 1358 // CHECK1-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 1359 // CHECK1-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]] 1360 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]] 1361 // CHECK1: arraydestroy.body11: 1362 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ] 1363 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1 1364 // CHECK1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR3]] 1365 // CHECK1-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0) 1366 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]] 1367 // CHECK1: arraydestroy.done15: 1368 // CHECK1-NEXT: br label [[EHCLEANUP]] 1369 // CHECK1: ehcleanup: 1370 // CHECK1-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1371 // CHECK1-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0 1372 // CHECK1-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]] 1373 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]] 1374 // CHECK1: arraydestroy.body17: 1375 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 1376 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1 1377 // CHECK1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]] 1378 // CHECK1-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 1379 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]] 1380 // CHECK1: arraydestroy.done21: 1381 // CHECK1-NEXT: br label [[EH_RESUME:%.*]] 1382 // CHECK1: eh.resume: 1383 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 1384 // CHECK1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 1385 // CHECK1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 1386 // CHECK1-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 1387 // CHECK1-NEXT: resume { i8*, i32 } [[LPAD_VAL22]] 1388 // 1389 // 1390 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 1391 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 1392 // CHECK1-NEXT: entry: 1393 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1394 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1395 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1396 // CHECK1: arraydestroy.body: 1397 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1398 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1399 // CHECK1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 1400 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0) 1401 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1402 // CHECK1: arraydestroy.done1: 1403 // CHECK1-NEXT: ret void 1404 // 1405 // 1406 // CHECK1-LABEL: define {{[^@]+}}@main 1407 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1408 // CHECK1-NEXT: entry: 1409 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1410 // CHECK1-NEXT: [[RES:%.*]] = alloca i32, align 4 1411 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 1412 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 1413 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1414 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 1415 // CHECK1-NEXT: [[TMP1:%.*]] = load atomic i8, i8* bitcast (i64* @_ZGVZ4mainE2sm to i8*) acquire, align 8 1416 // CHECK1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP1]], 0 1417 // CHECK1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2:![0-9]+]] 1418 // CHECK1: init.check: 1419 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__cxa_guard_acquire(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 1420 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 1421 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[INIT:%.*]], label [[INIT_END]] 1422 // CHECK1: init: 1423 // CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1424 // CHECK1-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB1]], i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* (i8*)* @.__kmpc_global_ctor_..6, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..7) 1425 // CHECK1-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.) 1426 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1* 1427 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0 1428 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4 1429 // CHECK1-NEXT: invoke void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP6]]) 1430 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 1431 // CHECK1: invoke.cont: 1432 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR3]] 1433 // CHECK1-NEXT: call void @__cxa_guard_release(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 1434 // CHECK1-NEXT: br label [[INIT_END]] 1435 // CHECK1: init.end: 1436 // CHECK1-NEXT: [[TMP8:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S3* @_ZN6Static1sE to i8*), i64 8, i8*** @_ZN6Static1sE.cache.) 1437 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to %struct.S3* 1438 // CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP9]], i32 0, i32 0 1439 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[A1]], align 4 1440 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[RES]], align 4 1441 // CHECK1-NEXT: [[TMP11:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i64 24, i8*** @_ZZ4mainE2sm.cache.) 1442 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to %struct.Smain* 1443 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[TMP12]], i32 0, i32 0 1444 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[A2]], align 8 1445 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4 1446 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 1447 // CHECK1-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 1448 // CHECK1-NEXT: [[TMP15:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.) 1449 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i8* [[TMP15]] to %struct.S1* 1450 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP16]], i32 0, i32 0 1451 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[A3]], align 4 1452 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4 1453 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP17]] 1454 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 1455 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 1456 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4 1457 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP19]] 1458 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4 1459 // CHECK1-NEXT: [[TMP21:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S5* @gs3 to i8*), i64 12, i8*** @gs3.cache.) 1460 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to %struct.S5* 1461 // CHECK1-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP22]], i32 0, i32 0 1462 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[A6]], align 4 1463 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[RES]], align 4 1464 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP23]] 1465 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4 1466 // CHECK1-NEXT: [[TMP25:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i64 24, i8*** @arr_x.cache.) 1467 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to [2 x [3 x %struct.S1]]* 1468 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP26]], i64 0, i64 1 1469 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1 1470 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX8]], i32 0, i32 0 1471 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[A9]], align 4 1472 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[RES]], align 4 1473 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP28]], [[TMP27]] 1474 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[RES]], align 4 1475 // CHECK1-NEXT: [[TMP29:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (i32* @_ZN2STIiE2stE to i8*), i64 4, i8*** @_ZN2STIiE2stE.cache.) 1476 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i32* 1477 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 1478 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[RES]], align 4 1479 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP32]], [[TMP31]] 1480 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4 1481 // CHECK1-NEXT: [[TMP33:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (float* @_ZN2STIfE2stE to i8*), i64 4, i8*** @_ZN2STIfE2stE.cache.) 1482 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast i8* [[TMP33]] to float* 1483 // CHECK1-NEXT: [[TMP35:%.*]] = load float, float* [[TMP34]], align 4 1484 // CHECK1-NEXT: [[CONV:%.*]] = fptosi float [[TMP35]] to i32 1485 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[RES]], align 4 1486 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP36]], [[CONV]] 1487 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[RES]], align 4 1488 // CHECK1-NEXT: [[TMP37:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i64 8, i8*** @_ZN2STI2S4E2stE.cache.) 1489 // CHECK1-NEXT: [[TMP38:%.*]] = bitcast i8* [[TMP37]] to %struct.S4* 1490 // CHECK1-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP38]], i32 0, i32 0 1491 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[A13]], align 4 1492 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[RES]], align 4 1493 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP40]], [[TMP39]] 1494 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[RES]], align 4 1495 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[RES]], align 4 1496 // CHECK1-NEXT: ret i32 [[TMP41]] 1497 // CHECK1: lpad: 1498 // CHECK1-NEXT: [[TMP42:%.*]] = landingpad { i8*, i32 } 1499 // CHECK1-NEXT: cleanup 1500 // CHECK1-NEXT: [[TMP43:%.*]] = extractvalue { i8*, i32 } [[TMP42]], 0 1501 // CHECK1-NEXT: store i8* [[TMP43]], i8** [[EXN_SLOT]], align 8 1502 // CHECK1-NEXT: [[TMP44:%.*]] = extractvalue { i8*, i32 } [[TMP42]], 1 1503 // CHECK1-NEXT: store i32 [[TMP44]], i32* [[EHSELECTOR_SLOT]], align 4 1504 // CHECK1-NEXT: call void @__cxa_guard_abort(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 1505 // CHECK1-NEXT: br label [[EH_RESUME:%.*]] 1506 // CHECK1: eh.resume: 1507 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 1508 // CHECK1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 1509 // CHECK1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 1510 // CHECK1-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 1511 // CHECK1-NEXT: resume { i8*, i32 } [[LPAD_VAL15]] 1512 // 1513 // 1514 // CHECK1-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..6 1515 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 1516 // CHECK1-NEXT: entry: 1517 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1518 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1519 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1520 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1521 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.Smain* 1522 // CHECK1-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.) 1523 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1* 1524 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0 1525 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4 1526 // CHECK1-NEXT: call void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[TMP3]], i32 [[TMP6]]) 1527 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1528 // CHECK1-NEXT: ret i8* [[TMP7]] 1529 // 1530 // 1531 // CHECK1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 1532 // CHECK1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1533 // CHECK1-NEXT: entry: 1534 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 1535 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1536 // CHECK1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 1537 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1538 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 1539 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1540 // CHECK1-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]) 1541 // CHECK1-NEXT: ret void 1542 // 1543 // 1544 // CHECK1-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..7 1545 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 1546 // CHECK1-NEXT: entry: 1547 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1548 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1549 // CHECK1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1550 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.Smain* 1551 // CHECK1-NEXT: call void @_ZZ4mainEN5SmainD1Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[TMP2]]) #[[ATTR3]] 1552 // CHECK1-NEXT: ret void 1553 // 1554 // 1555 // CHECK1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 1556 // CHECK1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 1557 // CHECK1-NEXT: entry: 1558 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 1559 // CHECK1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 1560 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 1561 // CHECK1-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]] 1562 // CHECK1-NEXT: ret void 1563 // 1564 // 1565 // CHECK1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 1566 // CHECK1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 1567 // CHECK1-NEXT: entry: 1568 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 1569 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1570 // CHECK1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 1571 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1572 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 1573 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 1574 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1575 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 1576 // CHECK1-NEXT: ret void 1577 // 1578 // 1579 // CHECK1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 1580 // CHECK1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 1581 // CHECK1-NEXT: entry: 1582 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 1583 // CHECK1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 1584 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 1585 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 1586 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8 1587 // CHECK1-NEXT: ret void 1588 // 1589 // 1590 // CHECK1-LABEL: define {{[^@]+}}@_Z6foobarv 1591 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 1592 // CHECK1-NEXT: entry: 1593 // CHECK1-NEXT: [[RES:%.*]] = alloca i32, align 4 1594 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1595 // CHECK1-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S3* @_ZN6Static1sE to i8*), i64 8, i8*** @_ZN6Static1sE.cache.) 1596 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S3* 1597 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP2]], i32 0, i32 0 1598 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 1599 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[RES]], align 4 1600 // CHECK1-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.) 1601 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1* 1602 // CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0 1603 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[A1]], align 4 1604 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[RES]], align 4 1605 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], [[TMP6]] 1606 // CHECK1-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 1607 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 1608 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[RES]], align 4 1609 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], [[TMP8]] 1610 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4 1611 // CHECK1-NEXT: [[TMP10:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S5* @gs3 to i8*), i64 12, i8*** @gs3.cache.) 1612 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to %struct.S5* 1613 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP11]], i32 0, i32 0 1614 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[A3]], align 4 1615 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[RES]], align 4 1616 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP12]] 1617 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 1618 // CHECK1-NEXT: [[TMP14:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i64 24, i8*** @arr_x.cache.) 1619 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to [2 x [3 x %struct.S1]]* 1620 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP15]], i64 0, i64 1 1621 // CHECK1-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1 1622 // CHECK1-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX5]], i32 0, i32 0 1623 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[A6]], align 4 1624 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[RES]], align 4 1625 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP16]] 1626 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4 1627 // CHECK1-NEXT: [[TMP18:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (i32* @_ZN2STIiE2stE to i8*), i64 4, i8*** @_ZN2STIiE2stE.cache.) 1628 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to i32* 1629 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1630 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4 1631 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], [[TMP20]] 1632 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[RES]], align 4 1633 // CHECK1-NEXT: [[TMP22:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (float* @_ZN2STIfE2stE to i8*), i64 4, i8*** @_ZN2STIfE2stE.cache.) 1634 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to float* 1635 // CHECK1-NEXT: [[TMP24:%.*]] = load float, float* [[TMP23]], align 4 1636 // CHECK1-NEXT: [[CONV:%.*]] = fptosi float [[TMP24]] to i32 1637 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[RES]], align 4 1638 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[CONV]] 1639 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4 1640 // CHECK1-NEXT: [[TMP26:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i64 8, i8*** @_ZN2STI2S4E2stE.cache.) 1641 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8* [[TMP26]] to %struct.S4* 1642 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP27]], i32 0, i32 0 1643 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[A10]], align 4 1644 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[RES]], align 4 1645 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], [[TMP28]] 1646 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4 1647 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[RES]], align 4 1648 // CHECK1-NEXT: ret i32 [[TMP30]] 1649 // 1650 // 1651 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.8 1652 // CHECK1-SAME: () #[[ATTR0]] comdat($_ZN2STI2S4E2stE) { 1653 // CHECK1-NEXT: entry: 1654 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 1655 // CHECK1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 1656 // CHECK1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]] 1657 // CHECK1: init.check: 1658 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1659 // CHECK1-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB1]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* (i8*)* @.__kmpc_global_ctor_..9, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..10) 1660 // CHECK1-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23) 1661 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR3]] 1662 // CHECK1-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 1663 // CHECK1-NEXT: br label [[INIT_END]] 1664 // CHECK1: init.end: 1665 // CHECK1-NEXT: ret void 1666 // 1667 // 1668 // CHECK1-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..9 1669 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 1670 // CHECK1-NEXT: entry: 1671 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1672 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1673 // CHECK1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1674 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S4* 1675 // CHECK1-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[TMP2]], i32 23) 1676 // CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1677 // CHECK1-NEXT: ret i8* [[TMP3]] 1678 // 1679 // 1680 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 1681 // CHECK1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1682 // CHECK1-NEXT: entry: 1683 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 1684 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1685 // CHECK1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 1686 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1687 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 1688 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1689 // CHECK1-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]) 1690 // CHECK1-NEXT: ret void 1691 // 1692 // 1693 // CHECK1-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..10 1694 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 1695 // CHECK1-NEXT: entry: 1696 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1697 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1698 // CHECK1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1699 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S4* 1700 // CHECK1-NEXT: call void @_ZN2S4D1Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[TMP2]]) #[[ATTR3]] 1701 // CHECK1-NEXT: ret void 1702 // 1703 // 1704 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 1705 // CHECK1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1706 // CHECK1-NEXT: entry: 1707 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 1708 // CHECK1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 1709 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 1710 // CHECK1-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]] 1711 // CHECK1-NEXT: ret void 1712 // 1713 // 1714 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 1715 // CHECK1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1716 // CHECK1-NEXT: entry: 1717 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 1718 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1719 // CHECK1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 1720 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1721 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 1722 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 1723 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1724 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 1725 // CHECK1-NEXT: ret void 1726 // 1727 // 1728 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 1729 // CHECK1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1730 // CHECK1-NEXT: entry: 1731 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 1732 // CHECK1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 1733 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 1734 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 1735 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1736 // CHECK1-NEXT: ret void 1737 // 1738 // 1739 // CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 1740 // CHECK1-SAME: () #[[ATTR0]] { 1741 // CHECK1-NEXT: entry: 1742 // CHECK1-NEXT: call void @__cxx_global_var_init() 1743 // CHECK1-NEXT: call void @.__omp_threadprivate_init_.() 1744 // CHECK1-NEXT: call void @__cxx_global_var_init.4() 1745 // CHECK1-NEXT: call void @__cxx_global_var_init.5() 1746 // CHECK1-NEXT: call void @.__omp_threadprivate_init_..3() 1747 // CHECK1-NEXT: ret void 1748 // 1749 // 1750 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init 1751 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 1752 // CHECK2-NEXT: entry: 1753 // CHECK2-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5) 1754 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR3:[0-9]+]] 1755 // CHECK2-NEXT: ret void 1756 // 1757 // 1758 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 1759 // CHECK2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1760 // CHECK2-NEXT: entry: 1761 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1762 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1763 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1764 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1765 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1766 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1767 // CHECK2-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 1768 // CHECK2-NEXT: ret void 1769 // 1770 // 1771 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 1772 // CHECK2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 { 1773 // CHECK2-NEXT: entry: 1774 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1775 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1776 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1777 // CHECK2-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 1778 // CHECK2-NEXT: ret void 1779 // 1780 // 1781 // CHECK2-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_. 1782 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 1783 // CHECK2-NEXT: entry: 1784 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1785 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1786 // CHECK2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1787 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S1* 1788 // CHECK2-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[TMP2]], i32 5) 1789 // CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1790 // CHECK2-NEXT: ret i8* [[TMP3]] 1791 // 1792 // 1793 // CHECK2-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_. 1794 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 1795 // CHECK2-NEXT: entry: 1796 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1797 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1798 // CHECK2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1799 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S1* 1800 // CHECK2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[TMP2]]) #[[ATTR3]] 1801 // CHECK2-NEXT: ret void 1802 // 1803 // 1804 // CHECK2-LABEL: define {{[^@]+}}@.__omp_threadprivate_init_. 1805 // CHECK2-SAME: () #[[ATTR0]] { 1806 // CHECK2-NEXT: entry: 1807 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 1808 // CHECK2-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB1]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* (i8*)* @.__kmpc_global_ctor_., i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_.) 1809 // CHECK2-NEXT: ret void 1810 // 1811 // 1812 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 1813 // CHECK2-SAME: () #[[ATTR0]] { 1814 // CHECK2-NEXT: entry: 1815 // CHECK2-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27) 1816 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR3]] 1817 // CHECK2-NEXT: ret void 1818 // 1819 // 1820 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 1821 // CHECK2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1822 // CHECK2-NEXT: entry: 1823 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 1824 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1825 // CHECK2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 1826 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1827 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 1828 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1829 // CHECK2-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]) 1830 // CHECK2-NEXT: ret void 1831 // 1832 // 1833 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 1834 // CHECK2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1835 // CHECK2-NEXT: entry: 1836 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 1837 // CHECK2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 1838 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 1839 // CHECK2-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR3]] 1840 // CHECK2-NEXT: ret void 1841 // 1842 // 1843 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 1844 // CHECK2-SAME: () #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1845 // CHECK2-NEXT: entry: 1846 // CHECK2-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 1847 // CHECK2-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 1848 // CHECK2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 1849 // CHECK2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 1850 // CHECK2-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 1851 // CHECK2-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1852 // CHECK2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 1853 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 1854 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 1855 // CHECK2: invoke.cont: 1856 // CHECK2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 1857 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 1858 // CHECK2-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]] 1859 // CHECK2: invoke.cont2: 1860 // CHECK2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 1861 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 1862 // CHECK2-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]] 1863 // CHECK2: invoke.cont3: 1864 // CHECK2-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1865 // CHECK2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 1866 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 1867 // CHECK2-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]] 1868 // CHECK2: invoke.cont7: 1869 // CHECK2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 1870 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 1871 // CHECK2-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]] 1872 // CHECK2: invoke.cont8: 1873 // CHECK2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 1874 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 1875 // CHECK2-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]] 1876 // CHECK2: invoke.cont9: 1877 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR3]] 1878 // CHECK2-NEXT: ret void 1879 // CHECK2: lpad: 1880 // CHECK2-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 1881 // CHECK2-NEXT: cleanup 1882 // CHECK2-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0 1883 // CHECK2-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8 1884 // CHECK2-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1 1885 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4 1886 // CHECK2-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 1887 // CHECK2-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]] 1888 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]] 1889 // CHECK2: arraydestroy.body: 1890 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1891 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1892 // CHECK2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 1893 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 1894 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]] 1895 // CHECK2: arraydestroy.done4: 1896 // CHECK2-NEXT: br label [[EHCLEANUP:%.*]] 1897 // CHECK2: lpad6: 1898 // CHECK2-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 1899 // CHECK2-NEXT: cleanup 1900 // CHECK2-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0 1901 // CHECK2-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8 1902 // CHECK2-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1 1903 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4 1904 // CHECK2-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 1905 // CHECK2-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]] 1906 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]] 1907 // CHECK2: arraydestroy.body11: 1908 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ] 1909 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1 1910 // CHECK2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR3]] 1911 // CHECK2-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0) 1912 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]] 1913 // CHECK2: arraydestroy.done15: 1914 // CHECK2-NEXT: br label [[EHCLEANUP]] 1915 // CHECK2: ehcleanup: 1916 // CHECK2-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1917 // CHECK2-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0 1918 // CHECK2-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]] 1919 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]] 1920 // CHECK2: arraydestroy.body17: 1921 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 1922 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1 1923 // CHECK2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]] 1924 // CHECK2-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 1925 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]] 1926 // CHECK2: arraydestroy.done21: 1927 // CHECK2-NEXT: br label [[EH_RESUME:%.*]] 1928 // CHECK2: eh.resume: 1929 // CHECK2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 1930 // CHECK2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 1931 // CHECK2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 1932 // CHECK2-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 1933 // CHECK2-NEXT: resume { i8*, i32 } [[LPAD_VAL22]] 1934 // 1935 // 1936 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 1937 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 1938 // CHECK2-NEXT: entry: 1939 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1940 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1941 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1942 // CHECK2: arraydestroy.body: 1943 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1944 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1945 // CHECK2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 1946 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0) 1947 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1948 // CHECK2: arraydestroy.done1: 1949 // CHECK2-NEXT: ret void 1950 // 1951 // 1952 // CHECK2-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..3 1953 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1954 // CHECK2-NEXT: entry: 1955 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1956 // CHECK2-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 1957 // CHECK2-NEXT: [[ARRAYINIT_ENDOFINIT2:%.*]] = alloca %struct.S1*, align 8 1958 // CHECK2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 1959 // CHECK2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 1960 // CHECK2-NEXT: [[ARRAYINIT_ENDOFINIT9:%.*]] = alloca %struct.S1*, align 8 1961 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1962 // CHECK2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1963 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to [2 x [3 x %struct.S1]]* 1964 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP2]], i64 0, i64 0 1965 // CHECK2-NEXT: store [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1966 // CHECK2-NEXT: [[ARRAYINIT_BEGIN1:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 0, i64 0 1967 // CHECK2-NEXT: store %struct.S1* [[ARRAYINIT_BEGIN1]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8 1968 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN1]], i32 1) 1969 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 1970 // CHECK2: invoke.cont: 1971 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYINIT_BEGIN1]], i64 1 1972 // CHECK2-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8 1973 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 1974 // CHECK2-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]] 1975 // CHECK2: invoke.cont3: 1976 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT4:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_ELEMENT]], i64 1 1977 // CHECK2-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT4]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8 1978 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT4]], i32 3) 1979 // CHECK2-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 1980 // CHECK2: invoke.cont5: 1981 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT7:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 1 1982 // CHECK2-NEXT: store [3 x %struct.S1]* [[ARRAYINIT_ELEMENT7]], [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 1983 // CHECK2-NEXT: [[ARRAYINIT_BEGIN8:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_ELEMENT7]], i64 0, i64 0 1984 // CHECK2-NEXT: store %struct.S1* [[ARRAYINIT_BEGIN8]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8 1985 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN8]], i32 4) 1986 // CHECK2-NEXT: to label [[INVOKE_CONT11:%.*]] unwind label [[LPAD10:%.*]] 1987 // CHECK2: invoke.cont11: 1988 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT12:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_BEGIN8]], i64 1 1989 // CHECK2-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT12]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8 1990 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT12]], i32 5) 1991 // CHECK2-NEXT: to label [[INVOKE_CONT13:%.*]] unwind label [[LPAD10]] 1992 // CHECK2: invoke.cont13: 1993 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT14:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_ELEMENT12]], i64 1 1994 // CHECK2-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT14]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8 1995 // CHECK2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT14]], i32 6) 1996 // CHECK2-NEXT: to label [[INVOKE_CONT15:%.*]] unwind label [[LPAD10]] 1997 // CHECK2: invoke.cont15: 1998 // CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1999 // CHECK2-NEXT: ret i8* [[TMP3]] 2000 // CHECK2: lpad: 2001 // CHECK2-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 2002 // CHECK2-NEXT: cleanup 2003 // CHECK2-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 2004 // CHECK2-NEXT: store i8* [[TMP5]], i8** [[EXN_SLOT]], align 8 2005 // CHECK2-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 1 2006 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[EHSELECTOR_SLOT]], align 4 2007 // CHECK2-NEXT: [[TMP7:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8 2008 // CHECK2-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* [[ARRAYINIT_BEGIN1]], [[TMP7]] 2009 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY:%.*]] 2010 // CHECK2: arraydestroy.body: 2011 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP7]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2012 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2013 // CHECK2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2014 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], [[ARRAYINIT_BEGIN1]] 2015 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6]], label [[ARRAYDESTROY_BODY]] 2016 // CHECK2: arraydestroy.done6: 2017 // CHECK2-NEXT: br label [[EHCLEANUP:%.*]] 2018 // CHECK2: lpad10: 2019 // CHECK2-NEXT: [[TMP8:%.*]] = landingpad { i8*, i32 } 2020 // CHECK2-NEXT: cleanup 2021 // CHECK2-NEXT: [[TMP9:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 0 2022 // CHECK2-NEXT: store i8* [[TMP9]], i8** [[EXN_SLOT]], align 8 2023 // CHECK2-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 1 2024 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[EHSELECTOR_SLOT]], align 4 2025 // CHECK2-NEXT: [[TMP11:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8 2026 // CHECK2-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* [[ARRAYINIT_BEGIN8]], [[TMP11]] 2027 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]] 2028 // CHECK2: arraydestroy.body17: 2029 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[TMP11]], [[LPAD10]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 2030 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1 2031 // CHECK2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]] 2032 // CHECK2-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], [[ARRAYINIT_BEGIN8]] 2033 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]] 2034 // CHECK2: arraydestroy.done21: 2035 // CHECK2-NEXT: br label [[EHCLEANUP]] 2036 // CHECK2: ehcleanup: 2037 // CHECK2-NEXT: [[TMP12:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 2038 // CHECK2-NEXT: [[PAD_ARRAYBEGIN:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 0, i64 0 2039 // CHECK2-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP12]], i64 0, i64 0 2040 // CHECK2-NEXT: [[ARRAYDESTROY_ISEMPTY22:%.*]] = icmp eq %struct.S1* [[PAD_ARRAYBEGIN]], [[PAD_ARRAYEND]] 2041 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY22]], label [[ARRAYDESTROY_DONE27:%.*]], label [[ARRAYDESTROY_BODY23:%.*]] 2042 // CHECK2: arraydestroy.body23: 2043 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST24:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT25:%.*]], [[ARRAYDESTROY_BODY23]] ] 2044 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT25]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST24]], i64 -1 2045 // CHECK2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT25]]) #[[ATTR3]] 2046 // CHECK2-NEXT: [[ARRAYDESTROY_DONE26:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT25]], [[PAD_ARRAYBEGIN]] 2047 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE26]], label [[ARRAYDESTROY_DONE27]], label [[ARRAYDESTROY_BODY23]] 2048 // CHECK2: arraydestroy.done27: 2049 // CHECK2-NEXT: br label [[EH_RESUME:%.*]] 2050 // CHECK2: eh.resume: 2051 // CHECK2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2052 // CHECK2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 2053 // CHECK2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 2054 // CHECK2-NEXT: [[LPAD_VAL28:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 2055 // CHECK2-NEXT: resume { i8*, i32 } [[LPAD_VAL28]] 2056 // 2057 // 2058 // CHECK2-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..4 2059 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 2060 // CHECK2-NEXT: entry: 2061 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2062 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2063 // CHECK2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2064 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = bitcast i8* [[TMP1]] to %struct.S1* 2065 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAY_BEGIN]], i64 6 2066 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2067 // CHECK2: arraydestroy.body: 2068 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2069 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2070 // CHECK2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2071 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2072 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 2073 // CHECK2: arraydestroy.done1: 2074 // CHECK2-NEXT: ret void 2075 // 2076 // 2077 // CHECK2-LABEL: define {{[^@]+}}@.__omp_threadprivate_init_..5 2078 // CHECK2-SAME: () #[[ATTR0]] { 2079 // CHECK2-NEXT: entry: 2080 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 2081 // CHECK2-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB1]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i8* (i8*)* @.__kmpc_global_ctor_..3, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..4) 2082 // CHECK2-NEXT: ret void 2083 // 2084 // 2085 // CHECK2-LABEL: define {{[^@]+}}@main 2086 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2087 // CHECK2-NEXT: entry: 2088 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2089 // CHECK2-NEXT: [[RES:%.*]] = alloca i32, align 4 2090 // CHECK2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 2091 // CHECK2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 2092 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 2093 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 2094 // CHECK2-NEXT: [[TMP1:%.*]] = load atomic i8, i8* bitcast (i64* @_ZGVZ4mainE2sm to i8*) acquire, align 8 2095 // CHECK2-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP1]], 0 2096 // CHECK2-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2:![0-9]+]] 2097 // CHECK2: init.check: 2098 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__cxa_guard_acquire(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 2099 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 2100 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[INIT:%.*]], label [[INIT_END]] 2101 // CHECK2: init: 2102 // CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 2103 // CHECK2-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB1]], i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* (i8*)* @.__kmpc_global_ctor_..6, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..7) 2104 // CHECK2-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.) 2105 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1* 2106 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0 2107 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4 2108 // CHECK2-NEXT: invoke void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP6]]) 2109 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 2110 // CHECK2: invoke.cont: 2111 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR3]] 2112 // CHECK2-NEXT: call void @__cxa_guard_release(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 2113 // CHECK2-NEXT: br label [[INIT_END]] 2114 // CHECK2: init.end: 2115 // CHECK2-NEXT: [[TMP8:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S3* @_ZN6Static1sE to i8*), i64 8, i8*** @_ZN6Static1sE.cache.) 2116 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to %struct.S3* 2117 // CHECK2-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP9]], i32 0, i32 0 2118 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[A1]], align 4 2119 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[RES]], align 4 2120 // CHECK2-NEXT: [[TMP11:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i64 24, i8*** @_ZZ4mainE2sm.cache.) 2121 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to %struct.Smain* 2122 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[TMP12]], i32 0, i32 0 2123 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[A2]], align 8 2124 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4 2125 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 2126 // CHECK2-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 2127 // CHECK2-NEXT: [[TMP15:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.) 2128 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i8* [[TMP15]] to %struct.S1* 2129 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP16]], i32 0, i32 0 2130 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[A3]], align 4 2131 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4 2132 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP17]] 2133 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 2134 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 2135 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4 2136 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP19]] 2137 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4 2138 // CHECK2-NEXT: [[TMP21:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S5* @gs3 to i8*), i64 12, i8*** @gs3.cache.) 2139 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to %struct.S5* 2140 // CHECK2-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP22]], i32 0, i32 0 2141 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[A6]], align 4 2142 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[RES]], align 4 2143 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP23]] 2144 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4 2145 // CHECK2-NEXT: [[TMP25:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i64 24, i8*** @arr_x.cache.) 2146 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to [2 x [3 x %struct.S1]]* 2147 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP26]], i64 0, i64 1 2148 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1 2149 // CHECK2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX8]], i32 0, i32 0 2150 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[A9]], align 4 2151 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[RES]], align 4 2152 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP28]], [[TMP27]] 2153 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[RES]], align 4 2154 // CHECK2-NEXT: [[TMP29:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (i32* @_ZN2STIiE2stE to i8*), i64 4, i8*** @_ZN2STIiE2stE.cache.) 2155 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i32* 2156 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 2157 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[RES]], align 4 2158 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP32]], [[TMP31]] 2159 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4 2160 // CHECK2-NEXT: [[TMP33:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (float* @_ZN2STIfE2stE to i8*), i64 4, i8*** @_ZN2STIfE2stE.cache.) 2161 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast i8* [[TMP33]] to float* 2162 // CHECK2-NEXT: [[TMP35:%.*]] = load float, float* [[TMP34]], align 4 2163 // CHECK2-NEXT: [[CONV:%.*]] = fptosi float [[TMP35]] to i32 2164 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[RES]], align 4 2165 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP36]], [[CONV]] 2166 // CHECK2-NEXT: store i32 [[ADD12]], i32* [[RES]], align 4 2167 // CHECK2-NEXT: [[TMP37:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i64 8, i8*** @_ZN2STI2S4E2stE.cache.) 2168 // CHECK2-NEXT: [[TMP38:%.*]] = bitcast i8* [[TMP37]] to %struct.S4* 2169 // CHECK2-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP38]], i32 0, i32 0 2170 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[A13]], align 4 2171 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[RES]], align 4 2172 // CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP40]], [[TMP39]] 2173 // CHECK2-NEXT: store i32 [[ADD14]], i32* [[RES]], align 4 2174 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[RES]], align 4 2175 // CHECK2-NEXT: ret i32 [[TMP41]] 2176 // CHECK2: lpad: 2177 // CHECK2-NEXT: [[TMP42:%.*]] = landingpad { i8*, i32 } 2178 // CHECK2-NEXT: cleanup 2179 // CHECK2-NEXT: [[TMP43:%.*]] = extractvalue { i8*, i32 } [[TMP42]], 0 2180 // CHECK2-NEXT: store i8* [[TMP43]], i8** [[EXN_SLOT]], align 8 2181 // CHECK2-NEXT: [[TMP44:%.*]] = extractvalue { i8*, i32 } [[TMP42]], 1 2182 // CHECK2-NEXT: store i32 [[TMP44]], i32* [[EHSELECTOR_SLOT]], align 4 2183 // CHECK2-NEXT: call void @__cxa_guard_abort(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 2184 // CHECK2-NEXT: br label [[EH_RESUME:%.*]] 2185 // CHECK2: eh.resume: 2186 // CHECK2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2187 // CHECK2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 2188 // CHECK2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 2189 // CHECK2-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 2190 // CHECK2-NEXT: resume { i8*, i32 } [[LPAD_VAL15]] 2191 // 2192 // 2193 // CHECK2-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..6 2194 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 2195 // CHECK2-NEXT: entry: 2196 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2197 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 2198 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2199 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2200 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.Smain* 2201 // CHECK2-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.) 2202 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1* 2203 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0 2204 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4 2205 // CHECK2-NEXT: call void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[TMP3]], i32 [[TMP6]]) 2206 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2207 // CHECK2-NEXT: ret i8* [[TMP7]] 2208 // 2209 // 2210 // CHECK2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 2211 // CHECK2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 2212 // CHECK2-NEXT: entry: 2213 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 2214 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2215 // CHECK2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 2216 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2217 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 2218 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2219 // CHECK2-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]) 2220 // CHECK2-NEXT: ret void 2221 // 2222 // 2223 // CHECK2-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..7 2224 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 2225 // CHECK2-NEXT: entry: 2226 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2227 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2228 // CHECK2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2229 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.Smain* 2230 // CHECK2-NEXT: call void @_ZZ4mainEN5SmainD1Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[TMP2]]) #[[ATTR3]] 2231 // CHECK2-NEXT: ret void 2232 // 2233 // 2234 // CHECK2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 2235 // CHECK2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 2236 // CHECK2-NEXT: entry: 2237 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 2238 // CHECK2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 2239 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 2240 // CHECK2-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]] 2241 // CHECK2-NEXT: ret void 2242 // 2243 // 2244 // CHECK2-LABEL: define {{[^@]+}}@_Z6foobarv 2245 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] { 2246 // CHECK2-NEXT: entry: 2247 // CHECK2-NEXT: [[RES:%.*]] = alloca i32, align 4 2248 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 2249 // CHECK2-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S3* @_ZN6Static1sE to i8*), i64 8, i8*** @_ZN6Static1sE.cache.) 2250 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S3* 2251 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP2]], i32 0, i32 0 2252 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 2253 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[RES]], align 4 2254 // CHECK2-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.) 2255 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1* 2256 // CHECK2-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0 2257 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[A1]], align 4 2258 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[RES]], align 4 2259 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], [[TMP6]] 2260 // CHECK2-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 2261 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 2262 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[RES]], align 4 2263 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], [[TMP8]] 2264 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4 2265 // CHECK2-NEXT: [[TMP10:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S5* @gs3 to i8*), i64 12, i8*** @gs3.cache.) 2266 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to %struct.S5* 2267 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP11]], i32 0, i32 0 2268 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[A3]], align 4 2269 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[RES]], align 4 2270 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP12]] 2271 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 2272 // CHECK2-NEXT: [[TMP14:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i64 24, i8*** @arr_x.cache.) 2273 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to [2 x [3 x %struct.S1]]* 2274 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP15]], i64 0, i64 1 2275 // CHECK2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1 2276 // CHECK2-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX5]], i32 0, i32 0 2277 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[A6]], align 4 2278 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[RES]], align 4 2279 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP16]] 2280 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4 2281 // CHECK2-NEXT: [[TMP18:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (i32* @_ZN2STIiE2stE to i8*), i64 4, i8*** @_ZN2STIiE2stE.cache.) 2282 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to i32* 2283 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2284 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4 2285 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], [[TMP20]] 2286 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[RES]], align 4 2287 // CHECK2-NEXT: [[TMP22:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (float* @_ZN2STIfE2stE to i8*), i64 4, i8*** @_ZN2STIfE2stE.cache.) 2288 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to float* 2289 // CHECK2-NEXT: [[TMP24:%.*]] = load float, float* [[TMP23]], align 4 2290 // CHECK2-NEXT: [[CONV:%.*]] = fptosi float [[TMP24]] to i32 2291 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[RES]], align 4 2292 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[CONV]] 2293 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4 2294 // CHECK2-NEXT: [[TMP26:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i64 8, i8*** @_ZN2STI2S4E2stE.cache.) 2295 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast i8* [[TMP26]] to %struct.S4* 2296 // CHECK2-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP27]], i32 0, i32 0 2297 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[A10]], align 4 2298 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[RES]], align 4 2299 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], [[TMP28]] 2300 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4 2301 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[RES]], align 4 2302 // CHECK2-NEXT: ret i32 [[TMP30]] 2303 // 2304 // 2305 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init.8 2306 // CHECK2-SAME: () #[[ATTR0]] comdat($_ZN2STI2S4E2stE) { 2307 // CHECK2-NEXT: entry: 2308 // CHECK2-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 2309 // CHECK2-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 2310 // CHECK2-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]] 2311 // CHECK2: init.check: 2312 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 2313 // CHECK2-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB1]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* (i8*)* @.__kmpc_global_ctor_..9, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..10) 2314 // CHECK2-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23) 2315 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR3]] 2316 // CHECK2-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 2317 // CHECK2-NEXT: br label [[INIT_END]] 2318 // CHECK2: init.end: 2319 // CHECK2-NEXT: ret void 2320 // 2321 // 2322 // CHECK2-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..9 2323 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 2324 // CHECK2-NEXT: entry: 2325 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2326 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2327 // CHECK2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2328 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S4* 2329 // CHECK2-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[TMP2]], i32 23) 2330 // CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2331 // CHECK2-NEXT: ret i8* [[TMP3]] 2332 // 2333 // 2334 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 2335 // CHECK2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2336 // CHECK2-NEXT: entry: 2337 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 2338 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2339 // CHECK2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 2340 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2341 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 2342 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2343 // CHECK2-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]) 2344 // CHECK2-NEXT: ret void 2345 // 2346 // 2347 // CHECK2-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..10 2348 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 2349 // CHECK2-NEXT: entry: 2350 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2351 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2352 // CHECK2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2353 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S4* 2354 // CHECK2-NEXT: call void @_ZN2S4D1Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[TMP2]]) #[[ATTR3]] 2355 // CHECK2-NEXT: ret void 2356 // 2357 // 2358 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 2359 // CHECK2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2360 // CHECK2-NEXT: entry: 2361 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 2362 // CHECK2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 2363 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 2364 // CHECK2-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]] 2365 // CHECK2-NEXT: ret void 2366 // 2367 // 2368 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 2369 // CHECK2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2370 // CHECK2-NEXT: entry: 2371 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 2372 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2373 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 2374 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2375 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 2376 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 2377 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2378 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 2379 // CHECK2-NEXT: ret void 2380 // 2381 // 2382 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 2383 // CHECK2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2384 // CHECK2-NEXT: entry: 2385 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 2386 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 2387 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 2388 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 2389 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 2390 // CHECK2-NEXT: ret void 2391 // 2392 // 2393 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 2394 // CHECK2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2395 // CHECK2-NEXT: entry: 2396 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 2397 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2398 // CHECK2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 2399 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2400 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 2401 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 2402 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2403 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 2404 // CHECK2-NEXT: ret void 2405 // 2406 // 2407 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 2408 // CHECK2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2409 // CHECK2-NEXT: entry: 2410 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 2411 // CHECK2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 2412 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 2413 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 2414 // CHECK2-NEXT: store i32 0, i32* [[A]], align 8 2415 // CHECK2-NEXT: ret void 2416 // 2417 // 2418 // CHECK2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 2419 // CHECK2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 2420 // CHECK2-NEXT: entry: 2421 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 2422 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2423 // CHECK2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 2424 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2425 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 2426 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 2427 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2428 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 2429 // CHECK2-NEXT: ret void 2430 // 2431 // 2432 // CHECK2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 2433 // CHECK2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 2434 // CHECK2-NEXT: entry: 2435 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 2436 // CHECK2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 2437 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 2438 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 2439 // CHECK2-NEXT: store i32 0, i32* [[A]], align 8 2440 // CHECK2-NEXT: ret void 2441 // 2442 // 2443 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 2444 // CHECK2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2445 // CHECK2-NEXT: entry: 2446 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 2447 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2448 // CHECK2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 2449 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2450 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 2451 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 2452 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2453 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 2454 // CHECK2-NEXT: ret void 2455 // 2456 // 2457 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 2458 // CHECK2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2459 // CHECK2-NEXT: entry: 2460 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 2461 // CHECK2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 2462 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 2463 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 2464 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 2465 // CHECK2-NEXT: ret void 2466 // 2467 // 2468 // CHECK2-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 2469 // CHECK2-SAME: () #[[ATTR0]] { 2470 // CHECK2-NEXT: entry: 2471 // CHECK2-NEXT: call void @__cxx_global_var_init() 2472 // CHECK2-NEXT: call void @.__omp_threadprivate_init_.() 2473 // CHECK2-NEXT: call void @__cxx_global_var_init.1() 2474 // CHECK2-NEXT: call void @__cxx_global_var_init.2() 2475 // CHECK2-NEXT: call void @.__omp_threadprivate_init_..5() 2476 // CHECK2-NEXT: ret void 2477 // 2478 // 2479 // SIMD1-LABEL: define {{[^@]+}}@__cxx_global_var_init 2480 // SIMD1-SAME: () #[[ATTR0:[0-9]+]] { 2481 // SIMD1-NEXT: entry: 2482 // SIMD1-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5) 2483 // SIMD1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR3:[0-9]+]] 2484 // SIMD1-NEXT: ret void 2485 // 2486 // 2487 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 2488 // SIMD1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2489 // SIMD1-NEXT: entry: 2490 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 2491 // SIMD1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2492 // SIMD1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 2493 // SIMD1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2494 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 2495 // SIMD1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2496 // SIMD1-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2497 // SIMD1-NEXT: ret void 2498 // 2499 // 2500 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 2501 // SIMD1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 { 2502 // SIMD1-NEXT: entry: 2503 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 2504 // SIMD1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 2505 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 2506 // SIMD1-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2507 // SIMD1-NEXT: ret void 2508 // 2509 // 2510 // SIMD1-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 2511 // SIMD1-SAME: () #[[ATTR0]] { 2512 // SIMD1-NEXT: entry: 2513 // SIMD1-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27) 2514 // SIMD1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR3]] 2515 // SIMD1-NEXT: ret void 2516 // 2517 // 2518 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 2519 // SIMD1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2520 // SIMD1-NEXT: entry: 2521 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 2522 // SIMD1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2523 // SIMD1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 2524 // SIMD1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2525 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 2526 // SIMD1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2527 // SIMD1-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]) 2528 // SIMD1-NEXT: ret void 2529 // 2530 // 2531 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 2532 // SIMD1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2533 // SIMD1-NEXT: entry: 2534 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 2535 // SIMD1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 2536 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 2537 // SIMD1-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR3]] 2538 // SIMD1-NEXT: ret void 2539 // 2540 // 2541 // SIMD1-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 2542 // SIMD1-SAME: () #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2543 // SIMD1-NEXT: entry: 2544 // SIMD1-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 2545 // SIMD1-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 2546 // SIMD1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 2547 // SIMD1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 2548 // SIMD1-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 2549 // SIMD1-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 2550 // SIMD1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 2551 // SIMD1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 2552 // SIMD1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 2553 // SIMD1: invoke.cont: 2554 // SIMD1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 2555 // SIMD1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 2556 // SIMD1-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]] 2557 // SIMD1: invoke.cont2: 2558 // SIMD1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 2559 // SIMD1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 2560 // SIMD1-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]] 2561 // SIMD1: invoke.cont3: 2562 // SIMD1-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 2563 // SIMD1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 2564 // SIMD1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 2565 // SIMD1-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]] 2566 // SIMD1: invoke.cont7: 2567 // SIMD1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 2568 // SIMD1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 2569 // SIMD1-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]] 2570 // SIMD1: invoke.cont8: 2571 // SIMD1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 2572 // SIMD1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 2573 // SIMD1-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]] 2574 // SIMD1: invoke.cont9: 2575 // SIMD1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR3]] 2576 // SIMD1-NEXT: ret void 2577 // SIMD1: lpad: 2578 // SIMD1-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 2579 // SIMD1-NEXT: cleanup 2580 // SIMD1-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0 2581 // SIMD1-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8 2582 // SIMD1-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1 2583 // SIMD1-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4 2584 // SIMD1-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 2585 // SIMD1-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]] 2586 // SIMD1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]] 2587 // SIMD1: arraydestroy.body: 2588 // SIMD1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2589 // SIMD1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2590 // SIMD1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2591 // SIMD1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 2592 // SIMD1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]] 2593 // SIMD1: arraydestroy.done4: 2594 // SIMD1-NEXT: br label [[EHCLEANUP:%.*]] 2595 // SIMD1: lpad6: 2596 // SIMD1-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 2597 // SIMD1-NEXT: cleanup 2598 // SIMD1-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0 2599 // SIMD1-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8 2600 // SIMD1-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1 2601 // SIMD1-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4 2602 // SIMD1-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 2603 // SIMD1-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]] 2604 // SIMD1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]] 2605 // SIMD1: arraydestroy.body11: 2606 // SIMD1-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ] 2607 // SIMD1-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1 2608 // SIMD1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR3]] 2609 // SIMD1-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0) 2610 // SIMD1-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]] 2611 // SIMD1: arraydestroy.done15: 2612 // SIMD1-NEXT: br label [[EHCLEANUP]] 2613 // SIMD1: ehcleanup: 2614 // SIMD1-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 2615 // SIMD1-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0 2616 // SIMD1-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]] 2617 // SIMD1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]] 2618 // SIMD1: arraydestroy.body17: 2619 // SIMD1-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 2620 // SIMD1-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1 2621 // SIMD1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]] 2622 // SIMD1-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 2623 // SIMD1-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]] 2624 // SIMD1: arraydestroy.done21: 2625 // SIMD1-NEXT: br label [[EH_RESUME:%.*]] 2626 // SIMD1: eh.resume: 2627 // SIMD1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2628 // SIMD1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 2629 // SIMD1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 2630 // SIMD1-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 2631 // SIMD1-NEXT: resume { i8*, i32 } [[LPAD_VAL22]] 2632 // 2633 // 2634 // SIMD1-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 2635 // SIMD1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 2636 // SIMD1-NEXT: entry: 2637 // SIMD1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2638 // SIMD1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2639 // SIMD1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2640 // SIMD1: arraydestroy.body: 2641 // SIMD1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2642 // SIMD1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2643 // SIMD1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2644 // SIMD1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0) 2645 // SIMD1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 2646 // SIMD1: arraydestroy.done1: 2647 // SIMD1-NEXT: ret void 2648 // 2649 // 2650 // SIMD1-LABEL: define {{[^@]+}}@main 2651 // SIMD1-SAME: () #[[ATTR4:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2652 // SIMD1-NEXT: entry: 2653 // SIMD1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2654 // SIMD1-NEXT: [[RES:%.*]] = alloca i32, align 4 2655 // SIMD1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 2656 // SIMD1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 2657 // SIMD1-NEXT: store i32 0, i32* [[RETVAL]], align 4 2658 // SIMD1-NEXT: [[TMP0:%.*]] = load atomic i8, i8* bitcast (i64* @_ZGVZ4mainE2sm to i8*) acquire, align 8 2659 // SIMD1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 2660 // SIMD1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2:![0-9]+]] 2661 // SIMD1: init.check: 2662 // SIMD1-NEXT: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 2663 // SIMD1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0 2664 // SIMD1-NEXT: br i1 [[TOBOOL]], label [[INIT:%.*]], label [[INIT_END]] 2665 // SIMD1: init: 2666 // SIMD1-NEXT: [[TMP2:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4 2667 // SIMD1-NEXT: invoke void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP2]]) 2668 // SIMD1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 2669 // SIMD1: invoke.cont: 2670 // SIMD1-NEXT: [[TMP3:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR3]] 2671 // SIMD1-NEXT: call void @__cxa_guard_release(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 2672 // SIMD1-NEXT: br label [[INIT_END]] 2673 // SIMD1: init.end: 2674 // SIMD1-NEXT: [[TMP4:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S3:%.*]], %struct.S3* @_ZN6Static1sE, i32 0, i32 0), align 4 2675 // SIMD1-NEXT: store i32 [[TMP4]], i32* [[RES]], align 4 2676 // SIMD1-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_SMAIN:%.*]], %struct.Smain* @_ZZ4mainE2sm, i32 0, i32 0), align 8 2677 // SIMD1-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4 2678 // SIMD1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP5]] 2679 // SIMD1-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 2680 // SIMD1-NEXT: [[TMP7:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4 2681 // SIMD1-NEXT: [[TMP8:%.*]] = load i32, i32* [[RES]], align 4 2682 // SIMD1-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP7]] 2683 // SIMD1-NEXT: store i32 [[ADD1]], i32* [[RES]], align 4 2684 // SIMD1-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 2685 // SIMD1-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4 2686 // SIMD1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 2687 // SIMD1-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4 2688 // SIMD1-NEXT: [[TMP11:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S5:%.*]], %struct.S5* @gs3, i32 0, i32 0), align 4 2689 // SIMD1-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4 2690 // SIMD1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 2691 // SIMD1-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4 2692 // SIMD1-NEXT: [[TMP13:%.*]] = load i32, i32* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1, i32 0), align 4 2693 // SIMD1-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4 2694 // SIMD1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 2695 // SIMD1-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 2696 // SIMD1-NEXT: [[TMP15:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4 2697 // SIMD1-NEXT: [[TMP16:%.*]] = load i32, i32* [[RES]], align 4 2698 // SIMD1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP15]] 2699 // SIMD1-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4 2700 // SIMD1-NEXT: [[TMP17:%.*]] = load float, float* @_ZN2STIfE2stE, align 4 2701 // SIMD1-NEXT: [[CONV:%.*]] = fptosi float [[TMP17]] to i32 2702 // SIMD1-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4 2703 // SIMD1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[CONV]] 2704 // SIMD1-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4 2705 // SIMD1-NEXT: [[TMP19:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S4:%.*]], %struct.S4* @_ZN2STI2S4E2stE, i32 0, i32 0), align 4 2706 // SIMD1-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4 2707 // SIMD1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], [[TMP19]] 2708 // SIMD1-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4 2709 // SIMD1-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4 2710 // SIMD1-NEXT: ret i32 [[TMP21]] 2711 // SIMD1: lpad: 2712 // SIMD1-NEXT: [[TMP22:%.*]] = landingpad { i8*, i32 } 2713 // SIMD1-NEXT: cleanup 2714 // SIMD1-NEXT: [[TMP23:%.*]] = extractvalue { i8*, i32 } [[TMP22]], 0 2715 // SIMD1-NEXT: store i8* [[TMP23]], i8** [[EXN_SLOT]], align 8 2716 // SIMD1-NEXT: [[TMP24:%.*]] = extractvalue { i8*, i32 } [[TMP22]], 1 2717 // SIMD1-NEXT: store i32 [[TMP24]], i32* [[EHSELECTOR_SLOT]], align 4 2718 // SIMD1-NEXT: call void @__cxa_guard_abort(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 2719 // SIMD1-NEXT: br label [[EH_RESUME:%.*]] 2720 // SIMD1: eh.resume: 2721 // SIMD1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2722 // SIMD1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 2723 // SIMD1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 2724 // SIMD1-NEXT: [[LPAD_VAL8:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 2725 // SIMD1-NEXT: resume { i8*, i32 } [[LPAD_VAL8]] 2726 // 2727 // 2728 // SIMD1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 2729 // SIMD1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 2730 // SIMD1-NEXT: entry: 2731 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 2732 // SIMD1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2733 // SIMD1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 2734 // SIMD1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2735 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 2736 // SIMD1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2737 // SIMD1-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]) 2738 // SIMD1-NEXT: ret void 2739 // 2740 // 2741 // SIMD1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 2742 // SIMD1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 2743 // SIMD1-NEXT: entry: 2744 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 2745 // SIMD1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 2746 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 2747 // SIMD1-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]] 2748 // SIMD1-NEXT: ret void 2749 // 2750 // 2751 // SIMD1-LABEL: define {{[^@]+}}@_Z6foobarv 2752 // SIMD1-SAME: () #[[ATTR5:[0-9]+]] { 2753 // SIMD1-NEXT: entry: 2754 // SIMD1-NEXT: [[RES:%.*]] = alloca i32, align 4 2755 // SIMD1-NEXT: [[TMP0:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S3:%.*]], %struct.S3* @_ZN6Static1sE, i32 0, i32 0), align 4 2756 // SIMD1-NEXT: store i32 [[TMP0]], i32* [[RES]], align 4 2757 // SIMD1-NEXT: [[TMP1:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4 2758 // SIMD1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RES]], align 4 2759 // SIMD1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]] 2760 // SIMD1-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 2761 // SIMD1-NEXT: [[TMP3:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 2762 // SIMD1-NEXT: [[TMP4:%.*]] = load i32, i32* [[RES]], align 4 2763 // SIMD1-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], [[TMP3]] 2764 // SIMD1-NEXT: store i32 [[ADD1]], i32* [[RES]], align 4 2765 // SIMD1-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S5:%.*]], %struct.S5* @gs3, i32 0, i32 0), align 4 2766 // SIMD1-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4 2767 // SIMD1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]] 2768 // SIMD1-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4 2769 // SIMD1-NEXT: [[TMP7:%.*]] = load i32, i32* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1, i32 0), align 4 2770 // SIMD1-NEXT: [[TMP8:%.*]] = load i32, i32* [[RES]], align 4 2771 // SIMD1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP7]] 2772 // SIMD1-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4 2773 // SIMD1-NEXT: [[TMP9:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4 2774 // SIMD1-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4 2775 // SIMD1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 2776 // SIMD1-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 2777 // SIMD1-NEXT: [[TMP11:%.*]] = load float, float* @_ZN2STIfE2stE, align 4 2778 // SIMD1-NEXT: [[CONV:%.*]] = fptosi float [[TMP11]] to i32 2779 // SIMD1-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4 2780 // SIMD1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], [[CONV]] 2781 // SIMD1-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4 2782 // SIMD1-NEXT: [[TMP13:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S4:%.*]], %struct.S4* @_ZN2STI2S4E2stE, i32 0, i32 0), align 4 2783 // SIMD1-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4 2784 // SIMD1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 2785 // SIMD1-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4 2786 // SIMD1-NEXT: [[TMP15:%.*]] = load i32, i32* [[RES]], align 4 2787 // SIMD1-NEXT: ret i32 [[TMP15]] 2788 // 2789 // 2790 // SIMD1-LABEL: define {{[^@]+}}@__cxx_global_var_init.3 2791 // SIMD1-SAME: () #[[ATTR0]] comdat($_ZN2STI2S4E2stE) { 2792 // SIMD1-NEXT: entry: 2793 // SIMD1-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 2794 // SIMD1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 2795 // SIMD1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]] 2796 // SIMD1: init.check: 2797 // SIMD1-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23) 2798 // SIMD1-NEXT: [[TMP1:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR3]] 2799 // SIMD1-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 2800 // SIMD1-NEXT: br label [[INIT_END]] 2801 // SIMD1: init.end: 2802 // SIMD1-NEXT: ret void 2803 // 2804 // 2805 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 2806 // SIMD1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2807 // SIMD1-NEXT: entry: 2808 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 2809 // SIMD1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2810 // SIMD1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 2811 // SIMD1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2812 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 2813 // SIMD1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2814 // SIMD1-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]) 2815 // SIMD1-NEXT: ret void 2816 // 2817 // 2818 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 2819 // SIMD1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2820 // SIMD1-NEXT: entry: 2821 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 2822 // SIMD1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 2823 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 2824 // SIMD1-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]] 2825 // SIMD1-NEXT: ret void 2826 // 2827 // 2828 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 2829 // SIMD1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2830 // SIMD1-NEXT: entry: 2831 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 2832 // SIMD1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2833 // SIMD1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 2834 // SIMD1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2835 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 2836 // SIMD1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 2837 // SIMD1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2838 // SIMD1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 2839 // SIMD1-NEXT: ret void 2840 // 2841 // 2842 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 2843 // SIMD1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2844 // SIMD1-NEXT: entry: 2845 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 2846 // SIMD1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 2847 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 2848 // SIMD1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 2849 // SIMD1-NEXT: store i32 0, i32* [[A]], align 4 2850 // SIMD1-NEXT: ret void 2851 // 2852 // 2853 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 2854 // SIMD1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2855 // SIMD1-NEXT: entry: 2856 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 2857 // SIMD1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2858 // SIMD1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 2859 // SIMD1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2860 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 2861 // SIMD1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 2862 // SIMD1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2863 // SIMD1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 2864 // SIMD1-NEXT: ret void 2865 // 2866 // 2867 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 2868 // SIMD1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2869 // SIMD1-NEXT: entry: 2870 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 2871 // SIMD1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 2872 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 2873 // SIMD1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 2874 // SIMD1-NEXT: store i32 0, i32* [[A]], align 8 2875 // SIMD1-NEXT: ret void 2876 // 2877 // 2878 // SIMD1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 2879 // SIMD1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 2880 // SIMD1-NEXT: entry: 2881 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 2882 // SIMD1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2883 // SIMD1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 2884 // SIMD1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2885 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 2886 // SIMD1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 2887 // SIMD1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2888 // SIMD1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 2889 // SIMD1-NEXT: ret void 2890 // 2891 // 2892 // SIMD1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 2893 // SIMD1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 2894 // SIMD1-NEXT: entry: 2895 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 2896 // SIMD1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 2897 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 2898 // SIMD1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 2899 // SIMD1-NEXT: store i32 0, i32* [[A]], align 8 2900 // SIMD1-NEXT: ret void 2901 // 2902 // 2903 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 2904 // SIMD1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2905 // SIMD1-NEXT: entry: 2906 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 2907 // SIMD1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2908 // SIMD1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 2909 // SIMD1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2910 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 2911 // SIMD1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 2912 // SIMD1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2913 // SIMD1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 2914 // SIMD1-NEXT: ret void 2915 // 2916 // 2917 // SIMD1-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 2918 // SIMD1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2919 // SIMD1-NEXT: entry: 2920 // SIMD1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 2921 // SIMD1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 2922 // SIMD1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 2923 // SIMD1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 2924 // SIMD1-NEXT: store i32 0, i32* [[A]], align 4 2925 // SIMD1-NEXT: ret void 2926 // 2927 // 2928 // SIMD1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 2929 // SIMD1-SAME: () #[[ATTR0]] { 2930 // SIMD1-NEXT: entry: 2931 // SIMD1-NEXT: call void @__cxx_global_var_init() 2932 // SIMD1-NEXT: call void @__cxx_global_var_init.1() 2933 // SIMD1-NEXT: call void @__cxx_global_var_init.2() 2934 // SIMD1-NEXT: ret void 2935 // 2936 // 2937 // SIMD2-LABEL: define {{[^@]+}}@__cxx_global_var_init 2938 // SIMD2-SAME: () #[[ATTR0:[0-9]+]] !dbg [[DBG115:![0-9]+]] { 2939 // SIMD2-NEXT: entry: 2940 // SIMD2-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5), !dbg [[DBG119:![0-9]+]] 2941 // SIMD2-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR3:[0-9]+]], !dbg [[DBG121:![0-9]+]] 2942 // SIMD2-NEXT: ret void, !dbg [[DBG122:![0-9]+]] 2943 // 2944 // 2945 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 2946 // SIMD2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 !dbg [[DBG123:![0-9]+]] { 2947 // SIMD2-NEXT: entry: 2948 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 2949 // SIMD2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2950 // SIMD2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 2951 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META124:![0-9]+]], metadata !DIExpression()), !dbg [[DBG126:![0-9]+]] 2952 // SIMD2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2953 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META127:![0-9]+]], metadata !DIExpression()), !dbg [[DBG128:![0-9]+]] 2954 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 2955 // SIMD2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG129:![0-9]+]] 2956 // SIMD2-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG129]] 2957 // SIMD2-NEXT: ret void, !dbg [[DBG130:![0-9]+]] 2958 // 2959 // 2960 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 2961 // SIMD2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 !dbg [[DBG131:![0-9]+]] { 2962 // SIMD2-NEXT: entry: 2963 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 2964 // SIMD2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 2965 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META132:![0-9]+]], metadata !DIExpression()), !dbg [[DBG133:![0-9]+]] 2966 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 2967 // SIMD2-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]], !dbg [[DBG134:![0-9]+]] 2968 // SIMD2-NEXT: ret void, !dbg [[DBG135:![0-9]+]] 2969 // 2970 // 2971 // SIMD2-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 2972 // SIMD2-SAME: () #[[ATTR0]] !dbg [[DBG136:![0-9]+]] { 2973 // SIMD2-NEXT: entry: 2974 // SIMD2-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27), !dbg [[DBG137:![0-9]+]] 2975 // SIMD2-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG139:![0-9]+]] 2976 // SIMD2-NEXT: ret void, !dbg [[DBG140:![0-9]+]] 2977 // 2978 // 2979 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 2980 // SIMD2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 !dbg [[DBG141:![0-9]+]] { 2981 // SIMD2-NEXT: entry: 2982 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 2983 // SIMD2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2984 // SIMD2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 2985 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META142:![0-9]+]], metadata !DIExpression()), !dbg [[DBG144:![0-9]+]] 2986 // SIMD2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2987 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META145:![0-9]+]], metadata !DIExpression()), !dbg [[DBG146:![0-9]+]] 2988 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 2989 // SIMD2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG147:![0-9]+]] 2990 // SIMD2-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG147]] 2991 // SIMD2-NEXT: ret void, !dbg [[DBG148:![0-9]+]] 2992 // 2993 // 2994 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 2995 // SIMD2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG149:![0-9]+]] { 2996 // SIMD2-NEXT: entry: 2997 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 2998 // SIMD2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 2999 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META150:![0-9]+]], metadata !DIExpression()), !dbg [[DBG151:![0-9]+]] 3000 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 3001 // SIMD2-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR3]], !dbg [[DBG152:![0-9]+]] 3002 // SIMD2-NEXT: ret void, !dbg [[DBG153:![0-9]+]] 3003 // 3004 // 3005 // SIMD2-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 3006 // SIMD2-SAME: () #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG154:![0-9]+]] { 3007 // SIMD2-NEXT: entry: 3008 // SIMD2-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 3009 // SIMD2-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 3010 // SIMD2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 3011 // SIMD2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 3012 // SIMD2-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 3013 // SIMD2-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG155:![0-9]+]] 3014 // SIMD2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG157:![0-9]+]] 3015 // SIMD2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 3016 // SIMD2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG158:![0-9]+]] 3017 // SIMD2: invoke.cont: 3018 // SIMD2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG157]] 3019 // SIMD2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 3020 // SIMD2-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]], !dbg [[DBG159:![0-9]+]] 3021 // SIMD2: invoke.cont2: 3022 // SIMD2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG157]] 3023 // SIMD2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 3024 // SIMD2-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]], !dbg [[DBG160:![0-9]+]] 3025 // SIMD2: invoke.cont3: 3026 // SIMD2-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG155]] 3027 // SIMD2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG161:![0-9]+]] 3028 // SIMD2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 3029 // SIMD2-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]], !dbg [[DBG162:![0-9]+]] 3030 // SIMD2: invoke.cont7: 3031 // SIMD2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG161]] 3032 // SIMD2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 3033 // SIMD2-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]], !dbg [[DBG163:![0-9]+]] 3034 // SIMD2: invoke.cont8: 3035 // SIMD2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG161]] 3036 // SIMD2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 3037 // SIMD2-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]], !dbg [[DBG164:![0-9]+]] 3038 // SIMD2: invoke.cont9: 3039 // SIMD2-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG165:![0-9]+]] 3040 // SIMD2-NEXT: ret void, !dbg [[DBG165]] 3041 // SIMD2: lpad: 3042 // SIMD2-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 3043 // SIMD2-NEXT: cleanup, !dbg [[DBG166:![0-9]+]] 3044 // SIMD2-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0, !dbg [[DBG166]] 3045 // SIMD2-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG166]] 3046 // SIMD2-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1, !dbg [[DBG166]] 3047 // SIMD2-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG166]] 3048 // SIMD2-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG157]] 3049 // SIMD2-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]], !dbg [[DBG157]] 3050 // SIMD2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG157]] 3051 // SIMD2: arraydestroy.body: 3052 // SIMD2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG157]] 3053 // SIMD2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG157]] 3054 // SIMD2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]], !dbg [[DBG157]] 3055 // SIMD2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG157]] 3056 // SIMD2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG157]] 3057 // SIMD2: arraydestroy.done4: 3058 // SIMD2-NEXT: br label [[EHCLEANUP:%.*]], !dbg [[DBG157]] 3059 // SIMD2: lpad6: 3060 // SIMD2-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 3061 // SIMD2-NEXT: cleanup, !dbg [[DBG166]] 3062 // SIMD2-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0, !dbg [[DBG166]] 3063 // SIMD2-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG166]] 3064 // SIMD2-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1, !dbg [[DBG166]] 3065 // SIMD2-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG166]] 3066 // SIMD2-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG161]] 3067 // SIMD2-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]], !dbg [[DBG161]] 3068 // SIMD2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]], !dbg [[DBG161]] 3069 // SIMD2: arraydestroy.body11: 3070 // SIMD2-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ], !dbg [[DBG161]] 3071 // SIMD2-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1, !dbg [[DBG161]] 3072 // SIMD2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR3]], !dbg [[DBG161]] 3073 // SIMD2-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), !dbg [[DBG161]] 3074 // SIMD2-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]], !dbg [[DBG161]] 3075 // SIMD2: arraydestroy.done15: 3076 // SIMD2-NEXT: br label [[EHCLEANUP]], !dbg [[DBG161]] 3077 // SIMD2: ehcleanup: 3078 // SIMD2-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG155]] 3079 // SIMD2-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0, !dbg [[DBG155]] 3080 // SIMD2-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]], !dbg [[DBG155]] 3081 // SIMD2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]], !dbg [[DBG155]] 3082 // SIMD2: arraydestroy.body17: 3083 // SIMD2-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ], !dbg [[DBG155]] 3084 // SIMD2-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1, !dbg [[DBG155]] 3085 // SIMD2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]], !dbg [[DBG155]] 3086 // SIMD2-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG155]] 3087 // SIMD2-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]], !dbg [[DBG155]] 3088 // SIMD2: arraydestroy.done21: 3089 // SIMD2-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG155]] 3090 // SIMD2: eh.resume: 3091 // SIMD2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG155]] 3092 // SIMD2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG155]] 3093 // SIMD2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG155]] 3094 // SIMD2-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG155]] 3095 // SIMD2-NEXT: resume { i8*, i32 } [[LPAD_VAL22]], !dbg [[DBG155]] 3096 // 3097 // 3098 // SIMD2-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 3099 // SIMD2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG167:![0-9]+]] { 3100 // SIMD2-NEXT: entry: 3101 // SIMD2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3102 // SIMD2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3103 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META171:![0-9]+]], metadata !DIExpression()), !dbg [[DBG172:![0-9]+]] 3104 // SIMD2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG172]] 3105 // SIMD2: arraydestroy.body: 3106 // SIMD2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG172]] 3107 // SIMD2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG172]] 3108 // SIMD2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]], !dbg [[DBG172]] 3109 // SIMD2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), !dbg [[DBG172]] 3110 // SIMD2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG172]] 3111 // SIMD2: arraydestroy.done1: 3112 // SIMD2-NEXT: ret void, !dbg [[DBG172]] 3113 // 3114 // 3115 // SIMD2-LABEL: define {{[^@]+}}@main 3116 // SIMD2-SAME: () #[[ATTR5:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG53:![0-9]+]] { 3117 // SIMD2-NEXT: entry: 3118 // SIMD2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3119 // SIMD2-NEXT: [[RES:%.*]] = alloca i32, align 4 3120 // SIMD2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 3121 // SIMD2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 3122 // SIMD2-NEXT: store i32 0, i32* [[RETVAL]], align 4 3123 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META173:![0-9]+]], metadata !DIExpression()), !dbg [[DBG174:![0-9]+]] 3124 // SIMD2-NEXT: [[TMP0:%.*]] = load atomic i8, i8* bitcast (i64* @_ZGVZ4mainE2sm to i8*) acquire, align 8, !dbg [[DBG175:![0-9]+]] 3125 // SIMD2-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG175]] 3126 // SIMD2-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG175]], !prof [[PROF176:![0-9]+]] 3127 // SIMD2: init.check: 3128 // SIMD2-NEXT: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(i64* @_ZGVZ4mainE2sm) #[[ATTR3]], !dbg [[DBG175]] 3129 // SIMD2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0, !dbg [[DBG175]] 3130 // SIMD2-NEXT: br i1 [[TOBOOL]], label [[INIT:%.*]], label [[INIT_END]], !dbg [[DBG175]] 3131 // SIMD2: init: 3132 // SIMD2-NEXT: [[TMP2:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4, !dbg [[DBG177:![0-9]+]] 3133 // SIMD2-NEXT: invoke void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP2]]) 3134 // SIMD2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG178:![0-9]+]] 3135 // SIMD2: invoke.cont: 3136 // SIMD2-NEXT: [[TMP3:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG175]] 3137 // SIMD2-NEXT: call void @__cxa_guard_release(i64* @_ZGVZ4mainE2sm) #[[ATTR3]], !dbg [[DBG175]] 3138 // SIMD2-NEXT: br label [[INIT_END]], !dbg [[DBG175]] 3139 // SIMD2: init.end: 3140 // SIMD2-NEXT: [[TMP4:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S3:%.*]], %struct.S3* @_ZN6Static1sE, i32 0, i32 0), align 4, !dbg [[DBG179:![0-9]+]] 3141 // SIMD2-NEXT: store i32 [[TMP4]], i32* [[RES]], align 4, !dbg [[DBG180:![0-9]+]] 3142 // SIMD2-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_SMAIN:%.*]], %struct.Smain* @_ZZ4mainE2sm, i32 0, i32 0), align 8, !dbg [[DBG181:![0-9]+]] 3143 // SIMD2-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG182:![0-9]+]] 3144 // SIMD2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP5]], !dbg [[DBG182]] 3145 // SIMD2-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG182]] 3146 // SIMD2-NEXT: [[TMP7:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4, !dbg [[DBG183:![0-9]+]] 3147 // SIMD2-NEXT: [[TMP8:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG184:![0-9]+]] 3148 // SIMD2-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP7]], !dbg [[DBG184]] 3149 // SIMD2-NEXT: store i32 [[ADD1]], i32* [[RES]], align 4, !dbg [[DBG184]] 3150 // SIMD2-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG185:![0-9]+]] 3151 // SIMD2-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG186:![0-9]+]] 3152 // SIMD2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], [[TMP9]], !dbg [[DBG186]] 3153 // SIMD2-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4, !dbg [[DBG186]] 3154 // SIMD2-NEXT: [[TMP11:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S5:%.*]], %struct.S5* @gs3, i32 0, i32 0), align 4, !dbg [[DBG187:![0-9]+]] 3155 // SIMD2-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG188:![0-9]+]] 3156 // SIMD2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]], !dbg [[DBG188]] 3157 // SIMD2-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4, !dbg [[DBG188]] 3158 // SIMD2-NEXT: [[TMP13:%.*]] = load i32, i32* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1, i32 0), align 4, !dbg [[DBG189:![0-9]+]] 3159 // SIMD2-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG190:![0-9]+]] 3160 // SIMD2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], [[TMP13]], !dbg [[DBG190]] 3161 // SIMD2-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG190]] 3162 // SIMD2-NEXT: [[TMP15:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4, !dbg [[DBG191:![0-9]+]] 3163 // SIMD2-NEXT: [[TMP16:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG192:![0-9]+]] 3164 // SIMD2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP15]], !dbg [[DBG192]] 3165 // SIMD2-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4, !dbg [[DBG192]] 3166 // SIMD2-NEXT: [[TMP17:%.*]] = load float, float* @_ZN2STIfE2stE, align 4, !dbg [[DBG193:![0-9]+]] 3167 // SIMD2-NEXT: [[CONV:%.*]] = fptosi float [[TMP17]] to i32, !dbg [[DBG193]] 3168 // SIMD2-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG194:![0-9]+]] 3169 // SIMD2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[CONV]], !dbg [[DBG194]] 3170 // SIMD2-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4, !dbg [[DBG194]] 3171 // SIMD2-NEXT: [[TMP19:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S4:%.*]], %struct.S4* @_ZN2STI2S4E2stE, i32 0, i32 0), align 4, !dbg [[DBG195:![0-9]+]] 3172 // SIMD2-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG196:![0-9]+]] 3173 // SIMD2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], [[TMP19]], !dbg [[DBG196]] 3174 // SIMD2-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4, !dbg [[DBG196]] 3175 // SIMD2-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG197:![0-9]+]] 3176 // SIMD2-NEXT: ret i32 [[TMP21]], !dbg [[DBG198:![0-9]+]] 3177 // SIMD2: lpad: 3178 // SIMD2-NEXT: [[TMP22:%.*]] = landingpad { i8*, i32 } 3179 // SIMD2-NEXT: cleanup, !dbg [[DBG199:![0-9]+]] 3180 // SIMD2-NEXT: [[TMP23:%.*]] = extractvalue { i8*, i32 } [[TMP22]], 0, !dbg [[DBG199]] 3181 // SIMD2-NEXT: store i8* [[TMP23]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG199]] 3182 // SIMD2-NEXT: [[TMP24:%.*]] = extractvalue { i8*, i32 } [[TMP22]], 1, !dbg [[DBG199]] 3183 // SIMD2-NEXT: store i32 [[TMP24]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG199]] 3184 // SIMD2-NEXT: call void @__cxa_guard_abort(i64* @_ZGVZ4mainE2sm) #[[ATTR3]], !dbg [[DBG175]] 3185 // SIMD2-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG175]] 3186 // SIMD2: eh.resume: 3187 // SIMD2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG175]] 3188 // SIMD2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG175]] 3189 // SIMD2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG175]] 3190 // SIMD2-NEXT: [[LPAD_VAL8:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG175]] 3191 // SIMD2-NEXT: resume { i8*, i32 } [[LPAD_VAL8]], !dbg [[DBG175]] 3192 // 3193 // 3194 // SIMD2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 3195 // SIMD2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 !dbg [[DBG200:![0-9]+]] { 3196 // SIMD2-NEXT: entry: 3197 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 3198 // SIMD2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3199 // SIMD2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 3200 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META201:![0-9]+]], metadata !DIExpression()), !dbg [[DBG203:![0-9]+]] 3201 // SIMD2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3202 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META204:![0-9]+]], metadata !DIExpression()), !dbg [[DBG205:![0-9]+]] 3203 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 3204 // SIMD2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG206:![0-9]+]] 3205 // SIMD2-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG206]] 3206 // SIMD2-NEXT: ret void, !dbg [[DBG207:![0-9]+]] 3207 // 3208 // 3209 // SIMD2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 3210 // SIMD2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG208:![0-9]+]] { 3211 // SIMD2-NEXT: entry: 3212 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 3213 // SIMD2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 3214 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META209:![0-9]+]], metadata !DIExpression()), !dbg [[DBG210:![0-9]+]] 3215 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 3216 // SIMD2-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]], !dbg [[DBG211:![0-9]+]] 3217 // SIMD2-NEXT: ret void, !dbg [[DBG212:![0-9]+]] 3218 // 3219 // 3220 // SIMD2-LABEL: define {{[^@]+}}@_Z6foobarv 3221 // SIMD2-SAME: () #[[ATTR6:[0-9]+]] !dbg [[DBG213:![0-9]+]] { 3222 // SIMD2-NEXT: entry: 3223 // SIMD2-NEXT: [[RES:%.*]] = alloca i32, align 4 3224 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META214:![0-9]+]], metadata !DIExpression()), !dbg [[DBG215:![0-9]+]] 3225 // SIMD2-NEXT: [[TMP0:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S3:%.*]], %struct.S3* @_ZN6Static1sE, i32 0, i32 0), align 4, !dbg [[DBG216:![0-9]+]] 3226 // SIMD2-NEXT: store i32 [[TMP0]], i32* [[RES]], align 4, !dbg [[DBG217:![0-9]+]] 3227 // SIMD2-NEXT: [[TMP1:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4, !dbg [[DBG218:![0-9]+]] 3228 // SIMD2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG219:![0-9]+]] 3229 // SIMD2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]], !dbg [[DBG219]] 3230 // SIMD2-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG219]] 3231 // SIMD2-NEXT: [[TMP3:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG220:![0-9]+]] 3232 // SIMD2-NEXT: [[TMP4:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG221:![0-9]+]] 3233 // SIMD2-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], [[TMP3]], !dbg [[DBG221]] 3234 // SIMD2-NEXT: store i32 [[ADD1]], i32* [[RES]], align 4, !dbg [[DBG221]] 3235 // SIMD2-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S5:%.*]], %struct.S5* @gs3, i32 0, i32 0), align 4, !dbg [[DBG222:![0-9]+]] 3236 // SIMD2-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG223:![0-9]+]] 3237 // SIMD2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]], !dbg [[DBG223]] 3238 // SIMD2-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4, !dbg [[DBG223]] 3239 // SIMD2-NEXT: [[TMP7:%.*]] = load i32, i32* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1, i32 0), align 4, !dbg [[DBG224:![0-9]+]] 3240 // SIMD2-NEXT: [[TMP8:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG225:![0-9]+]] 3241 // SIMD2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP7]], !dbg [[DBG225]] 3242 // SIMD2-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4, !dbg [[DBG225]] 3243 // SIMD2-NEXT: [[TMP9:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4, !dbg [[DBG226:![0-9]+]] 3244 // SIMD2-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG227:![0-9]+]] 3245 // SIMD2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], [[TMP9]], !dbg [[DBG227]] 3246 // SIMD2-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG227]] 3247 // SIMD2-NEXT: [[TMP11:%.*]] = load float, float* @_ZN2STIfE2stE, align 4, !dbg [[DBG228:![0-9]+]] 3248 // SIMD2-NEXT: [[CONV:%.*]] = fptosi float [[TMP11]] to i32, !dbg [[DBG228]] 3249 // SIMD2-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG229:![0-9]+]] 3250 // SIMD2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], [[CONV]], !dbg [[DBG229]] 3251 // SIMD2-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4, !dbg [[DBG229]] 3252 // SIMD2-NEXT: [[TMP13:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S4:%.*]], %struct.S4* @_ZN2STI2S4E2stE, i32 0, i32 0), align 4, !dbg [[DBG230:![0-9]+]] 3253 // SIMD2-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG231:![0-9]+]] 3254 // SIMD2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], [[TMP13]], !dbg [[DBG231]] 3255 // SIMD2-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4, !dbg [[DBG231]] 3256 // SIMD2-NEXT: [[TMP15:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG232:![0-9]+]] 3257 // SIMD2-NEXT: ret i32 [[TMP15]], !dbg [[DBG233:![0-9]+]] 3258 // 3259 // 3260 // SIMD2-LABEL: define {{[^@]+}}@__cxx_global_var_init.3 3261 // SIMD2-SAME: () #[[ATTR0]] comdat($_ZN2STI2S4E2stE) !dbg [[DBG234:![0-9]+]] { 3262 // SIMD2-NEXT: entry: 3263 // SIMD2-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG235:![0-9]+]] 3264 // SIMD2-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG235]] 3265 // SIMD2-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG235]] 3266 // SIMD2: init.check: 3267 // SIMD2-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23), !dbg [[DBG236:![0-9]+]] 3268 // SIMD2-NEXT: [[TMP1:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG235]] 3269 // SIMD2-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG235]] 3270 // SIMD2-NEXT: br label [[INIT_END]], !dbg [[DBG235]] 3271 // SIMD2: init.end: 3272 // SIMD2-NEXT: ret void, !dbg [[DBG238:![0-9]+]] 3273 // 3274 // 3275 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 3276 // SIMD2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 !dbg [[DBG239:![0-9]+]] { 3277 // SIMD2-NEXT: entry: 3278 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 3279 // SIMD2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3280 // SIMD2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 3281 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META240:![0-9]+]], metadata !DIExpression()), !dbg [[DBG242:![0-9]+]] 3282 // SIMD2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3283 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META243:![0-9]+]], metadata !DIExpression()), !dbg [[DBG244:![0-9]+]] 3284 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 3285 // SIMD2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG245:![0-9]+]] 3286 // SIMD2-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG245]] 3287 // SIMD2-NEXT: ret void, !dbg [[DBG246:![0-9]+]] 3288 // 3289 // 3290 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 3291 // SIMD2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG247:![0-9]+]] { 3292 // SIMD2-NEXT: entry: 3293 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 3294 // SIMD2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 3295 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META248:![0-9]+]], metadata !DIExpression()), !dbg [[DBG249:![0-9]+]] 3296 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 3297 // SIMD2-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]], !dbg [[DBG250:![0-9]+]] 3298 // SIMD2-NEXT: ret void, !dbg [[DBG251:![0-9]+]] 3299 // 3300 // 3301 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 3302 // SIMD2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG252:![0-9]+]] { 3303 // SIMD2-NEXT: entry: 3304 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 3305 // SIMD2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3306 // SIMD2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 3307 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META253:![0-9]+]], metadata !DIExpression()), !dbg [[DBG254:![0-9]+]] 3308 // SIMD2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3309 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META255:![0-9]+]], metadata !DIExpression()), !dbg [[DBG256:![0-9]+]] 3310 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 3311 // SIMD2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG257:![0-9]+]] 3312 // SIMD2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG258:![0-9]+]] 3313 // SIMD2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG257]] 3314 // SIMD2-NEXT: ret void, !dbg [[DBG259:![0-9]+]] 3315 // 3316 // 3317 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 3318 // SIMD2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG260:![0-9]+]] { 3319 // SIMD2-NEXT: entry: 3320 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 3321 // SIMD2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 3322 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META261:![0-9]+]], metadata !DIExpression()), !dbg [[DBG262:![0-9]+]] 3323 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 3324 // SIMD2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG263:![0-9]+]] 3325 // SIMD2-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG265:![0-9]+]] 3326 // SIMD2-NEXT: ret void, !dbg [[DBG266:![0-9]+]] 3327 // 3328 // 3329 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 3330 // SIMD2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG267:![0-9]+]] { 3331 // SIMD2-NEXT: entry: 3332 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 3333 // SIMD2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3334 // SIMD2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 3335 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META268:![0-9]+]], metadata !DIExpression()), !dbg [[DBG269:![0-9]+]] 3336 // SIMD2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3337 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META270:![0-9]+]], metadata !DIExpression()), !dbg [[DBG271:![0-9]+]] 3338 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 3339 // SIMD2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG272:![0-9]+]] 3340 // SIMD2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG273:![0-9]+]] 3341 // SIMD2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG272]] 3342 // SIMD2-NEXT: ret void, !dbg [[DBG274:![0-9]+]] 3343 // 3344 // 3345 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 3346 // SIMD2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG275:![0-9]+]] { 3347 // SIMD2-NEXT: entry: 3348 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 3349 // SIMD2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 3350 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META276:![0-9]+]], metadata !DIExpression()), !dbg [[DBG277:![0-9]+]] 3351 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 3352 // SIMD2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG278:![0-9]+]] 3353 // SIMD2-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG280:![0-9]+]] 3354 // SIMD2-NEXT: ret void, !dbg [[DBG281:![0-9]+]] 3355 // 3356 // 3357 // SIMD2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 3358 // SIMD2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG282:![0-9]+]] { 3359 // SIMD2-NEXT: entry: 3360 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 3361 // SIMD2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3362 // SIMD2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 3363 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META283:![0-9]+]], metadata !DIExpression()), !dbg [[DBG284:![0-9]+]] 3364 // SIMD2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3365 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META285:![0-9]+]], metadata !DIExpression()), !dbg [[DBG286:![0-9]+]] 3366 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 3367 // SIMD2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG287:![0-9]+]] 3368 // SIMD2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG288:![0-9]+]] 3369 // SIMD2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG287]] 3370 // SIMD2-NEXT: ret void, !dbg [[DBG289:![0-9]+]] 3371 // 3372 // 3373 // SIMD2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 3374 // SIMD2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG290:![0-9]+]] { 3375 // SIMD2-NEXT: entry: 3376 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 3377 // SIMD2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 3378 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META291:![0-9]+]], metadata !DIExpression()), !dbg [[DBG292:![0-9]+]] 3379 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 3380 // SIMD2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG293:![0-9]+]] 3381 // SIMD2-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG295:![0-9]+]] 3382 // SIMD2-NEXT: ret void, !dbg [[DBG296:![0-9]+]] 3383 // 3384 // 3385 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 3386 // SIMD2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG297:![0-9]+]] { 3387 // SIMD2-NEXT: entry: 3388 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 3389 // SIMD2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3390 // SIMD2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 3391 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META298:![0-9]+]], metadata !DIExpression()), !dbg [[DBG299:![0-9]+]] 3392 // SIMD2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3393 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META300:![0-9]+]], metadata !DIExpression()), !dbg [[DBG301:![0-9]+]] 3394 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 3395 // SIMD2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG302:![0-9]+]] 3396 // SIMD2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG303:![0-9]+]] 3397 // SIMD2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG302]] 3398 // SIMD2-NEXT: ret void, !dbg [[DBG304:![0-9]+]] 3399 // 3400 // 3401 // SIMD2-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 3402 // SIMD2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG305:![0-9]+]] { 3403 // SIMD2-NEXT: entry: 3404 // SIMD2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 3405 // SIMD2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 3406 // SIMD2-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META306:![0-9]+]], metadata !DIExpression()), !dbg [[DBG307:![0-9]+]] 3407 // SIMD2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 3408 // SIMD2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG308:![0-9]+]] 3409 // SIMD2-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG310:![0-9]+]] 3410 // SIMD2-NEXT: ret void, !dbg [[DBG311:![0-9]+]] 3411 // 3412 // 3413 // SIMD2-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 3414 // SIMD2-SAME: () #[[ATTR0]] !dbg [[DBG312:![0-9]+]] { 3415 // SIMD2-NEXT: entry: 3416 // SIMD2-NEXT: call void @__cxx_global_var_init(), !dbg [[DBG314:![0-9]+]] 3417 // SIMD2-NEXT: call void @__cxx_global_var_init.1(), !dbg [[DBG314]] 3418 // SIMD2-NEXT: call void @__cxx_global_var_init.2(), !dbg [[DBG314]] 3419 // SIMD2-NEXT: ret void 3420 // 3421 // 3422 // CHECK-TLS1-LABEL: define {{[^@]+}}@__cxx_global_var_init 3423 // CHECK-TLS1-SAME: () #[[ATTR0:[0-9]+]] { 3424 // CHECK-TLS1-NEXT: entry: 3425 // CHECK-TLS1-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5) 3426 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR3:[0-9]+]] 3427 // CHECK-TLS1-NEXT: ret void 3428 // 3429 // 3430 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 3431 // CHECK-TLS1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3432 // CHECK-TLS1-NEXT: entry: 3433 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 3434 // CHECK-TLS1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3435 // CHECK-TLS1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 3436 // CHECK-TLS1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3437 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 3438 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3439 // CHECK-TLS1-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3440 // CHECK-TLS1-NEXT: ret void 3441 // 3442 // 3443 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 3444 // CHECK-TLS1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 { 3445 // CHECK-TLS1-NEXT: entry: 3446 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 3447 // CHECK-TLS1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 3448 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 3449 // CHECK-TLS1-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 3450 // CHECK-TLS1-NEXT: ret void 3451 // 3452 // 3453 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 3454 // CHECK-TLS1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 3455 // CHECK-TLS1-NEXT: entry: 3456 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 3457 // CHECK-TLS1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3458 // CHECK-TLS1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 3459 // CHECK-TLS1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3460 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 3461 // CHECK-TLS1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 3462 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3463 // CHECK-TLS1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 3464 // CHECK-TLS1-NEXT: ret void 3465 // 3466 // 3467 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 3468 // CHECK-TLS1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 3469 // CHECK-TLS1-NEXT: entry: 3470 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 3471 // CHECK-TLS1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 3472 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 3473 // CHECK-TLS1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 3474 // CHECK-TLS1-NEXT: store i32 0, i32* [[A]], align 4 3475 // CHECK-TLS1-NEXT: ret void 3476 // 3477 // 3478 // CHECK-TLS1-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 3479 // CHECK-TLS1-SAME: () #[[ATTR0]] { 3480 // CHECK-TLS1-NEXT: entry: 3481 // CHECK-TLS1-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27) 3482 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR3]] 3483 // CHECK-TLS1-NEXT: ret void 3484 // 3485 // 3486 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 3487 // CHECK-TLS1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3488 // CHECK-TLS1-NEXT: entry: 3489 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 3490 // CHECK-TLS1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3491 // CHECK-TLS1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 3492 // CHECK-TLS1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3493 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 3494 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3495 // CHECK-TLS1-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]) 3496 // CHECK-TLS1-NEXT: ret void 3497 // 3498 // 3499 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 3500 // CHECK-TLS1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 3501 // CHECK-TLS1-NEXT: entry: 3502 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 3503 // CHECK-TLS1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 3504 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 3505 // CHECK-TLS1-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR3]] 3506 // CHECK-TLS1-NEXT: ret void 3507 // 3508 // 3509 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 3510 // CHECK-TLS1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 3511 // CHECK-TLS1-NEXT: entry: 3512 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 3513 // CHECK-TLS1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3514 // CHECK-TLS1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 3515 // CHECK-TLS1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3516 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 3517 // CHECK-TLS1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 3518 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3519 // CHECK-TLS1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 3520 // CHECK-TLS1-NEXT: ret void 3521 // 3522 // 3523 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 3524 // CHECK-TLS1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 3525 // CHECK-TLS1-NEXT: entry: 3526 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 3527 // CHECK-TLS1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 3528 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 3529 // CHECK-TLS1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 3530 // CHECK-TLS1-NEXT: store i32 0, i32* [[A]], align 8 3531 // CHECK-TLS1-NEXT: ret void 3532 // 3533 // 3534 // CHECK-TLS1-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 3535 // CHECK-TLS1-SAME: () #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3536 // CHECK-TLS1-NEXT: entry: 3537 // CHECK-TLS1-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 3538 // CHECK-TLS1-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 3539 // CHECK-TLS1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 3540 // CHECK-TLS1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 3541 // CHECK-TLS1-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 3542 // CHECK-TLS1-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 3543 // CHECK-TLS1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 3544 // CHECK-TLS1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 3545 // CHECK-TLS1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 3546 // CHECK-TLS1: invoke.cont: 3547 // CHECK-TLS1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 3548 // CHECK-TLS1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 3549 // CHECK-TLS1-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]] 3550 // CHECK-TLS1: invoke.cont2: 3551 // CHECK-TLS1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 3552 // CHECK-TLS1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 3553 // CHECK-TLS1-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]] 3554 // CHECK-TLS1: invoke.cont3: 3555 // CHECK-TLS1-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 3556 // CHECK-TLS1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 3557 // CHECK-TLS1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 3558 // CHECK-TLS1-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]] 3559 // CHECK-TLS1: invoke.cont7: 3560 // CHECK-TLS1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 3561 // CHECK-TLS1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 3562 // CHECK-TLS1-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]] 3563 // CHECK-TLS1: invoke.cont8: 3564 // CHECK-TLS1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 3565 // CHECK-TLS1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 3566 // CHECK-TLS1-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]] 3567 // CHECK-TLS1: invoke.cont9: 3568 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR3]] 3569 // CHECK-TLS1-NEXT: ret void 3570 // CHECK-TLS1: lpad: 3571 // CHECK-TLS1-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 3572 // CHECK-TLS1-NEXT: cleanup 3573 // CHECK-TLS1-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0 3574 // CHECK-TLS1-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8 3575 // CHECK-TLS1-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1 3576 // CHECK-TLS1-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4 3577 // CHECK-TLS1-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 3578 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]] 3579 // CHECK-TLS1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]] 3580 // CHECK-TLS1: arraydestroy.body: 3581 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3582 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3583 // CHECK-TLS1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 3584 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 3585 // CHECK-TLS1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]] 3586 // CHECK-TLS1: arraydestroy.done4: 3587 // CHECK-TLS1-NEXT: br label [[EHCLEANUP:%.*]] 3588 // CHECK-TLS1: lpad6: 3589 // CHECK-TLS1-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 3590 // CHECK-TLS1-NEXT: cleanup 3591 // CHECK-TLS1-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0 3592 // CHECK-TLS1-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8 3593 // CHECK-TLS1-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1 3594 // CHECK-TLS1-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4 3595 // CHECK-TLS1-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 3596 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]] 3597 // CHECK-TLS1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]] 3598 // CHECK-TLS1: arraydestroy.body11: 3599 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ] 3600 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1 3601 // CHECK-TLS1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR3]] 3602 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0) 3603 // CHECK-TLS1-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]] 3604 // CHECK-TLS1: arraydestroy.done15: 3605 // CHECK-TLS1-NEXT: br label [[EHCLEANUP]] 3606 // CHECK-TLS1: ehcleanup: 3607 // CHECK-TLS1-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 3608 // CHECK-TLS1-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0 3609 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]] 3610 // CHECK-TLS1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]] 3611 // CHECK-TLS1: arraydestroy.body17: 3612 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 3613 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1 3614 // CHECK-TLS1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]] 3615 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 3616 // CHECK-TLS1-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]] 3617 // CHECK-TLS1: arraydestroy.done21: 3618 // CHECK-TLS1-NEXT: br label [[EH_RESUME:%.*]] 3619 // CHECK-TLS1: eh.resume: 3620 // CHECK-TLS1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 3621 // CHECK-TLS1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 3622 // CHECK-TLS1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 3623 // CHECK-TLS1-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 3624 // CHECK-TLS1-NEXT: resume { i8*, i32 } [[LPAD_VAL22]] 3625 // 3626 // 3627 // CHECK-TLS1-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 3628 // CHECK-TLS1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 3629 // CHECK-TLS1-NEXT: entry: 3630 // CHECK-TLS1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3631 // CHECK-TLS1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3632 // CHECK-TLS1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3633 // CHECK-TLS1: arraydestroy.body: 3634 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3635 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3636 // CHECK-TLS1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 3637 // CHECK-TLS1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0) 3638 // CHECK-TLS1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 3639 // CHECK-TLS1: arraydestroy.done1: 3640 // CHECK-TLS1-NEXT: ret void 3641 // 3642 // 3643 // CHECK-TLS1-LABEL: define {{[^@]+}}@main 3644 // CHECK-TLS1-SAME: () #[[ATTR4:[0-9]+]] { 3645 // CHECK-TLS1-NEXT: entry: 3646 // CHECK-TLS1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3647 // CHECK-TLS1-NEXT: [[RES:%.*]] = alloca i32, align 4 3648 // CHECK-TLS1-NEXT: store i32 0, i32* [[RETVAL]], align 4 3649 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i8, i8* @_ZGVZ4mainE2sm, align 1 3650 // CHECK-TLS1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 3651 // CHECK-TLS1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2:![0-9]+]] 3652 // CHECK-TLS1: init.check: 3653 // CHECK-TLS1-NEXT: [[TMP1:%.*]] = call %struct.S1* @_ZTWL3gs1() 3654 // CHECK-TLS1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP1]], i32 0, i32 0 3655 // CHECK-TLS1-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 3656 // CHECK-TLS1-NEXT: call void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP2]]) 3657 // CHECK-TLS1-NEXT: [[TMP3:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR3]] 3658 // CHECK-TLS1-NEXT: store i8 1, i8* @_ZGVZ4mainE2sm, align 1 3659 // CHECK-TLS1-NEXT: br label [[INIT_END]] 3660 // CHECK-TLS1: init.end: 3661 // CHECK-TLS1-NEXT: [[TMP4:%.*]] = call %struct.S3* @_ZTWN6Static1sE() 3662 // CHECK-TLS1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP4]], i32 0, i32 0 3663 // CHECK-TLS1-NEXT: [[TMP5:%.*]] = load i32, i32* [[A1]], align 4 3664 // CHECK-TLS1-NEXT: store i32 [[TMP5]], i32* [[RES]], align 4 3665 // CHECK-TLS1-NEXT: [[TMP6:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_SMAIN:%.*]], %struct.Smain* @_ZZ4mainE2sm, i32 0, i32 0), align 8 3666 // CHECK-TLS1-NEXT: [[TMP7:%.*]] = load i32, i32* [[RES]], align 4 3667 // CHECK-TLS1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], [[TMP6]] 3668 // CHECK-TLS1-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 3669 // CHECK-TLS1-NEXT: [[TMP8:%.*]] = call %struct.S1* @_ZTWL3gs1() 3670 // CHECK-TLS1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP8]], i32 0, i32 0 3671 // CHECK-TLS1-NEXT: [[TMP9:%.*]] = load i32, i32* [[A2]], align 4 3672 // CHECK-TLS1-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4 3673 // CHECK-TLS1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 3674 // CHECK-TLS1-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4 3675 // CHECK-TLS1-NEXT: [[TMP11:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 3676 // CHECK-TLS1-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4 3677 // CHECK-TLS1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 3678 // CHECK-TLS1-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 3679 // CHECK-TLS1-NEXT: [[TMP13:%.*]] = call %struct.S5* @_ZTW3gs3() 3680 // CHECK-TLS1-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP13]], i32 0, i32 0 3681 // CHECK-TLS1-NEXT: [[TMP14:%.*]] = load i32, i32* [[A5]], align 4 3682 // CHECK-TLS1-NEXT: [[TMP15:%.*]] = load i32, i32* [[RES]], align 4 3683 // CHECK-TLS1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], [[TMP14]] 3684 // CHECK-TLS1-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4 3685 // CHECK-TLS1-NEXT: [[TMP16:%.*]] = call [2 x [3 x %struct.S1]]* @_ZTW5arr_x() 3686 // CHECK-TLS1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP16]], i64 0, i64 1 3687 // CHECK-TLS1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1 3688 // CHECK-TLS1-NEXT: [[A8:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX7]], i32 0, i32 0 3689 // CHECK-TLS1-NEXT: [[TMP17:%.*]] = load i32, i32* [[A8]], align 4 3690 // CHECK-TLS1-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4 3691 // CHECK-TLS1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP17]] 3692 // CHECK-TLS1-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4 3693 // CHECK-TLS1-NEXT: [[TMP19:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4 3694 // CHECK-TLS1-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4 3695 // CHECK-TLS1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP19]] 3696 // CHECK-TLS1-NEXT: store i32 [[ADD10]], i32* [[RES]], align 4 3697 // CHECK-TLS1-NEXT: [[TMP21:%.*]] = load float, float* @_ZN2STIfE2stE, align 4 3698 // CHECK-TLS1-NEXT: [[CONV:%.*]] = fptosi float [[TMP21]] to i32 3699 // CHECK-TLS1-NEXT: [[TMP22:%.*]] = load i32, i32* [[RES]], align 4 3700 // CHECK-TLS1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP22]], [[CONV]] 3701 // CHECK-TLS1-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4 3702 // CHECK-TLS1-NEXT: [[TMP23:%.*]] = call %struct.S4* @_ZTWN2STI2S4E2stE() 3703 // CHECK-TLS1-NEXT: [[A12:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP23]], i32 0, i32 0 3704 // CHECK-TLS1-NEXT: [[TMP24:%.*]] = load i32, i32* [[A12]], align 4 3705 // CHECK-TLS1-NEXT: [[TMP25:%.*]] = load i32, i32* [[RES]], align 4 3706 // CHECK-TLS1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP25]], [[TMP24]] 3707 // CHECK-TLS1-NEXT: store i32 [[ADD13]], i32* [[RES]], align 4 3708 // CHECK-TLS1-NEXT: [[TMP26:%.*]] = load i32, i32* [[RES]], align 4 3709 // CHECK-TLS1-NEXT: ret i32 [[TMP26]] 3710 // 3711 // 3712 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZTWL3gs1 3713 // CHECK-TLS1-SAME: () #[[ATTR5:[0-9]+]] { 3714 // CHECK-TLS1-NEXT: call void @_ZTHL3gs1() 3715 // CHECK-TLS1-NEXT: ret %struct.S1* @_ZL3gs1 3716 // 3717 // 3718 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 3719 // CHECK-TLS1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3720 // CHECK-TLS1-NEXT: entry: 3721 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 3722 // CHECK-TLS1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3723 // CHECK-TLS1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 3724 // CHECK-TLS1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3725 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 3726 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3727 // CHECK-TLS1-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]) 3728 // CHECK-TLS1-NEXT: ret void 3729 // 3730 // 3731 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 3732 // CHECK-TLS1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 3733 // CHECK-TLS1-NEXT: entry: 3734 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 3735 // CHECK-TLS1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 3736 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 3737 // CHECK-TLS1-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]] 3738 // CHECK-TLS1-NEXT: ret void 3739 // 3740 // 3741 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZTWN6Static1sE 3742 // CHECK-TLS1-SAME: () #[[ATTR5]] comdat { 3743 // CHECK-TLS1-NEXT: br i1 icmp ne (void ()* @_ZTHN6Static1sE, void ()* null), label [[TMP1:%.*]], label [[TMP2:%.*]] 3744 // CHECK-TLS1: 1: 3745 // CHECK-TLS1-NEXT: call void @_ZTHN6Static1sE() 3746 // CHECK-TLS1-NEXT: br label [[TMP2]] 3747 // CHECK-TLS1: 2: 3748 // CHECK-TLS1-NEXT: ret %struct.S3* @_ZN6Static1sE 3749 // 3750 // 3751 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZTW3gs3 3752 // CHECK-TLS1-SAME: () #[[ATTR5]] comdat { 3753 // CHECK-TLS1-NEXT: br i1 icmp ne (void ()* @_ZTH3gs3, void ()* null), label [[TMP1:%.*]], label [[TMP2:%.*]] 3754 // CHECK-TLS1: 1: 3755 // CHECK-TLS1-NEXT: call void @_ZTH3gs3() 3756 // CHECK-TLS1-NEXT: br label [[TMP2]] 3757 // CHECK-TLS1: 2: 3758 // CHECK-TLS1-NEXT: ret %struct.S5* @gs3 3759 // 3760 // 3761 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZTW5arr_x 3762 // CHECK-TLS1-SAME: () #[[ATTR5]] comdat { 3763 // CHECK-TLS1-NEXT: call void @_ZTH5arr_x() 3764 // CHECK-TLS1-NEXT: ret [2 x [3 x %struct.S1]]* @arr_x 3765 // 3766 // 3767 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZTWN2STI2S4E2stE 3768 // CHECK-TLS1-SAME: () #[[ATTR5]] comdat { 3769 // CHECK-TLS1-NEXT: call void @_ZTHN2STI2S4E2stE() 3770 // CHECK-TLS1-NEXT: ret %struct.S4* @_ZN2STI2S4E2stE 3771 // 3772 // 3773 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 3774 // CHECK-TLS1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 3775 // CHECK-TLS1-NEXT: entry: 3776 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 3777 // CHECK-TLS1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3778 // CHECK-TLS1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 3779 // CHECK-TLS1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3780 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 3781 // CHECK-TLS1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 3782 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3783 // CHECK-TLS1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 3784 // CHECK-TLS1-NEXT: ret void 3785 // 3786 // 3787 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 3788 // CHECK-TLS1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 3789 // CHECK-TLS1-NEXT: entry: 3790 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 3791 // CHECK-TLS1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 3792 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 3793 // CHECK-TLS1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 3794 // CHECK-TLS1-NEXT: store i32 0, i32* [[A]], align 8 3795 // CHECK-TLS1-NEXT: ret void 3796 // 3797 // 3798 // CHECK-TLS1-LABEL: define {{[^@]+}}@_Z6foobarv 3799 // CHECK-TLS1-SAME: () #[[ATTR6:[0-9]+]] { 3800 // CHECK-TLS1-NEXT: entry: 3801 // CHECK-TLS1-NEXT: [[RES:%.*]] = alloca i32, align 4 3802 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = call %struct.S3* @_ZTWN6Static1sE() 3803 // CHECK-TLS1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP0]], i32 0, i32 0 3804 // CHECK-TLS1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 3805 // CHECK-TLS1-NEXT: store i32 [[TMP1]], i32* [[RES]], align 4 3806 // CHECK-TLS1-NEXT: [[TMP2:%.*]] = call %struct.S1* @_ZTWL3gs1() 3807 // CHECK-TLS1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 3808 // CHECK-TLS1-NEXT: [[TMP3:%.*]] = load i32, i32* [[A1]], align 4 3809 // CHECK-TLS1-NEXT: [[TMP4:%.*]] = load i32, i32* [[RES]], align 4 3810 // CHECK-TLS1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP3]] 3811 // CHECK-TLS1-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 3812 // CHECK-TLS1-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 3813 // CHECK-TLS1-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4 3814 // CHECK-TLS1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]] 3815 // CHECK-TLS1-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4 3816 // CHECK-TLS1-NEXT: [[TMP7:%.*]] = call %struct.S5* @_ZTW3gs3() 3817 // CHECK-TLS1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP7]], i32 0, i32 0 3818 // CHECK-TLS1-NEXT: [[TMP8:%.*]] = load i32, i32* [[A3]], align 4 3819 // CHECK-TLS1-NEXT: [[TMP9:%.*]] = load i32, i32* [[RES]], align 4 3820 // CHECK-TLS1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP9]], [[TMP8]] 3821 // CHECK-TLS1-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 3822 // CHECK-TLS1-NEXT: [[TMP10:%.*]] = call [2 x [3 x %struct.S1]]* @_ZTW5arr_x() 3823 // CHECK-TLS1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP10]], i64 0, i64 1 3824 // CHECK-TLS1-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1 3825 // CHECK-TLS1-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX5]], i32 0, i32 0 3826 // CHECK-TLS1-NEXT: [[TMP11:%.*]] = load i32, i32* [[A6]], align 4 3827 // CHECK-TLS1-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4 3828 // CHECK-TLS1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 3829 // CHECK-TLS1-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4 3830 // CHECK-TLS1-NEXT: [[TMP13:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4 3831 // CHECK-TLS1-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4 3832 // CHECK-TLS1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 3833 // CHECK-TLS1-NEXT: store i32 [[ADD8]], i32* [[RES]], align 4 3834 // CHECK-TLS1-NEXT: [[TMP15:%.*]] = load float, float* @_ZN2STIfE2stE, align 4 3835 // CHECK-TLS1-NEXT: [[CONV:%.*]] = fptosi float [[TMP15]] to i32 3836 // CHECK-TLS1-NEXT: [[TMP16:%.*]] = load i32, i32* [[RES]], align 4 3837 // CHECK-TLS1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], [[CONV]] 3838 // CHECK-TLS1-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4 3839 // CHECK-TLS1-NEXT: [[TMP17:%.*]] = call %struct.S4* @_ZTWN2STI2S4E2stE() 3840 // CHECK-TLS1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP17]], i32 0, i32 0 3841 // CHECK-TLS1-NEXT: [[TMP18:%.*]] = load i32, i32* [[A10]], align 4 3842 // CHECK-TLS1-NEXT: [[TMP19:%.*]] = load i32, i32* [[RES]], align 4 3843 // CHECK-TLS1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP19]], [[TMP18]] 3844 // CHECK-TLS1-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4 3845 // CHECK-TLS1-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4 3846 // CHECK-TLS1-NEXT: ret i32 [[TMP20]] 3847 // 3848 // 3849 // CHECK-TLS1-LABEL: define {{[^@]+}}@__cxx_global_var_init.3 3850 // CHECK-TLS1-SAME: () #[[ATTR0]] { 3851 // CHECK-TLS1-NEXT: entry: 3852 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 3853 // CHECK-TLS1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 3854 // CHECK-TLS1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]] 3855 // CHECK-TLS1: init.check: 3856 // CHECK-TLS1-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23) 3857 // CHECK-TLS1-NEXT: [[TMP1:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR3]] 3858 // CHECK-TLS1-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 3859 // CHECK-TLS1-NEXT: br label [[INIT_END]] 3860 // CHECK-TLS1: init.end: 3861 // CHECK-TLS1-NEXT: ret void 3862 // 3863 // 3864 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 3865 // CHECK-TLS1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3866 // CHECK-TLS1-NEXT: entry: 3867 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 3868 // CHECK-TLS1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3869 // CHECK-TLS1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 3870 // CHECK-TLS1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3871 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 3872 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3873 // CHECK-TLS1-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]) 3874 // CHECK-TLS1-NEXT: ret void 3875 // 3876 // 3877 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 3878 // CHECK-TLS1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 3879 // CHECK-TLS1-NEXT: entry: 3880 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 3881 // CHECK-TLS1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 3882 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 3883 // CHECK-TLS1-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]] 3884 // CHECK-TLS1-NEXT: ret void 3885 // 3886 // 3887 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 3888 // CHECK-TLS1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 3889 // CHECK-TLS1-NEXT: entry: 3890 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 3891 // CHECK-TLS1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3892 // CHECK-TLS1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 3893 // CHECK-TLS1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3894 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 3895 // CHECK-TLS1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 3896 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3897 // CHECK-TLS1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 3898 // CHECK-TLS1-NEXT: ret void 3899 // 3900 // 3901 // CHECK-TLS1-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 3902 // CHECK-TLS1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 3903 // CHECK-TLS1-NEXT: entry: 3904 // CHECK-TLS1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 3905 // CHECK-TLS1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 3906 // CHECK-TLS1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 3907 // CHECK-TLS1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 3908 // CHECK-TLS1-NEXT: store i32 0, i32* [[A]], align 4 3909 // CHECK-TLS1-NEXT: ret void 3910 // 3911 // 3912 // CHECK-TLS1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 3913 // CHECK-TLS1-SAME: () #[[ATTR0]] { 3914 // CHECK-TLS1-NEXT: entry: 3915 // CHECK-TLS1-NEXT: call void @__cxx_global_var_init.1() 3916 // CHECK-TLS1-NEXT: ret void 3917 // 3918 // 3919 // CHECK-TLS1-LABEL: define {{[^@]+}}@__tls_init 3920 // CHECK-TLS1-SAME: () #[[ATTR0]] { 3921 // CHECK-TLS1-NEXT: entry: 3922 // CHECK-TLS1-NEXT: [[TMP0:%.*]] = load i8, i8* @__tls_guard, align 1 3923 // CHECK-TLS1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 3924 // CHECK-TLS1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT:%.*]], label [[EXIT:%.*]], !prof [[PROF2]] 3925 // CHECK-TLS1: init: 3926 // CHECK-TLS1-NEXT: store i8 1, i8* @__tls_guard, align 1 3927 // CHECK-TLS1-NEXT: call void @__cxx_global_var_init() 3928 // CHECK-TLS1-NEXT: call void @__cxx_global_var_init.2() 3929 // CHECK-TLS1-NEXT: br label [[EXIT]] 3930 // CHECK-TLS1: exit: 3931 // CHECK-TLS1-NEXT: ret void 3932 // 3933 // 3934 // CHECK-TLS2-LABEL: define {{[^@]+}}@main 3935 // CHECK-TLS2-SAME: () #[[ATTR0:[0-9]+]] { 3936 // CHECK-TLS2-NEXT: entry: 3937 // CHECK-TLS2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3938 // CHECK-TLS2-NEXT: [[RES:%.*]] = alloca i32, align 4 3939 // CHECK-TLS2-NEXT: store i32 0, i32* [[RETVAL]], align 4 3940 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i8, i8* @_ZGVZ4mainE2sm, align 1 3941 // CHECK-TLS2-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 3942 // CHECK-TLS2-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2:![0-9]+]] 3943 // CHECK-TLS2: init.check: 3944 // CHECK-TLS2-NEXT: [[TMP1:%.*]] = call %struct.S1* @_ZTWL3gs1() 3945 // CHECK-TLS2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP1]], i32 0, i32 0 3946 // CHECK-TLS2-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 3947 // CHECK-TLS2-NEXT: call void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP2]]) 3948 // CHECK-TLS2-NEXT: [[TMP3:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR4:[0-9]+]] 3949 // CHECK-TLS2-NEXT: store i8 1, i8* @_ZGVZ4mainE2sm, align 1 3950 // CHECK-TLS2-NEXT: br label [[INIT_END]] 3951 // CHECK-TLS2: init.end: 3952 // CHECK-TLS2-NEXT: [[TMP4:%.*]] = call %struct.S3* @_ZTWN6Static1sE() 3953 // CHECK-TLS2-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP4]], i32 0, i32 0 3954 // CHECK-TLS2-NEXT: [[TMP5:%.*]] = load i32, i32* [[A1]], align 4 3955 // CHECK-TLS2-NEXT: store i32 [[TMP5]], i32* [[RES]], align 4 3956 // CHECK-TLS2-NEXT: [[TMP6:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_SMAIN:%.*]], %struct.Smain* @_ZZ4mainE2sm, i32 0, i32 0), align 8 3957 // CHECK-TLS2-NEXT: [[TMP7:%.*]] = load i32, i32* [[RES]], align 4 3958 // CHECK-TLS2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], [[TMP6]] 3959 // CHECK-TLS2-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 3960 // CHECK-TLS2-NEXT: [[TMP8:%.*]] = call %struct.S1* @_ZTWL3gs1() 3961 // CHECK-TLS2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP8]], i32 0, i32 0 3962 // CHECK-TLS2-NEXT: [[TMP9:%.*]] = load i32, i32* [[A2]], align 4 3963 // CHECK-TLS2-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4 3964 // CHECK-TLS2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 3965 // CHECK-TLS2-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4 3966 // CHECK-TLS2-NEXT: [[TMP11:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 3967 // CHECK-TLS2-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4 3968 // CHECK-TLS2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 3969 // CHECK-TLS2-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 3970 // CHECK-TLS2-NEXT: [[TMP13:%.*]] = call %struct.S5* @_ZTW3gs3() 3971 // CHECK-TLS2-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP13]], i32 0, i32 0 3972 // CHECK-TLS2-NEXT: [[TMP14:%.*]] = load i32, i32* [[A5]], align 4 3973 // CHECK-TLS2-NEXT: [[TMP15:%.*]] = load i32, i32* [[RES]], align 4 3974 // CHECK-TLS2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], [[TMP14]] 3975 // CHECK-TLS2-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4 3976 // CHECK-TLS2-NEXT: [[TMP16:%.*]] = call [2 x [3 x %struct.S1]]* @_ZTW5arr_x() 3977 // CHECK-TLS2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP16]], i64 0, i64 1 3978 // CHECK-TLS2-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1 3979 // CHECK-TLS2-NEXT: [[A8:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX7]], i32 0, i32 0 3980 // CHECK-TLS2-NEXT: [[TMP17:%.*]] = load i32, i32* [[A8]], align 4 3981 // CHECK-TLS2-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4 3982 // CHECK-TLS2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP17]] 3983 // CHECK-TLS2-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4 3984 // CHECK-TLS2-NEXT: [[TMP19:%.*]] = call i32* @_ZTWN2STIiE2stE() 3985 // CHECK-TLS2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3986 // CHECK-TLS2-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4 3987 // CHECK-TLS2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP20]] 3988 // CHECK-TLS2-NEXT: store i32 [[ADD10]], i32* [[RES]], align 4 3989 // CHECK-TLS2-NEXT: [[TMP22:%.*]] = call float* @_ZTWN2STIfE2stE() 3990 // CHECK-TLS2-NEXT: [[TMP23:%.*]] = load float, float* [[TMP22]], align 4 3991 // CHECK-TLS2-NEXT: [[CONV:%.*]] = fptosi float [[TMP23]] to i32 3992 // CHECK-TLS2-NEXT: [[TMP24:%.*]] = load i32, i32* [[RES]], align 4 3993 // CHECK-TLS2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP24]], [[CONV]] 3994 // CHECK-TLS2-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4 3995 // CHECK-TLS2-NEXT: [[TMP25:%.*]] = call %struct.S4* @_ZTWN2STI2S4E2stE() 3996 // CHECK-TLS2-NEXT: [[A12:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP25]], i32 0, i32 0 3997 // CHECK-TLS2-NEXT: [[TMP26:%.*]] = load i32, i32* [[A12]], align 4 3998 // CHECK-TLS2-NEXT: [[TMP27:%.*]] = load i32, i32* [[RES]], align 4 3999 // CHECK-TLS2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP27]], [[TMP26]] 4000 // CHECK-TLS2-NEXT: store i32 [[ADD13]], i32* [[RES]], align 4 4001 // CHECK-TLS2-NEXT: [[TMP28:%.*]] = load i32, i32* [[RES]], align 4 4002 // CHECK-TLS2-NEXT: ret i32 [[TMP28]] 4003 // 4004 // 4005 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZTWL3gs1 4006 // CHECK-TLS2-SAME: () #[[ATTR1:[0-9]+]] { 4007 // CHECK-TLS2-NEXT: call void @_ZTHL3gs1() 4008 // CHECK-TLS2-NEXT: ret %struct.S1* @_ZL3gs1 4009 // 4010 // 4011 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 4012 // CHECK-TLS2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] align 2 { 4013 // CHECK-TLS2-NEXT: entry: 4014 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 4015 // CHECK-TLS2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4016 // CHECK-TLS2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 4017 // CHECK-TLS2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4018 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 4019 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4020 // CHECK-TLS2-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]) 4021 // CHECK-TLS2-NEXT: ret void 4022 // 4023 // 4024 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 4025 // CHECK-TLS2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] align 2 { 4026 // CHECK-TLS2-NEXT: entry: 4027 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 4028 // CHECK-TLS2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 4029 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 4030 // CHECK-TLS2-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR4]] 4031 // CHECK-TLS2-NEXT: ret void 4032 // 4033 // 4034 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZTWN6Static1sE 4035 // CHECK-TLS2-SAME: () #[[ATTR1]] comdat { 4036 // CHECK-TLS2-NEXT: br i1 icmp ne (void ()* @_ZTHN6Static1sE, void ()* null), label [[TMP1:%.*]], label [[TMP2:%.*]] 4037 // CHECK-TLS2: 1: 4038 // CHECK-TLS2-NEXT: call void @_ZTHN6Static1sE() 4039 // CHECK-TLS2-NEXT: br label [[TMP2]] 4040 // CHECK-TLS2: 2: 4041 // CHECK-TLS2-NEXT: ret %struct.S3* @_ZN6Static1sE 4042 // 4043 // 4044 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZTW3gs3 4045 // CHECK-TLS2-SAME: () #[[ATTR1]] comdat { 4046 // CHECK-TLS2-NEXT: br i1 icmp ne (void ()* @_ZTH3gs3, void ()* null), label [[TMP1:%.*]], label [[TMP2:%.*]] 4047 // CHECK-TLS2: 1: 4048 // CHECK-TLS2-NEXT: call void @_ZTH3gs3() 4049 // CHECK-TLS2-NEXT: br label [[TMP2]] 4050 // CHECK-TLS2: 2: 4051 // CHECK-TLS2-NEXT: ret %struct.S5* @gs3 4052 // 4053 // 4054 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZTW5arr_x 4055 // CHECK-TLS2-SAME: () #[[ATTR1]] comdat { 4056 // CHECK-TLS2-NEXT: call void @_ZTH5arr_x() 4057 // CHECK-TLS2-NEXT: ret [2 x [3 x %struct.S1]]* @arr_x 4058 // 4059 // 4060 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZTWN2STIiE2stE 4061 // CHECK-TLS2-SAME: () #[[ATTR1]] comdat { 4062 // CHECK-TLS2-NEXT: ret i32* @_ZN2STIiE2stE 4063 // 4064 // 4065 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZTWN2STIfE2stE 4066 // CHECK-TLS2-SAME: () #[[ATTR1]] comdat { 4067 // CHECK-TLS2-NEXT: ret float* @_ZN2STIfE2stE 4068 // 4069 // 4070 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZTWN2STI2S4E2stE 4071 // CHECK-TLS2-SAME: () #[[ATTR1]] comdat { 4072 // CHECK-TLS2-NEXT: call void @_ZTHN2STI2S4E2stE() 4073 // CHECK-TLS2-NEXT: ret %struct.S4* @_ZN2STI2S4E2stE 4074 // 4075 // 4076 // CHECK-TLS2-LABEL: define {{[^@]+}}@_Z6foobarv 4077 // CHECK-TLS2-SAME: () #[[ATTR5:[0-9]+]] { 4078 // CHECK-TLS2-NEXT: entry: 4079 // CHECK-TLS2-NEXT: [[RES:%.*]] = alloca i32, align 4 4080 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = call %struct.S3* @_ZTWN6Static1sE() 4081 // CHECK-TLS2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP0]], i32 0, i32 0 4082 // CHECK-TLS2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 4083 // CHECK-TLS2-NEXT: store i32 [[TMP1]], i32* [[RES]], align 4 4084 // CHECK-TLS2-NEXT: [[TMP2:%.*]] = call %struct.S1* @_ZTWL3gs1() 4085 // CHECK-TLS2-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 4086 // CHECK-TLS2-NEXT: [[TMP3:%.*]] = load i32, i32* [[A1]], align 4 4087 // CHECK-TLS2-NEXT: [[TMP4:%.*]] = load i32, i32* [[RES]], align 4 4088 // CHECK-TLS2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP3]] 4089 // CHECK-TLS2-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 4090 // CHECK-TLS2-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 4091 // CHECK-TLS2-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4 4092 // CHECK-TLS2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]] 4093 // CHECK-TLS2-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4 4094 // CHECK-TLS2-NEXT: [[TMP7:%.*]] = call %struct.S5* @_ZTW3gs3() 4095 // CHECK-TLS2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP7]], i32 0, i32 0 4096 // CHECK-TLS2-NEXT: [[TMP8:%.*]] = load i32, i32* [[A3]], align 4 4097 // CHECK-TLS2-NEXT: [[TMP9:%.*]] = load i32, i32* [[RES]], align 4 4098 // CHECK-TLS2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP9]], [[TMP8]] 4099 // CHECK-TLS2-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 4100 // CHECK-TLS2-NEXT: [[TMP10:%.*]] = call [2 x [3 x %struct.S1]]* @_ZTW5arr_x() 4101 // CHECK-TLS2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP10]], i64 0, i64 1 4102 // CHECK-TLS2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1 4103 // CHECK-TLS2-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX5]], i32 0, i32 0 4104 // CHECK-TLS2-NEXT: [[TMP11:%.*]] = load i32, i32* [[A6]], align 4 4105 // CHECK-TLS2-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4 4106 // CHECK-TLS2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 4107 // CHECK-TLS2-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4 4108 // CHECK-TLS2-NEXT: [[TMP13:%.*]] = call i32* @_ZTWN2STIiE2stE() 4109 // CHECK-TLS2-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 4110 // CHECK-TLS2-NEXT: [[TMP15:%.*]] = load i32, i32* [[RES]], align 4 4111 // CHECK-TLS2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], [[TMP14]] 4112 // CHECK-TLS2-NEXT: store i32 [[ADD8]], i32* [[RES]], align 4 4113 // CHECK-TLS2-NEXT: [[TMP16:%.*]] = call float* @_ZTWN2STIfE2stE() 4114 // CHECK-TLS2-NEXT: [[TMP17:%.*]] = load float, float* [[TMP16]], align 4 4115 // CHECK-TLS2-NEXT: [[CONV:%.*]] = fptosi float [[TMP17]] to i32 4116 // CHECK-TLS2-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4 4117 // CHECK-TLS2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[CONV]] 4118 // CHECK-TLS2-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4 4119 // CHECK-TLS2-NEXT: [[TMP19:%.*]] = call %struct.S4* @_ZTWN2STI2S4E2stE() 4120 // CHECK-TLS2-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP19]], i32 0, i32 0 4121 // CHECK-TLS2-NEXT: [[TMP20:%.*]] = load i32, i32* [[A10]], align 4 4122 // CHECK-TLS2-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4 4123 // CHECK-TLS2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], [[TMP20]] 4124 // CHECK-TLS2-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4 4125 // CHECK-TLS2-NEXT: [[TMP22:%.*]] = load i32, i32* [[RES]], align 4 4126 // CHECK-TLS2-NEXT: ret i32 [[TMP22]] 4127 // 4128 // 4129 // CHECK-TLS2-LABEL: define {{[^@]+}}@__cxx_global_var_init 4130 // CHECK-TLS2-SAME: () #[[ATTR6:[0-9]+]] { 4131 // CHECK-TLS2-NEXT: entry: 4132 // CHECK-TLS2-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5) 4133 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR4]] 4134 // CHECK-TLS2-NEXT: ret void 4135 // 4136 // 4137 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 4138 // CHECK-TLS2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 4139 // CHECK-TLS2-NEXT: entry: 4140 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 4141 // CHECK-TLS2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4142 // CHECK-TLS2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 4143 // CHECK-TLS2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4144 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 4145 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4146 // CHECK-TLS2-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4147 // CHECK-TLS2-NEXT: ret void 4148 // 4149 // 4150 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 4151 // CHECK-TLS2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4152 // CHECK-TLS2-NEXT: entry: 4153 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 4154 // CHECK-TLS2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 4155 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 4156 // CHECK-TLS2-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4157 // CHECK-TLS2-NEXT: ret void 4158 // 4159 // 4160 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 4161 // CHECK-TLS2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4162 // CHECK-TLS2-NEXT: entry: 4163 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 4164 // CHECK-TLS2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4165 // CHECK-TLS2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 4166 // CHECK-TLS2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4167 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 4168 // CHECK-TLS2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 4169 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4170 // CHECK-TLS2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 4171 // CHECK-TLS2-NEXT: ret void 4172 // 4173 // 4174 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 4175 // CHECK-TLS2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4176 // CHECK-TLS2-NEXT: entry: 4177 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 4178 // CHECK-TLS2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 4179 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 4180 // CHECK-TLS2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 4181 // CHECK-TLS2-NEXT: store i32 0, i32* [[A]], align 4 4182 // CHECK-TLS2-NEXT: ret void 4183 // 4184 // 4185 // CHECK-TLS2-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 4186 // CHECK-TLS2-SAME: () #[[ATTR6]] { 4187 // CHECK-TLS2-NEXT: entry: 4188 // CHECK-TLS2-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27) 4189 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR4]] 4190 // CHECK-TLS2-NEXT: ret void 4191 // 4192 // 4193 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 4194 // CHECK-TLS2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 4195 // CHECK-TLS2-NEXT: entry: 4196 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 4197 // CHECK-TLS2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4198 // CHECK-TLS2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 4199 // CHECK-TLS2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4200 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 4201 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4202 // CHECK-TLS2-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]) 4203 // CHECK-TLS2-NEXT: ret void 4204 // 4205 // 4206 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 4207 // CHECK-TLS2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4208 // CHECK-TLS2-NEXT: entry: 4209 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 4210 // CHECK-TLS2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 4211 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 4212 // CHECK-TLS2-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR4]] 4213 // CHECK-TLS2-NEXT: ret void 4214 // 4215 // 4216 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 4217 // CHECK-TLS2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4218 // CHECK-TLS2-NEXT: entry: 4219 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 4220 // CHECK-TLS2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4221 // CHECK-TLS2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 4222 // CHECK-TLS2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4223 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 4224 // CHECK-TLS2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 4225 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4226 // CHECK-TLS2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 4227 // CHECK-TLS2-NEXT: ret void 4228 // 4229 // 4230 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 4231 // CHECK-TLS2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4232 // CHECK-TLS2-NEXT: entry: 4233 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 4234 // CHECK-TLS2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 4235 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 4236 // CHECK-TLS2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 4237 // CHECK-TLS2-NEXT: store i32 0, i32* [[A]], align 8 4238 // CHECK-TLS2-NEXT: ret void 4239 // 4240 // 4241 // CHECK-TLS2-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 4242 // CHECK-TLS2-SAME: () #[[ATTR6]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4243 // CHECK-TLS2-NEXT: entry: 4244 // CHECK-TLS2-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 4245 // CHECK-TLS2-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 4246 // CHECK-TLS2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 4247 // CHECK-TLS2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 4248 // CHECK-TLS2-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 4249 // CHECK-TLS2-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 4250 // CHECK-TLS2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 4251 // CHECK-TLS2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 4252 // CHECK-TLS2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 4253 // CHECK-TLS2: invoke.cont: 4254 // CHECK-TLS2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 4255 // CHECK-TLS2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 4256 // CHECK-TLS2-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]] 4257 // CHECK-TLS2: invoke.cont2: 4258 // CHECK-TLS2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 4259 // CHECK-TLS2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 4260 // CHECK-TLS2-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]] 4261 // CHECK-TLS2: invoke.cont3: 4262 // CHECK-TLS2-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 4263 // CHECK-TLS2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 4264 // CHECK-TLS2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 4265 // CHECK-TLS2-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]] 4266 // CHECK-TLS2: invoke.cont7: 4267 // CHECK-TLS2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 4268 // CHECK-TLS2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 4269 // CHECK-TLS2-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]] 4270 // CHECK-TLS2: invoke.cont8: 4271 // CHECK-TLS2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 4272 // CHECK-TLS2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 4273 // CHECK-TLS2-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]] 4274 // CHECK-TLS2: invoke.cont9: 4275 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR4]] 4276 // CHECK-TLS2-NEXT: ret void 4277 // CHECK-TLS2: lpad: 4278 // CHECK-TLS2-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 4279 // CHECK-TLS2-NEXT: cleanup 4280 // CHECK-TLS2-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0 4281 // CHECK-TLS2-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8 4282 // CHECK-TLS2-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1 4283 // CHECK-TLS2-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4 4284 // CHECK-TLS2-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 4285 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]] 4286 // CHECK-TLS2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]] 4287 // CHECK-TLS2: arraydestroy.body: 4288 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4289 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4290 // CHECK-TLS2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4291 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 4292 // CHECK-TLS2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]] 4293 // CHECK-TLS2: arraydestroy.done4: 4294 // CHECK-TLS2-NEXT: br label [[EHCLEANUP:%.*]] 4295 // CHECK-TLS2: lpad6: 4296 // CHECK-TLS2-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 4297 // CHECK-TLS2-NEXT: cleanup 4298 // CHECK-TLS2-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0 4299 // CHECK-TLS2-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8 4300 // CHECK-TLS2-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1 4301 // CHECK-TLS2-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4 4302 // CHECK-TLS2-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 4303 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]] 4304 // CHECK-TLS2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]] 4305 // CHECK-TLS2: arraydestroy.body11: 4306 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ] 4307 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1 4308 // CHECK-TLS2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR4]] 4309 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0) 4310 // CHECK-TLS2-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]] 4311 // CHECK-TLS2: arraydestroy.done15: 4312 // CHECK-TLS2-NEXT: br label [[EHCLEANUP]] 4313 // CHECK-TLS2: ehcleanup: 4314 // CHECK-TLS2-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 4315 // CHECK-TLS2-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0 4316 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]] 4317 // CHECK-TLS2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]] 4318 // CHECK-TLS2: arraydestroy.body17: 4319 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 4320 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1 4321 // CHECK-TLS2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]] 4322 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 4323 // CHECK-TLS2-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]] 4324 // CHECK-TLS2: arraydestroy.done21: 4325 // CHECK-TLS2-NEXT: br label [[EH_RESUME:%.*]] 4326 // CHECK-TLS2: eh.resume: 4327 // CHECK-TLS2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 4328 // CHECK-TLS2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 4329 // CHECK-TLS2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 4330 // CHECK-TLS2-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 4331 // CHECK-TLS2-NEXT: resume { i8*, i32 } [[LPAD_VAL22]] 4332 // 4333 // 4334 // CHECK-TLS2-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 4335 // CHECK-TLS2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR6]] { 4336 // CHECK-TLS2-NEXT: entry: 4337 // CHECK-TLS2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 4338 // CHECK-TLS2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 4339 // CHECK-TLS2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4340 // CHECK-TLS2: arraydestroy.body: 4341 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4342 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4343 // CHECK-TLS2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4344 // CHECK-TLS2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0) 4345 // CHECK-TLS2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 4346 // CHECK-TLS2: arraydestroy.done1: 4347 // CHECK-TLS2-NEXT: ret void 4348 // 4349 // 4350 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 4351 // CHECK-TLS2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] align 2 { 4352 // CHECK-TLS2-NEXT: entry: 4353 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 4354 // CHECK-TLS2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4355 // CHECK-TLS2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 4356 // CHECK-TLS2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4357 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 4358 // CHECK-TLS2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 4359 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4360 // CHECK-TLS2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 4361 // CHECK-TLS2-NEXT: ret void 4362 // 4363 // 4364 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 4365 // CHECK-TLS2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] align 2 { 4366 // CHECK-TLS2-NEXT: entry: 4367 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 4368 // CHECK-TLS2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 4369 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 4370 // CHECK-TLS2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 4371 // CHECK-TLS2-NEXT: store i32 0, i32* [[A]], align 8 4372 // CHECK-TLS2-NEXT: ret void 4373 // 4374 // 4375 // CHECK-TLS2-LABEL: define {{[^@]+}}@__cxx_global_var_init.3 4376 // CHECK-TLS2-SAME: () #[[ATTR6]] { 4377 // CHECK-TLS2-NEXT: entry: 4378 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 4379 // CHECK-TLS2-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 4380 // CHECK-TLS2-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]] 4381 // CHECK-TLS2: init.check: 4382 // CHECK-TLS2-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23) 4383 // CHECK-TLS2-NEXT: [[TMP1:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR4]] 4384 // CHECK-TLS2-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 4385 // CHECK-TLS2-NEXT: br label [[INIT_END]] 4386 // CHECK-TLS2: init.end: 4387 // CHECK-TLS2-NEXT: ret void 4388 // 4389 // 4390 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 4391 // CHECK-TLS2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 4392 // CHECK-TLS2-NEXT: entry: 4393 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 4394 // CHECK-TLS2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4395 // CHECK-TLS2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 4396 // CHECK-TLS2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4397 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 4398 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4399 // CHECK-TLS2-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]) 4400 // CHECK-TLS2-NEXT: ret void 4401 // 4402 // 4403 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 4404 // CHECK-TLS2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4405 // CHECK-TLS2-NEXT: entry: 4406 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 4407 // CHECK-TLS2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 4408 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 4409 // CHECK-TLS2-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR4]] 4410 // CHECK-TLS2-NEXT: ret void 4411 // 4412 // 4413 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 4414 // CHECK-TLS2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4415 // CHECK-TLS2-NEXT: entry: 4416 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 4417 // CHECK-TLS2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4418 // CHECK-TLS2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 4419 // CHECK-TLS2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4420 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 4421 // CHECK-TLS2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 4422 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4423 // CHECK-TLS2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 4424 // CHECK-TLS2-NEXT: ret void 4425 // 4426 // 4427 // CHECK-TLS2-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 4428 // CHECK-TLS2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4429 // CHECK-TLS2-NEXT: entry: 4430 // CHECK-TLS2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 4431 // CHECK-TLS2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 4432 // CHECK-TLS2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 4433 // CHECK-TLS2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 4434 // CHECK-TLS2-NEXT: store i32 0, i32* [[A]], align 4 4435 // CHECK-TLS2-NEXT: ret void 4436 // 4437 // 4438 // CHECK-TLS2-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 4439 // CHECK-TLS2-SAME: () #[[ATTR6]] { 4440 // CHECK-TLS2-NEXT: entry: 4441 // CHECK-TLS2-NEXT: call void @__cxx_global_var_init.1() 4442 // CHECK-TLS2-NEXT: ret void 4443 // 4444 // 4445 // CHECK-TLS2-LABEL: define {{[^@]+}}@__tls_init 4446 // CHECK-TLS2-SAME: () #[[ATTR6]] { 4447 // CHECK-TLS2-NEXT: entry: 4448 // CHECK-TLS2-NEXT: [[TMP0:%.*]] = load i8, i8* @__tls_guard, align 1 4449 // CHECK-TLS2-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 4450 // CHECK-TLS2-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT:%.*]], label [[EXIT:%.*]], !prof [[PROF2]] 4451 // CHECK-TLS2: init: 4452 // CHECK-TLS2-NEXT: store i8 1, i8* @__tls_guard, align 1 4453 // CHECK-TLS2-NEXT: call void @__cxx_global_var_init() 4454 // CHECK-TLS2-NEXT: call void @__cxx_global_var_init.2() 4455 // CHECK-TLS2-NEXT: br label [[EXIT]] 4456 // CHECK-TLS2: exit: 4457 // CHECK-TLS2-NEXT: ret void 4458 // 4459 // 4460 // CHECK-TLS3-LABEL: define {{[^@]+}}@__cxx_global_var_init 4461 // CHECK-TLS3-SAME: () #[[ATTR0:[0-9]+]] !dbg [[DBG115:![0-9]+]] { 4462 // CHECK-TLS3-NEXT: entry: 4463 // CHECK-TLS3-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5), !dbg [[DBG119:![0-9]+]] 4464 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR3:[0-9]+]], !dbg [[DBG121:![0-9]+]] 4465 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG122:![0-9]+]] 4466 // 4467 // 4468 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 4469 // CHECK-TLS3-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 !dbg [[DBG123:![0-9]+]] { 4470 // CHECK-TLS3-NEXT: entry: 4471 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 4472 // CHECK-TLS3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4473 // CHECK-TLS3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 4474 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META124:![0-9]+]], metadata !DIExpression()), !dbg [[DBG126:![0-9]+]] 4475 // CHECK-TLS3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4476 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META127:![0-9]+]], metadata !DIExpression()), !dbg [[DBG128:![0-9]+]] 4477 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 4478 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG129:![0-9]+]] 4479 // CHECK-TLS3-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG129]] 4480 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG130:![0-9]+]] 4481 // 4482 // 4483 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 4484 // CHECK-TLS3-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 !dbg [[DBG131:![0-9]+]] { 4485 // CHECK-TLS3-NEXT: entry: 4486 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 4487 // CHECK-TLS3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 4488 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META132:![0-9]+]], metadata !DIExpression()), !dbg [[DBG133:![0-9]+]] 4489 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 4490 // CHECK-TLS3-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]], !dbg [[DBG134:![0-9]+]] 4491 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG135:![0-9]+]] 4492 // 4493 // 4494 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 4495 // CHECK-TLS3-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG136:![0-9]+]] { 4496 // CHECK-TLS3-NEXT: entry: 4497 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 4498 // CHECK-TLS3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4499 // CHECK-TLS3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 4500 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META137:![0-9]+]], metadata !DIExpression()), !dbg [[DBG138:![0-9]+]] 4501 // CHECK-TLS3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4502 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META139:![0-9]+]], metadata !DIExpression()), !dbg [[DBG140:![0-9]+]] 4503 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 4504 // CHECK-TLS3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG141:![0-9]+]] 4505 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG142:![0-9]+]] 4506 // CHECK-TLS3-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG141]] 4507 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG143:![0-9]+]] 4508 // 4509 // 4510 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 4511 // CHECK-TLS3-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG144:![0-9]+]] { 4512 // CHECK-TLS3-NEXT: entry: 4513 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 4514 // CHECK-TLS3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 4515 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META145:![0-9]+]], metadata !DIExpression()), !dbg [[DBG146:![0-9]+]] 4516 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 4517 // CHECK-TLS3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG147:![0-9]+]] 4518 // CHECK-TLS3-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG149:![0-9]+]] 4519 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG150:![0-9]+]] 4520 // 4521 // 4522 // CHECK-TLS3-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 4523 // CHECK-TLS3-SAME: () #[[ATTR0]] !dbg [[DBG151:![0-9]+]] { 4524 // CHECK-TLS3-NEXT: entry: 4525 // CHECK-TLS3-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27), !dbg [[DBG152:![0-9]+]] 4526 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG154:![0-9]+]] 4527 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG155:![0-9]+]] 4528 // 4529 // 4530 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 4531 // CHECK-TLS3-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 !dbg [[DBG156:![0-9]+]] { 4532 // CHECK-TLS3-NEXT: entry: 4533 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 4534 // CHECK-TLS3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4535 // CHECK-TLS3-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 4536 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META157:![0-9]+]], metadata !DIExpression()), !dbg [[DBG159:![0-9]+]] 4537 // CHECK-TLS3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4538 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META160:![0-9]+]], metadata !DIExpression()), !dbg [[DBG161:![0-9]+]] 4539 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 4540 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG162:![0-9]+]] 4541 // CHECK-TLS3-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG162]] 4542 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG163:![0-9]+]] 4543 // 4544 // 4545 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 4546 // CHECK-TLS3-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG164:![0-9]+]] { 4547 // CHECK-TLS3-NEXT: entry: 4548 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 4549 // CHECK-TLS3-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 4550 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META165:![0-9]+]], metadata !DIExpression()), !dbg [[DBG166:![0-9]+]] 4551 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 4552 // CHECK-TLS3-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR3]], !dbg [[DBG167:![0-9]+]] 4553 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG168:![0-9]+]] 4554 // 4555 // 4556 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 4557 // CHECK-TLS3-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG169:![0-9]+]] { 4558 // CHECK-TLS3-NEXT: entry: 4559 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 4560 // CHECK-TLS3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4561 // CHECK-TLS3-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 4562 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META170:![0-9]+]], metadata !DIExpression()), !dbg [[DBG171:![0-9]+]] 4563 // CHECK-TLS3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4564 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META172:![0-9]+]], metadata !DIExpression()), !dbg [[DBG173:![0-9]+]] 4565 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 4566 // CHECK-TLS3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG174:![0-9]+]] 4567 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG175:![0-9]+]] 4568 // CHECK-TLS3-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG174]] 4569 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG176:![0-9]+]] 4570 // 4571 // 4572 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 4573 // CHECK-TLS3-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG177:![0-9]+]] { 4574 // CHECK-TLS3-NEXT: entry: 4575 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 4576 // CHECK-TLS3-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 4577 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META178:![0-9]+]], metadata !DIExpression()), !dbg [[DBG179:![0-9]+]] 4578 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 4579 // CHECK-TLS3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG180:![0-9]+]] 4580 // CHECK-TLS3-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG182:![0-9]+]] 4581 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG183:![0-9]+]] 4582 // 4583 // 4584 // CHECK-TLS3-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 4585 // CHECK-TLS3-SAME: () #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG184:![0-9]+]] { 4586 // CHECK-TLS3-NEXT: entry: 4587 // CHECK-TLS3-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 4588 // CHECK-TLS3-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 4589 // CHECK-TLS3-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 4590 // CHECK-TLS3-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 4591 // CHECK-TLS3-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 4592 // CHECK-TLS3-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG185:![0-9]+]] 4593 // CHECK-TLS3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG187:![0-9]+]] 4594 // CHECK-TLS3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 4595 // CHECK-TLS3-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG188:![0-9]+]] 4596 // CHECK-TLS3: invoke.cont: 4597 // CHECK-TLS3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG187]] 4598 // CHECK-TLS3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 4599 // CHECK-TLS3-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]], !dbg [[DBG189:![0-9]+]] 4600 // CHECK-TLS3: invoke.cont2: 4601 // CHECK-TLS3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG187]] 4602 // CHECK-TLS3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 4603 // CHECK-TLS3-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]], !dbg [[DBG190:![0-9]+]] 4604 // CHECK-TLS3: invoke.cont3: 4605 // CHECK-TLS3-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG185]] 4606 // CHECK-TLS3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG191:![0-9]+]] 4607 // CHECK-TLS3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 4608 // CHECK-TLS3-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]], !dbg [[DBG192:![0-9]+]] 4609 // CHECK-TLS3: invoke.cont7: 4610 // CHECK-TLS3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG191]] 4611 // CHECK-TLS3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 4612 // CHECK-TLS3-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]], !dbg [[DBG193:![0-9]+]] 4613 // CHECK-TLS3: invoke.cont8: 4614 // CHECK-TLS3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG191]] 4615 // CHECK-TLS3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 4616 // CHECK-TLS3-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]], !dbg [[DBG194:![0-9]+]] 4617 // CHECK-TLS3: invoke.cont9: 4618 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG195:![0-9]+]] 4619 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG195]] 4620 // CHECK-TLS3: lpad: 4621 // CHECK-TLS3-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 4622 // CHECK-TLS3-NEXT: cleanup, !dbg [[DBG196:![0-9]+]] 4623 // CHECK-TLS3-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0, !dbg [[DBG196]] 4624 // CHECK-TLS3-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG196]] 4625 // CHECK-TLS3-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1, !dbg [[DBG196]] 4626 // CHECK-TLS3-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG196]] 4627 // CHECK-TLS3-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG187]] 4628 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]], !dbg [[DBG187]] 4629 // CHECK-TLS3-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG187]] 4630 // CHECK-TLS3: arraydestroy.body: 4631 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG187]] 4632 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG187]] 4633 // CHECK-TLS3-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]], !dbg [[DBG187]] 4634 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG187]] 4635 // CHECK-TLS3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG187]] 4636 // CHECK-TLS3: arraydestroy.done4: 4637 // CHECK-TLS3-NEXT: br label [[EHCLEANUP:%.*]], !dbg [[DBG187]] 4638 // CHECK-TLS3: lpad6: 4639 // CHECK-TLS3-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 4640 // CHECK-TLS3-NEXT: cleanup, !dbg [[DBG196]] 4641 // CHECK-TLS3-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0, !dbg [[DBG196]] 4642 // CHECK-TLS3-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG196]] 4643 // CHECK-TLS3-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1, !dbg [[DBG196]] 4644 // CHECK-TLS3-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG196]] 4645 // CHECK-TLS3-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG191]] 4646 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]], !dbg [[DBG191]] 4647 // CHECK-TLS3-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]], !dbg [[DBG191]] 4648 // CHECK-TLS3: arraydestroy.body11: 4649 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ], !dbg [[DBG191]] 4650 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1, !dbg [[DBG191]] 4651 // CHECK-TLS3-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR3]], !dbg [[DBG191]] 4652 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), !dbg [[DBG191]] 4653 // CHECK-TLS3-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]], !dbg [[DBG191]] 4654 // CHECK-TLS3: arraydestroy.done15: 4655 // CHECK-TLS3-NEXT: br label [[EHCLEANUP]], !dbg [[DBG191]] 4656 // CHECK-TLS3: ehcleanup: 4657 // CHECK-TLS3-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG185]] 4658 // CHECK-TLS3-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0, !dbg [[DBG185]] 4659 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]], !dbg [[DBG185]] 4660 // CHECK-TLS3-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]], !dbg [[DBG185]] 4661 // CHECK-TLS3: arraydestroy.body17: 4662 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ], !dbg [[DBG185]] 4663 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1, !dbg [[DBG185]] 4664 // CHECK-TLS3-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]], !dbg [[DBG185]] 4665 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG185]] 4666 // CHECK-TLS3-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]], !dbg [[DBG185]] 4667 // CHECK-TLS3: arraydestroy.done21: 4668 // CHECK-TLS3-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG185]] 4669 // CHECK-TLS3: eh.resume: 4670 // CHECK-TLS3-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG185]] 4671 // CHECK-TLS3-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG185]] 4672 // CHECK-TLS3-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG185]] 4673 // CHECK-TLS3-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG185]] 4674 // CHECK-TLS3-NEXT: resume { i8*, i32 } [[LPAD_VAL22]], !dbg [[DBG185]] 4675 // 4676 // 4677 // CHECK-TLS3-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 4678 // CHECK-TLS3-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG197:![0-9]+]] { 4679 // CHECK-TLS3-NEXT: entry: 4680 // CHECK-TLS3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 4681 // CHECK-TLS3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 4682 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META201:![0-9]+]], metadata !DIExpression()), !dbg [[DBG202:![0-9]+]] 4683 // CHECK-TLS3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG202]] 4684 // CHECK-TLS3: arraydestroy.body: 4685 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG202]] 4686 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG202]] 4687 // CHECK-TLS3-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]], !dbg [[DBG202]] 4688 // CHECK-TLS3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), !dbg [[DBG202]] 4689 // CHECK-TLS3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG202]] 4690 // CHECK-TLS3: arraydestroy.done1: 4691 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG202]] 4692 // 4693 // 4694 // CHECK-TLS3-LABEL: define {{[^@]+}}@main 4695 // CHECK-TLS3-SAME: () #[[ATTR5:[0-9]+]] !dbg [[DBG53:![0-9]+]] { 4696 // CHECK-TLS3-NEXT: entry: 4697 // CHECK-TLS3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4698 // CHECK-TLS3-NEXT: [[RES:%.*]] = alloca i32, align 4 4699 // CHECK-TLS3-NEXT: store i32 0, i32* [[RETVAL]], align 4 4700 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META203:![0-9]+]], metadata !DIExpression()), !dbg [[DBG204:![0-9]+]] 4701 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i8, i8* @_ZGVZ4mainE2sm, align 1, !dbg [[DBG205:![0-9]+]] 4702 // CHECK-TLS3-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG205]] 4703 // CHECK-TLS3-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG205]], !prof [[PROF206:![0-9]+]] 4704 // CHECK-TLS3: init.check: 4705 // CHECK-TLS3-NEXT: [[TMP1:%.*]] = call %struct.S1* @_ZTWL3gs1(), !dbg [[DBG207:![0-9]+]] 4706 // CHECK-TLS3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP1]], i32 0, i32 0, !dbg [[DBG208:![0-9]+]] 4707 // CHECK-TLS3-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4, !dbg [[DBG208]] 4708 // CHECK-TLS3-NEXT: call void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP2]]), !dbg [[DBG209:![0-9]+]] 4709 // CHECK-TLS3-NEXT: [[TMP3:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG205]] 4710 // CHECK-TLS3-NEXT: store i8 1, i8* @_ZGVZ4mainE2sm, align 1, !dbg [[DBG205]] 4711 // CHECK-TLS3-NEXT: br label [[INIT_END]], !dbg [[DBG205]] 4712 // CHECK-TLS3: init.end: 4713 // CHECK-TLS3-NEXT: [[TMP4:%.*]] = call %struct.S3* @_ZTWN6Static1sE(), !dbg [[DBG210:![0-9]+]] 4714 // CHECK-TLS3-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP4]], i32 0, i32 0, !dbg [[DBG211:![0-9]+]] 4715 // CHECK-TLS3-NEXT: [[TMP5:%.*]] = load i32, i32* [[A1]], align 4, !dbg [[DBG211]] 4716 // CHECK-TLS3-NEXT: store i32 [[TMP5]], i32* [[RES]], align 4, !dbg [[DBG212:![0-9]+]] 4717 // CHECK-TLS3-NEXT: [[TMP6:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_SMAIN:%.*]], %struct.Smain* @_ZZ4mainE2sm, i32 0, i32 0), align 8, !dbg [[DBG213:![0-9]+]] 4718 // CHECK-TLS3-NEXT: [[TMP7:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG214:![0-9]+]] 4719 // CHECK-TLS3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], [[TMP6]], !dbg [[DBG214]] 4720 // CHECK-TLS3-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG214]] 4721 // CHECK-TLS3-NEXT: [[TMP8:%.*]] = call %struct.S1* @_ZTWL3gs1(), !dbg [[DBG215:![0-9]+]] 4722 // CHECK-TLS3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP8]], i32 0, i32 0, !dbg [[DBG216:![0-9]+]] 4723 // CHECK-TLS3-NEXT: [[TMP9:%.*]] = load i32, i32* [[A2]], align 4, !dbg [[DBG216]] 4724 // CHECK-TLS3-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG217:![0-9]+]] 4725 // CHECK-TLS3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]], !dbg [[DBG217]] 4726 // CHECK-TLS3-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4, !dbg [[DBG217]] 4727 // CHECK-TLS3-NEXT: [[TMP11:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG218:![0-9]+]] 4728 // CHECK-TLS3-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG219:![0-9]+]] 4729 // CHECK-TLS3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]], !dbg [[DBG219]] 4730 // CHECK-TLS3-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG219]] 4731 // CHECK-TLS3-NEXT: [[TMP13:%.*]] = call %struct.S5* @_ZTW3gs3(), !dbg [[DBG220:![0-9]+]] 4732 // CHECK-TLS3-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP13]], i32 0, i32 0, !dbg [[DBG221:![0-9]+]] 4733 // CHECK-TLS3-NEXT: [[TMP14:%.*]] = load i32, i32* [[A5]], align 4, !dbg [[DBG221]] 4734 // CHECK-TLS3-NEXT: [[TMP15:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG222:![0-9]+]] 4735 // CHECK-TLS3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], [[TMP14]], !dbg [[DBG222]] 4736 // CHECK-TLS3-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4, !dbg [[DBG222]] 4737 // CHECK-TLS3-NEXT: [[TMP16:%.*]] = call [2 x [3 x %struct.S1]]* @_ZTW5arr_x(), !dbg [[DBG223:![0-9]+]] 4738 // CHECK-TLS3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP16]], i64 0, i64 1, !dbg [[DBG223]] 4739 // CHECK-TLS3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1, !dbg [[DBG223]] 4740 // CHECK-TLS3-NEXT: [[A8:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX7]], i32 0, i32 0, !dbg [[DBG224:![0-9]+]] 4741 // CHECK-TLS3-NEXT: [[TMP17:%.*]] = load i32, i32* [[A8]], align 4, !dbg [[DBG224]] 4742 // CHECK-TLS3-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG225:![0-9]+]] 4743 // CHECK-TLS3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP17]], !dbg [[DBG225]] 4744 // CHECK-TLS3-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4, !dbg [[DBG225]] 4745 // CHECK-TLS3-NEXT: [[TMP19:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4, !dbg [[DBG226:![0-9]+]] 4746 // CHECK-TLS3-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG227:![0-9]+]] 4747 // CHECK-TLS3-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP19]], !dbg [[DBG227]] 4748 // CHECK-TLS3-NEXT: store i32 [[ADD10]], i32* [[RES]], align 4, !dbg [[DBG227]] 4749 // CHECK-TLS3-NEXT: [[TMP21:%.*]] = load float, float* @_ZN2STIfE2stE, align 4, !dbg [[DBG228:![0-9]+]] 4750 // CHECK-TLS3-NEXT: [[CONV:%.*]] = fptosi float [[TMP21]] to i32, !dbg [[DBG228]] 4751 // CHECK-TLS3-NEXT: [[TMP22:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG229:![0-9]+]] 4752 // CHECK-TLS3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP22]], [[CONV]], !dbg [[DBG229]] 4753 // CHECK-TLS3-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4, !dbg [[DBG229]] 4754 // CHECK-TLS3-NEXT: [[TMP23:%.*]] = call %struct.S4* @_ZTWN2STI2S4E2stE(), !dbg [[DBG230:![0-9]+]] 4755 // CHECK-TLS3-NEXT: [[A12:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP23]], i32 0, i32 0, !dbg [[DBG231:![0-9]+]] 4756 // CHECK-TLS3-NEXT: [[TMP24:%.*]] = load i32, i32* [[A12]], align 4, !dbg [[DBG231]] 4757 // CHECK-TLS3-NEXT: [[TMP25:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG232:![0-9]+]] 4758 // CHECK-TLS3-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP25]], [[TMP24]], !dbg [[DBG232]] 4759 // CHECK-TLS3-NEXT: store i32 [[ADD13]], i32* [[RES]], align 4, !dbg [[DBG232]] 4760 // CHECK-TLS3-NEXT: [[TMP26:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG233:![0-9]+]] 4761 // CHECK-TLS3-NEXT: ret i32 [[TMP26]], !dbg [[DBG234:![0-9]+]] 4762 // 4763 // 4764 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZTWL3gs1 4765 // CHECK-TLS3-SAME: () #[[ATTR6:[0-9]+]] { 4766 // CHECK-TLS3-NEXT: call void @_ZTHL3gs1() 4767 // CHECK-TLS3-NEXT: ret %struct.S1* @_ZL3gs1 4768 // 4769 // 4770 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 4771 // CHECK-TLS3-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 !dbg [[DBG235:![0-9]+]] { 4772 // CHECK-TLS3-NEXT: entry: 4773 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 4774 // CHECK-TLS3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4775 // CHECK-TLS3-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 4776 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META236:![0-9]+]], metadata !DIExpression()), !dbg [[DBG238:![0-9]+]] 4777 // CHECK-TLS3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4778 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META239:![0-9]+]], metadata !DIExpression()), !dbg [[DBG240:![0-9]+]] 4779 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 4780 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG241:![0-9]+]] 4781 // CHECK-TLS3-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG241]] 4782 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG242:![0-9]+]] 4783 // 4784 // 4785 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 4786 // CHECK-TLS3-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG243:![0-9]+]] { 4787 // CHECK-TLS3-NEXT: entry: 4788 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 4789 // CHECK-TLS3-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 4790 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META244:![0-9]+]], metadata !DIExpression()), !dbg [[DBG245:![0-9]+]] 4791 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 4792 // CHECK-TLS3-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]], !dbg [[DBG246:![0-9]+]] 4793 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG247:![0-9]+]] 4794 // 4795 // 4796 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZTWN6Static1sE 4797 // CHECK-TLS3-SAME: () #[[ATTR6]] comdat { 4798 // CHECK-TLS3-NEXT: br i1 icmp ne (void ()* @_ZTHN6Static1sE, void ()* null), label [[TMP1:%.*]], label [[TMP2:%.*]] 4799 // CHECK-TLS3: 1: 4800 // CHECK-TLS3-NEXT: call void @_ZTHN6Static1sE() 4801 // CHECK-TLS3-NEXT: br label [[TMP2]] 4802 // CHECK-TLS3: 2: 4803 // CHECK-TLS3-NEXT: ret %struct.S3* @_ZN6Static1sE 4804 // 4805 // 4806 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZTW3gs3 4807 // CHECK-TLS3-SAME: () #[[ATTR6]] comdat { 4808 // CHECK-TLS3-NEXT: br i1 icmp ne (void ()* @_ZTH3gs3, void ()* null), label [[TMP1:%.*]], label [[TMP2:%.*]] 4809 // CHECK-TLS3: 1: 4810 // CHECK-TLS3-NEXT: call void @_ZTH3gs3() 4811 // CHECK-TLS3-NEXT: br label [[TMP2]] 4812 // CHECK-TLS3: 2: 4813 // CHECK-TLS3-NEXT: ret %struct.S5* @gs3 4814 // 4815 // 4816 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZTW5arr_x 4817 // CHECK-TLS3-SAME: () #[[ATTR6]] comdat { 4818 // CHECK-TLS3-NEXT: call void @_ZTH5arr_x() 4819 // CHECK-TLS3-NEXT: ret [2 x [3 x %struct.S1]]* @arr_x 4820 // 4821 // 4822 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZTWN2STI2S4E2stE 4823 // CHECK-TLS3-SAME: () #[[ATTR6]] comdat { 4824 // CHECK-TLS3-NEXT: call void @_ZTHN2STI2S4E2stE() 4825 // CHECK-TLS3-NEXT: ret %struct.S4* @_ZN2STI2S4E2stE 4826 // 4827 // 4828 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 4829 // CHECK-TLS3-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG248:![0-9]+]] { 4830 // CHECK-TLS3-NEXT: entry: 4831 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 4832 // CHECK-TLS3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4833 // CHECK-TLS3-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 4834 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META249:![0-9]+]], metadata !DIExpression()), !dbg [[DBG250:![0-9]+]] 4835 // CHECK-TLS3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4836 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META251:![0-9]+]], metadata !DIExpression()), !dbg [[DBG252:![0-9]+]] 4837 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 4838 // CHECK-TLS3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG253:![0-9]+]] 4839 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG254:![0-9]+]] 4840 // CHECK-TLS3-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG253]] 4841 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG255:![0-9]+]] 4842 // 4843 // 4844 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 4845 // CHECK-TLS3-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG256:![0-9]+]] { 4846 // CHECK-TLS3-NEXT: entry: 4847 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 4848 // CHECK-TLS3-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 4849 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META257:![0-9]+]], metadata !DIExpression()), !dbg [[DBG258:![0-9]+]] 4850 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 4851 // CHECK-TLS3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG259:![0-9]+]] 4852 // CHECK-TLS3-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG261:![0-9]+]] 4853 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG262:![0-9]+]] 4854 // 4855 // 4856 // CHECK-TLS3-LABEL: define {{[^@]+}}@_Z6foobarv 4857 // CHECK-TLS3-SAME: () #[[ATTR7:[0-9]+]] !dbg [[DBG263:![0-9]+]] { 4858 // CHECK-TLS3-NEXT: entry: 4859 // CHECK-TLS3-NEXT: [[RES:%.*]] = alloca i32, align 4 4860 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META264:![0-9]+]], metadata !DIExpression()), !dbg [[DBG265:![0-9]+]] 4861 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = call %struct.S3* @_ZTWN6Static1sE(), !dbg [[DBG266:![0-9]+]] 4862 // CHECK-TLS3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP0]], i32 0, i32 0, !dbg [[DBG267:![0-9]+]] 4863 // CHECK-TLS3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4, !dbg [[DBG267]] 4864 // CHECK-TLS3-NEXT: store i32 [[TMP1]], i32* [[RES]], align 4, !dbg [[DBG268:![0-9]+]] 4865 // CHECK-TLS3-NEXT: [[TMP2:%.*]] = call %struct.S1* @_ZTWL3gs1(), !dbg [[DBG269:![0-9]+]] 4866 // CHECK-TLS3-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0, !dbg [[DBG270:![0-9]+]] 4867 // CHECK-TLS3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A1]], align 4, !dbg [[DBG270]] 4868 // CHECK-TLS3-NEXT: [[TMP4:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG271:![0-9]+]] 4869 // CHECK-TLS3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP3]], !dbg [[DBG271]] 4870 // CHECK-TLS3-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG271]] 4871 // CHECK-TLS3-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG272:![0-9]+]] 4872 // CHECK-TLS3-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG273:![0-9]+]] 4873 // CHECK-TLS3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]], !dbg [[DBG273]] 4874 // CHECK-TLS3-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4, !dbg [[DBG273]] 4875 // CHECK-TLS3-NEXT: [[TMP7:%.*]] = call %struct.S5* @_ZTW3gs3(), !dbg [[DBG274:![0-9]+]] 4876 // CHECK-TLS3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP7]], i32 0, i32 0, !dbg [[DBG275:![0-9]+]] 4877 // CHECK-TLS3-NEXT: [[TMP8:%.*]] = load i32, i32* [[A3]], align 4, !dbg [[DBG275]] 4878 // CHECK-TLS3-NEXT: [[TMP9:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG276:![0-9]+]] 4879 // CHECK-TLS3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP9]], [[TMP8]], !dbg [[DBG276]] 4880 // CHECK-TLS3-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG276]] 4881 // CHECK-TLS3-NEXT: [[TMP10:%.*]] = call [2 x [3 x %struct.S1]]* @_ZTW5arr_x(), !dbg [[DBG277:![0-9]+]] 4882 // CHECK-TLS3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP10]], i64 0, i64 1, !dbg [[DBG277]] 4883 // CHECK-TLS3-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1, !dbg [[DBG277]] 4884 // CHECK-TLS3-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX5]], i32 0, i32 0, !dbg [[DBG278:![0-9]+]] 4885 // CHECK-TLS3-NEXT: [[TMP11:%.*]] = load i32, i32* [[A6]], align 4, !dbg [[DBG278]] 4886 // CHECK-TLS3-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG279:![0-9]+]] 4887 // CHECK-TLS3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], [[TMP11]], !dbg [[DBG279]] 4888 // CHECK-TLS3-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4, !dbg [[DBG279]] 4889 // CHECK-TLS3-NEXT: [[TMP13:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4, !dbg [[DBG280:![0-9]+]] 4890 // CHECK-TLS3-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG281:![0-9]+]] 4891 // CHECK-TLS3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP14]], [[TMP13]], !dbg [[DBG281]] 4892 // CHECK-TLS3-NEXT: store i32 [[ADD8]], i32* [[RES]], align 4, !dbg [[DBG281]] 4893 // CHECK-TLS3-NEXT: [[TMP15:%.*]] = load float, float* @_ZN2STIfE2stE, align 4, !dbg [[DBG282:![0-9]+]] 4894 // CHECK-TLS3-NEXT: [[CONV:%.*]] = fptosi float [[TMP15]] to i32, !dbg [[DBG282]] 4895 // CHECK-TLS3-NEXT: [[TMP16:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG283:![0-9]+]] 4896 // CHECK-TLS3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], [[CONV]], !dbg [[DBG283]] 4897 // CHECK-TLS3-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4, !dbg [[DBG283]] 4898 // CHECK-TLS3-NEXT: [[TMP17:%.*]] = call %struct.S4* @_ZTWN2STI2S4E2stE(), !dbg [[DBG284:![0-9]+]] 4899 // CHECK-TLS3-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP17]], i32 0, i32 0, !dbg [[DBG285:![0-9]+]] 4900 // CHECK-TLS3-NEXT: [[TMP18:%.*]] = load i32, i32* [[A10]], align 4, !dbg [[DBG285]] 4901 // CHECK-TLS3-NEXT: [[TMP19:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG286:![0-9]+]] 4902 // CHECK-TLS3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP19]], [[TMP18]], !dbg [[DBG286]] 4903 // CHECK-TLS3-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4, !dbg [[DBG286]] 4904 // CHECK-TLS3-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG287:![0-9]+]] 4905 // CHECK-TLS3-NEXT: ret i32 [[TMP20]], !dbg [[DBG288:![0-9]+]] 4906 // 4907 // 4908 // CHECK-TLS3-LABEL: define {{[^@]+}}@__cxx_global_var_init.3 4909 // CHECK-TLS3-SAME: () #[[ATTR0]] !dbg [[DBG289:![0-9]+]] { 4910 // CHECK-TLS3-NEXT: entry: 4911 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG290:![0-9]+]] 4912 // CHECK-TLS3-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG290]] 4913 // CHECK-TLS3-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG290]] 4914 // CHECK-TLS3: init.check: 4915 // CHECK-TLS3-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23), !dbg [[DBG291:![0-9]+]] 4916 // CHECK-TLS3-NEXT: [[TMP1:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG290]] 4917 // CHECK-TLS3-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG290]] 4918 // CHECK-TLS3-NEXT: br label [[INIT_END]], !dbg [[DBG290]] 4919 // CHECK-TLS3: init.end: 4920 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG293:![0-9]+]] 4921 // 4922 // 4923 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 4924 // CHECK-TLS3-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 !dbg [[DBG294:![0-9]+]] { 4925 // CHECK-TLS3-NEXT: entry: 4926 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 4927 // CHECK-TLS3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4928 // CHECK-TLS3-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 4929 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META295:![0-9]+]], metadata !DIExpression()), !dbg [[DBG297:![0-9]+]] 4930 // CHECK-TLS3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4931 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META298:![0-9]+]], metadata !DIExpression()), !dbg [[DBG299:![0-9]+]] 4932 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 4933 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG300:![0-9]+]] 4934 // CHECK-TLS3-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG300]] 4935 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG301:![0-9]+]] 4936 // 4937 // 4938 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 4939 // CHECK-TLS3-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG302:![0-9]+]] { 4940 // CHECK-TLS3-NEXT: entry: 4941 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 4942 // CHECK-TLS3-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 4943 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META303:![0-9]+]], metadata !DIExpression()), !dbg [[DBG304:![0-9]+]] 4944 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 4945 // CHECK-TLS3-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]], !dbg [[DBG305:![0-9]+]] 4946 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG306:![0-9]+]] 4947 // 4948 // 4949 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 4950 // CHECK-TLS3-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG307:![0-9]+]] { 4951 // CHECK-TLS3-NEXT: entry: 4952 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 4953 // CHECK-TLS3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4954 // CHECK-TLS3-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 4955 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META308:![0-9]+]], metadata !DIExpression()), !dbg [[DBG309:![0-9]+]] 4956 // CHECK-TLS3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4957 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META310:![0-9]+]], metadata !DIExpression()), !dbg [[DBG311:![0-9]+]] 4958 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 4959 // CHECK-TLS3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG312:![0-9]+]] 4960 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG313:![0-9]+]] 4961 // CHECK-TLS3-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG312]] 4962 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG314:![0-9]+]] 4963 // 4964 // 4965 // CHECK-TLS3-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 4966 // CHECK-TLS3-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG315:![0-9]+]] { 4967 // CHECK-TLS3-NEXT: entry: 4968 // CHECK-TLS3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 4969 // CHECK-TLS3-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 4970 // CHECK-TLS3-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META316:![0-9]+]], metadata !DIExpression()), !dbg [[DBG317:![0-9]+]] 4971 // CHECK-TLS3-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 4972 // CHECK-TLS3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG318:![0-9]+]] 4973 // CHECK-TLS3-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG320:![0-9]+]] 4974 // CHECK-TLS3-NEXT: ret void, !dbg [[DBG321:![0-9]+]] 4975 // 4976 // 4977 // CHECK-TLS3-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 4978 // CHECK-TLS3-SAME: () #[[ATTR0]] !dbg [[DBG322:![0-9]+]] { 4979 // CHECK-TLS3-NEXT: entry: 4980 // CHECK-TLS3-NEXT: call void @__cxx_global_var_init.1(), !dbg [[DBG324:![0-9]+]] 4981 // CHECK-TLS3-NEXT: ret void 4982 // 4983 // 4984 // CHECK-TLS3-LABEL: define {{[^@]+}}@__tls_init 4985 // CHECK-TLS3-SAME: () #[[ATTR0]] !dbg [[DBG325:![0-9]+]] { 4986 // CHECK-TLS3-NEXT: entry: 4987 // CHECK-TLS3-NEXT: [[TMP0:%.*]] = load i8, i8* @__tls_guard, align 1, !dbg [[DBG326:![0-9]+]] 4988 // CHECK-TLS3-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG326]] 4989 // CHECK-TLS3-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT:%.*]], label [[EXIT:%.*]], !dbg [[DBG326]], !prof [[PROF206]] 4990 // CHECK-TLS3: init: 4991 // CHECK-TLS3-NEXT: store i8 1, i8* @__tls_guard, align 1, !dbg [[DBG326]] 4992 // CHECK-TLS3-NEXT: call void @__cxx_global_var_init(), !dbg [[DBG326]] 4993 // CHECK-TLS3-NEXT: call void @__cxx_global_var_init.2(), !dbg [[DBG326]] 4994 // CHECK-TLS3-NEXT: br label [[EXIT]], !dbg [[DBG326]] 4995 // CHECK-TLS3: exit: 4996 // CHECK-TLS3-NEXT: ret void 4997 // 4998 // 4999 // CHECK-TLS4-LABEL: define {{[^@]+}}@main 5000 // CHECK-TLS4-SAME: () #[[ATTR0:[0-9]+]] !dbg [[DBG10:![0-9]+]] { 5001 // CHECK-TLS4-NEXT: entry: 5002 // CHECK-TLS4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5003 // CHECK-TLS4-NEXT: [[RES:%.*]] = alloca i32, align 4 5004 // CHECK-TLS4-NEXT: store i32 0, i32* [[RETVAL]], align 4 5005 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META115:![0-9]+]], metadata !DIExpression()), !dbg [[DBG116:![0-9]+]] 5006 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i8, i8* @_ZGVZ4mainE2sm, align 1, !dbg [[DBG117:![0-9]+]] 5007 // CHECK-TLS4-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG117]] 5008 // CHECK-TLS4-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG117]], !prof [[PROF118:![0-9]+]] 5009 // CHECK-TLS4: init.check: 5010 // CHECK-TLS4-NEXT: [[TMP1:%.*]] = call %struct.S1* @_ZTWL3gs1(), !dbg [[DBG119:![0-9]+]] 5011 // CHECK-TLS4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP1]], i32 0, i32 0, !dbg [[DBG120:![0-9]+]] 5012 // CHECK-TLS4-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4, !dbg [[DBG120]] 5013 // CHECK-TLS4-NEXT: call void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP2]]), !dbg [[DBG121:![0-9]+]] 5014 // CHECK-TLS4-NEXT: [[TMP3:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR5:[0-9]+]], !dbg [[DBG117]] 5015 // CHECK-TLS4-NEXT: store i8 1, i8* @_ZGVZ4mainE2sm, align 1, !dbg [[DBG117]] 5016 // CHECK-TLS4-NEXT: br label [[INIT_END]], !dbg [[DBG117]] 5017 // CHECK-TLS4: init.end: 5018 // CHECK-TLS4-NEXT: [[TMP4:%.*]] = call %struct.S3* @_ZTWN6Static1sE(), !dbg [[DBG122:![0-9]+]] 5019 // CHECK-TLS4-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP4]], i32 0, i32 0, !dbg [[DBG123:![0-9]+]] 5020 // CHECK-TLS4-NEXT: [[TMP5:%.*]] = load i32, i32* [[A1]], align 4, !dbg [[DBG123]] 5021 // CHECK-TLS4-NEXT: store i32 [[TMP5]], i32* [[RES]], align 4, !dbg [[DBG124:![0-9]+]] 5022 // CHECK-TLS4-NEXT: [[TMP6:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_SMAIN:%.*]], %struct.Smain* @_ZZ4mainE2sm, i32 0, i32 0), align 8, !dbg [[DBG125:![0-9]+]] 5023 // CHECK-TLS4-NEXT: [[TMP7:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG126:![0-9]+]] 5024 // CHECK-TLS4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], [[TMP6]], !dbg [[DBG126]] 5025 // CHECK-TLS4-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG126]] 5026 // CHECK-TLS4-NEXT: [[TMP8:%.*]] = call %struct.S1* @_ZTWL3gs1(), !dbg [[DBG127:![0-9]+]] 5027 // CHECK-TLS4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP8]], i32 0, i32 0, !dbg [[DBG128:![0-9]+]] 5028 // CHECK-TLS4-NEXT: [[TMP9:%.*]] = load i32, i32* [[A2]], align 4, !dbg [[DBG128]] 5029 // CHECK-TLS4-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG129:![0-9]+]] 5030 // CHECK-TLS4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]], !dbg [[DBG129]] 5031 // CHECK-TLS4-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4, !dbg [[DBG129]] 5032 // CHECK-TLS4-NEXT: [[TMP11:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG130:![0-9]+]] 5033 // CHECK-TLS4-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG131:![0-9]+]] 5034 // CHECK-TLS4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]], !dbg [[DBG131]] 5035 // CHECK-TLS4-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG131]] 5036 // CHECK-TLS4-NEXT: [[TMP13:%.*]] = call %struct.S5* @_ZTW3gs3(), !dbg [[DBG132:![0-9]+]] 5037 // CHECK-TLS4-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP13]], i32 0, i32 0, !dbg [[DBG133:![0-9]+]] 5038 // CHECK-TLS4-NEXT: [[TMP14:%.*]] = load i32, i32* [[A5]], align 4, !dbg [[DBG133]] 5039 // CHECK-TLS4-NEXT: [[TMP15:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG134:![0-9]+]] 5040 // CHECK-TLS4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], [[TMP14]], !dbg [[DBG134]] 5041 // CHECK-TLS4-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4, !dbg [[DBG134]] 5042 // CHECK-TLS4-NEXT: [[TMP16:%.*]] = call [2 x [3 x %struct.S1]]* @_ZTW5arr_x(), !dbg [[DBG135:![0-9]+]] 5043 // CHECK-TLS4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP16]], i64 0, i64 1, !dbg [[DBG135]] 5044 // CHECK-TLS4-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1, !dbg [[DBG135]] 5045 // CHECK-TLS4-NEXT: [[A8:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX7]], i32 0, i32 0, !dbg [[DBG136:![0-9]+]] 5046 // CHECK-TLS4-NEXT: [[TMP17:%.*]] = load i32, i32* [[A8]], align 4, !dbg [[DBG136]] 5047 // CHECK-TLS4-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG137:![0-9]+]] 5048 // CHECK-TLS4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP17]], !dbg [[DBG137]] 5049 // CHECK-TLS4-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4, !dbg [[DBG137]] 5050 // CHECK-TLS4-NEXT: [[TMP19:%.*]] = call i32* @_ZTWN2STIiE2stE(), !dbg [[DBG138:![0-9]+]] 5051 // CHECK-TLS4-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4, !dbg [[DBG138]] 5052 // CHECK-TLS4-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG139:![0-9]+]] 5053 // CHECK-TLS4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP20]], !dbg [[DBG139]] 5054 // CHECK-TLS4-NEXT: store i32 [[ADD10]], i32* [[RES]], align 4, !dbg [[DBG139]] 5055 // CHECK-TLS4-NEXT: [[TMP22:%.*]] = call float* @_ZTWN2STIfE2stE(), !dbg [[DBG140:![0-9]+]] 5056 // CHECK-TLS4-NEXT: [[TMP23:%.*]] = load float, float* [[TMP22]], align 4, !dbg [[DBG140]] 5057 // CHECK-TLS4-NEXT: [[CONV:%.*]] = fptosi float [[TMP23]] to i32, !dbg [[DBG140]] 5058 // CHECK-TLS4-NEXT: [[TMP24:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG141:![0-9]+]] 5059 // CHECK-TLS4-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP24]], [[CONV]], !dbg [[DBG141]] 5060 // CHECK-TLS4-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4, !dbg [[DBG141]] 5061 // CHECK-TLS4-NEXT: [[TMP25:%.*]] = call %struct.S4* @_ZTWN2STI2S4E2stE(), !dbg [[DBG142:![0-9]+]] 5062 // CHECK-TLS4-NEXT: [[A12:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP25]], i32 0, i32 0, !dbg [[DBG143:![0-9]+]] 5063 // CHECK-TLS4-NEXT: [[TMP26:%.*]] = load i32, i32* [[A12]], align 4, !dbg [[DBG143]] 5064 // CHECK-TLS4-NEXT: [[TMP27:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG144:![0-9]+]] 5065 // CHECK-TLS4-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP27]], [[TMP26]], !dbg [[DBG144]] 5066 // CHECK-TLS4-NEXT: store i32 [[ADD13]], i32* [[RES]], align 4, !dbg [[DBG144]] 5067 // CHECK-TLS4-NEXT: [[TMP28:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG145:![0-9]+]] 5068 // CHECK-TLS4-NEXT: ret i32 [[TMP28]], !dbg [[DBG146:![0-9]+]] 5069 // 5070 // 5071 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZTWL3gs1 5072 // CHECK-TLS4-SAME: () #[[ATTR2:[0-9]+]] { 5073 // CHECK-TLS4-NEXT: call void @_ZTHL3gs1() 5074 // CHECK-TLS4-NEXT: ret %struct.S1* @_ZL3gs1 5075 // 5076 // 5077 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 5078 // CHECK-TLS4-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] align 2 !dbg [[DBG147:![0-9]+]] { 5079 // CHECK-TLS4-NEXT: entry: 5080 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 5081 // CHECK-TLS4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5082 // CHECK-TLS4-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 5083 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META148:![0-9]+]], metadata !DIExpression()), !dbg [[DBG150:![0-9]+]] 5084 // CHECK-TLS4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5085 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META151:![0-9]+]], metadata !DIExpression()), !dbg [[DBG152:![0-9]+]] 5086 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 5087 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG153:![0-9]+]] 5088 // CHECK-TLS4-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG153]] 5089 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG154:![0-9]+]] 5090 // 5091 // 5092 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 5093 // CHECK-TLS4-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR4:[0-9]+]] align 2 !dbg [[DBG155:![0-9]+]] { 5094 // CHECK-TLS4-NEXT: entry: 5095 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 5096 // CHECK-TLS4-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 5097 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META156:![0-9]+]], metadata !DIExpression()), !dbg [[DBG157:![0-9]+]] 5098 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 5099 // CHECK-TLS4-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR5]], !dbg [[DBG158:![0-9]+]] 5100 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG159:![0-9]+]] 5101 // 5102 // 5103 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZTWN6Static1sE 5104 // CHECK-TLS4-SAME: () #[[ATTR2]] comdat { 5105 // CHECK-TLS4-NEXT: br i1 icmp ne (void ()* @_ZTHN6Static1sE, void ()* null), label [[TMP1:%.*]], label [[TMP2:%.*]] 5106 // CHECK-TLS4: 1: 5107 // CHECK-TLS4-NEXT: call void @_ZTHN6Static1sE() 5108 // CHECK-TLS4-NEXT: br label [[TMP2]] 5109 // CHECK-TLS4: 2: 5110 // CHECK-TLS4-NEXT: ret %struct.S3* @_ZN6Static1sE 5111 // 5112 // 5113 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZTW3gs3 5114 // CHECK-TLS4-SAME: () #[[ATTR2]] comdat { 5115 // CHECK-TLS4-NEXT: br i1 icmp ne (void ()* @_ZTH3gs3, void ()* null), label [[TMP1:%.*]], label [[TMP2:%.*]] 5116 // CHECK-TLS4: 1: 5117 // CHECK-TLS4-NEXT: call void @_ZTH3gs3() 5118 // CHECK-TLS4-NEXT: br label [[TMP2]] 5119 // CHECK-TLS4: 2: 5120 // CHECK-TLS4-NEXT: ret %struct.S5* @gs3 5121 // 5122 // 5123 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZTW5arr_x 5124 // CHECK-TLS4-SAME: () #[[ATTR2]] comdat { 5125 // CHECK-TLS4-NEXT: call void @_ZTH5arr_x() 5126 // CHECK-TLS4-NEXT: ret [2 x [3 x %struct.S1]]* @arr_x 5127 // 5128 // 5129 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZTWN2STIiE2stE 5130 // CHECK-TLS4-SAME: () #[[ATTR2]] comdat { 5131 // CHECK-TLS4-NEXT: ret i32* @_ZN2STIiE2stE 5132 // 5133 // 5134 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZTWN2STIfE2stE 5135 // CHECK-TLS4-SAME: () #[[ATTR2]] comdat { 5136 // CHECK-TLS4-NEXT: ret float* @_ZN2STIfE2stE 5137 // 5138 // 5139 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZTWN2STI2S4E2stE 5140 // CHECK-TLS4-SAME: () #[[ATTR2]] comdat { 5141 // CHECK-TLS4-NEXT: call void @_ZTHN2STI2S4E2stE() 5142 // CHECK-TLS4-NEXT: ret %struct.S4* @_ZN2STI2S4E2stE 5143 // 5144 // 5145 // CHECK-TLS4-LABEL: define {{[^@]+}}@_Z6foobarv 5146 // CHECK-TLS4-SAME: () #[[ATTR6:[0-9]+]] !dbg [[DBG160:![0-9]+]] { 5147 // CHECK-TLS4-NEXT: entry: 5148 // CHECK-TLS4-NEXT: [[RES:%.*]] = alloca i32, align 4 5149 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META161:![0-9]+]], metadata !DIExpression()), !dbg [[DBG162:![0-9]+]] 5150 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = call %struct.S3* @_ZTWN6Static1sE(), !dbg [[DBG163:![0-9]+]] 5151 // CHECK-TLS4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP0]], i32 0, i32 0, !dbg [[DBG164:![0-9]+]] 5152 // CHECK-TLS4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4, !dbg [[DBG164]] 5153 // CHECK-TLS4-NEXT: store i32 [[TMP1]], i32* [[RES]], align 4, !dbg [[DBG165:![0-9]+]] 5154 // CHECK-TLS4-NEXT: [[TMP2:%.*]] = call %struct.S1* @_ZTWL3gs1(), !dbg [[DBG166:![0-9]+]] 5155 // CHECK-TLS4-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0, !dbg [[DBG167:![0-9]+]] 5156 // CHECK-TLS4-NEXT: [[TMP3:%.*]] = load i32, i32* [[A1]], align 4, !dbg [[DBG167]] 5157 // CHECK-TLS4-NEXT: [[TMP4:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG168:![0-9]+]] 5158 // CHECK-TLS4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP3]], !dbg [[DBG168]] 5159 // CHECK-TLS4-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG168]] 5160 // CHECK-TLS4-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG169:![0-9]+]] 5161 // CHECK-TLS4-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG170:![0-9]+]] 5162 // CHECK-TLS4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]], !dbg [[DBG170]] 5163 // CHECK-TLS4-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4, !dbg [[DBG170]] 5164 // CHECK-TLS4-NEXT: [[TMP7:%.*]] = call %struct.S5* @_ZTW3gs3(), !dbg [[DBG171:![0-9]+]] 5165 // CHECK-TLS4-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP7]], i32 0, i32 0, !dbg [[DBG172:![0-9]+]] 5166 // CHECK-TLS4-NEXT: [[TMP8:%.*]] = load i32, i32* [[A3]], align 4, !dbg [[DBG172]] 5167 // CHECK-TLS4-NEXT: [[TMP9:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG173:![0-9]+]] 5168 // CHECK-TLS4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP9]], [[TMP8]], !dbg [[DBG173]] 5169 // CHECK-TLS4-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG173]] 5170 // CHECK-TLS4-NEXT: [[TMP10:%.*]] = call [2 x [3 x %struct.S1]]* @_ZTW5arr_x(), !dbg [[DBG174:![0-9]+]] 5171 // CHECK-TLS4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP10]], i64 0, i64 1, !dbg [[DBG174]] 5172 // CHECK-TLS4-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1, !dbg [[DBG174]] 5173 // CHECK-TLS4-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX5]], i32 0, i32 0, !dbg [[DBG175:![0-9]+]] 5174 // CHECK-TLS4-NEXT: [[TMP11:%.*]] = load i32, i32* [[A6]], align 4, !dbg [[DBG175]] 5175 // CHECK-TLS4-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG176:![0-9]+]] 5176 // CHECK-TLS4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], [[TMP11]], !dbg [[DBG176]] 5177 // CHECK-TLS4-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4, !dbg [[DBG176]] 5178 // CHECK-TLS4-NEXT: [[TMP13:%.*]] = call i32* @_ZTWN2STIiE2stE(), !dbg [[DBG177:![0-9]+]] 5179 // CHECK-TLS4-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4, !dbg [[DBG177]] 5180 // CHECK-TLS4-NEXT: [[TMP15:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG178:![0-9]+]] 5181 // CHECK-TLS4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], [[TMP14]], !dbg [[DBG178]] 5182 // CHECK-TLS4-NEXT: store i32 [[ADD8]], i32* [[RES]], align 4, !dbg [[DBG178]] 5183 // CHECK-TLS4-NEXT: [[TMP16:%.*]] = call float* @_ZTWN2STIfE2stE(), !dbg [[DBG179:![0-9]+]] 5184 // CHECK-TLS4-NEXT: [[TMP17:%.*]] = load float, float* [[TMP16]], align 4, !dbg [[DBG179]] 5185 // CHECK-TLS4-NEXT: [[CONV:%.*]] = fptosi float [[TMP17]] to i32, !dbg [[DBG179]] 5186 // CHECK-TLS4-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG180:![0-9]+]] 5187 // CHECK-TLS4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[CONV]], !dbg [[DBG180]] 5188 // CHECK-TLS4-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4, !dbg [[DBG180]] 5189 // CHECK-TLS4-NEXT: [[TMP19:%.*]] = call %struct.S4* @_ZTWN2STI2S4E2stE(), !dbg [[DBG181:![0-9]+]] 5190 // CHECK-TLS4-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP19]], i32 0, i32 0, !dbg [[DBG182:![0-9]+]] 5191 // CHECK-TLS4-NEXT: [[TMP20:%.*]] = load i32, i32* [[A10]], align 4, !dbg [[DBG182]] 5192 // CHECK-TLS4-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG183:![0-9]+]] 5193 // CHECK-TLS4-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], [[TMP20]], !dbg [[DBG183]] 5194 // CHECK-TLS4-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4, !dbg [[DBG183]] 5195 // CHECK-TLS4-NEXT: [[TMP22:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG184:![0-9]+]] 5196 // CHECK-TLS4-NEXT: ret i32 [[TMP22]], !dbg [[DBG185:![0-9]+]] 5197 // 5198 // 5199 // CHECK-TLS4-LABEL: define {{[^@]+}}@__cxx_global_var_init 5200 // CHECK-TLS4-SAME: () #[[ATTR7:[0-9]+]] !dbg [[DBG186:![0-9]+]] { 5201 // CHECK-TLS4-NEXT: entry: 5202 // CHECK-TLS4-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5), !dbg [[DBG190:![0-9]+]] 5203 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR5]], !dbg [[DBG192:![0-9]+]] 5204 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG193:![0-9]+]] 5205 // 5206 // 5207 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 5208 // CHECK-TLS4-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG194:![0-9]+]] { 5209 // CHECK-TLS4-NEXT: entry: 5210 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 5211 // CHECK-TLS4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5212 // CHECK-TLS4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 5213 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META195:![0-9]+]], metadata !DIExpression()), !dbg [[DBG197:![0-9]+]] 5214 // CHECK-TLS4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5215 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META198:![0-9]+]], metadata !DIExpression()), !dbg [[DBG199:![0-9]+]] 5216 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 5217 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG200:![0-9]+]] 5218 // CHECK-TLS4-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG200]] 5219 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG201:![0-9]+]] 5220 // 5221 // 5222 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 5223 // CHECK-TLS4-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 !dbg [[DBG202:![0-9]+]] { 5224 // CHECK-TLS4-NEXT: entry: 5225 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 5226 // CHECK-TLS4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 5227 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META203:![0-9]+]], metadata !DIExpression()), !dbg [[DBG204:![0-9]+]] 5228 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 5229 // CHECK-TLS4-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]], !dbg [[DBG205:![0-9]+]] 5230 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG206:![0-9]+]] 5231 // 5232 // 5233 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 5234 // CHECK-TLS4-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 !dbg [[DBG207:![0-9]+]] { 5235 // CHECK-TLS4-NEXT: entry: 5236 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 5237 // CHECK-TLS4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5238 // CHECK-TLS4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 5239 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META208:![0-9]+]], metadata !DIExpression()), !dbg [[DBG209:![0-9]+]] 5240 // CHECK-TLS4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5241 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META210:![0-9]+]], metadata !DIExpression()), !dbg [[DBG211:![0-9]+]] 5242 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 5243 // CHECK-TLS4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG212:![0-9]+]] 5244 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG213:![0-9]+]] 5245 // CHECK-TLS4-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG212]] 5246 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG214:![0-9]+]] 5247 // 5248 // 5249 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 5250 // CHECK-TLS4-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 !dbg [[DBG215:![0-9]+]] { 5251 // CHECK-TLS4-NEXT: entry: 5252 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 5253 // CHECK-TLS4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 5254 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META216:![0-9]+]], metadata !DIExpression()), !dbg [[DBG217:![0-9]+]] 5255 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 5256 // CHECK-TLS4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG218:![0-9]+]] 5257 // CHECK-TLS4-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG220:![0-9]+]] 5258 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG221:![0-9]+]] 5259 // 5260 // 5261 // CHECK-TLS4-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 5262 // CHECK-TLS4-SAME: () #[[ATTR7]] !dbg [[DBG222:![0-9]+]] { 5263 // CHECK-TLS4-NEXT: entry: 5264 // CHECK-TLS4-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27), !dbg [[DBG223:![0-9]+]] 5265 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR5]], !dbg [[DBG225:![0-9]+]] 5266 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG226:![0-9]+]] 5267 // 5268 // 5269 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 5270 // CHECK-TLS4-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG227:![0-9]+]] { 5271 // CHECK-TLS4-NEXT: entry: 5272 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 5273 // CHECK-TLS4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5274 // CHECK-TLS4-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 5275 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META228:![0-9]+]], metadata !DIExpression()), !dbg [[DBG230:![0-9]+]] 5276 // CHECK-TLS4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5277 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META231:![0-9]+]], metadata !DIExpression()), !dbg [[DBG232:![0-9]+]] 5278 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 5279 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG233:![0-9]+]] 5280 // CHECK-TLS4-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG233]] 5281 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG234:![0-9]+]] 5282 // 5283 // 5284 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 5285 // CHECK-TLS4-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 !dbg [[DBG235:![0-9]+]] { 5286 // CHECK-TLS4-NEXT: entry: 5287 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 5288 // CHECK-TLS4-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 5289 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META236:![0-9]+]], metadata !DIExpression()), !dbg [[DBG237:![0-9]+]] 5290 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 5291 // CHECK-TLS4-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR5]], !dbg [[DBG238:![0-9]+]] 5292 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG239:![0-9]+]] 5293 // 5294 // 5295 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 5296 // CHECK-TLS4-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 !dbg [[DBG240:![0-9]+]] { 5297 // CHECK-TLS4-NEXT: entry: 5298 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 5299 // CHECK-TLS4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5300 // CHECK-TLS4-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 5301 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META241:![0-9]+]], metadata !DIExpression()), !dbg [[DBG242:![0-9]+]] 5302 // CHECK-TLS4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5303 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META243:![0-9]+]], metadata !DIExpression()), !dbg [[DBG244:![0-9]+]] 5304 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 5305 // CHECK-TLS4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG245:![0-9]+]] 5306 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG246:![0-9]+]] 5307 // CHECK-TLS4-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG245]] 5308 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG247:![0-9]+]] 5309 // 5310 // 5311 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 5312 // CHECK-TLS4-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 !dbg [[DBG248:![0-9]+]] { 5313 // CHECK-TLS4-NEXT: entry: 5314 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 5315 // CHECK-TLS4-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 5316 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META249:![0-9]+]], metadata !DIExpression()), !dbg [[DBG250:![0-9]+]] 5317 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 5318 // CHECK-TLS4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG251:![0-9]+]] 5319 // CHECK-TLS4-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG253:![0-9]+]] 5320 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG254:![0-9]+]] 5321 // 5322 // 5323 // CHECK-TLS4-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 5324 // CHECK-TLS4-SAME: () #[[ATTR7]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG255:![0-9]+]] { 5325 // CHECK-TLS4-NEXT: entry: 5326 // CHECK-TLS4-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 5327 // CHECK-TLS4-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 5328 // CHECK-TLS4-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 5329 // CHECK-TLS4-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 5330 // CHECK-TLS4-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 5331 // CHECK-TLS4-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG256:![0-9]+]] 5332 // CHECK-TLS4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG258:![0-9]+]] 5333 // CHECK-TLS4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 5334 // CHECK-TLS4-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG259:![0-9]+]] 5335 // CHECK-TLS4: invoke.cont: 5336 // CHECK-TLS4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG258]] 5337 // CHECK-TLS4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 5338 // CHECK-TLS4-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]], !dbg [[DBG260:![0-9]+]] 5339 // CHECK-TLS4: invoke.cont2: 5340 // CHECK-TLS4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG258]] 5341 // CHECK-TLS4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 5342 // CHECK-TLS4-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]], !dbg [[DBG261:![0-9]+]] 5343 // CHECK-TLS4: invoke.cont3: 5344 // CHECK-TLS4-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG256]] 5345 // CHECK-TLS4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG262:![0-9]+]] 5346 // CHECK-TLS4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 5347 // CHECK-TLS4-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]], !dbg [[DBG263:![0-9]+]] 5348 // CHECK-TLS4: invoke.cont7: 5349 // CHECK-TLS4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG262]] 5350 // CHECK-TLS4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 5351 // CHECK-TLS4-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]], !dbg [[DBG264:![0-9]+]] 5352 // CHECK-TLS4: invoke.cont8: 5353 // CHECK-TLS4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG262]] 5354 // CHECK-TLS4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 5355 // CHECK-TLS4-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]], !dbg [[DBG265:![0-9]+]] 5356 // CHECK-TLS4: invoke.cont9: 5357 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR5]], !dbg [[DBG266:![0-9]+]] 5358 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG266]] 5359 // CHECK-TLS4: lpad: 5360 // CHECK-TLS4-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 5361 // CHECK-TLS4-NEXT: cleanup, !dbg [[DBG267:![0-9]+]] 5362 // CHECK-TLS4-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0, !dbg [[DBG267]] 5363 // CHECK-TLS4-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG267]] 5364 // CHECK-TLS4-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1, !dbg [[DBG267]] 5365 // CHECK-TLS4-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG267]] 5366 // CHECK-TLS4-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG258]] 5367 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]], !dbg [[DBG258]] 5368 // CHECK-TLS4-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG258]] 5369 // CHECK-TLS4: arraydestroy.body: 5370 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG258]] 5371 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG258]] 5372 // CHECK-TLS4-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]], !dbg [[DBG258]] 5373 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG258]] 5374 // CHECK-TLS4-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG258]] 5375 // CHECK-TLS4: arraydestroy.done4: 5376 // CHECK-TLS4-NEXT: br label [[EHCLEANUP:%.*]], !dbg [[DBG258]] 5377 // CHECK-TLS4: lpad6: 5378 // CHECK-TLS4-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 5379 // CHECK-TLS4-NEXT: cleanup, !dbg [[DBG267]] 5380 // CHECK-TLS4-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0, !dbg [[DBG267]] 5381 // CHECK-TLS4-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG267]] 5382 // CHECK-TLS4-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1, !dbg [[DBG267]] 5383 // CHECK-TLS4-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG267]] 5384 // CHECK-TLS4-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG262]] 5385 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]], !dbg [[DBG262]] 5386 // CHECK-TLS4-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]], !dbg [[DBG262]] 5387 // CHECK-TLS4: arraydestroy.body11: 5388 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ], !dbg [[DBG262]] 5389 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1, !dbg [[DBG262]] 5390 // CHECK-TLS4-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR5]], !dbg [[DBG262]] 5391 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), !dbg [[DBG262]] 5392 // CHECK-TLS4-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]], !dbg [[DBG262]] 5393 // CHECK-TLS4: arraydestroy.done15: 5394 // CHECK-TLS4-NEXT: br label [[EHCLEANUP]], !dbg [[DBG262]] 5395 // CHECK-TLS4: ehcleanup: 5396 // CHECK-TLS4-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG256]] 5397 // CHECK-TLS4-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0, !dbg [[DBG256]] 5398 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]], !dbg [[DBG256]] 5399 // CHECK-TLS4-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]], !dbg [[DBG256]] 5400 // CHECK-TLS4: arraydestroy.body17: 5401 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ], !dbg [[DBG256]] 5402 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1, !dbg [[DBG256]] 5403 // CHECK-TLS4-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR5]], !dbg [[DBG256]] 5404 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG256]] 5405 // CHECK-TLS4-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]], !dbg [[DBG256]] 5406 // CHECK-TLS4: arraydestroy.done21: 5407 // CHECK-TLS4-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG256]] 5408 // CHECK-TLS4: eh.resume: 5409 // CHECK-TLS4-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG256]] 5410 // CHECK-TLS4-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG256]] 5411 // CHECK-TLS4-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG256]] 5412 // CHECK-TLS4-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG256]] 5413 // CHECK-TLS4-NEXT: resume { i8*, i32 } [[LPAD_VAL22]], !dbg [[DBG256]] 5414 // 5415 // 5416 // CHECK-TLS4-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 5417 // CHECK-TLS4-SAME: (i8* [[TMP0:%.*]]) #[[ATTR7]] !dbg [[DBG268:![0-9]+]] { 5418 // CHECK-TLS4-NEXT: entry: 5419 // CHECK-TLS4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 5420 // CHECK-TLS4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 5421 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META272:![0-9]+]], metadata !DIExpression()), !dbg [[DBG273:![0-9]+]] 5422 // CHECK-TLS4-NEXT: br label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG273]] 5423 // CHECK-TLS4: arraydestroy.body: 5424 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG273]] 5425 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG273]] 5426 // CHECK-TLS4-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]], !dbg [[DBG273]] 5427 // CHECK-TLS4-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), !dbg [[DBG273]] 5428 // CHECK-TLS4-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG273]] 5429 // CHECK-TLS4: arraydestroy.done1: 5430 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG273]] 5431 // 5432 // 5433 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 5434 // CHECK-TLS4-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR4]] align 2 !dbg [[DBG274:![0-9]+]] { 5435 // CHECK-TLS4-NEXT: entry: 5436 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 5437 // CHECK-TLS4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5438 // CHECK-TLS4-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 5439 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META275:![0-9]+]], metadata !DIExpression()), !dbg [[DBG276:![0-9]+]] 5440 // CHECK-TLS4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5441 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META277:![0-9]+]], metadata !DIExpression()), !dbg [[DBG278:![0-9]+]] 5442 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 5443 // CHECK-TLS4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG279:![0-9]+]] 5444 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG280:![0-9]+]] 5445 // CHECK-TLS4-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG279]] 5446 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG281:![0-9]+]] 5447 // 5448 // 5449 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 5450 // CHECK-TLS4-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] align 2 !dbg [[DBG282:![0-9]+]] { 5451 // CHECK-TLS4-NEXT: entry: 5452 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 5453 // CHECK-TLS4-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 5454 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META283:![0-9]+]], metadata !DIExpression()), !dbg [[DBG284:![0-9]+]] 5455 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 5456 // CHECK-TLS4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG285:![0-9]+]] 5457 // CHECK-TLS4-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG287:![0-9]+]] 5458 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG288:![0-9]+]] 5459 // 5460 // 5461 // CHECK-TLS4-LABEL: define {{[^@]+}}@__cxx_global_var_init.3 5462 // CHECK-TLS4-SAME: () #[[ATTR7]] !dbg [[DBG289:![0-9]+]] { 5463 // CHECK-TLS4-NEXT: entry: 5464 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG290:![0-9]+]] 5465 // CHECK-TLS4-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG290]] 5466 // CHECK-TLS4-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG290]] 5467 // CHECK-TLS4: init.check: 5468 // CHECK-TLS4-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23), !dbg [[DBG291:![0-9]+]] 5469 // CHECK-TLS4-NEXT: [[TMP1:%.*]] = call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR5]], !dbg [[DBG290]] 5470 // CHECK-TLS4-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG290]] 5471 // CHECK-TLS4-NEXT: br label [[INIT_END]], !dbg [[DBG290]] 5472 // CHECK-TLS4: init.end: 5473 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG293:![0-9]+]] 5474 // 5475 // 5476 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 5477 // CHECK-TLS4-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG294:![0-9]+]] { 5478 // CHECK-TLS4-NEXT: entry: 5479 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 5480 // CHECK-TLS4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5481 // CHECK-TLS4-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 5482 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META295:![0-9]+]], metadata !DIExpression()), !dbg [[DBG297:![0-9]+]] 5483 // CHECK-TLS4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5484 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META298:![0-9]+]], metadata !DIExpression()), !dbg [[DBG299:![0-9]+]] 5485 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 5486 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG300:![0-9]+]] 5487 // CHECK-TLS4-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG300]] 5488 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG301:![0-9]+]] 5489 // 5490 // 5491 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 5492 // CHECK-TLS4-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 !dbg [[DBG302:![0-9]+]] { 5493 // CHECK-TLS4-NEXT: entry: 5494 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 5495 // CHECK-TLS4-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 5496 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META303:![0-9]+]], metadata !DIExpression()), !dbg [[DBG304:![0-9]+]] 5497 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 5498 // CHECK-TLS4-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR5]], !dbg [[DBG305:![0-9]+]] 5499 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG306:![0-9]+]] 5500 // 5501 // 5502 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 5503 // CHECK-TLS4-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 !dbg [[DBG307:![0-9]+]] { 5504 // CHECK-TLS4-NEXT: entry: 5505 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 5506 // CHECK-TLS4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5507 // CHECK-TLS4-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 5508 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META308:![0-9]+]], metadata !DIExpression()), !dbg [[DBG309:![0-9]+]] 5509 // CHECK-TLS4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5510 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META310:![0-9]+]], metadata !DIExpression()), !dbg [[DBG311:![0-9]+]] 5511 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 5512 // CHECK-TLS4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG312:![0-9]+]] 5513 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG313:![0-9]+]] 5514 // CHECK-TLS4-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG312]] 5515 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG314:![0-9]+]] 5516 // 5517 // 5518 // CHECK-TLS4-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 5519 // CHECK-TLS4-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 !dbg [[DBG315:![0-9]+]] { 5520 // CHECK-TLS4-NEXT: entry: 5521 // CHECK-TLS4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 5522 // CHECK-TLS4-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 5523 // CHECK-TLS4-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META316:![0-9]+]], metadata !DIExpression()), !dbg [[DBG317:![0-9]+]] 5524 // CHECK-TLS4-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 5525 // CHECK-TLS4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG318:![0-9]+]] 5526 // CHECK-TLS4-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG320:![0-9]+]] 5527 // CHECK-TLS4-NEXT: ret void, !dbg [[DBG321:![0-9]+]] 5528 // 5529 // 5530 // CHECK-TLS4-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 5531 // CHECK-TLS4-SAME: () #[[ATTR7]] !dbg [[DBG322:![0-9]+]] { 5532 // CHECK-TLS4-NEXT: entry: 5533 // CHECK-TLS4-NEXT: call void @__cxx_global_var_init.1(), !dbg [[DBG324:![0-9]+]] 5534 // CHECK-TLS4-NEXT: ret void 5535 // 5536 // 5537 // CHECK-TLS4-LABEL: define {{[^@]+}}@__tls_init 5538 // CHECK-TLS4-SAME: () #[[ATTR7]] !dbg [[DBG325:![0-9]+]] { 5539 // CHECK-TLS4-NEXT: entry: 5540 // CHECK-TLS4-NEXT: [[TMP0:%.*]] = load i8, i8* @__tls_guard, align 1, !dbg [[DBG326:![0-9]+]] 5541 // CHECK-TLS4-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG326]] 5542 // CHECK-TLS4-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT:%.*]], label [[EXIT:%.*]], !dbg [[DBG326]], !prof [[PROF118]] 5543 // CHECK-TLS4: init: 5544 // CHECK-TLS4-NEXT: store i8 1, i8* @__tls_guard, align 1, !dbg [[DBG326]] 5545 // CHECK-TLS4-NEXT: call void @__cxx_global_var_init(), !dbg [[DBG326]] 5546 // CHECK-TLS4-NEXT: call void @__cxx_global_var_init.2(), !dbg [[DBG326]] 5547 // CHECK-TLS4-NEXT: br label [[EXIT]], !dbg [[DBG326]] 5548 // CHECK-TLS4: exit: 5549 // CHECK-TLS4-NEXT: ret void 5550 // 5551 // 5552 // SIMD3-LABEL: define {{[^@]+}}@__cxx_global_var_init 5553 // SIMD3-SAME: () #[[ATTR0:[0-9]+]] { 5554 // SIMD3-NEXT: entry: 5555 // SIMD3-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5) 5556 // SIMD3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR3:[0-9]+]] 5557 // SIMD3-NEXT: ret void 5558 // 5559 // 5560 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 5561 // SIMD3-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5562 // SIMD3-NEXT: entry: 5563 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 5564 // SIMD3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5565 // SIMD3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 5566 // SIMD3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5567 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 5568 // SIMD3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5569 // SIMD3-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 5570 // SIMD3-NEXT: ret void 5571 // 5572 // 5573 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 5574 // SIMD3-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 { 5575 // SIMD3-NEXT: entry: 5576 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 5577 // SIMD3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 5578 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 5579 // SIMD3-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 5580 // SIMD3-NEXT: ret void 5581 // 5582 // 5583 // SIMD3-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 5584 // SIMD3-SAME: () #[[ATTR0]] { 5585 // SIMD3-NEXT: entry: 5586 // SIMD3-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27) 5587 // SIMD3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR3]] 5588 // SIMD3-NEXT: ret void 5589 // 5590 // 5591 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 5592 // SIMD3-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5593 // SIMD3-NEXT: entry: 5594 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 5595 // SIMD3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5596 // SIMD3-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 5597 // SIMD3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5598 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 5599 // SIMD3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5600 // SIMD3-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]) 5601 // SIMD3-NEXT: ret void 5602 // 5603 // 5604 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 5605 // SIMD3-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 5606 // SIMD3-NEXT: entry: 5607 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 5608 // SIMD3-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 5609 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 5610 // SIMD3-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR3]] 5611 // SIMD3-NEXT: ret void 5612 // 5613 // 5614 // SIMD3-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 5615 // SIMD3-SAME: () #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5616 // SIMD3-NEXT: entry: 5617 // SIMD3-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 5618 // SIMD3-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 5619 // SIMD3-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 5620 // SIMD3-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 5621 // SIMD3-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 5622 // SIMD3-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 5623 // SIMD3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 5624 // SIMD3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 5625 // SIMD3-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 5626 // SIMD3: invoke.cont: 5627 // SIMD3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 5628 // SIMD3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 5629 // SIMD3-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]] 5630 // SIMD3: invoke.cont2: 5631 // SIMD3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 5632 // SIMD3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 5633 // SIMD3-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]] 5634 // SIMD3: invoke.cont3: 5635 // SIMD3-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 5636 // SIMD3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 5637 // SIMD3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 5638 // SIMD3-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]] 5639 // SIMD3: invoke.cont7: 5640 // SIMD3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 5641 // SIMD3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 5642 // SIMD3-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]] 5643 // SIMD3: invoke.cont8: 5644 // SIMD3-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 5645 // SIMD3-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 5646 // SIMD3-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]] 5647 // SIMD3: invoke.cont9: 5648 // SIMD3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR3]] 5649 // SIMD3-NEXT: ret void 5650 // SIMD3: lpad: 5651 // SIMD3-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 5652 // SIMD3-NEXT: cleanup 5653 // SIMD3-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0 5654 // SIMD3-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8 5655 // SIMD3-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1 5656 // SIMD3-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4 5657 // SIMD3-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8 5658 // SIMD3-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]] 5659 // SIMD3-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]] 5660 // SIMD3: arraydestroy.body: 5661 // SIMD3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5662 // SIMD3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5663 // SIMD3-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 5664 // SIMD3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 5665 // SIMD3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]] 5666 // SIMD3: arraydestroy.done4: 5667 // SIMD3-NEXT: br label [[EHCLEANUP:%.*]] 5668 // SIMD3: lpad6: 5669 // SIMD3-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 5670 // SIMD3-NEXT: cleanup 5671 // SIMD3-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0 5672 // SIMD3-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8 5673 // SIMD3-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1 5674 // SIMD3-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4 5675 // SIMD3-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8 5676 // SIMD3-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]] 5677 // SIMD3-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]] 5678 // SIMD3: arraydestroy.body11: 5679 // SIMD3-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ] 5680 // SIMD3-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1 5681 // SIMD3-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR3]] 5682 // SIMD3-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0) 5683 // SIMD3-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]] 5684 // SIMD3: arraydestroy.done15: 5685 // SIMD3-NEXT: br label [[EHCLEANUP]] 5686 // SIMD3: ehcleanup: 5687 // SIMD3-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8 5688 // SIMD3-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0 5689 // SIMD3-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]] 5690 // SIMD3-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]] 5691 // SIMD3: arraydestroy.body17: 5692 // SIMD3-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 5693 // SIMD3-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1 5694 // SIMD3-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]] 5695 // SIMD3-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0) 5696 // SIMD3-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]] 5697 // SIMD3: arraydestroy.done21: 5698 // SIMD3-NEXT: br label [[EH_RESUME:%.*]] 5699 // SIMD3: eh.resume: 5700 // SIMD3-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 5701 // SIMD3-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 5702 // SIMD3-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 5703 // SIMD3-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 5704 // SIMD3-NEXT: resume { i8*, i32 } [[LPAD_VAL22]] 5705 // 5706 // 5707 // SIMD3-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 5708 // SIMD3-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] { 5709 // SIMD3-NEXT: entry: 5710 // SIMD3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 5711 // SIMD3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 5712 // SIMD3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5713 // SIMD3: arraydestroy.body: 5714 // SIMD3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5715 // SIMD3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5716 // SIMD3-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 5717 // SIMD3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0) 5718 // SIMD3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 5719 // SIMD3: arraydestroy.done1: 5720 // SIMD3-NEXT: ret void 5721 // 5722 // 5723 // SIMD3-LABEL: define {{[^@]+}}@main 5724 // SIMD3-SAME: () #[[ATTR4:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5725 // SIMD3-NEXT: entry: 5726 // SIMD3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5727 // SIMD3-NEXT: [[RES:%.*]] = alloca i32, align 4 5728 // SIMD3-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 5729 // SIMD3-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 5730 // SIMD3-NEXT: store i32 0, i32* [[RETVAL]], align 4 5731 // SIMD3-NEXT: [[TMP0:%.*]] = load atomic i8, i8* bitcast (i64* @_ZGVZ4mainE2sm to i8*) acquire, align 8 5732 // SIMD3-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 5733 // SIMD3-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2:![0-9]+]] 5734 // SIMD3: init.check: 5735 // SIMD3-NEXT: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 5736 // SIMD3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0 5737 // SIMD3-NEXT: br i1 [[TOBOOL]], label [[INIT:%.*]], label [[INIT_END]] 5738 // SIMD3: init: 5739 // SIMD3-NEXT: [[TMP2:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4 5740 // SIMD3-NEXT: invoke void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP2]]) 5741 // SIMD3-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 5742 // SIMD3: invoke.cont: 5743 // SIMD3-NEXT: [[TMP3:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR3]] 5744 // SIMD3-NEXT: call void @__cxa_guard_release(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 5745 // SIMD3-NEXT: br label [[INIT_END]] 5746 // SIMD3: init.end: 5747 // SIMD3-NEXT: [[TMP4:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S3:%.*]], %struct.S3* @_ZN6Static1sE, i32 0, i32 0), align 4 5748 // SIMD3-NEXT: store i32 [[TMP4]], i32* [[RES]], align 4 5749 // SIMD3-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_SMAIN:%.*]], %struct.Smain* @_ZZ4mainE2sm, i32 0, i32 0), align 8 5750 // SIMD3-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4 5751 // SIMD3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP5]] 5752 // SIMD3-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 5753 // SIMD3-NEXT: [[TMP7:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4 5754 // SIMD3-NEXT: [[TMP8:%.*]] = load i32, i32* [[RES]], align 4 5755 // SIMD3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP7]] 5756 // SIMD3-NEXT: store i32 [[ADD1]], i32* [[RES]], align 4 5757 // SIMD3-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 5758 // SIMD3-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4 5759 // SIMD3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 5760 // SIMD3-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4 5761 // SIMD3-NEXT: [[TMP11:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S5:%.*]], %struct.S5* @gs3, i32 0, i32 0), align 4 5762 // SIMD3-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4 5763 // SIMD3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 5764 // SIMD3-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4 5765 // SIMD3-NEXT: [[TMP13:%.*]] = load i32, i32* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1, i32 0), align 4 5766 // SIMD3-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4 5767 // SIMD3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 5768 // SIMD3-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 5769 // SIMD3-NEXT: [[TMP15:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4 5770 // SIMD3-NEXT: [[TMP16:%.*]] = load i32, i32* [[RES]], align 4 5771 // SIMD3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP15]] 5772 // SIMD3-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4 5773 // SIMD3-NEXT: [[TMP17:%.*]] = load float, float* @_ZN2STIfE2stE, align 4 5774 // SIMD3-NEXT: [[CONV:%.*]] = fptosi float [[TMP17]] to i32 5775 // SIMD3-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4 5776 // SIMD3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[CONV]] 5777 // SIMD3-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4 5778 // SIMD3-NEXT: [[TMP19:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S4:%.*]], %struct.S4* @_ZN2STI2S4E2stE, i32 0, i32 0), align 4 5779 // SIMD3-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4 5780 // SIMD3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], [[TMP19]] 5781 // SIMD3-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4 5782 // SIMD3-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4 5783 // SIMD3-NEXT: ret i32 [[TMP21]] 5784 // SIMD3: lpad: 5785 // SIMD3-NEXT: [[TMP22:%.*]] = landingpad { i8*, i32 } 5786 // SIMD3-NEXT: cleanup 5787 // SIMD3-NEXT: [[TMP23:%.*]] = extractvalue { i8*, i32 } [[TMP22]], 0 5788 // SIMD3-NEXT: store i8* [[TMP23]], i8** [[EXN_SLOT]], align 8 5789 // SIMD3-NEXT: [[TMP24:%.*]] = extractvalue { i8*, i32 } [[TMP22]], 1 5790 // SIMD3-NEXT: store i32 [[TMP24]], i32* [[EHSELECTOR_SLOT]], align 4 5791 // SIMD3-NEXT: call void @__cxa_guard_abort(i64* @_ZGVZ4mainE2sm) #[[ATTR3]] 5792 // SIMD3-NEXT: br label [[EH_RESUME:%.*]] 5793 // SIMD3: eh.resume: 5794 // SIMD3-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 5795 // SIMD3-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 5796 // SIMD3-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 5797 // SIMD3-NEXT: [[LPAD_VAL8:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 5798 // SIMD3-NEXT: resume { i8*, i32 } [[LPAD_VAL8]] 5799 // 5800 // 5801 // SIMD3-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 5802 // SIMD3-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 5803 // SIMD3-NEXT: entry: 5804 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 5805 // SIMD3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5806 // SIMD3-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 5807 // SIMD3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5808 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 5809 // SIMD3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5810 // SIMD3-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]) 5811 // SIMD3-NEXT: ret void 5812 // 5813 // 5814 // SIMD3-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 5815 // SIMD3-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 5816 // SIMD3-NEXT: entry: 5817 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 5818 // SIMD3-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 5819 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 5820 // SIMD3-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]] 5821 // SIMD3-NEXT: ret void 5822 // 5823 // 5824 // SIMD3-LABEL: define {{[^@]+}}@_Z6foobarv 5825 // SIMD3-SAME: () #[[ATTR5:[0-9]+]] { 5826 // SIMD3-NEXT: entry: 5827 // SIMD3-NEXT: [[RES:%.*]] = alloca i32, align 4 5828 // SIMD3-NEXT: [[TMP0:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S3:%.*]], %struct.S3* @_ZN6Static1sE, i32 0, i32 0), align 4 5829 // SIMD3-NEXT: store i32 [[TMP0]], i32* [[RES]], align 4 5830 // SIMD3-NEXT: [[TMP1:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4 5831 // SIMD3-NEXT: [[TMP2:%.*]] = load i32, i32* [[RES]], align 4 5832 // SIMD3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]] 5833 // SIMD3-NEXT: store i32 [[ADD]], i32* [[RES]], align 4 5834 // SIMD3-NEXT: [[TMP3:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8 5835 // SIMD3-NEXT: [[TMP4:%.*]] = load i32, i32* [[RES]], align 4 5836 // SIMD3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], [[TMP3]] 5837 // SIMD3-NEXT: store i32 [[ADD1]], i32* [[RES]], align 4 5838 // SIMD3-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S5:%.*]], %struct.S5* @gs3, i32 0, i32 0), align 4 5839 // SIMD3-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4 5840 // SIMD3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]] 5841 // SIMD3-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4 5842 // SIMD3-NEXT: [[TMP7:%.*]] = load i32, i32* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1, i32 0), align 4 5843 // SIMD3-NEXT: [[TMP8:%.*]] = load i32, i32* [[RES]], align 4 5844 // SIMD3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP7]] 5845 // SIMD3-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4 5846 // SIMD3-NEXT: [[TMP9:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4 5847 // SIMD3-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4 5848 // SIMD3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 5849 // SIMD3-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4 5850 // SIMD3-NEXT: [[TMP11:%.*]] = load float, float* @_ZN2STIfE2stE, align 4 5851 // SIMD3-NEXT: [[CONV:%.*]] = fptosi float [[TMP11]] to i32 5852 // SIMD3-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4 5853 // SIMD3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], [[CONV]] 5854 // SIMD3-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4 5855 // SIMD3-NEXT: [[TMP13:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S4:%.*]], %struct.S4* @_ZN2STI2S4E2stE, i32 0, i32 0), align 4 5856 // SIMD3-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4 5857 // SIMD3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 5858 // SIMD3-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4 5859 // SIMD3-NEXT: [[TMP15:%.*]] = load i32, i32* [[RES]], align 4 5860 // SIMD3-NEXT: ret i32 [[TMP15]] 5861 // 5862 // 5863 // SIMD3-LABEL: define {{[^@]+}}@__cxx_global_var_init.3 5864 // SIMD3-SAME: () #[[ATTR0]] comdat($_ZN2STI2S4E2stE) { 5865 // SIMD3-NEXT: entry: 5866 // SIMD3-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 5867 // SIMD3-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0 5868 // SIMD3-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]] 5869 // SIMD3: init.check: 5870 // SIMD3-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23) 5871 // SIMD3-NEXT: [[TMP1:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR3]] 5872 // SIMD3-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8 5873 // SIMD3-NEXT: br label [[INIT_END]] 5874 // SIMD3: init.end: 5875 // SIMD3-NEXT: ret void 5876 // 5877 // 5878 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 5879 // SIMD3-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5880 // SIMD3-NEXT: entry: 5881 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 5882 // SIMD3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5883 // SIMD3-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 5884 // SIMD3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5885 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 5886 // SIMD3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5887 // SIMD3-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]) 5888 // SIMD3-NEXT: ret void 5889 // 5890 // 5891 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 5892 // SIMD3-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 5893 // SIMD3-NEXT: entry: 5894 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 5895 // SIMD3-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 5896 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 5897 // SIMD3-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]] 5898 // SIMD3-NEXT: ret void 5899 // 5900 // 5901 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 5902 // SIMD3-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 5903 // SIMD3-NEXT: entry: 5904 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 5905 // SIMD3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5906 // SIMD3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 5907 // SIMD3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5908 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 5909 // SIMD3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 5910 // SIMD3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5911 // SIMD3-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 5912 // SIMD3-NEXT: ret void 5913 // 5914 // 5915 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 5916 // SIMD3-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 5917 // SIMD3-NEXT: entry: 5918 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 5919 // SIMD3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 5920 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 5921 // SIMD3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 5922 // SIMD3-NEXT: store i32 0, i32* [[A]], align 4 5923 // SIMD3-NEXT: ret void 5924 // 5925 // 5926 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 5927 // SIMD3-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 5928 // SIMD3-NEXT: entry: 5929 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 5930 // SIMD3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5931 // SIMD3-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 5932 // SIMD3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5933 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 5934 // SIMD3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 5935 // SIMD3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5936 // SIMD3-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 5937 // SIMD3-NEXT: ret void 5938 // 5939 // 5940 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 5941 // SIMD3-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 5942 // SIMD3-NEXT: entry: 5943 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 5944 // SIMD3-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 5945 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 5946 // SIMD3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0 5947 // SIMD3-NEXT: store i32 0, i32* [[A]], align 8 5948 // SIMD3-NEXT: ret void 5949 // 5950 // 5951 // SIMD3-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 5952 // SIMD3-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 5953 // SIMD3-NEXT: entry: 5954 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 5955 // SIMD3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5956 // SIMD3-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 5957 // SIMD3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5958 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 5959 // SIMD3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 5960 // SIMD3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5961 // SIMD3-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8 5962 // SIMD3-NEXT: ret void 5963 // 5964 // 5965 // SIMD3-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 5966 // SIMD3-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 5967 // SIMD3-NEXT: entry: 5968 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 5969 // SIMD3-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 5970 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 5971 // SIMD3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0 5972 // SIMD3-NEXT: store i32 0, i32* [[A]], align 8 5973 // SIMD3-NEXT: ret void 5974 // 5975 // 5976 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 5977 // SIMD3-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 5978 // SIMD3-NEXT: entry: 5979 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 5980 // SIMD3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5981 // SIMD3-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 5982 // SIMD3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5983 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 5984 // SIMD3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 5985 // SIMD3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5986 // SIMD3-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4 5987 // SIMD3-NEXT: ret void 5988 // 5989 // 5990 // SIMD3-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 5991 // SIMD3-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 5992 // SIMD3-NEXT: entry: 5993 // SIMD3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 5994 // SIMD3-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 5995 // SIMD3-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 5996 // SIMD3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0 5997 // SIMD3-NEXT: store i32 0, i32* [[A]], align 4 5998 // SIMD3-NEXT: ret void 5999 // 6000 // 6001 // SIMD3-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 6002 // SIMD3-SAME: () #[[ATTR0]] { 6003 // SIMD3-NEXT: entry: 6004 // SIMD3-NEXT: call void @__cxx_global_var_init() 6005 // SIMD3-NEXT: call void @__cxx_global_var_init.1() 6006 // SIMD3-NEXT: call void @__cxx_global_var_init.2() 6007 // SIMD3-NEXT: ret void 6008 // 6009 // 6010 // SIMD4-LABEL: define {{[^@]+}}@__cxx_global_var_init 6011 // SIMD4-SAME: () #[[ATTR0:[0-9]+]] !dbg [[DBG115:![0-9]+]] { 6012 // SIMD4-NEXT: entry: 6013 // SIMD4-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5), !dbg [[DBG119:![0-9]+]] 6014 // SIMD4-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR3:[0-9]+]], !dbg [[DBG121:![0-9]+]] 6015 // SIMD4-NEXT: ret void, !dbg [[DBG122:![0-9]+]] 6016 // 6017 // 6018 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 6019 // SIMD4-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 !dbg [[DBG123:![0-9]+]] { 6020 // SIMD4-NEXT: entry: 6021 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 6022 // SIMD4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6023 // SIMD4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 6024 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META124:![0-9]+]], metadata !DIExpression()), !dbg [[DBG126:![0-9]+]] 6025 // SIMD4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6026 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META127:![0-9]+]], metadata !DIExpression()), !dbg [[DBG128:![0-9]+]] 6027 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 6028 // SIMD4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG129:![0-9]+]] 6029 // SIMD4-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG129]] 6030 // SIMD4-NEXT: ret void, !dbg [[DBG130:![0-9]+]] 6031 // 6032 // 6033 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 6034 // SIMD4-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 !dbg [[DBG131:![0-9]+]] { 6035 // SIMD4-NEXT: entry: 6036 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 6037 // SIMD4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 6038 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META132:![0-9]+]], metadata !DIExpression()), !dbg [[DBG133:![0-9]+]] 6039 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 6040 // SIMD4-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]], !dbg [[DBG134:![0-9]+]] 6041 // SIMD4-NEXT: ret void, !dbg [[DBG135:![0-9]+]] 6042 // 6043 // 6044 // SIMD4-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 6045 // SIMD4-SAME: () #[[ATTR0]] !dbg [[DBG136:![0-9]+]] { 6046 // SIMD4-NEXT: entry: 6047 // SIMD4-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27), !dbg [[DBG137:![0-9]+]] 6048 // SIMD4-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG139:![0-9]+]] 6049 // SIMD4-NEXT: ret void, !dbg [[DBG140:![0-9]+]] 6050 // 6051 // 6052 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 6053 // SIMD4-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 !dbg [[DBG141:![0-9]+]] { 6054 // SIMD4-NEXT: entry: 6055 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 6056 // SIMD4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6057 // SIMD4-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 6058 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META142:![0-9]+]], metadata !DIExpression()), !dbg [[DBG144:![0-9]+]] 6059 // SIMD4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6060 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META145:![0-9]+]], metadata !DIExpression()), !dbg [[DBG146:![0-9]+]] 6061 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 6062 // SIMD4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG147:![0-9]+]] 6063 // SIMD4-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG147]] 6064 // SIMD4-NEXT: ret void, !dbg [[DBG148:![0-9]+]] 6065 // 6066 // 6067 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 6068 // SIMD4-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG149:![0-9]+]] { 6069 // SIMD4-NEXT: entry: 6070 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 6071 // SIMD4-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 6072 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META150:![0-9]+]], metadata !DIExpression()), !dbg [[DBG151:![0-9]+]] 6073 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 6074 // SIMD4-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR3]], !dbg [[DBG152:![0-9]+]] 6075 // SIMD4-NEXT: ret void, !dbg [[DBG153:![0-9]+]] 6076 // 6077 // 6078 // SIMD4-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 6079 // SIMD4-SAME: () #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG154:![0-9]+]] { 6080 // SIMD4-NEXT: entry: 6081 // SIMD4-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 6082 // SIMD4-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 6083 // SIMD4-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 6084 // SIMD4-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 6085 // SIMD4-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 6086 // SIMD4-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG155:![0-9]+]] 6087 // SIMD4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG157:![0-9]+]] 6088 // SIMD4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 6089 // SIMD4-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG158:![0-9]+]] 6090 // SIMD4: invoke.cont: 6091 // SIMD4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG157]] 6092 // SIMD4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 6093 // SIMD4-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]], !dbg [[DBG159:![0-9]+]] 6094 // SIMD4: invoke.cont2: 6095 // SIMD4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG157]] 6096 // SIMD4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 6097 // SIMD4-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]], !dbg [[DBG160:![0-9]+]] 6098 // SIMD4: invoke.cont3: 6099 // SIMD4-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG155]] 6100 // SIMD4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG161:![0-9]+]] 6101 // SIMD4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 6102 // SIMD4-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]], !dbg [[DBG162:![0-9]+]] 6103 // SIMD4: invoke.cont7: 6104 // SIMD4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG161]] 6105 // SIMD4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 6106 // SIMD4-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]], !dbg [[DBG163:![0-9]+]] 6107 // SIMD4: invoke.cont8: 6108 // SIMD4-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG161]] 6109 // SIMD4-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 6110 // SIMD4-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]], !dbg [[DBG164:![0-9]+]] 6111 // SIMD4: invoke.cont9: 6112 // SIMD4-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG165:![0-9]+]] 6113 // SIMD4-NEXT: ret void, !dbg [[DBG165]] 6114 // SIMD4: lpad: 6115 // SIMD4-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 6116 // SIMD4-NEXT: cleanup, !dbg [[DBG166:![0-9]+]] 6117 // SIMD4-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0, !dbg [[DBG166]] 6118 // SIMD4-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG166]] 6119 // SIMD4-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1, !dbg [[DBG166]] 6120 // SIMD4-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG166]] 6121 // SIMD4-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG157]] 6122 // SIMD4-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]], !dbg [[DBG157]] 6123 // SIMD4-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG157]] 6124 // SIMD4: arraydestroy.body: 6125 // SIMD4-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG157]] 6126 // SIMD4-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG157]] 6127 // SIMD4-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]], !dbg [[DBG157]] 6128 // SIMD4-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG157]] 6129 // SIMD4-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG157]] 6130 // SIMD4: arraydestroy.done4: 6131 // SIMD4-NEXT: br label [[EHCLEANUP:%.*]], !dbg [[DBG157]] 6132 // SIMD4: lpad6: 6133 // SIMD4-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 6134 // SIMD4-NEXT: cleanup, !dbg [[DBG166]] 6135 // SIMD4-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0, !dbg [[DBG166]] 6136 // SIMD4-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG166]] 6137 // SIMD4-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1, !dbg [[DBG166]] 6138 // SIMD4-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG166]] 6139 // SIMD4-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG161]] 6140 // SIMD4-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]], !dbg [[DBG161]] 6141 // SIMD4-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]], !dbg [[DBG161]] 6142 // SIMD4: arraydestroy.body11: 6143 // SIMD4-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ], !dbg [[DBG161]] 6144 // SIMD4-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1, !dbg [[DBG161]] 6145 // SIMD4-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR3]], !dbg [[DBG161]] 6146 // SIMD4-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), !dbg [[DBG161]] 6147 // SIMD4-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]], !dbg [[DBG161]] 6148 // SIMD4: arraydestroy.done15: 6149 // SIMD4-NEXT: br label [[EHCLEANUP]], !dbg [[DBG161]] 6150 // SIMD4: ehcleanup: 6151 // SIMD4-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG155]] 6152 // SIMD4-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0, !dbg [[DBG155]] 6153 // SIMD4-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]], !dbg [[DBG155]] 6154 // SIMD4-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]], !dbg [[DBG155]] 6155 // SIMD4: arraydestroy.body17: 6156 // SIMD4-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ], !dbg [[DBG155]] 6157 // SIMD4-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1, !dbg [[DBG155]] 6158 // SIMD4-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]], !dbg [[DBG155]] 6159 // SIMD4-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG155]] 6160 // SIMD4-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]], !dbg [[DBG155]] 6161 // SIMD4: arraydestroy.done21: 6162 // SIMD4-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG155]] 6163 // SIMD4: eh.resume: 6164 // SIMD4-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG155]] 6165 // SIMD4-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG155]] 6166 // SIMD4-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG155]] 6167 // SIMD4-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG155]] 6168 // SIMD4-NEXT: resume { i8*, i32 } [[LPAD_VAL22]], !dbg [[DBG155]] 6169 // 6170 // 6171 // SIMD4-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 6172 // SIMD4-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG167:![0-9]+]] { 6173 // SIMD4-NEXT: entry: 6174 // SIMD4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 6175 // SIMD4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 6176 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META171:![0-9]+]], metadata !DIExpression()), !dbg [[DBG172:![0-9]+]] 6177 // SIMD4-NEXT: br label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG172]] 6178 // SIMD4: arraydestroy.body: 6179 // SIMD4-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG172]] 6180 // SIMD4-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG172]] 6181 // SIMD4-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]], !dbg [[DBG172]] 6182 // SIMD4-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), !dbg [[DBG172]] 6183 // SIMD4-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG172]] 6184 // SIMD4: arraydestroy.done1: 6185 // SIMD4-NEXT: ret void, !dbg [[DBG172]] 6186 // 6187 // 6188 // SIMD4-LABEL: define {{[^@]+}}@main 6189 // SIMD4-SAME: () #[[ATTR5:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG53:![0-9]+]] { 6190 // SIMD4-NEXT: entry: 6191 // SIMD4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6192 // SIMD4-NEXT: [[RES:%.*]] = alloca i32, align 4 6193 // SIMD4-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 6194 // SIMD4-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 6195 // SIMD4-NEXT: store i32 0, i32* [[RETVAL]], align 4 6196 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META173:![0-9]+]], metadata !DIExpression()), !dbg [[DBG174:![0-9]+]] 6197 // SIMD4-NEXT: [[TMP0:%.*]] = load atomic i8, i8* bitcast (i64* @_ZGVZ4mainE2sm to i8*) acquire, align 8, !dbg [[DBG175:![0-9]+]] 6198 // SIMD4-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG175]] 6199 // SIMD4-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG175]], !prof [[PROF176:![0-9]+]] 6200 // SIMD4: init.check: 6201 // SIMD4-NEXT: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(i64* @_ZGVZ4mainE2sm) #[[ATTR3]], !dbg [[DBG175]] 6202 // SIMD4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0, !dbg [[DBG175]] 6203 // SIMD4-NEXT: br i1 [[TOBOOL]], label [[INIT:%.*]], label [[INIT_END]], !dbg [[DBG175]] 6204 // SIMD4: init: 6205 // SIMD4-NEXT: [[TMP2:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4, !dbg [[DBG177:![0-9]+]] 6206 // SIMD4-NEXT: invoke void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP2]]) 6207 // SIMD4-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG178:![0-9]+]] 6208 // SIMD4: invoke.cont: 6209 // SIMD4-NEXT: [[TMP3:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG175]] 6210 // SIMD4-NEXT: call void @__cxa_guard_release(i64* @_ZGVZ4mainE2sm) #[[ATTR3]], !dbg [[DBG175]] 6211 // SIMD4-NEXT: br label [[INIT_END]], !dbg [[DBG175]] 6212 // SIMD4: init.end: 6213 // SIMD4-NEXT: [[TMP4:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S3:%.*]], %struct.S3* @_ZN6Static1sE, i32 0, i32 0), align 4, !dbg [[DBG179:![0-9]+]] 6214 // SIMD4-NEXT: store i32 [[TMP4]], i32* [[RES]], align 4, !dbg [[DBG180:![0-9]+]] 6215 // SIMD4-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_SMAIN:%.*]], %struct.Smain* @_ZZ4mainE2sm, i32 0, i32 0), align 8, !dbg [[DBG181:![0-9]+]] 6216 // SIMD4-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG182:![0-9]+]] 6217 // SIMD4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP5]], !dbg [[DBG182]] 6218 // SIMD4-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG182]] 6219 // SIMD4-NEXT: [[TMP7:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4, !dbg [[DBG183:![0-9]+]] 6220 // SIMD4-NEXT: [[TMP8:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG184:![0-9]+]] 6221 // SIMD4-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP7]], !dbg [[DBG184]] 6222 // SIMD4-NEXT: store i32 [[ADD1]], i32* [[RES]], align 4, !dbg [[DBG184]] 6223 // SIMD4-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG185:![0-9]+]] 6224 // SIMD4-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG186:![0-9]+]] 6225 // SIMD4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], [[TMP9]], !dbg [[DBG186]] 6226 // SIMD4-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4, !dbg [[DBG186]] 6227 // SIMD4-NEXT: [[TMP11:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S5:%.*]], %struct.S5* @gs3, i32 0, i32 0), align 4, !dbg [[DBG187:![0-9]+]] 6228 // SIMD4-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG188:![0-9]+]] 6229 // SIMD4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]], !dbg [[DBG188]] 6230 // SIMD4-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4, !dbg [[DBG188]] 6231 // SIMD4-NEXT: [[TMP13:%.*]] = load i32, i32* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1, i32 0), align 4, !dbg [[DBG189:![0-9]+]] 6232 // SIMD4-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG190:![0-9]+]] 6233 // SIMD4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], [[TMP13]], !dbg [[DBG190]] 6234 // SIMD4-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG190]] 6235 // SIMD4-NEXT: [[TMP15:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4, !dbg [[DBG191:![0-9]+]] 6236 // SIMD4-NEXT: [[TMP16:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG192:![0-9]+]] 6237 // SIMD4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP15]], !dbg [[DBG192]] 6238 // SIMD4-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4, !dbg [[DBG192]] 6239 // SIMD4-NEXT: [[TMP17:%.*]] = load float, float* @_ZN2STIfE2stE, align 4, !dbg [[DBG193:![0-9]+]] 6240 // SIMD4-NEXT: [[CONV:%.*]] = fptosi float [[TMP17]] to i32, !dbg [[DBG193]] 6241 // SIMD4-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG194:![0-9]+]] 6242 // SIMD4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[CONV]], !dbg [[DBG194]] 6243 // SIMD4-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4, !dbg [[DBG194]] 6244 // SIMD4-NEXT: [[TMP19:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S4:%.*]], %struct.S4* @_ZN2STI2S4E2stE, i32 0, i32 0), align 4, !dbg [[DBG195:![0-9]+]] 6245 // SIMD4-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG196:![0-9]+]] 6246 // SIMD4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], [[TMP19]], !dbg [[DBG196]] 6247 // SIMD4-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4, !dbg [[DBG196]] 6248 // SIMD4-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG197:![0-9]+]] 6249 // SIMD4-NEXT: ret i32 [[TMP21]], !dbg [[DBG198:![0-9]+]] 6250 // SIMD4: lpad: 6251 // SIMD4-NEXT: [[TMP22:%.*]] = landingpad { i8*, i32 } 6252 // SIMD4-NEXT: cleanup, !dbg [[DBG199:![0-9]+]] 6253 // SIMD4-NEXT: [[TMP23:%.*]] = extractvalue { i8*, i32 } [[TMP22]], 0, !dbg [[DBG199]] 6254 // SIMD4-NEXT: store i8* [[TMP23]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG199]] 6255 // SIMD4-NEXT: [[TMP24:%.*]] = extractvalue { i8*, i32 } [[TMP22]], 1, !dbg [[DBG199]] 6256 // SIMD4-NEXT: store i32 [[TMP24]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG199]] 6257 // SIMD4-NEXT: call void @__cxa_guard_abort(i64* @_ZGVZ4mainE2sm) #[[ATTR3]], !dbg [[DBG175]] 6258 // SIMD4-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG175]] 6259 // SIMD4: eh.resume: 6260 // SIMD4-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG175]] 6261 // SIMD4-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG175]] 6262 // SIMD4-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG175]] 6263 // SIMD4-NEXT: [[LPAD_VAL8:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG175]] 6264 // SIMD4-NEXT: resume { i8*, i32 } [[LPAD_VAL8]], !dbg [[DBG175]] 6265 // 6266 // 6267 // SIMD4-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 6268 // SIMD4-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 !dbg [[DBG200:![0-9]+]] { 6269 // SIMD4-NEXT: entry: 6270 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 6271 // SIMD4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6272 // SIMD4-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 6273 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META201:![0-9]+]], metadata !DIExpression()), !dbg [[DBG203:![0-9]+]] 6274 // SIMD4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6275 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META204:![0-9]+]], metadata !DIExpression()), !dbg [[DBG205:![0-9]+]] 6276 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 6277 // SIMD4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG206:![0-9]+]] 6278 // SIMD4-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG206]] 6279 // SIMD4-NEXT: ret void, !dbg [[DBG207:![0-9]+]] 6280 // 6281 // 6282 // SIMD4-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 6283 // SIMD4-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG208:![0-9]+]] { 6284 // SIMD4-NEXT: entry: 6285 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 6286 // SIMD4-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 6287 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META209:![0-9]+]], metadata !DIExpression()), !dbg [[DBG210:![0-9]+]] 6288 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 6289 // SIMD4-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]], !dbg [[DBG211:![0-9]+]] 6290 // SIMD4-NEXT: ret void, !dbg [[DBG212:![0-9]+]] 6291 // 6292 // 6293 // SIMD4-LABEL: define {{[^@]+}}@_Z6foobarv 6294 // SIMD4-SAME: () #[[ATTR6:[0-9]+]] !dbg [[DBG213:![0-9]+]] { 6295 // SIMD4-NEXT: entry: 6296 // SIMD4-NEXT: [[RES:%.*]] = alloca i32, align 4 6297 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META214:![0-9]+]], metadata !DIExpression()), !dbg [[DBG215:![0-9]+]] 6298 // SIMD4-NEXT: [[TMP0:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S3:%.*]], %struct.S3* @_ZN6Static1sE, i32 0, i32 0), align 4, !dbg [[DBG216:![0-9]+]] 6299 // SIMD4-NEXT: store i32 [[TMP0]], i32* [[RES]], align 4, !dbg [[DBG217:![0-9]+]] 6300 // SIMD4-NEXT: [[TMP1:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* @_ZL3gs1, i32 0, i32 0), align 4, !dbg [[DBG218:![0-9]+]] 6301 // SIMD4-NEXT: [[TMP2:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG219:![0-9]+]] 6302 // SIMD4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]], !dbg [[DBG219]] 6303 // SIMD4-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG219]] 6304 // SIMD4-NEXT: [[TMP3:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG220:![0-9]+]] 6305 // SIMD4-NEXT: [[TMP4:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG221:![0-9]+]] 6306 // SIMD4-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], [[TMP3]], !dbg [[DBG221]] 6307 // SIMD4-NEXT: store i32 [[ADD1]], i32* [[RES]], align 4, !dbg [[DBG221]] 6308 // SIMD4-NEXT: [[TMP5:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S5:%.*]], %struct.S5* @gs3, i32 0, i32 0), align 4, !dbg [[DBG222:![0-9]+]] 6309 // SIMD4-NEXT: [[TMP6:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG223:![0-9]+]] 6310 // SIMD4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]], !dbg [[DBG223]] 6311 // SIMD4-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4, !dbg [[DBG223]] 6312 // SIMD4-NEXT: [[TMP7:%.*]] = load i32, i32* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1, i32 0), align 4, !dbg [[DBG224:![0-9]+]] 6313 // SIMD4-NEXT: [[TMP8:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG225:![0-9]+]] 6314 // SIMD4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP7]], !dbg [[DBG225]] 6315 // SIMD4-NEXT: store i32 [[ADD3]], i32* [[RES]], align 4, !dbg [[DBG225]] 6316 // SIMD4-NEXT: [[TMP9:%.*]] = load i32, i32* @_ZN2STIiE2stE, align 4, !dbg [[DBG226:![0-9]+]] 6317 // SIMD4-NEXT: [[TMP10:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG227:![0-9]+]] 6318 // SIMD4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], [[TMP9]], !dbg [[DBG227]] 6319 // SIMD4-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG227]] 6320 // SIMD4-NEXT: [[TMP11:%.*]] = load float, float* @_ZN2STIfE2stE, align 4, !dbg [[DBG228:![0-9]+]] 6321 // SIMD4-NEXT: [[CONV:%.*]] = fptosi float [[TMP11]] to i32, !dbg [[DBG228]] 6322 // SIMD4-NEXT: [[TMP12:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG229:![0-9]+]] 6323 // SIMD4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], [[CONV]], !dbg [[DBG229]] 6324 // SIMD4-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4, !dbg [[DBG229]] 6325 // SIMD4-NEXT: [[TMP13:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S4:%.*]], %struct.S4* @_ZN2STI2S4E2stE, i32 0, i32 0), align 4, !dbg [[DBG230:![0-9]+]] 6326 // SIMD4-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG231:![0-9]+]] 6327 // SIMD4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], [[TMP13]], !dbg [[DBG231]] 6328 // SIMD4-NEXT: store i32 [[ADD6]], i32* [[RES]], align 4, !dbg [[DBG231]] 6329 // SIMD4-NEXT: [[TMP15:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG232:![0-9]+]] 6330 // SIMD4-NEXT: ret i32 [[TMP15]], !dbg [[DBG233:![0-9]+]] 6331 // 6332 // 6333 // SIMD4-LABEL: define {{[^@]+}}@__cxx_global_var_init.3 6334 // SIMD4-SAME: () #[[ATTR0]] comdat($_ZN2STI2S4E2stE) !dbg [[DBG234:![0-9]+]] { 6335 // SIMD4-NEXT: entry: 6336 // SIMD4-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG235:![0-9]+]] 6337 // SIMD4-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG235]] 6338 // SIMD4-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG235]] 6339 // SIMD4: init.check: 6340 // SIMD4-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23), !dbg [[DBG236:![0-9]+]] 6341 // SIMD4-NEXT: [[TMP1:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR3]], !dbg [[DBG235]] 6342 // SIMD4-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG235]] 6343 // SIMD4-NEXT: br label [[INIT_END]], !dbg [[DBG235]] 6344 // SIMD4: init.end: 6345 // SIMD4-NEXT: ret void, !dbg [[DBG238:![0-9]+]] 6346 // 6347 // 6348 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 6349 // SIMD4-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 !dbg [[DBG239:![0-9]+]] { 6350 // SIMD4-NEXT: entry: 6351 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 6352 // SIMD4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6353 // SIMD4-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 6354 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META240:![0-9]+]], metadata !DIExpression()), !dbg [[DBG242:![0-9]+]] 6355 // SIMD4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6356 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META243:![0-9]+]], metadata !DIExpression()), !dbg [[DBG244:![0-9]+]] 6357 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 6358 // SIMD4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG245:![0-9]+]] 6359 // SIMD4-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG245]] 6360 // SIMD4-NEXT: ret void, !dbg [[DBG246:![0-9]+]] 6361 // 6362 // 6363 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 6364 // SIMD4-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG247:![0-9]+]] { 6365 // SIMD4-NEXT: entry: 6366 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 6367 // SIMD4-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 6368 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META248:![0-9]+]], metadata !DIExpression()), !dbg [[DBG249:![0-9]+]] 6369 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 6370 // SIMD4-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]], !dbg [[DBG250:![0-9]+]] 6371 // SIMD4-NEXT: ret void, !dbg [[DBG251:![0-9]+]] 6372 // 6373 // 6374 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 6375 // SIMD4-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG252:![0-9]+]] { 6376 // SIMD4-NEXT: entry: 6377 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 6378 // SIMD4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6379 // SIMD4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 6380 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META253:![0-9]+]], metadata !DIExpression()), !dbg [[DBG254:![0-9]+]] 6381 // SIMD4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6382 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META255:![0-9]+]], metadata !DIExpression()), !dbg [[DBG256:![0-9]+]] 6383 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 6384 // SIMD4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG257:![0-9]+]] 6385 // SIMD4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG258:![0-9]+]] 6386 // SIMD4-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG257]] 6387 // SIMD4-NEXT: ret void, !dbg [[DBG259:![0-9]+]] 6388 // 6389 // 6390 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 6391 // SIMD4-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG260:![0-9]+]] { 6392 // SIMD4-NEXT: entry: 6393 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 6394 // SIMD4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 6395 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META261:![0-9]+]], metadata !DIExpression()), !dbg [[DBG262:![0-9]+]] 6396 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 6397 // SIMD4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG263:![0-9]+]] 6398 // SIMD4-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG265:![0-9]+]] 6399 // SIMD4-NEXT: ret void, !dbg [[DBG266:![0-9]+]] 6400 // 6401 // 6402 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 6403 // SIMD4-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG267:![0-9]+]] { 6404 // SIMD4-NEXT: entry: 6405 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 6406 // SIMD4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6407 // SIMD4-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 6408 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META268:![0-9]+]], metadata !DIExpression()), !dbg [[DBG269:![0-9]+]] 6409 // SIMD4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6410 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META270:![0-9]+]], metadata !DIExpression()), !dbg [[DBG271:![0-9]+]] 6411 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 6412 // SIMD4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG272:![0-9]+]] 6413 // SIMD4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG273:![0-9]+]] 6414 // SIMD4-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG272]] 6415 // SIMD4-NEXT: ret void, !dbg [[DBG274:![0-9]+]] 6416 // 6417 // 6418 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 6419 // SIMD4-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG275:![0-9]+]] { 6420 // SIMD4-NEXT: entry: 6421 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 6422 // SIMD4-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 6423 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META276:![0-9]+]], metadata !DIExpression()), !dbg [[DBG277:![0-9]+]] 6424 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 6425 // SIMD4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG278:![0-9]+]] 6426 // SIMD4-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG280:![0-9]+]] 6427 // SIMD4-NEXT: ret void, !dbg [[DBG281:![0-9]+]] 6428 // 6429 // 6430 // SIMD4-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 6431 // SIMD4-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG282:![0-9]+]] { 6432 // SIMD4-NEXT: entry: 6433 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 6434 // SIMD4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6435 // SIMD4-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 6436 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META283:![0-9]+]], metadata !DIExpression()), !dbg [[DBG284:![0-9]+]] 6437 // SIMD4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6438 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META285:![0-9]+]], metadata !DIExpression()), !dbg [[DBG286:![0-9]+]] 6439 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 6440 // SIMD4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG287:![0-9]+]] 6441 // SIMD4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG288:![0-9]+]] 6442 // SIMD4-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG287]] 6443 // SIMD4-NEXT: ret void, !dbg [[DBG289:![0-9]+]] 6444 // 6445 // 6446 // SIMD4-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 6447 // SIMD4-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG290:![0-9]+]] { 6448 // SIMD4-NEXT: entry: 6449 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 6450 // SIMD4-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 6451 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META291:![0-9]+]], metadata !DIExpression()), !dbg [[DBG292:![0-9]+]] 6452 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 6453 // SIMD4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG293:![0-9]+]] 6454 // SIMD4-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG295:![0-9]+]] 6455 // SIMD4-NEXT: ret void, !dbg [[DBG296:![0-9]+]] 6456 // 6457 // 6458 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 6459 // SIMD4-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG297:![0-9]+]] { 6460 // SIMD4-NEXT: entry: 6461 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 6462 // SIMD4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6463 // SIMD4-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 6464 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META298:![0-9]+]], metadata !DIExpression()), !dbg [[DBG299:![0-9]+]] 6465 // SIMD4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6466 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META300:![0-9]+]], metadata !DIExpression()), !dbg [[DBG301:![0-9]+]] 6467 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 6468 // SIMD4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG302:![0-9]+]] 6469 // SIMD4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG303:![0-9]+]] 6470 // SIMD4-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG302]] 6471 // SIMD4-NEXT: ret void, !dbg [[DBG304:![0-9]+]] 6472 // 6473 // 6474 // SIMD4-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 6475 // SIMD4-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG305:![0-9]+]] { 6476 // SIMD4-NEXT: entry: 6477 // SIMD4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 6478 // SIMD4-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 6479 // SIMD4-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META306:![0-9]+]], metadata !DIExpression()), !dbg [[DBG307:![0-9]+]] 6480 // SIMD4-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 6481 // SIMD4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG308:![0-9]+]] 6482 // SIMD4-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG310:![0-9]+]] 6483 // SIMD4-NEXT: ret void, !dbg [[DBG311:![0-9]+]] 6484 // 6485 // 6486 // SIMD4-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 6487 // SIMD4-SAME: () #[[ATTR0]] !dbg [[DBG312:![0-9]+]] { 6488 // SIMD4-NEXT: entry: 6489 // SIMD4-NEXT: call void @__cxx_global_var_init(), !dbg [[DBG314:![0-9]+]] 6490 // SIMD4-NEXT: call void @__cxx_global_var_init.1(), !dbg [[DBG314]] 6491 // SIMD4-NEXT: call void @__cxx_global_var_init.2(), !dbg [[DBG314]] 6492 // SIMD4-NEXT: ret void 6493 // 6494 // 6495 // DEBUG1-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_. 6496 // DEBUG1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG115:![0-9]+]] { 6497 // DEBUG1-NEXT: entry: 6498 // DEBUG1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 6499 // DEBUG1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 6500 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META117:![0-9]+]], metadata !DIExpression()), !dbg [[DBG119:![0-9]+]] 6501 // DEBUG1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG120:![0-9]+]] 6502 // DEBUG1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S1*, !dbg [[DBG120]] 6503 // DEBUG1-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[TMP2]], i32 5), !dbg [[DBG121:![0-9]+]] 6504 // DEBUG1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG120]] 6505 // DEBUG1-NEXT: ret i8* [[TMP3]], !dbg [[DBG120]] 6506 // 6507 // 6508 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 6509 // DEBUG1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 !dbg [[DBG122:![0-9]+]] { 6510 // DEBUG1-NEXT: entry: 6511 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 6512 // DEBUG1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6513 // DEBUG1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 6514 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META123:![0-9]+]], metadata !DIExpression()), !dbg [[DBG125:![0-9]+]] 6515 // DEBUG1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6516 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META126:![0-9]+]], metadata !DIExpression()), !dbg [[DBG127:![0-9]+]] 6517 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 6518 // DEBUG1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG128:![0-9]+]] 6519 // DEBUG1-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG128]] 6520 // DEBUG1-NEXT: ret void, !dbg [[DBG129:![0-9]+]] 6521 // 6522 // 6523 // DEBUG1-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_. 6524 // DEBUG1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG130:![0-9]+]] { 6525 // DEBUG1-NEXT: entry: 6526 // DEBUG1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 6527 // DEBUG1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 6528 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META131:![0-9]+]], metadata !DIExpression()), !dbg [[DBG132:![0-9]+]] 6529 // DEBUG1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG132]] 6530 // DEBUG1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S1*, !dbg [[DBG132]] 6531 // DEBUG1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[TMP2]]) #[[ATTR4:[0-9]+]], !dbg [[DBG132]] 6532 // DEBUG1-NEXT: ret void, !dbg [[DBG133:![0-9]+]] 6533 // 6534 // 6535 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 6536 // DEBUG1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat align 2 !dbg [[DBG134:![0-9]+]] { 6537 // DEBUG1-NEXT: entry: 6538 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 6539 // DEBUG1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 6540 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META135:![0-9]+]], metadata !DIExpression()), !dbg [[DBG136:![0-9]+]] 6541 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 6542 // DEBUG1-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]], !dbg [[DBG137:![0-9]+]] 6543 // DEBUG1-NEXT: ret void, !dbg [[DBG138:![0-9]+]] 6544 // 6545 // 6546 // DEBUG1-LABEL: define {{[^@]+}}@.__omp_threadprivate_init_. 6547 // DEBUG1-SAME: () #[[ATTR0]] !dbg [[DBG139:![0-9]+]] { 6548 // DEBUG1-NEXT: entry: 6549 // DEBUG1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]), !dbg [[DBG140:![0-9]+]] 6550 // DEBUG1-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB1]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* (i8*)* @.__kmpc_global_ctor_., i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_.), !dbg [[DBG140]] 6551 // DEBUG1-NEXT: ret void, !dbg [[DBG140]] 6552 // 6553 // 6554 // DEBUG1-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..1 6555 // DEBUG1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG141:![0-9]+]] { 6556 // DEBUG1-NEXT: entry: 6557 // DEBUG1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 6558 // DEBUG1-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 6559 // DEBUG1-NEXT: [[ARRAYINIT_ENDOFINIT2:%.*]] = alloca %struct.S1*, align 8 6560 // DEBUG1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 6561 // DEBUG1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 6562 // DEBUG1-NEXT: [[ARRAYINIT_ENDOFINIT9:%.*]] = alloca %struct.S1*, align 8 6563 // DEBUG1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 6564 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META142:![0-9]+]], metadata !DIExpression()), !dbg [[DBG143:![0-9]+]] 6565 // DEBUG1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG144:![0-9]+]] 6566 // DEBUG1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to [2 x [3 x %struct.S1]]*, !dbg [[DBG144]] 6567 // DEBUG1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP2]], i64 0, i64 0, !dbg [[DBG145:![0-9]+]] 6568 // DEBUG1-NEXT: store [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG145]] 6569 // DEBUG1-NEXT: [[ARRAYINIT_BEGIN1:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 0, i64 0, !dbg [[DBG146:![0-9]+]] 6570 // DEBUG1-NEXT: store %struct.S1* [[ARRAYINIT_BEGIN1]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8, !dbg [[DBG146]] 6571 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN1]], i32 1) 6572 // DEBUG1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG147:![0-9]+]] 6573 // DEBUG1: invoke.cont: 6574 // DEBUG1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYINIT_BEGIN1]], i64 1, !dbg [[DBG146]] 6575 // DEBUG1-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8, !dbg [[DBG146]] 6576 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 6577 // DEBUG1-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]], !dbg [[DBG148:![0-9]+]] 6578 // DEBUG1: invoke.cont3: 6579 // DEBUG1-NEXT: [[ARRAYINIT_ELEMENT4:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_ELEMENT]], i64 1, !dbg [[DBG146]] 6580 // DEBUG1-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT4]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8, !dbg [[DBG146]] 6581 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT4]], i32 3) 6582 // DEBUG1-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]], !dbg [[DBG149:![0-9]+]] 6583 // DEBUG1: invoke.cont5: 6584 // DEBUG1-NEXT: [[ARRAYINIT_ELEMENT7:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 1, !dbg [[DBG145]] 6585 // DEBUG1-NEXT: store [3 x %struct.S1]* [[ARRAYINIT_ELEMENT7]], [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG145]] 6586 // DEBUG1-NEXT: [[ARRAYINIT_BEGIN8:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_ELEMENT7]], i64 0, i64 0, !dbg [[DBG150:![0-9]+]] 6587 // DEBUG1-NEXT: store %struct.S1* [[ARRAYINIT_BEGIN8]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8, !dbg [[DBG150]] 6588 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN8]], i32 4) 6589 // DEBUG1-NEXT: to label [[INVOKE_CONT11:%.*]] unwind label [[LPAD10:%.*]], !dbg [[DBG151:![0-9]+]] 6590 // DEBUG1: invoke.cont11: 6591 // DEBUG1-NEXT: [[ARRAYINIT_ELEMENT12:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_BEGIN8]], i64 1, !dbg [[DBG150]] 6592 // DEBUG1-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT12]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8, !dbg [[DBG150]] 6593 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT12]], i32 5) 6594 // DEBUG1-NEXT: to label [[INVOKE_CONT13:%.*]] unwind label [[LPAD10]], !dbg [[DBG152:![0-9]+]] 6595 // DEBUG1: invoke.cont13: 6596 // DEBUG1-NEXT: [[ARRAYINIT_ELEMENT14:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_ELEMENT12]], i64 1, !dbg [[DBG150]] 6597 // DEBUG1-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT14]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8, !dbg [[DBG150]] 6598 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT14]], i32 6) 6599 // DEBUG1-NEXT: to label [[INVOKE_CONT15:%.*]] unwind label [[LPAD10]], !dbg [[DBG153:![0-9]+]] 6600 // DEBUG1: invoke.cont15: 6601 // DEBUG1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG144]] 6602 // DEBUG1-NEXT: ret i8* [[TMP3]], !dbg [[DBG144]] 6603 // DEBUG1: lpad: 6604 // DEBUG1-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 6605 // DEBUG1-NEXT: cleanup, !dbg [[DBG143]] 6606 // DEBUG1-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0, !dbg [[DBG143]] 6607 // DEBUG1-NEXT: store i8* [[TMP5]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG143]] 6608 // DEBUG1-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 1, !dbg [[DBG143]] 6609 // DEBUG1-NEXT: store i32 [[TMP6]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG143]] 6610 // DEBUG1-NEXT: [[TMP7:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8, !dbg [[DBG146]] 6611 // DEBUG1-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* [[ARRAYINIT_BEGIN1]], [[TMP7]], !dbg [[DBG146]] 6612 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG146]] 6613 // DEBUG1: arraydestroy.body: 6614 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP7]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG146]] 6615 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG146]] 6616 // DEBUG1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]], !dbg [[DBG146]] 6617 // DEBUG1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], [[ARRAYINIT_BEGIN1]], !dbg [[DBG146]] 6618 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG146]] 6619 // DEBUG1: arraydestroy.done6: 6620 // DEBUG1-NEXT: br label [[EHCLEANUP:%.*]], !dbg [[DBG146]] 6621 // DEBUG1: lpad10: 6622 // DEBUG1-NEXT: [[TMP8:%.*]] = landingpad { i8*, i32 } 6623 // DEBUG1-NEXT: cleanup, !dbg [[DBG143]] 6624 // DEBUG1-NEXT: [[TMP9:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 0, !dbg [[DBG143]] 6625 // DEBUG1-NEXT: store i8* [[TMP9]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG143]] 6626 // DEBUG1-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 1, !dbg [[DBG143]] 6627 // DEBUG1-NEXT: store i32 [[TMP10]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG143]] 6628 // DEBUG1-NEXT: [[TMP11:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8, !dbg [[DBG150]] 6629 // DEBUG1-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* [[ARRAYINIT_BEGIN8]], [[TMP11]], !dbg [[DBG150]] 6630 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]], !dbg [[DBG150]] 6631 // DEBUG1: arraydestroy.body17: 6632 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[TMP11]], [[LPAD10]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ], !dbg [[DBG150]] 6633 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1, !dbg [[DBG150]] 6634 // DEBUG1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]], !dbg [[DBG150]] 6635 // DEBUG1-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], [[ARRAYINIT_BEGIN8]], !dbg [[DBG150]] 6636 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]], !dbg [[DBG150]] 6637 // DEBUG1: arraydestroy.done21: 6638 // DEBUG1-NEXT: br label [[EHCLEANUP]], !dbg [[DBG150]] 6639 // DEBUG1: ehcleanup: 6640 // DEBUG1-NEXT: [[TMP12:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG145]] 6641 // DEBUG1-NEXT: [[PAD_ARRAYBEGIN:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 0, i64 0, !dbg [[DBG145]] 6642 // DEBUG1-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP12]], i64 0, i64 0, !dbg [[DBG145]] 6643 // DEBUG1-NEXT: [[ARRAYDESTROY_ISEMPTY22:%.*]] = icmp eq %struct.S1* [[PAD_ARRAYBEGIN]], [[PAD_ARRAYEND]], !dbg [[DBG145]] 6644 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY22]], label [[ARRAYDESTROY_DONE27:%.*]], label [[ARRAYDESTROY_BODY23:%.*]], !dbg [[DBG145]] 6645 // DEBUG1: arraydestroy.body23: 6646 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENTPAST24:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT25:%.*]], [[ARRAYDESTROY_BODY23]] ], !dbg [[DBG145]] 6647 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENT25]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST24]], i64 -1, !dbg [[DBG145]] 6648 // DEBUG1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT25]]) #[[ATTR4]], !dbg [[DBG145]] 6649 // DEBUG1-NEXT: [[ARRAYDESTROY_DONE26:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT25]], [[PAD_ARRAYBEGIN]], !dbg [[DBG145]] 6650 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_DONE26]], label [[ARRAYDESTROY_DONE27]], label [[ARRAYDESTROY_BODY23]], !dbg [[DBG145]] 6651 // DEBUG1: arraydestroy.done27: 6652 // DEBUG1-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG145]] 6653 // DEBUG1: eh.resume: 6654 // DEBUG1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG145]] 6655 // DEBUG1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG145]] 6656 // DEBUG1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG145]] 6657 // DEBUG1-NEXT: [[LPAD_VAL28:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG145]] 6658 // DEBUG1-NEXT: resume { i8*, i32 } [[LPAD_VAL28]], !dbg [[DBG145]] 6659 // 6660 // 6661 // DEBUG1-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..2 6662 // DEBUG1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG154:![0-9]+]] { 6663 // DEBUG1-NEXT: entry: 6664 // DEBUG1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 6665 // DEBUG1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 6666 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META155:![0-9]+]], metadata !DIExpression()), !dbg [[DBG156:![0-9]+]] 6667 // DEBUG1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG156]] 6668 // DEBUG1-NEXT: [[ARRAY_BEGIN:%.*]] = bitcast i8* [[TMP1]] to %struct.S1*, !dbg [[DBG156]] 6669 // DEBUG1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAY_BEGIN]], i64 6, !dbg [[DBG156]] 6670 // DEBUG1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG156]] 6671 // DEBUG1: arraydestroy.body: 6672 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG156]] 6673 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG156]] 6674 // DEBUG1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]], !dbg [[DBG156]] 6675 // DEBUG1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]], !dbg [[DBG156]] 6676 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG156]] 6677 // DEBUG1: arraydestroy.done1: 6678 // DEBUG1-NEXT: ret void, !dbg [[DBG157:![0-9]+]] 6679 // 6680 // 6681 // DEBUG1-LABEL: define {{[^@]+}}@.__omp_threadprivate_init_..3 6682 // DEBUG1-SAME: () #[[ATTR0]] !dbg [[DBG158:![0-9]+]] { 6683 // DEBUG1-NEXT: entry: 6684 // DEBUG1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]), !dbg [[DBG159:![0-9]+]] 6685 // DEBUG1-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB3]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i8* (i8*)* @.__kmpc_global_ctor_..1, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..2), !dbg [[DBG159]] 6686 // DEBUG1-NEXT: ret void, !dbg [[DBG159]] 6687 // 6688 // 6689 // DEBUG1-LABEL: define {{[^@]+}}@__cxx_global_var_init 6690 // DEBUG1-SAME: () #[[ATTR0]] !dbg [[DBG160:![0-9]+]] { 6691 // DEBUG1-NEXT: entry: 6692 // DEBUG1-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5), !dbg [[DBG164:![0-9]+]] 6693 // DEBUG1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR4]], !dbg [[DBG166:![0-9]+]] 6694 // DEBUG1-NEXT: ret void, !dbg [[DBG167:![0-9]+]] 6695 // 6696 // 6697 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 6698 // DEBUG1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG168:![0-9]+]] { 6699 // DEBUG1-NEXT: entry: 6700 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 6701 // DEBUG1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6702 // DEBUG1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 6703 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META169:![0-9]+]], metadata !DIExpression()), !dbg [[DBG170:![0-9]+]] 6704 // DEBUG1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6705 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META171:![0-9]+]], metadata !DIExpression()), !dbg [[DBG172:![0-9]+]] 6706 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 6707 // DEBUG1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG173:![0-9]+]] 6708 // DEBUG1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG174:![0-9]+]] 6709 // DEBUG1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG173]] 6710 // DEBUG1-NEXT: ret void, !dbg [[DBG175:![0-9]+]] 6711 // 6712 // 6713 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 6714 // DEBUG1-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG176:![0-9]+]] { 6715 // DEBUG1-NEXT: entry: 6716 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 6717 // DEBUG1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 6718 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META177:![0-9]+]], metadata !DIExpression()), !dbg [[DBG178:![0-9]+]] 6719 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 6720 // DEBUG1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG179:![0-9]+]] 6721 // DEBUG1-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG181:![0-9]+]] 6722 // DEBUG1-NEXT: ret void, !dbg [[DBG182:![0-9]+]] 6723 // 6724 // 6725 // DEBUG1-LABEL: define {{[^@]+}}@__cxx_global_var_init.4 6726 // DEBUG1-SAME: () #[[ATTR0]] !dbg [[DBG183:![0-9]+]] { 6727 // DEBUG1-NEXT: entry: 6728 // DEBUG1-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27), !dbg [[DBG184:![0-9]+]] 6729 // DEBUG1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR4]], !dbg [[DBG186:![0-9]+]] 6730 // DEBUG1-NEXT: ret void, !dbg [[DBG187:![0-9]+]] 6731 // 6732 // 6733 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 6734 // DEBUG1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG188:![0-9]+]] { 6735 // DEBUG1-NEXT: entry: 6736 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 6737 // DEBUG1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6738 // DEBUG1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 6739 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META189:![0-9]+]], metadata !DIExpression()), !dbg [[DBG191:![0-9]+]] 6740 // DEBUG1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6741 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META192:![0-9]+]], metadata !DIExpression()), !dbg [[DBG193:![0-9]+]] 6742 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 6743 // DEBUG1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG194:![0-9]+]] 6744 // DEBUG1-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG194]] 6745 // DEBUG1-NEXT: ret void, !dbg [[DBG195:![0-9]+]] 6746 // 6747 // 6748 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 6749 // DEBUG1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG196:![0-9]+]] { 6750 // DEBUG1-NEXT: entry: 6751 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 6752 // DEBUG1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 6753 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META197:![0-9]+]], metadata !DIExpression()), !dbg [[DBG198:![0-9]+]] 6754 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 6755 // DEBUG1-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR4]], !dbg [[DBG199:![0-9]+]] 6756 // DEBUG1-NEXT: ret void, !dbg [[DBG200:![0-9]+]] 6757 // 6758 // 6759 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 6760 // DEBUG1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG201:![0-9]+]] { 6761 // DEBUG1-NEXT: entry: 6762 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 6763 // DEBUG1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6764 // DEBUG1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 6765 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META202:![0-9]+]], metadata !DIExpression()), !dbg [[DBG203:![0-9]+]] 6766 // DEBUG1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6767 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META204:![0-9]+]], metadata !DIExpression()), !dbg [[DBG205:![0-9]+]] 6768 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 6769 // DEBUG1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG206:![0-9]+]] 6770 // DEBUG1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG207:![0-9]+]] 6771 // DEBUG1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG206]] 6772 // DEBUG1-NEXT: ret void, !dbg [[DBG208:![0-9]+]] 6773 // 6774 // 6775 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 6776 // DEBUG1-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG209:![0-9]+]] { 6777 // DEBUG1-NEXT: entry: 6778 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 6779 // DEBUG1-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 6780 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META210:![0-9]+]], metadata !DIExpression()), !dbg [[DBG211:![0-9]+]] 6781 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 6782 // DEBUG1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG212:![0-9]+]] 6783 // DEBUG1-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG214:![0-9]+]] 6784 // DEBUG1-NEXT: ret void, !dbg [[DBG215:![0-9]+]] 6785 // 6786 // 6787 // DEBUG1-LABEL: define {{[^@]+}}@__cxx_global_var_init.5 6788 // DEBUG1-SAME: () #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG216:![0-9]+]] { 6789 // DEBUG1-NEXT: entry: 6790 // DEBUG1-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 6791 // DEBUG1-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 6792 // DEBUG1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 6793 // DEBUG1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 6794 // DEBUG1-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 6795 // DEBUG1-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG217:![0-9]+]] 6796 // DEBUG1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG219:![0-9]+]] 6797 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 6798 // DEBUG1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG220:![0-9]+]] 6799 // DEBUG1: invoke.cont: 6800 // DEBUG1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG219]] 6801 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 6802 // DEBUG1-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]], !dbg [[DBG221:![0-9]+]] 6803 // DEBUG1: invoke.cont2: 6804 // DEBUG1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG219]] 6805 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 6806 // DEBUG1-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]], !dbg [[DBG222:![0-9]+]] 6807 // DEBUG1: invoke.cont3: 6808 // DEBUG1-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG217]] 6809 // DEBUG1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG223:![0-9]+]] 6810 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 6811 // DEBUG1-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]], !dbg [[DBG224:![0-9]+]] 6812 // DEBUG1: invoke.cont7: 6813 // DEBUG1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG223]] 6814 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 6815 // DEBUG1-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]], !dbg [[DBG225:![0-9]+]] 6816 // DEBUG1: invoke.cont8: 6817 // DEBUG1-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG223]] 6818 // DEBUG1-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 6819 // DEBUG1-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]], !dbg [[DBG226:![0-9]+]] 6820 // DEBUG1: invoke.cont9: 6821 // DEBUG1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR4]], !dbg [[DBG227:![0-9]+]] 6822 // DEBUG1-NEXT: ret void, !dbg [[DBG227]] 6823 // DEBUG1: lpad: 6824 // DEBUG1-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 } 6825 // DEBUG1-NEXT: cleanup, !dbg [[DBG228:![0-9]+]] 6826 // DEBUG1-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0, !dbg [[DBG228]] 6827 // DEBUG1-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG228]] 6828 // DEBUG1-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1, !dbg [[DBG228]] 6829 // DEBUG1-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG228]] 6830 // DEBUG1-NEXT: [[TMP4:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG219]] 6831 // DEBUG1-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP4]], !dbg [[DBG219]] 6832 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG219]] 6833 // DEBUG1: arraydestroy.body: 6834 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP4]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG219]] 6835 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG219]] 6836 // DEBUG1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]], !dbg [[DBG219]] 6837 // DEBUG1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG219]] 6838 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG219]] 6839 // DEBUG1: arraydestroy.done4: 6840 // DEBUG1-NEXT: br label [[EHCLEANUP:%.*]], !dbg [[DBG219]] 6841 // DEBUG1: lpad6: 6842 // DEBUG1-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 } 6843 // DEBUG1-NEXT: cleanup, !dbg [[DBG228]] 6844 // DEBUG1-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0, !dbg [[DBG228]] 6845 // DEBUG1-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG228]] 6846 // DEBUG1-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1, !dbg [[DBG228]] 6847 // DEBUG1-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG228]] 6848 // DEBUG1-NEXT: [[TMP8:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG223]] 6849 // DEBUG1-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP8]], !dbg [[DBG223]] 6850 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]], !dbg [[DBG223]] 6851 // DEBUG1: arraydestroy.body11: 6852 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP8]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ], !dbg [[DBG223]] 6853 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1, !dbg [[DBG223]] 6854 // DEBUG1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR4]], !dbg [[DBG223]] 6855 // DEBUG1-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), !dbg [[DBG223]] 6856 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]], !dbg [[DBG223]] 6857 // DEBUG1: arraydestroy.done15: 6858 // DEBUG1-NEXT: br label [[EHCLEANUP]], !dbg [[DBG223]] 6859 // DEBUG1: ehcleanup: 6860 // DEBUG1-NEXT: [[TMP9:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG217]] 6861 // DEBUG1-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP9]], i64 0, i64 0, !dbg [[DBG217]] 6862 // DEBUG1-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]], !dbg [[DBG217]] 6863 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]], !dbg [[DBG217]] 6864 // DEBUG1: arraydestroy.body17: 6865 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ], !dbg [[DBG217]] 6866 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1, !dbg [[DBG217]] 6867 // DEBUG1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]], !dbg [[DBG217]] 6868 // DEBUG1-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG217]] 6869 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]], !dbg [[DBG217]] 6870 // DEBUG1: arraydestroy.done21: 6871 // DEBUG1-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG217]] 6872 // DEBUG1: eh.resume: 6873 // DEBUG1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG217]] 6874 // DEBUG1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG217]] 6875 // DEBUG1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG217]] 6876 // DEBUG1-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG217]] 6877 // DEBUG1-NEXT: resume { i8*, i32 } [[LPAD_VAL22]], !dbg [[DBG217]] 6878 // 6879 // 6880 // DEBUG1-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 6881 // DEBUG1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG229:![0-9]+]] { 6882 // DEBUG1-NEXT: entry: 6883 // DEBUG1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 6884 // DEBUG1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 6885 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META232:![0-9]+]], metadata !DIExpression()), !dbg [[DBG233:![0-9]+]] 6886 // DEBUG1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG233]] 6887 // DEBUG1: arraydestroy.body: 6888 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG233]] 6889 // DEBUG1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG233]] 6890 // DEBUG1-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]], !dbg [[DBG233]] 6891 // DEBUG1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), !dbg [[DBG233]] 6892 // DEBUG1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG233]] 6893 // DEBUG1: arraydestroy.done1: 6894 // DEBUG1-NEXT: ret void, !dbg [[DBG233]] 6895 // 6896 // 6897 // DEBUG1-LABEL: define {{[^@]+}}@main 6898 // DEBUG1-SAME: () #[[ATTR5:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG53:![0-9]+]] { 6899 // DEBUG1-NEXT: entry: 6900 // DEBUG1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6901 // DEBUG1-NEXT: [[RES:%.*]] = alloca i32, align 4 6902 // DEBUG1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 6903 // DEBUG1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 6904 // DEBUG1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB9:[0-9]+]]) 6905 // DEBUG1-NEXT: store i32 0, i32* [[RETVAL]], align 4 6906 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META234:![0-9]+]], metadata !DIExpression()), !dbg [[DBG235:![0-9]+]] 6907 // DEBUG1-NEXT: [[TMP1:%.*]] = load atomic i8, i8* bitcast (i64* @_ZGVZ4mainE2sm to i8*) acquire, align 8, !dbg [[DBG236:![0-9]+]] 6908 // DEBUG1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP1]], 0, !dbg [[DBG236]] 6909 // DEBUG1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG236]], !prof [[PROF237:![0-9]+]] 6910 // DEBUG1: init.check: 6911 // DEBUG1-NEXT: [[TMP2:%.*]] = call i32 @__cxa_guard_acquire(i64* @_ZGVZ4mainE2sm) #[[ATTR4]], !dbg [[DBG236]] 6912 // DEBUG1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0, !dbg [[DBG236]] 6913 // DEBUG1-NEXT: br i1 [[TOBOOL]], label [[INIT:%.*]], label [[INIT_END]], !dbg [[DBG236]] 6914 // DEBUG1: init: 6915 // DEBUG1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB7:[0-9]+]]), !dbg [[DBG236]] 6916 // DEBUG1-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB7]], i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* (i8*)* @.__kmpc_global_ctor_..6, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..7), !dbg [[DBG236]] 6917 // DEBUG1-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB9]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.), !dbg [[DBG238:![0-9]+]] 6918 // DEBUG1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1*, !dbg [[DBG238]] 6919 // DEBUG1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0, !dbg [[DBG239:![0-9]+]] 6920 // DEBUG1-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4, !dbg [[DBG239]] 6921 // DEBUG1-NEXT: invoke void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP6]]) 6922 // DEBUG1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG240:![0-9]+]] 6923 // DEBUG1: invoke.cont: 6924 // DEBUG1-NEXT: [[TMP7:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR4]], !dbg [[DBG236]] 6925 // DEBUG1-NEXT: call void @__cxa_guard_release(i64* @_ZGVZ4mainE2sm) #[[ATTR4]], !dbg [[DBG236]] 6926 // DEBUG1-NEXT: br label [[INIT_END]], !dbg [[DBG236]] 6927 // DEBUG1: init.end: 6928 // DEBUG1-NEXT: [[TMP8:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB11:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S3* @_ZN6Static1sE to i8*), i64 8, i8*** @_ZN6Static1sE.cache.), !dbg [[DBG241:![0-9]+]] 6929 // DEBUG1-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to %struct.S3*, !dbg [[DBG241]] 6930 // DEBUG1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP9]], i32 0, i32 0, !dbg [[DBG242:![0-9]+]] 6931 // DEBUG1-NEXT: [[TMP10:%.*]] = load i32, i32* [[A1]], align 4, !dbg [[DBG242]] 6932 // DEBUG1-NEXT: store i32 [[TMP10]], i32* [[RES]], align 4, !dbg [[DBG243:![0-9]+]] 6933 // DEBUG1-NEXT: [[TMP11:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB13:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i64 24, i8*** @_ZZ4mainE2sm.cache.), !dbg [[DBG244:![0-9]+]] 6934 // DEBUG1-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to %struct.Smain*, !dbg [[DBG244]] 6935 // DEBUG1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[TMP12]], i32 0, i32 0, !dbg [[DBG245:![0-9]+]] 6936 // DEBUG1-NEXT: [[TMP13:%.*]] = load i32, i32* [[A2]], align 8, !dbg [[DBG245]] 6937 // DEBUG1-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG246:![0-9]+]] 6938 // DEBUG1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP13]], !dbg [[DBG246]] 6939 // DEBUG1-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG246]] 6940 // DEBUG1-NEXT: [[TMP15:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB15:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.), !dbg [[DBG247:![0-9]+]] 6941 // DEBUG1-NEXT: [[TMP16:%.*]] = bitcast i8* [[TMP15]] to %struct.S1*, !dbg [[DBG247]] 6942 // DEBUG1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP16]], i32 0, i32 0, !dbg [[DBG248:![0-9]+]] 6943 // DEBUG1-NEXT: [[TMP17:%.*]] = load i32, i32* [[A3]], align 4, !dbg [[DBG248]] 6944 // DEBUG1-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG249:![0-9]+]] 6945 // DEBUG1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP17]], !dbg [[DBG249]] 6946 // DEBUG1-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG249]] 6947 // DEBUG1-NEXT: [[TMP19:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG250:![0-9]+]] 6948 // DEBUG1-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG251:![0-9]+]] 6949 // DEBUG1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP19]], !dbg [[DBG251]] 6950 // DEBUG1-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4, !dbg [[DBG251]] 6951 // DEBUG1-NEXT: [[TMP21:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB17:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S5* @gs3 to i8*), i64 12, i8*** @gs3.cache.), !dbg [[DBG252:![0-9]+]] 6952 // DEBUG1-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to %struct.S5*, !dbg [[DBG252]] 6953 // DEBUG1-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP22]], i32 0, i32 0, !dbg [[DBG253:![0-9]+]] 6954 // DEBUG1-NEXT: [[TMP23:%.*]] = load i32, i32* [[A6]], align 4, !dbg [[DBG253]] 6955 // DEBUG1-NEXT: [[TMP24:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG254:![0-9]+]] 6956 // DEBUG1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP23]], !dbg [[DBG254]] 6957 // DEBUG1-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4, !dbg [[DBG254]] 6958 // DEBUG1-NEXT: [[TMP25:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB19:[0-9]+]], i32 [[TMP0]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i64 24, i8*** @arr_x.cache.), !dbg [[DBG255:![0-9]+]] 6959 // DEBUG1-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to [2 x [3 x %struct.S1]]*, !dbg [[DBG255]] 6960 // DEBUG1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP26]], i64 0, i64 1, !dbg [[DBG255]] 6961 // DEBUG1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1, !dbg [[DBG255]] 6962 // DEBUG1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX8]], i32 0, i32 0, !dbg [[DBG256:![0-9]+]] 6963 // DEBUG1-NEXT: [[TMP27:%.*]] = load i32, i32* [[A9]], align 4, !dbg [[DBG256]] 6964 // DEBUG1-NEXT: [[TMP28:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG257:![0-9]+]] 6965 // DEBUG1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP28]], [[TMP27]], !dbg [[DBG257]] 6966 // DEBUG1-NEXT: store i32 [[ADD10]], i32* [[RES]], align 4, !dbg [[DBG257]] 6967 // DEBUG1-NEXT: [[TMP29:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB21:[0-9]+]], i32 [[TMP0]], i8* bitcast (i32* @_ZN2STIiE2stE to i8*), i64 4, i8*** @_ZN2STIiE2stE.cache.), !dbg [[DBG258:![0-9]+]] 6968 // DEBUG1-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i32*, !dbg [[DBG258]] 6969 // DEBUG1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4, !dbg [[DBG258]] 6970 // DEBUG1-NEXT: [[TMP32:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG259:![0-9]+]] 6971 // DEBUG1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP32]], [[TMP31]], !dbg [[DBG259]] 6972 // DEBUG1-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4, !dbg [[DBG259]] 6973 // DEBUG1-NEXT: [[TMP33:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB23:[0-9]+]], i32 [[TMP0]], i8* bitcast (float* @_ZN2STIfE2stE to i8*), i64 4, i8*** @_ZN2STIfE2stE.cache.), !dbg [[DBG260:![0-9]+]] 6974 // DEBUG1-NEXT: [[TMP34:%.*]] = bitcast i8* [[TMP33]] to float*, !dbg [[DBG260]] 6975 // DEBUG1-NEXT: [[TMP35:%.*]] = load float, float* [[TMP34]], align 4, !dbg [[DBG260]] 6976 // DEBUG1-NEXT: [[CONV:%.*]] = fptosi float [[TMP35]] to i32, !dbg [[DBG260]] 6977 // DEBUG1-NEXT: [[TMP36:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG261:![0-9]+]] 6978 // DEBUG1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP36]], [[CONV]], !dbg [[DBG261]] 6979 // DEBUG1-NEXT: store i32 [[ADD12]], i32* [[RES]], align 4, !dbg [[DBG261]] 6980 // DEBUG1-NEXT: [[TMP37:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB25:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i64 8, i8*** @_ZN2STI2S4E2stE.cache.), !dbg [[DBG262:![0-9]+]] 6981 // DEBUG1-NEXT: [[TMP38:%.*]] = bitcast i8* [[TMP37]] to %struct.S4*, !dbg [[DBG262]] 6982 // DEBUG1-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP38]], i32 0, i32 0, !dbg [[DBG263:![0-9]+]] 6983 // DEBUG1-NEXT: [[TMP39:%.*]] = load i32, i32* [[A13]], align 4, !dbg [[DBG263]] 6984 // DEBUG1-NEXT: [[TMP40:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG264:![0-9]+]] 6985 // DEBUG1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP40]], [[TMP39]], !dbg [[DBG264]] 6986 // DEBUG1-NEXT: store i32 [[ADD14]], i32* [[RES]], align 4, !dbg [[DBG264]] 6987 // DEBUG1-NEXT: [[TMP41:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG265:![0-9]+]] 6988 // DEBUG1-NEXT: ret i32 [[TMP41]], !dbg [[DBG266:![0-9]+]] 6989 // DEBUG1: lpad: 6990 // DEBUG1-NEXT: [[TMP42:%.*]] = landingpad { i8*, i32 } 6991 // DEBUG1-NEXT: cleanup, !dbg [[DBG267:![0-9]+]] 6992 // DEBUG1-NEXT: [[TMP43:%.*]] = extractvalue { i8*, i32 } [[TMP42]], 0, !dbg [[DBG267]] 6993 // DEBUG1-NEXT: store i8* [[TMP43]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG267]] 6994 // DEBUG1-NEXT: [[TMP44:%.*]] = extractvalue { i8*, i32 } [[TMP42]], 1, !dbg [[DBG267]] 6995 // DEBUG1-NEXT: store i32 [[TMP44]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG267]] 6996 // DEBUG1-NEXT: call void @__cxa_guard_abort(i64* @_ZGVZ4mainE2sm) #[[ATTR4]], !dbg [[DBG236]] 6997 // DEBUG1-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG236]] 6998 // DEBUG1: eh.resume: 6999 // DEBUG1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG236]] 7000 // DEBUG1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG236]] 7001 // DEBUG1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG236]] 7002 // DEBUG1-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG236]] 7003 // DEBUG1-NEXT: resume { i8*, i32 } [[LPAD_VAL15]], !dbg [[DBG236]] 7004 // 7005 // 7006 // DEBUG1-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..6 7007 // DEBUG1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG268:![0-9]+]] { 7008 // DEBUG1-NEXT: entry: 7009 // DEBUG1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7010 // DEBUG1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB5:[0-9]+]]) 7011 // DEBUG1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7012 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META269:![0-9]+]], metadata !DIExpression()), !dbg [[DBG270:![0-9]+]] 7013 // DEBUG1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG271:![0-9]+]] 7014 // DEBUG1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.Smain*, !dbg [[DBG271]] 7015 // DEBUG1-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB5]], i32 [[TMP1]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.), !dbg [[DBG272:![0-9]+]] 7016 // DEBUG1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1*, !dbg [[DBG272]] 7017 // DEBUG1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0, !dbg [[DBG273:![0-9]+]] 7018 // DEBUG1-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4, !dbg [[DBG273]] 7019 // DEBUG1-NEXT: call void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[TMP3]], i32 [[TMP6]]), !dbg [[DBG274:![0-9]+]] 7020 // DEBUG1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG271]] 7021 // DEBUG1-NEXT: ret i8* [[TMP7]], !dbg [[DBG271]] 7022 // 7023 // 7024 // DEBUG1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 7025 // DEBUG1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG275:![0-9]+]] { 7026 // DEBUG1-NEXT: entry: 7027 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 7028 // DEBUG1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7029 // DEBUG1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 7030 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META276:![0-9]+]], metadata !DIExpression()), !dbg [[DBG278:![0-9]+]] 7031 // DEBUG1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7032 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META279:![0-9]+]], metadata !DIExpression()), !dbg [[DBG280:![0-9]+]] 7033 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 7034 // DEBUG1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG281:![0-9]+]] 7035 // DEBUG1-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG281]] 7036 // DEBUG1-NEXT: ret void, !dbg [[DBG282:![0-9]+]] 7037 // 7038 // 7039 // DEBUG1-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..7 7040 // DEBUG1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG283:![0-9]+]] { 7041 // DEBUG1-NEXT: entry: 7042 // DEBUG1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7043 // DEBUG1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7044 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META284:![0-9]+]], metadata !DIExpression()), !dbg [[DBG285:![0-9]+]] 7045 // DEBUG1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG285]] 7046 // DEBUG1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.Smain*, !dbg [[DBG285]] 7047 // DEBUG1-NEXT: call void @_ZZ4mainEN5SmainD1Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[TMP2]]) #[[ATTR4]], !dbg [[DBG285]] 7048 // DEBUG1-NEXT: ret void, !dbg [[DBG286:![0-9]+]] 7049 // 7050 // 7051 // DEBUG1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 7052 // DEBUG1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] align 2 !dbg [[DBG287:![0-9]+]] { 7053 // DEBUG1-NEXT: entry: 7054 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 7055 // DEBUG1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 7056 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META288:![0-9]+]], metadata !DIExpression()), !dbg [[DBG289:![0-9]+]] 7057 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 7058 // DEBUG1-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR4]], !dbg [[DBG290:![0-9]+]] 7059 // DEBUG1-NEXT: ret void, !dbg [[DBG291:![0-9]+]] 7060 // 7061 // 7062 // DEBUG1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 7063 // DEBUG1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] align 2 !dbg [[DBG292:![0-9]+]] { 7064 // DEBUG1-NEXT: entry: 7065 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 7066 // DEBUG1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7067 // DEBUG1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 7068 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META293:![0-9]+]], metadata !DIExpression()), !dbg [[DBG294:![0-9]+]] 7069 // DEBUG1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7070 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META295:![0-9]+]], metadata !DIExpression()), !dbg [[DBG296:![0-9]+]] 7071 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 7072 // DEBUG1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG297:![0-9]+]] 7073 // DEBUG1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG298:![0-9]+]] 7074 // DEBUG1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG297]] 7075 // DEBUG1-NEXT: ret void, !dbg [[DBG299:![0-9]+]] 7076 // 7077 // 7078 // DEBUG1-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 7079 // DEBUG1-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] align 2 !dbg [[DBG300:![0-9]+]] { 7080 // DEBUG1-NEXT: entry: 7081 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 7082 // DEBUG1-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 7083 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META301:![0-9]+]], metadata !DIExpression()), !dbg [[DBG302:![0-9]+]] 7084 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 7085 // DEBUG1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG303:![0-9]+]] 7086 // DEBUG1-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG305:![0-9]+]] 7087 // DEBUG1-NEXT: ret void, !dbg [[DBG306:![0-9]+]] 7088 // 7089 // 7090 // DEBUG1-LABEL: define {{[^@]+}}@_Z6foobarv 7091 // DEBUG1-SAME: () #[[ATTR6:[0-9]+]] !dbg [[DBG307:![0-9]+]] { 7092 // DEBUG1-NEXT: entry: 7093 // DEBUG1-NEXT: [[RES:%.*]] = alloca i32, align 4 7094 // DEBUG1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB27:[0-9]+]]) 7095 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META308:![0-9]+]], metadata !DIExpression()), !dbg [[DBG309:![0-9]+]] 7096 // DEBUG1-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB27]], i32 [[TMP0]], i8* bitcast (%struct.S3* @_ZN6Static1sE to i8*), i64 8, i8*** @_ZN6Static1sE.cache.), !dbg [[DBG310:![0-9]+]] 7097 // DEBUG1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S3*, !dbg [[DBG310]] 7098 // DEBUG1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP2]], i32 0, i32 0, !dbg [[DBG311:![0-9]+]] 7099 // DEBUG1-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4, !dbg [[DBG311]] 7100 // DEBUG1-NEXT: store i32 [[TMP3]], i32* [[RES]], align 4, !dbg [[DBG312:![0-9]+]] 7101 // DEBUG1-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB29:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.), !dbg [[DBG313:![0-9]+]] 7102 // DEBUG1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1*, !dbg [[DBG313]] 7103 // DEBUG1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0, !dbg [[DBG314:![0-9]+]] 7104 // DEBUG1-NEXT: [[TMP6:%.*]] = load i32, i32* [[A1]], align 4, !dbg [[DBG314]] 7105 // DEBUG1-NEXT: [[TMP7:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG315:![0-9]+]] 7106 // DEBUG1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], [[TMP6]], !dbg [[DBG315]] 7107 // DEBUG1-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG315]] 7108 // DEBUG1-NEXT: [[TMP8:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG316:![0-9]+]] 7109 // DEBUG1-NEXT: [[TMP9:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG317:![0-9]+]] 7110 // DEBUG1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], [[TMP8]], !dbg [[DBG317]] 7111 // DEBUG1-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4, !dbg [[DBG317]] 7112 // DEBUG1-NEXT: [[TMP10:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB31:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S5* @gs3 to i8*), i64 12, i8*** @gs3.cache.), !dbg [[DBG318:![0-9]+]] 7113 // DEBUG1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to %struct.S5*, !dbg [[DBG318]] 7114 // DEBUG1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP11]], i32 0, i32 0, !dbg [[DBG319:![0-9]+]] 7115 // DEBUG1-NEXT: [[TMP12:%.*]] = load i32, i32* [[A3]], align 4, !dbg [[DBG319]] 7116 // DEBUG1-NEXT: [[TMP13:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG320:![0-9]+]] 7117 // DEBUG1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP12]], !dbg [[DBG320]] 7118 // DEBUG1-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG320]] 7119 // DEBUG1-NEXT: [[TMP14:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB33:[0-9]+]], i32 [[TMP0]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i64 24, i8*** @arr_x.cache.), !dbg [[DBG321:![0-9]+]] 7120 // DEBUG1-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to [2 x [3 x %struct.S1]]*, !dbg [[DBG321]] 7121 // DEBUG1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP15]], i64 0, i64 1, !dbg [[DBG321]] 7122 // DEBUG1-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1, !dbg [[DBG321]] 7123 // DEBUG1-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX5]], i32 0, i32 0, !dbg [[DBG322:![0-9]+]] 7124 // DEBUG1-NEXT: [[TMP16:%.*]] = load i32, i32* [[A6]], align 4, !dbg [[DBG322]] 7125 // DEBUG1-NEXT: [[TMP17:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG323:![0-9]+]] 7126 // DEBUG1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP16]], !dbg [[DBG323]] 7127 // DEBUG1-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4, !dbg [[DBG323]] 7128 // DEBUG1-NEXT: [[TMP18:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB35:[0-9]+]], i32 [[TMP0]], i8* bitcast (i32* @_ZN2STIiE2stE to i8*), i64 4, i8*** @_ZN2STIiE2stE.cache.), !dbg [[DBG324:![0-9]+]] 7129 // DEBUG1-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to i32*, !dbg [[DBG324]] 7130 // DEBUG1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4, !dbg [[DBG324]] 7131 // DEBUG1-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG325:![0-9]+]] 7132 // DEBUG1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], [[TMP20]], !dbg [[DBG325]] 7133 // DEBUG1-NEXT: store i32 [[ADD8]], i32* [[RES]], align 4, !dbg [[DBG325]] 7134 // DEBUG1-NEXT: [[TMP22:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB37:[0-9]+]], i32 [[TMP0]], i8* bitcast (float* @_ZN2STIfE2stE to i8*), i64 4, i8*** @_ZN2STIfE2stE.cache.), !dbg [[DBG326:![0-9]+]] 7135 // DEBUG1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to float*, !dbg [[DBG326]] 7136 // DEBUG1-NEXT: [[TMP24:%.*]] = load float, float* [[TMP23]], align 4, !dbg [[DBG326]] 7137 // DEBUG1-NEXT: [[CONV:%.*]] = fptosi float [[TMP24]] to i32, !dbg [[DBG326]] 7138 // DEBUG1-NEXT: [[TMP25:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG327:![0-9]+]] 7139 // DEBUG1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[CONV]], !dbg [[DBG327]] 7140 // DEBUG1-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4, !dbg [[DBG327]] 7141 // DEBUG1-NEXT: [[TMP26:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB39:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i64 8, i8*** @_ZN2STI2S4E2stE.cache.), !dbg [[DBG328:![0-9]+]] 7142 // DEBUG1-NEXT: [[TMP27:%.*]] = bitcast i8* [[TMP26]] to %struct.S4*, !dbg [[DBG328]] 7143 // DEBUG1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP27]], i32 0, i32 0, !dbg [[DBG329:![0-9]+]] 7144 // DEBUG1-NEXT: [[TMP28:%.*]] = load i32, i32* [[A10]], align 4, !dbg [[DBG329]] 7145 // DEBUG1-NEXT: [[TMP29:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG330:![0-9]+]] 7146 // DEBUG1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], [[TMP28]], !dbg [[DBG330]] 7147 // DEBUG1-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4, !dbg [[DBG330]] 7148 // DEBUG1-NEXT: [[TMP30:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG331:![0-9]+]] 7149 // DEBUG1-NEXT: ret i32 [[TMP30]], !dbg [[DBG332:![0-9]+]] 7150 // 7151 // 7152 // DEBUG1-LABEL: define {{[^@]+}}@__cxx_global_var_init.8 7153 // DEBUG1-SAME: () #[[ATTR0]] comdat($_ZN2STI2S4E2stE) !dbg [[DBG333:![0-9]+]] { 7154 // DEBUG1-NEXT: entry: 7155 // DEBUG1-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG334:![0-9]+]] 7156 // DEBUG1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG334]] 7157 // DEBUG1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG334]] 7158 // DEBUG1: init.check: 7159 // DEBUG1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB41:[0-9]+]]), !dbg [[DBG334]] 7160 // DEBUG1-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB41]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* (i8*)* @.__kmpc_global_ctor_..9, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..10), !dbg [[DBG334]] 7161 // DEBUG1-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23), !dbg [[DBG335:![0-9]+]] 7162 // DEBUG1-NEXT: [[TMP2:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR4]], !dbg [[DBG334]] 7163 // DEBUG1-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG334]] 7164 // DEBUG1-NEXT: br label [[INIT_END]], !dbg [[DBG334]] 7165 // DEBUG1: init.end: 7166 // DEBUG1-NEXT: ret void, !dbg [[DBG337:![0-9]+]] 7167 // 7168 // 7169 // DEBUG1-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..9 7170 // DEBUG1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG338:![0-9]+]] { 7171 // DEBUG1-NEXT: entry: 7172 // DEBUG1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7173 // DEBUG1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7174 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META339:![0-9]+]], metadata !DIExpression()), !dbg [[DBG340:![0-9]+]] 7175 // DEBUG1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG341:![0-9]+]] 7176 // DEBUG1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S4*, !dbg [[DBG341]] 7177 // DEBUG1-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[TMP2]], i32 23), !dbg [[DBG342:![0-9]+]] 7178 // DEBUG1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG341]] 7179 // DEBUG1-NEXT: ret i8* [[TMP3]], !dbg [[DBG341]] 7180 // 7181 // 7182 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 7183 // DEBUG1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG343:![0-9]+]] { 7184 // DEBUG1-NEXT: entry: 7185 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 7186 // DEBUG1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7187 // DEBUG1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 7188 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META344:![0-9]+]], metadata !DIExpression()), !dbg [[DBG346:![0-9]+]] 7189 // DEBUG1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7190 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META347:![0-9]+]], metadata !DIExpression()), !dbg [[DBG348:![0-9]+]] 7191 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 7192 // DEBUG1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG349:![0-9]+]] 7193 // DEBUG1-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG349]] 7194 // DEBUG1-NEXT: ret void, !dbg [[DBG350:![0-9]+]] 7195 // 7196 // 7197 // DEBUG1-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..10 7198 // DEBUG1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG351:![0-9]+]] { 7199 // DEBUG1-NEXT: entry: 7200 // DEBUG1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7201 // DEBUG1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7202 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META352:![0-9]+]], metadata !DIExpression()), !dbg [[DBG353:![0-9]+]] 7203 // DEBUG1-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG353]] 7204 // DEBUG1-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S4*, !dbg [[DBG353]] 7205 // DEBUG1-NEXT: call void @_ZN2S4D1Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[TMP2]]) #[[ATTR4]], !dbg [[DBG353]] 7206 // DEBUG1-NEXT: ret void, !dbg [[DBG354:![0-9]+]] 7207 // 7208 // 7209 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 7210 // DEBUG1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG355:![0-9]+]] { 7211 // DEBUG1-NEXT: entry: 7212 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 7213 // DEBUG1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 7214 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META356:![0-9]+]], metadata !DIExpression()), !dbg [[DBG357:![0-9]+]] 7215 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 7216 // DEBUG1-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR4]], !dbg [[DBG358:![0-9]+]] 7217 // DEBUG1-NEXT: ret void, !dbg [[DBG359:![0-9]+]] 7218 // 7219 // 7220 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 7221 // DEBUG1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG360:![0-9]+]] { 7222 // DEBUG1-NEXT: entry: 7223 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 7224 // DEBUG1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7225 // DEBUG1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 7226 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META361:![0-9]+]], metadata !DIExpression()), !dbg [[DBG362:![0-9]+]] 7227 // DEBUG1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7228 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META363:![0-9]+]], metadata !DIExpression()), !dbg [[DBG364:![0-9]+]] 7229 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 7230 // DEBUG1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG365:![0-9]+]] 7231 // DEBUG1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG366:![0-9]+]] 7232 // DEBUG1-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG365]] 7233 // DEBUG1-NEXT: ret void, !dbg [[DBG367:![0-9]+]] 7234 // 7235 // 7236 // DEBUG1-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 7237 // DEBUG1-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG368:![0-9]+]] { 7238 // DEBUG1-NEXT: entry: 7239 // DEBUG1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 7240 // DEBUG1-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 7241 // DEBUG1-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META369:![0-9]+]], metadata !DIExpression()), !dbg [[DBG370:![0-9]+]] 7242 // DEBUG1-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 7243 // DEBUG1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG371:![0-9]+]] 7244 // DEBUG1-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG373:![0-9]+]] 7245 // DEBUG1-NEXT: ret void, !dbg [[DBG374:![0-9]+]] 7246 // 7247 // 7248 // DEBUG1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 7249 // DEBUG1-SAME: () #[[ATTR0]] !dbg [[DBG375:![0-9]+]] { 7250 // DEBUG1-NEXT: entry: 7251 // DEBUG1-NEXT: call void @__cxx_global_var_init(), !dbg [[DBG376:![0-9]+]] 7252 // DEBUG1-NEXT: call void @.__omp_threadprivate_init_.(), !dbg [[DBG376]] 7253 // DEBUG1-NEXT: call void @__cxx_global_var_init.4(), !dbg [[DBG376]] 7254 // DEBUG1-NEXT: call void @__cxx_global_var_init.5(), !dbg [[DBG376]] 7255 // DEBUG1-NEXT: call void @.__omp_threadprivate_init_..3(), !dbg [[DBG376]] 7256 // DEBUG1-NEXT: ret void 7257 // 7258 // 7259 // DEBUG2-LABEL: define {{[^@]+}}@__cxx_global_var_init 7260 // DEBUG2-SAME: () #[[ATTR0:[0-9]+]] !dbg [[DBG115:![0-9]+]] { 7261 // DEBUG2-NEXT: entry: 7262 // DEBUG2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]), !dbg [[DBG119:![0-9]+]] 7263 // DEBUG2-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB1]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* (i8*)* @.__kmpc_global_ctor_., i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_.), !dbg [[DBG119]] 7264 // DEBUG2-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) @_ZL3gs1, i32 5), !dbg [[DBG120:![0-9]+]] 7265 // DEBUG2-NEXT: [[TMP1:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S1*)* @_ZN2S1D1Ev to void (i8*)*), i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i8* @__dso_handle) #[[ATTR4:[0-9]+]], !dbg [[DBG119]] 7266 // DEBUG2-NEXT: ret void, !dbg [[DBG122:![0-9]+]] 7267 // 7268 // 7269 // DEBUG2-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_. 7270 // DEBUG2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG123:![0-9]+]] { 7271 // DEBUG2-NEXT: entry: 7272 // DEBUG2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7273 // DEBUG2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7274 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META125:![0-9]+]], metadata !DIExpression()), !dbg [[DBG127:![0-9]+]] 7275 // DEBUG2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG128:![0-9]+]] 7276 // DEBUG2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S1*, !dbg [[DBG128]] 7277 // DEBUG2-NEXT: call void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[TMP2]], i32 5), !dbg [[DBG129:![0-9]+]] 7278 // DEBUG2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG128]] 7279 // DEBUG2-NEXT: ret i8* [[TMP3]], !dbg [[DBG128]] 7280 // 7281 // 7282 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S1C1Ei 7283 // DEBUG2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 !dbg [[DBG130:![0-9]+]] { 7284 // DEBUG2-NEXT: entry: 7285 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 7286 // DEBUG2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7287 // DEBUG2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 7288 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META131:![0-9]+]], metadata !DIExpression()), !dbg [[DBG133:![0-9]+]] 7289 // DEBUG2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7290 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META134:![0-9]+]], metadata !DIExpression()), !dbg [[DBG135:![0-9]+]] 7291 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 7292 // DEBUG2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG136:![0-9]+]] 7293 // DEBUG2-NEXT: call void @_ZN2S1C2Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG136]] 7294 // DEBUG2-NEXT: ret void, !dbg [[DBG137:![0-9]+]] 7295 // 7296 // 7297 // DEBUG2-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_. 7298 // DEBUG2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG138:![0-9]+]] { 7299 // DEBUG2-NEXT: entry: 7300 // DEBUG2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7301 // DEBUG2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7302 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META139:![0-9]+]], metadata !DIExpression()), !dbg [[DBG140:![0-9]+]] 7303 // DEBUG2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG140]] 7304 // DEBUG2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S1*, !dbg [[DBG140]] 7305 // DEBUG2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[TMP2]]) #[[ATTR4]], !dbg [[DBG140]] 7306 // DEBUG2-NEXT: ret void, !dbg [[DBG141:![0-9]+]] 7307 // 7308 // 7309 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S1D1Ev 7310 // DEBUG2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat align 2 !dbg [[DBG142:![0-9]+]] { 7311 // DEBUG2-NEXT: entry: 7312 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 7313 // DEBUG2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 7314 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META143:![0-9]+]], metadata !DIExpression()), !dbg [[DBG144:![0-9]+]] 7315 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 7316 // DEBUG2-NEXT: call void @_ZN2S1D2Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]], !dbg [[DBG145:![0-9]+]] 7317 // DEBUG2-NEXT: ret void, !dbg [[DBG146:![0-9]+]] 7318 // 7319 // 7320 // DEBUG2-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 7321 // DEBUG2-SAME: () #[[ATTR0]] !dbg [[DBG147:![0-9]+]] { 7322 // DEBUG2-NEXT: entry: 7323 // DEBUG2-NEXT: call void @_ZN2S2C1Ei(%struct.S2* nonnull align 8 dereferenceable(16) @_ZL3gs2, i32 27), !dbg [[DBG148:![0-9]+]] 7324 // DEBUG2-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S2*)* @_ZN2S2D1Ev to void (i8*)*), i8* bitcast (%struct.S2* @_ZL3gs2 to i8*), i8* @__dso_handle) #[[ATTR4]], !dbg [[DBG150:![0-9]+]] 7325 // DEBUG2-NEXT: ret void, !dbg [[DBG151:![0-9]+]] 7326 // 7327 // 7328 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S2C1Ei 7329 // DEBUG2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG152:![0-9]+]] { 7330 // DEBUG2-NEXT: entry: 7331 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 7332 // DEBUG2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7333 // DEBUG2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 7334 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META153:![0-9]+]], metadata !DIExpression()), !dbg [[DBG155:![0-9]+]] 7335 // DEBUG2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7336 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META156:![0-9]+]], metadata !DIExpression()), !dbg [[DBG157:![0-9]+]] 7337 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 7338 // DEBUG2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG158:![0-9]+]] 7339 // DEBUG2-NEXT: call void @_ZN2S2C2Ei(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG158]] 7340 // DEBUG2-NEXT: ret void, !dbg [[DBG159:![0-9]+]] 7341 // 7342 // 7343 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S2D1Ev 7344 // DEBUG2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG160:![0-9]+]] { 7345 // DEBUG2-NEXT: entry: 7346 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 7347 // DEBUG2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 7348 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META161:![0-9]+]], metadata !DIExpression()), !dbg [[DBG162:![0-9]+]] 7349 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 7350 // DEBUG2-NEXT: call void @_ZN2S2D2Ev(%struct.S2* nonnull align 8 dereferenceable(16) [[THIS1]]) #[[ATTR4]], !dbg [[DBG163:![0-9]+]] 7351 // DEBUG2-NEXT: ret void, !dbg [[DBG164:![0-9]+]] 7352 // 7353 // 7354 // DEBUG2-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 7355 // DEBUG2-SAME: () #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG165:![0-9]+]] { 7356 // DEBUG2-NEXT: entry: 7357 // DEBUG2-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 7358 // DEBUG2-NEXT: [[ARRAYINIT_ENDOFINIT1:%.*]] = alloca %struct.S1*, align 8 7359 // DEBUG2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 7360 // DEBUG2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 7361 // DEBUG2-NEXT: [[ARRAYINIT_ENDOFINIT5:%.*]] = alloca %struct.S1*, align 8 7362 // DEBUG2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]), !dbg [[DBG166:![0-9]+]] 7363 // DEBUG2-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB3]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i8* (i8*)* @.__kmpc_global_ctor_..3, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..4), !dbg [[DBG166]] 7364 // DEBUG2-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG167:![0-9]+]] 7365 // DEBUG2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG169:![0-9]+]] 7366 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), i32 1) 7367 // DEBUG2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG170:![0-9]+]] 7368 // DEBUG2: invoke.cont: 7369 // DEBUG2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG169]] 7370 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 1), i32 2) 7371 // DEBUG2-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]], !dbg [[DBG171:![0-9]+]] 7372 // DEBUG2: invoke.cont2: 7373 // DEBUG2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG169]] 7374 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 2), i32 3) 7375 // DEBUG2-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]], !dbg [[DBG172:![0-9]+]] 7376 // DEBUG2: invoke.cont3: 7377 // DEBUG2-NEXT: store [3 x %struct.S1]* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1), [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG167]] 7378 // DEBUG2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG173:![0-9]+]] 7379 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), i32 4) 7380 // DEBUG2-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD6:%.*]], !dbg [[DBG174:![0-9]+]] 7381 // DEBUG2: invoke.cont7: 7382 // DEBUG2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG173]] 7383 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 1), i32 5) 7384 // DEBUG2-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD6]], !dbg [[DBG175:![0-9]+]] 7385 // DEBUG2: invoke.cont8: 7386 // DEBUG2-NEXT: store %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG173]] 7387 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 2), i32 6) 7388 // DEBUG2-NEXT: to label [[INVOKE_CONT9:%.*]] unwind label [[LPAD6]], !dbg [[DBG176:![0-9]+]] 7389 // DEBUG2: invoke.cont9: 7390 // DEBUG2-NEXT: [[TMP1:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR4]], !dbg [[DBG166]] 7391 // DEBUG2-NEXT: ret void, !dbg [[DBG166]] 7392 // DEBUG2: lpad: 7393 // DEBUG2-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 7394 // DEBUG2-NEXT: cleanup, !dbg [[DBG177:![0-9]+]] 7395 // DEBUG2-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0, !dbg [[DBG177]] 7396 // DEBUG2-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG177]] 7397 // DEBUG2-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1, !dbg [[DBG177]] 7398 // DEBUG2-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG177]] 7399 // DEBUG2-NEXT: [[TMP5:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT1]], align 8, !dbg [[DBG169]] 7400 // DEBUG2-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[TMP5]], !dbg [[DBG169]] 7401 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG169]] 7402 // DEBUG2: arraydestroy.body: 7403 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP5]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG169]] 7404 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG169]] 7405 // DEBUG2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]], !dbg [[DBG169]] 7406 // DEBUG2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG169]] 7407 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG169]] 7408 // DEBUG2: arraydestroy.done4: 7409 // DEBUG2-NEXT: br label [[EHCLEANUP:%.*]], !dbg [[DBG169]] 7410 // DEBUG2: lpad6: 7411 // DEBUG2-NEXT: [[TMP6:%.*]] = landingpad { i8*, i32 } 7412 // DEBUG2-NEXT: cleanup, !dbg [[DBG177]] 7413 // DEBUG2-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP6]], 0, !dbg [[DBG177]] 7414 // DEBUG2-NEXT: store i8* [[TMP7]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG177]] 7415 // DEBUG2-NEXT: [[TMP8:%.*]] = extractvalue { i8*, i32 } [[TMP6]], 1, !dbg [[DBG177]] 7416 // DEBUG2-NEXT: store i32 [[TMP8]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG177]] 7417 // DEBUG2-NEXT: [[TMP9:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT5]], align 8, !dbg [[DBG173]] 7418 // DEBUG2-NEXT: [[ARRAYDESTROY_ISEMPTY10:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), [[TMP9]], !dbg [[DBG173]] 7419 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY10]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY11:%.*]], !dbg [[DBG173]] 7420 // DEBUG2: arraydestroy.body11: 7421 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENTPAST12:%.*]] = phi %struct.S1* [ [[TMP9]], [[LPAD6]] ], [ [[ARRAYDESTROY_ELEMENT13:%.*]], [[ARRAYDESTROY_BODY11]] ], !dbg [[DBG173]] 7422 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST12]], i64 -1, !dbg [[DBG173]] 7423 // DEBUG2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT13]]) #[[ATTR4]], !dbg [[DBG173]] 7424 // DEBUG2-NEXT: [[ARRAYDESTROY_DONE14:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT13]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 1, i64 0), !dbg [[DBG173]] 7425 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_DONE14]], label [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_BODY11]], !dbg [[DBG173]] 7426 // DEBUG2: arraydestroy.done15: 7427 // DEBUG2-NEXT: br label [[EHCLEANUP]], !dbg [[DBG173]] 7428 // DEBUG2: ehcleanup: 7429 // DEBUG2-NEXT: [[TMP10:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG167]] 7430 // DEBUG2-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP10]], i64 0, i64 0, !dbg [[DBG167]] 7431 // DEBUG2-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), [[PAD_ARRAYEND]], !dbg [[DBG167]] 7432 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]], !dbg [[DBG167]] 7433 // DEBUG2: arraydestroy.body17: 7434 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ], !dbg [[DBG167]] 7435 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1, !dbg [[DBG167]] 7436 // DEBUG2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]], !dbg [[DBG167]] 7437 // DEBUG2-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i64 0, i64 0, i64 0), !dbg [[DBG167]] 7438 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]], !dbg [[DBG167]] 7439 // DEBUG2: arraydestroy.done21: 7440 // DEBUG2-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG167]] 7441 // DEBUG2: eh.resume: 7442 // DEBUG2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG167]] 7443 // DEBUG2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG167]] 7444 // DEBUG2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG167]] 7445 // DEBUG2-NEXT: [[LPAD_VAL22:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG167]] 7446 // DEBUG2-NEXT: resume { i8*, i32 } [[LPAD_VAL22]], !dbg [[DBG167]] 7447 // 7448 // 7449 // DEBUG2-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..3 7450 // DEBUG2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG178:![0-9]+]] { 7451 // DEBUG2-NEXT: entry: 7452 // DEBUG2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7453 // DEBUG2-NEXT: [[ARRAYINIT_ENDOFINIT:%.*]] = alloca [3 x %struct.S1]*, align 8 7454 // DEBUG2-NEXT: [[ARRAYINIT_ENDOFINIT2:%.*]] = alloca %struct.S1*, align 8 7455 // DEBUG2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 7456 // DEBUG2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 7457 // DEBUG2-NEXT: [[ARRAYINIT_ENDOFINIT9:%.*]] = alloca %struct.S1*, align 8 7458 // DEBUG2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7459 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META179:![0-9]+]], metadata !DIExpression()), !dbg [[DBG180:![0-9]+]] 7460 // DEBUG2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG181:![0-9]+]] 7461 // DEBUG2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to [2 x [3 x %struct.S1]]*, !dbg [[DBG181]] 7462 // DEBUG2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP2]], i64 0, i64 0, !dbg [[DBG182:![0-9]+]] 7463 // DEBUG2-NEXT: store [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG182]] 7464 // DEBUG2-NEXT: [[ARRAYINIT_BEGIN1:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 0, i64 0, !dbg [[DBG183:![0-9]+]] 7465 // DEBUG2-NEXT: store %struct.S1* [[ARRAYINIT_BEGIN1]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8, !dbg [[DBG183]] 7466 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN1]], i32 1) 7467 // DEBUG2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG184:![0-9]+]] 7468 // DEBUG2: invoke.cont: 7469 // DEBUG2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAYINIT_BEGIN1]], i64 1, !dbg [[DBG183]] 7470 // DEBUG2-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8, !dbg [[DBG183]] 7471 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 7472 // DEBUG2-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD]], !dbg [[DBG185:![0-9]+]] 7473 // DEBUG2: invoke.cont3: 7474 // DEBUG2-NEXT: [[ARRAYINIT_ELEMENT4:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_ELEMENT]], i64 1, !dbg [[DBG183]] 7475 // DEBUG2-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT4]], %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8, !dbg [[DBG183]] 7476 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT4]], i32 3) 7477 // DEBUG2-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]], !dbg [[DBG186:![0-9]+]] 7478 // DEBUG2: invoke.cont5: 7479 // DEBUG2-NEXT: [[ARRAYINIT_ELEMENT7:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 1, !dbg [[DBG182]] 7480 // DEBUG2-NEXT: store [3 x %struct.S1]* [[ARRAYINIT_ELEMENT7]], [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG182]] 7481 // DEBUG2-NEXT: [[ARRAYINIT_BEGIN8:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_ELEMENT7]], i64 0, i64 0, !dbg [[DBG187:![0-9]+]] 7482 // DEBUG2-NEXT: store %struct.S1* [[ARRAYINIT_BEGIN8]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8, !dbg [[DBG187]] 7483 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN8]], i32 4) 7484 // DEBUG2-NEXT: to label [[INVOKE_CONT11:%.*]] unwind label [[LPAD10:%.*]], !dbg [[DBG188:![0-9]+]] 7485 // DEBUG2: invoke.cont11: 7486 // DEBUG2-NEXT: [[ARRAYINIT_ELEMENT12:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_BEGIN8]], i64 1, !dbg [[DBG187]] 7487 // DEBUG2-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT12]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8, !dbg [[DBG187]] 7488 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT12]], i32 5) 7489 // DEBUG2-NEXT: to label [[INVOKE_CONT13:%.*]] unwind label [[LPAD10]], !dbg [[DBG189:![0-9]+]] 7490 // DEBUG2: invoke.cont13: 7491 // DEBUG2-NEXT: [[ARRAYINIT_ELEMENT14:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYINIT_ELEMENT12]], i64 1, !dbg [[DBG187]] 7492 // DEBUG2-NEXT: store %struct.S1* [[ARRAYINIT_ELEMENT14]], %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8, !dbg [[DBG187]] 7493 // DEBUG2-NEXT: invoke void @_ZN2S1C1Ei(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT14]], i32 6) 7494 // DEBUG2-NEXT: to label [[INVOKE_CONT15:%.*]] unwind label [[LPAD10]], !dbg [[DBG190:![0-9]+]] 7495 // DEBUG2: invoke.cont15: 7496 // DEBUG2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG181]] 7497 // DEBUG2-NEXT: ret i8* [[TMP3]], !dbg [[DBG181]] 7498 // DEBUG2: lpad: 7499 // DEBUG2-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 7500 // DEBUG2-NEXT: cleanup, !dbg [[DBG180]] 7501 // DEBUG2-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0, !dbg [[DBG180]] 7502 // DEBUG2-NEXT: store i8* [[TMP5]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG180]] 7503 // DEBUG2-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 1, !dbg [[DBG180]] 7504 // DEBUG2-NEXT: store i32 [[TMP6]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG180]] 7505 // DEBUG2-NEXT: [[TMP7:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT2]], align 8, !dbg [[DBG183]] 7506 // DEBUG2-NEXT: [[ARRAYDESTROY_ISEMPTY:%.*]] = icmp eq %struct.S1* [[ARRAYINIT_BEGIN1]], [[TMP7]], !dbg [[DBG183]] 7507 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG183]] 7508 // DEBUG2: arraydestroy.body: 7509 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP7]], [[LPAD]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG183]] 7510 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG183]] 7511 // DEBUG2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]], !dbg [[DBG183]] 7512 // DEBUG2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], [[ARRAYINIT_BEGIN1]], !dbg [[DBG183]] 7513 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG183]] 7514 // DEBUG2: arraydestroy.done6: 7515 // DEBUG2-NEXT: br label [[EHCLEANUP:%.*]], !dbg [[DBG183]] 7516 // DEBUG2: lpad10: 7517 // DEBUG2-NEXT: [[TMP8:%.*]] = landingpad { i8*, i32 } 7518 // DEBUG2-NEXT: cleanup, !dbg [[DBG180]] 7519 // DEBUG2-NEXT: [[TMP9:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 0, !dbg [[DBG180]] 7520 // DEBUG2-NEXT: store i8* [[TMP9]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG180]] 7521 // DEBUG2-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 1, !dbg [[DBG180]] 7522 // DEBUG2-NEXT: store i32 [[TMP10]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG180]] 7523 // DEBUG2-NEXT: [[TMP11:%.*]] = load %struct.S1*, %struct.S1** [[ARRAYINIT_ENDOFINIT9]], align 8, !dbg [[DBG187]] 7524 // DEBUG2-NEXT: [[ARRAYDESTROY_ISEMPTY16:%.*]] = icmp eq %struct.S1* [[ARRAYINIT_BEGIN8]], [[TMP11]], !dbg [[DBG187]] 7525 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY16]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17:%.*]], !dbg [[DBG187]] 7526 // DEBUG2: arraydestroy.body17: 7527 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S1* [ [[TMP11]], [[LPAD10]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ], !dbg [[DBG187]] 7528 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1, !dbg [[DBG187]] 7529 // DEBUG2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]], !dbg [[DBG187]] 7530 // DEBUG2-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT19]], [[ARRAYINIT_BEGIN8]], !dbg [[DBG187]] 7531 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_BODY17]], !dbg [[DBG187]] 7532 // DEBUG2: arraydestroy.done21: 7533 // DEBUG2-NEXT: br label [[EHCLEANUP]], !dbg [[DBG187]] 7534 // DEBUG2: ehcleanup: 7535 // DEBUG2-NEXT: [[TMP12:%.*]] = load [3 x %struct.S1]*, [3 x %struct.S1]** [[ARRAYINIT_ENDOFINIT]], align 8, !dbg [[DBG182]] 7536 // DEBUG2-NEXT: [[PAD_ARRAYBEGIN:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYINIT_BEGIN]], i64 0, i64 0, !dbg [[DBG182]] 7537 // DEBUG2-NEXT: [[PAD_ARRAYEND:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[TMP12]], i64 0, i64 0, !dbg [[DBG182]] 7538 // DEBUG2-NEXT: [[ARRAYDESTROY_ISEMPTY22:%.*]] = icmp eq %struct.S1* [[PAD_ARRAYBEGIN]], [[PAD_ARRAYEND]], !dbg [[DBG182]] 7539 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_ISEMPTY22]], label [[ARRAYDESTROY_DONE27:%.*]], label [[ARRAYDESTROY_BODY23:%.*]], !dbg [[DBG182]] 7540 // DEBUG2: arraydestroy.body23: 7541 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENTPAST24:%.*]] = phi %struct.S1* [ [[PAD_ARRAYEND]], [[EHCLEANUP]] ], [ [[ARRAYDESTROY_ELEMENT25:%.*]], [[ARRAYDESTROY_BODY23]] ], !dbg [[DBG182]] 7542 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENT25]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST24]], i64 -1, !dbg [[DBG182]] 7543 // DEBUG2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT25]]) #[[ATTR4]], !dbg [[DBG182]] 7544 // DEBUG2-NEXT: [[ARRAYDESTROY_DONE26:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT25]], [[PAD_ARRAYBEGIN]], !dbg [[DBG182]] 7545 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_DONE26]], label [[ARRAYDESTROY_DONE27]], label [[ARRAYDESTROY_BODY23]], !dbg [[DBG182]] 7546 // DEBUG2: arraydestroy.done27: 7547 // DEBUG2-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG182]] 7548 // DEBUG2: eh.resume: 7549 // DEBUG2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG182]] 7550 // DEBUG2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG182]] 7551 // DEBUG2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG182]] 7552 // DEBUG2-NEXT: [[LPAD_VAL28:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG182]] 7553 // DEBUG2-NEXT: resume { i8*, i32 } [[LPAD_VAL28]], !dbg [[DBG182]] 7554 // 7555 // 7556 // DEBUG2-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..4 7557 // DEBUG2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG191:![0-9]+]] { 7558 // DEBUG2-NEXT: entry: 7559 // DEBUG2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7560 // DEBUG2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7561 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META192:![0-9]+]], metadata !DIExpression()), !dbg [[DBG193:![0-9]+]] 7562 // DEBUG2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG193]] 7563 // DEBUG2-NEXT: [[ARRAY_BEGIN:%.*]] = bitcast i8* [[TMP1]] to %struct.S1*, !dbg [[DBG193]] 7564 // DEBUG2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[ARRAY_BEGIN]], i64 6, !dbg [[DBG193]] 7565 // DEBUG2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG193]] 7566 // DEBUG2: arraydestroy.body: 7567 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG193]] 7568 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG193]] 7569 // DEBUG2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]], !dbg [[DBG193]] 7570 // DEBUG2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]], !dbg [[DBG193]] 7571 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG193]] 7572 // DEBUG2: arraydestroy.done1: 7573 // DEBUG2-NEXT: ret void, !dbg [[DBG194:![0-9]+]] 7574 // 7575 // 7576 // DEBUG2-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 7577 // DEBUG2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG195:![0-9]+]] { 7578 // DEBUG2-NEXT: entry: 7579 // DEBUG2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7580 // DEBUG2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7581 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META198:![0-9]+]], metadata !DIExpression()), !dbg [[DBG199:![0-9]+]] 7582 // DEBUG2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]], !dbg [[DBG199]] 7583 // DEBUG2: arraydestroy.body: 7584 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S1* [ getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), i64 6), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ], !dbg [[DBG199]] 7585 // DEBUG2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1, !dbg [[DBG199]] 7586 // DEBUG2-NEXT: call void @_ZN2S1D1Ev(%struct.S1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]], !dbg [[DBG199]] 7587 // DEBUG2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S1* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* @arr_x, i32 0, i32 0, i32 0), !dbg [[DBG199]] 7588 // DEBUG2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]], !dbg [[DBG199]] 7589 // DEBUG2: arraydestroy.done1: 7590 // DEBUG2-NEXT: ret void, !dbg [[DBG199]] 7591 // 7592 // 7593 // DEBUG2-LABEL: define {{[^@]+}}@main 7594 // DEBUG2-SAME: () #[[ATTR5:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg [[DBG53:![0-9]+]] { 7595 // DEBUG2-NEXT: entry: 7596 // DEBUG2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7597 // DEBUG2-NEXT: [[RES:%.*]] = alloca i32, align 4 7598 // DEBUG2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 7599 // DEBUG2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 7600 // DEBUG2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB9:[0-9]+]]) 7601 // DEBUG2-NEXT: store i32 0, i32* [[RETVAL]], align 4 7602 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META200:![0-9]+]], metadata !DIExpression()), !dbg [[DBG201:![0-9]+]] 7603 // DEBUG2-NEXT: [[TMP1:%.*]] = load atomic i8, i8* bitcast (i64* @_ZGVZ4mainE2sm to i8*) acquire, align 8, !dbg [[DBG202:![0-9]+]] 7604 // DEBUG2-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP1]], 0, !dbg [[DBG202]] 7605 // DEBUG2-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG202]], !prof [[PROF203:![0-9]+]] 7606 // DEBUG2: init.check: 7607 // DEBUG2-NEXT: [[TMP2:%.*]] = call i32 @__cxa_guard_acquire(i64* @_ZGVZ4mainE2sm) #[[ATTR4]], !dbg [[DBG202]] 7608 // DEBUG2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0, !dbg [[DBG202]] 7609 // DEBUG2-NEXT: br i1 [[TOBOOL]], label [[INIT:%.*]], label [[INIT_END]], !dbg [[DBG202]] 7610 // DEBUG2: init: 7611 // DEBUG2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB7:[0-9]+]]), !dbg [[DBG202]] 7612 // DEBUG2-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB7]], i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* (i8*)* @.__kmpc_global_ctor_..5, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..6), !dbg [[DBG202]] 7613 // DEBUG2-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB9]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.), !dbg [[DBG204:![0-9]+]] 7614 // DEBUG2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1*, !dbg [[DBG204]] 7615 // DEBUG2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0, !dbg [[DBG205:![0-9]+]] 7616 // DEBUG2-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4, !dbg [[DBG205]] 7617 // DEBUG2-NEXT: invoke void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) @_ZZ4mainE2sm, i32 [[TMP6]]) 7618 // DEBUG2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]], !dbg [[DBG206:![0-9]+]] 7619 // DEBUG2: invoke.cont: 7620 // DEBUG2-NEXT: [[TMP7:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.Smain*)* @_ZZ4mainEN5SmainD1Ev to void (i8*)*), i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i8* @__dso_handle) #[[ATTR4]], !dbg [[DBG202]] 7621 // DEBUG2-NEXT: call void @__cxa_guard_release(i64* @_ZGVZ4mainE2sm) #[[ATTR4]], !dbg [[DBG202]] 7622 // DEBUG2-NEXT: br label [[INIT_END]], !dbg [[DBG202]] 7623 // DEBUG2: init.end: 7624 // DEBUG2-NEXT: [[TMP8:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB11:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S3* @_ZN6Static1sE to i8*), i64 8, i8*** @_ZN6Static1sE.cache.), !dbg [[DBG207:![0-9]+]] 7625 // DEBUG2-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to %struct.S3*, !dbg [[DBG207]] 7626 // DEBUG2-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP9]], i32 0, i32 0, !dbg [[DBG208:![0-9]+]] 7627 // DEBUG2-NEXT: [[TMP10:%.*]] = load i32, i32* [[A1]], align 4, !dbg [[DBG208]] 7628 // DEBUG2-NEXT: store i32 [[TMP10]], i32* [[RES]], align 4, !dbg [[DBG209:![0-9]+]] 7629 // DEBUG2-NEXT: [[TMP11:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB13:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.Smain* @_ZZ4mainE2sm to i8*), i64 24, i8*** @_ZZ4mainE2sm.cache.), !dbg [[DBG210:![0-9]+]] 7630 // DEBUG2-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to %struct.Smain*, !dbg [[DBG210]] 7631 // DEBUG2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[TMP12]], i32 0, i32 0, !dbg [[DBG211:![0-9]+]] 7632 // DEBUG2-NEXT: [[TMP13:%.*]] = load i32, i32* [[A2]], align 8, !dbg [[DBG211]] 7633 // DEBUG2-NEXT: [[TMP14:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG212:![0-9]+]] 7634 // DEBUG2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP13]], !dbg [[DBG212]] 7635 // DEBUG2-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG212]] 7636 // DEBUG2-NEXT: [[TMP15:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB15:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.), !dbg [[DBG213:![0-9]+]] 7637 // DEBUG2-NEXT: [[TMP16:%.*]] = bitcast i8* [[TMP15]] to %struct.S1*, !dbg [[DBG213]] 7638 // DEBUG2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP16]], i32 0, i32 0, !dbg [[DBG214:![0-9]+]] 7639 // DEBUG2-NEXT: [[TMP17:%.*]] = load i32, i32* [[A3]], align 4, !dbg [[DBG214]] 7640 // DEBUG2-NEXT: [[TMP18:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG215:![0-9]+]] 7641 // DEBUG2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP17]], !dbg [[DBG215]] 7642 // DEBUG2-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG215]] 7643 // DEBUG2-NEXT: [[TMP19:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG216:![0-9]+]] 7644 // DEBUG2-NEXT: [[TMP20:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG217:![0-9]+]] 7645 // DEBUG2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP19]], !dbg [[DBG217]] 7646 // DEBUG2-NEXT: store i32 [[ADD5]], i32* [[RES]], align 4, !dbg [[DBG217]] 7647 // DEBUG2-NEXT: [[TMP21:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB17:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S5* @gs3 to i8*), i64 12, i8*** @gs3.cache.), !dbg [[DBG218:![0-9]+]] 7648 // DEBUG2-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to %struct.S5*, !dbg [[DBG218]] 7649 // DEBUG2-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP22]], i32 0, i32 0, !dbg [[DBG219:![0-9]+]] 7650 // DEBUG2-NEXT: [[TMP23:%.*]] = load i32, i32* [[A6]], align 4, !dbg [[DBG219]] 7651 // DEBUG2-NEXT: [[TMP24:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG220:![0-9]+]] 7652 // DEBUG2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP23]], !dbg [[DBG220]] 7653 // DEBUG2-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4, !dbg [[DBG220]] 7654 // DEBUG2-NEXT: [[TMP25:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB19:[0-9]+]], i32 [[TMP0]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i64 24, i8*** @arr_x.cache.), !dbg [[DBG221:![0-9]+]] 7655 // DEBUG2-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to [2 x [3 x %struct.S1]]*, !dbg [[DBG221]] 7656 // DEBUG2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP26]], i64 0, i64 1, !dbg [[DBG221]] 7657 // DEBUG2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1, !dbg [[DBG221]] 7658 // DEBUG2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX8]], i32 0, i32 0, !dbg [[DBG222:![0-9]+]] 7659 // DEBUG2-NEXT: [[TMP27:%.*]] = load i32, i32* [[A9]], align 4, !dbg [[DBG222]] 7660 // DEBUG2-NEXT: [[TMP28:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG223:![0-9]+]] 7661 // DEBUG2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP28]], [[TMP27]], !dbg [[DBG223]] 7662 // DEBUG2-NEXT: store i32 [[ADD10]], i32* [[RES]], align 4, !dbg [[DBG223]] 7663 // DEBUG2-NEXT: [[TMP29:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB21:[0-9]+]], i32 [[TMP0]], i8* bitcast (i32* @_ZN2STIiE2stE to i8*), i64 4, i8*** @_ZN2STIiE2stE.cache.), !dbg [[DBG224:![0-9]+]] 7664 // DEBUG2-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i32*, !dbg [[DBG224]] 7665 // DEBUG2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4, !dbg [[DBG224]] 7666 // DEBUG2-NEXT: [[TMP32:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG225:![0-9]+]] 7667 // DEBUG2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP32]], [[TMP31]], !dbg [[DBG225]] 7668 // DEBUG2-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4, !dbg [[DBG225]] 7669 // DEBUG2-NEXT: [[TMP33:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB23:[0-9]+]], i32 [[TMP0]], i8* bitcast (float* @_ZN2STIfE2stE to i8*), i64 4, i8*** @_ZN2STIfE2stE.cache.), !dbg [[DBG226:![0-9]+]] 7670 // DEBUG2-NEXT: [[TMP34:%.*]] = bitcast i8* [[TMP33]] to float*, !dbg [[DBG226]] 7671 // DEBUG2-NEXT: [[TMP35:%.*]] = load float, float* [[TMP34]], align 4, !dbg [[DBG226]] 7672 // DEBUG2-NEXT: [[CONV:%.*]] = fptosi float [[TMP35]] to i32, !dbg [[DBG226]] 7673 // DEBUG2-NEXT: [[TMP36:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG227:![0-9]+]] 7674 // DEBUG2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP36]], [[CONV]], !dbg [[DBG227]] 7675 // DEBUG2-NEXT: store i32 [[ADD12]], i32* [[RES]], align 4, !dbg [[DBG227]] 7676 // DEBUG2-NEXT: [[TMP37:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB25:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i64 8, i8*** @_ZN2STI2S4E2stE.cache.), !dbg [[DBG228:![0-9]+]] 7677 // DEBUG2-NEXT: [[TMP38:%.*]] = bitcast i8* [[TMP37]] to %struct.S4*, !dbg [[DBG228]] 7678 // DEBUG2-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP38]], i32 0, i32 0, !dbg [[DBG229:![0-9]+]] 7679 // DEBUG2-NEXT: [[TMP39:%.*]] = load i32, i32* [[A13]], align 4, !dbg [[DBG229]] 7680 // DEBUG2-NEXT: [[TMP40:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG230:![0-9]+]] 7681 // DEBUG2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP40]], [[TMP39]], !dbg [[DBG230]] 7682 // DEBUG2-NEXT: store i32 [[ADD14]], i32* [[RES]], align 4, !dbg [[DBG230]] 7683 // DEBUG2-NEXT: [[TMP41:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG231:![0-9]+]] 7684 // DEBUG2-NEXT: ret i32 [[TMP41]], !dbg [[DBG232:![0-9]+]] 7685 // DEBUG2: lpad: 7686 // DEBUG2-NEXT: [[TMP42:%.*]] = landingpad { i8*, i32 } 7687 // DEBUG2-NEXT: cleanup, !dbg [[DBG233:![0-9]+]] 7688 // DEBUG2-NEXT: [[TMP43:%.*]] = extractvalue { i8*, i32 } [[TMP42]], 0, !dbg [[DBG233]] 7689 // DEBUG2-NEXT: store i8* [[TMP43]], i8** [[EXN_SLOT]], align 8, !dbg [[DBG233]] 7690 // DEBUG2-NEXT: [[TMP44:%.*]] = extractvalue { i8*, i32 } [[TMP42]], 1, !dbg [[DBG233]] 7691 // DEBUG2-NEXT: store i32 [[TMP44]], i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG233]] 7692 // DEBUG2-NEXT: call void @__cxa_guard_abort(i64* @_ZGVZ4mainE2sm) #[[ATTR4]], !dbg [[DBG202]] 7693 // DEBUG2-NEXT: br label [[EH_RESUME:%.*]], !dbg [[DBG202]] 7694 // DEBUG2: eh.resume: 7695 // DEBUG2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !dbg [[DBG202]] 7696 // DEBUG2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4, !dbg [[DBG202]] 7697 // DEBUG2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0, !dbg [[DBG202]] 7698 // DEBUG2-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1, !dbg [[DBG202]] 7699 // DEBUG2-NEXT: resume { i8*, i32 } [[LPAD_VAL15]], !dbg [[DBG202]] 7700 // 7701 // 7702 // DEBUG2-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..5 7703 // DEBUG2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG234:![0-9]+]] { 7704 // DEBUG2-NEXT: entry: 7705 // DEBUG2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7706 // DEBUG2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB5:[0-9]+]]) 7707 // DEBUG2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7708 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META235:![0-9]+]], metadata !DIExpression()), !dbg [[DBG236:![0-9]+]] 7709 // DEBUG2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG237:![0-9]+]] 7710 // DEBUG2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.Smain*, !dbg [[DBG237]] 7711 // DEBUG2-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB5]], i32 [[TMP1]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.), !dbg [[DBG238:![0-9]+]] 7712 // DEBUG2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1*, !dbg [[DBG238]] 7713 // DEBUG2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0, !dbg [[DBG239:![0-9]+]] 7714 // DEBUG2-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4, !dbg [[DBG239]] 7715 // DEBUG2-NEXT: call void @_ZZ4mainEN5SmainC1Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[TMP3]], i32 [[TMP6]]), !dbg [[DBG240:![0-9]+]] 7716 // DEBUG2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG237]] 7717 // DEBUG2-NEXT: ret i8* [[TMP7]], !dbg [[DBG237]] 7718 // 7719 // 7720 // DEBUG2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC1Ei 7721 // DEBUG2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] align 2 !dbg [[DBG241:![0-9]+]] { 7722 // DEBUG2-NEXT: entry: 7723 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 7724 // DEBUG2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7725 // DEBUG2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 7726 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META242:![0-9]+]], metadata !DIExpression()), !dbg [[DBG244:![0-9]+]] 7727 // DEBUG2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7728 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META245:![0-9]+]], metadata !DIExpression()), !dbg [[DBG246:![0-9]+]] 7729 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 7730 // DEBUG2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG247:![0-9]+]] 7731 // DEBUG2-NEXT: call void @_ZZ4mainEN5SmainC2Ei(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG247]] 7732 // DEBUG2-NEXT: ret void, !dbg [[DBG248:![0-9]+]] 7733 // 7734 // 7735 // DEBUG2-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..6 7736 // DEBUG2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG249:![0-9]+]] { 7737 // DEBUG2-NEXT: entry: 7738 // DEBUG2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7739 // DEBUG2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7740 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META250:![0-9]+]], metadata !DIExpression()), !dbg [[DBG251:![0-9]+]] 7741 // DEBUG2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG251]] 7742 // DEBUG2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.Smain*, !dbg [[DBG251]] 7743 // DEBUG2-NEXT: call void @_ZZ4mainEN5SmainD1Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[TMP2]]) #[[ATTR4]], !dbg [[DBG251]] 7744 // DEBUG2-NEXT: ret void, !dbg [[DBG252:![0-9]+]] 7745 // 7746 // 7747 // DEBUG2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD1Ev 7748 // DEBUG2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] align 2 !dbg [[DBG253:![0-9]+]] { 7749 // DEBUG2-NEXT: entry: 7750 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 7751 // DEBUG2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 7752 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META254:![0-9]+]], metadata !DIExpression()), !dbg [[DBG255:![0-9]+]] 7753 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 7754 // DEBUG2-NEXT: call void @_ZZ4mainEN5SmainD2Ev(%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR4]], !dbg [[DBG256:![0-9]+]] 7755 // DEBUG2-NEXT: ret void, !dbg [[DBG257:![0-9]+]] 7756 // 7757 // 7758 // DEBUG2-LABEL: define {{[^@]+}}@_Z6foobarv 7759 // DEBUG2-SAME: () #[[ATTR6:[0-9]+]] !dbg [[DBG258:![0-9]+]] { 7760 // DEBUG2-NEXT: entry: 7761 // DEBUG2-NEXT: [[RES:%.*]] = alloca i32, align 4 7762 // DEBUG2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB27:[0-9]+]]) 7763 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i32* [[RES]], metadata [[META259:![0-9]+]], metadata !DIExpression()), !dbg [[DBG260:![0-9]+]] 7764 // DEBUG2-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB27]], i32 [[TMP0]], i8* bitcast (%struct.S3* @_ZN6Static1sE to i8*), i64 8, i8*** @_ZN6Static1sE.cache.), !dbg [[DBG261:![0-9]+]] 7765 // DEBUG2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S3*, !dbg [[DBG261]] 7766 // DEBUG2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S3:%.*]], %struct.S3* [[TMP2]], i32 0, i32 0, !dbg [[DBG262:![0-9]+]] 7767 // DEBUG2-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4, !dbg [[DBG262]] 7768 // DEBUG2-NEXT: store i32 [[TMP3]], i32* [[RES]], align 4, !dbg [[DBG263:![0-9]+]] 7769 // DEBUG2-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB29:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S1* @_ZL3gs1 to i8*), i64 4, i8*** @_ZL3gs1.cache.), !dbg [[DBG264:![0-9]+]] 7770 // DEBUG2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct.S1*, !dbg [[DBG264]] 7771 // DEBUG2-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP5]], i32 0, i32 0, !dbg [[DBG265:![0-9]+]] 7772 // DEBUG2-NEXT: [[TMP6:%.*]] = load i32, i32* [[A1]], align 4, !dbg [[DBG265]] 7773 // DEBUG2-NEXT: [[TMP7:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG266:![0-9]+]] 7774 // DEBUG2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], [[TMP6]], !dbg [[DBG266]] 7775 // DEBUG2-NEXT: store i32 [[ADD]], i32* [[RES]], align 4, !dbg [[DBG266]] 7776 // DEBUG2-NEXT: [[TMP8:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S2:%.*]], %struct.S2* @_ZL3gs2, i32 0, i32 0), align 8, !dbg [[DBG267:![0-9]+]] 7777 // DEBUG2-NEXT: [[TMP9:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG268:![0-9]+]] 7778 // DEBUG2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], [[TMP8]], !dbg [[DBG268]] 7779 // DEBUG2-NEXT: store i32 [[ADD2]], i32* [[RES]], align 4, !dbg [[DBG268]] 7780 // DEBUG2-NEXT: [[TMP10:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB31:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S5* @gs3 to i8*), i64 12, i8*** @gs3.cache.), !dbg [[DBG269:![0-9]+]] 7781 // DEBUG2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to %struct.S5*, !dbg [[DBG269]] 7782 // DEBUG2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S5:%.*]], %struct.S5* [[TMP11]], i32 0, i32 0, !dbg [[DBG270:![0-9]+]] 7783 // DEBUG2-NEXT: [[TMP12:%.*]] = load i32, i32* [[A3]], align 4, !dbg [[DBG270]] 7784 // DEBUG2-NEXT: [[TMP13:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG271:![0-9]+]] 7785 // DEBUG2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP12]], !dbg [[DBG271]] 7786 // DEBUG2-NEXT: store i32 [[ADD4]], i32* [[RES]], align 4, !dbg [[DBG271]] 7787 // DEBUG2-NEXT: [[TMP14:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB33:[0-9]+]], i32 [[TMP0]], i8* bitcast ([2 x [3 x %struct.S1]]* @arr_x to i8*), i64 24, i8*** @arr_x.cache.), !dbg [[DBG272:![0-9]+]] 7788 // DEBUG2-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to [2 x [3 x %struct.S1]]*, !dbg [[DBG272]] 7789 // DEBUG2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x [3 x %struct.S1]], [2 x [3 x %struct.S1]]* [[TMP15]], i64 0, i64 1, !dbg [[DBG272]] 7790 // DEBUG2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [3 x %struct.S1], [3 x %struct.S1]* [[ARRAYIDX]], i64 0, i64 1, !dbg [[DBG272]] 7791 // DEBUG2-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[ARRAYIDX5]], i32 0, i32 0, !dbg [[DBG273:![0-9]+]] 7792 // DEBUG2-NEXT: [[TMP16:%.*]] = load i32, i32* [[A6]], align 4, !dbg [[DBG273]] 7793 // DEBUG2-NEXT: [[TMP17:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG274:![0-9]+]] 7794 // DEBUG2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP16]], !dbg [[DBG274]] 7795 // DEBUG2-NEXT: store i32 [[ADD7]], i32* [[RES]], align 4, !dbg [[DBG274]] 7796 // DEBUG2-NEXT: [[TMP18:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB35:[0-9]+]], i32 [[TMP0]], i8* bitcast (i32* @_ZN2STIiE2stE to i8*), i64 4, i8*** @_ZN2STIiE2stE.cache.), !dbg [[DBG275:![0-9]+]] 7797 // DEBUG2-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to i32*, !dbg [[DBG275]] 7798 // DEBUG2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4, !dbg [[DBG275]] 7799 // DEBUG2-NEXT: [[TMP21:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG276:![0-9]+]] 7800 // DEBUG2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], [[TMP20]], !dbg [[DBG276]] 7801 // DEBUG2-NEXT: store i32 [[ADD8]], i32* [[RES]], align 4, !dbg [[DBG276]] 7802 // DEBUG2-NEXT: [[TMP22:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB37:[0-9]+]], i32 [[TMP0]], i8* bitcast (float* @_ZN2STIfE2stE to i8*), i64 4, i8*** @_ZN2STIfE2stE.cache.), !dbg [[DBG277:![0-9]+]] 7803 // DEBUG2-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to float*, !dbg [[DBG277]] 7804 // DEBUG2-NEXT: [[TMP24:%.*]] = load float, float* [[TMP23]], align 4, !dbg [[DBG277]] 7805 // DEBUG2-NEXT: [[CONV:%.*]] = fptosi float [[TMP24]] to i32, !dbg [[DBG277]] 7806 // DEBUG2-NEXT: [[TMP25:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG278:![0-9]+]] 7807 // DEBUG2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[CONV]], !dbg [[DBG278]] 7808 // DEBUG2-NEXT: store i32 [[ADD9]], i32* [[RES]], align 4, !dbg [[DBG278]] 7809 // DEBUG2-NEXT: [[TMP26:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB39:[0-9]+]], i32 [[TMP0]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i64 8, i8*** @_ZN2STI2S4E2stE.cache.), !dbg [[DBG279:![0-9]+]] 7810 // DEBUG2-NEXT: [[TMP27:%.*]] = bitcast i8* [[TMP26]] to %struct.S4*, !dbg [[DBG279]] 7811 // DEBUG2-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[TMP27]], i32 0, i32 0, !dbg [[DBG280:![0-9]+]] 7812 // DEBUG2-NEXT: [[TMP28:%.*]] = load i32, i32* [[A10]], align 4, !dbg [[DBG280]] 7813 // DEBUG2-NEXT: [[TMP29:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG281:![0-9]+]] 7814 // DEBUG2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], [[TMP28]], !dbg [[DBG281]] 7815 // DEBUG2-NEXT: store i32 [[ADD11]], i32* [[RES]], align 4, !dbg [[DBG281]] 7816 // DEBUG2-NEXT: [[TMP30:%.*]] = load i32, i32* [[RES]], align 4, !dbg [[DBG282:![0-9]+]] 7817 // DEBUG2-NEXT: ret i32 [[TMP30]], !dbg [[DBG283:![0-9]+]] 7818 // 7819 // 7820 // DEBUG2-LABEL: define {{[^@]+}}@__cxx_global_var_init.7 7821 // DEBUG2-SAME: () #[[ATTR0]] comdat($_ZN2STI2S4E2stE) !dbg [[DBG284:![0-9]+]] { 7822 // DEBUG2-NEXT: entry: 7823 // DEBUG2-NEXT: [[TMP0:%.*]] = load i8, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG285:![0-9]+]] 7824 // DEBUG2-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0, !dbg [[DBG285]] 7825 // DEBUG2-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !dbg [[DBG285]] 7826 // DEBUG2: init.check: 7827 // DEBUG2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB41:[0-9]+]]), !dbg [[DBG285]] 7828 // DEBUG2-NEXT: call void @__kmpc_threadprivate_register(%struct.ident_t* @[[GLOB41]], i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* (i8*)* @.__kmpc_global_ctor_..8, i8* (i8*, i8*)* null, void (i8*)* @.__kmpc_global_dtor_..9), !dbg [[DBG285]] 7829 // DEBUG2-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) @_ZN2STI2S4E2stE, i32 23), !dbg [[DBG286:![0-9]+]] 7830 // DEBUG2-NEXT: [[TMP2:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S4*)* @_ZN2S4D1Ev to void (i8*)*), i8* bitcast (%struct.S4* @_ZN2STI2S4E2stE to i8*), i8* @__dso_handle) #[[ATTR4]], !dbg [[DBG285]] 7831 // DEBUG2-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN2STI2S4E2stE to i8*), align 8, !dbg [[DBG285]] 7832 // DEBUG2-NEXT: br label [[INIT_END]], !dbg [[DBG285]] 7833 // DEBUG2: init.end: 7834 // DEBUG2-NEXT: ret void, !dbg [[DBG288:![0-9]+]] 7835 // 7836 // 7837 // DEBUG2-LABEL: define {{[^@]+}}@.__kmpc_global_ctor_..8 7838 // DEBUG2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG289:![0-9]+]] { 7839 // DEBUG2-NEXT: entry: 7840 // DEBUG2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7841 // DEBUG2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7842 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META290:![0-9]+]], metadata !DIExpression()), !dbg [[DBG291:![0-9]+]] 7843 // DEBUG2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG292:![0-9]+]] 7844 // DEBUG2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S4*, !dbg [[DBG292]] 7845 // DEBUG2-NEXT: call void @_ZN2S4C1Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[TMP2]], i32 23), !dbg [[DBG293:![0-9]+]] 7846 // DEBUG2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG292]] 7847 // DEBUG2-NEXT: ret i8* [[TMP3]], !dbg [[DBG292]] 7848 // 7849 // 7850 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S4C1Ei 7851 // DEBUG2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 !dbg [[DBG294:![0-9]+]] { 7852 // DEBUG2-NEXT: entry: 7853 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 7854 // DEBUG2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7855 // DEBUG2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 7856 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META295:![0-9]+]], metadata !DIExpression()), !dbg [[DBG297:![0-9]+]] 7857 // DEBUG2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7858 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META298:![0-9]+]], metadata !DIExpression()), !dbg [[DBG299:![0-9]+]] 7859 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 7860 // DEBUG2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG300:![0-9]+]] 7861 // DEBUG2-NEXT: call void @_ZN2S4C2Ei(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]], i32 [[TMP0]]), !dbg [[DBG300]] 7862 // DEBUG2-NEXT: ret void, !dbg [[DBG301:![0-9]+]] 7863 // 7864 // 7865 // DEBUG2-LABEL: define {{[^@]+}}@.__kmpc_global_dtor_..9 7866 // DEBUG2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] !dbg [[DBG302:![0-9]+]] { 7867 // DEBUG2-NEXT: entry: 7868 // DEBUG2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 7869 // DEBUG2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 7870 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i8** [[DOTADDR]], metadata [[META303:![0-9]+]], metadata !DIExpression()), !dbg [[DBG304:![0-9]+]] 7871 // DEBUG2-NEXT: [[TMP1:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !dbg [[DBG304]] 7872 // DEBUG2-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct.S4*, !dbg [[DBG304]] 7873 // DEBUG2-NEXT: call void @_ZN2S4D1Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[TMP2]]) #[[ATTR4]], !dbg [[DBG304]] 7874 // DEBUG2-NEXT: ret void, !dbg [[DBG305:![0-9]+]] 7875 // 7876 // 7877 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S4D1Ev 7878 // DEBUG2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG306:![0-9]+]] { 7879 // DEBUG2-NEXT: entry: 7880 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 7881 // DEBUG2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 7882 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META307:![0-9]+]], metadata !DIExpression()), !dbg [[DBG308:![0-9]+]] 7883 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 7884 // DEBUG2-NEXT: call void @_ZN2S4D2Ev(%struct.S4* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR4]], !dbg [[DBG309:![0-9]+]] 7885 // DEBUG2-NEXT: ret void, !dbg [[DBG310:![0-9]+]] 7886 // 7887 // 7888 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S1C2Ei 7889 // DEBUG2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG311:![0-9]+]] { 7890 // DEBUG2-NEXT: entry: 7891 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 7892 // DEBUG2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7893 // DEBUG2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 7894 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META312:![0-9]+]], metadata !DIExpression()), !dbg [[DBG313:![0-9]+]] 7895 // DEBUG2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7896 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META314:![0-9]+]], metadata !DIExpression()), !dbg [[DBG315:![0-9]+]] 7897 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 7898 // DEBUG2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG316:![0-9]+]] 7899 // DEBUG2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG317:![0-9]+]] 7900 // DEBUG2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG316]] 7901 // DEBUG2-NEXT: ret void, !dbg [[DBG318:![0-9]+]] 7902 // 7903 // 7904 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S1D2Ev 7905 // DEBUG2-SAME: (%struct.S1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG319:![0-9]+]] { 7906 // DEBUG2-NEXT: entry: 7907 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 7908 // DEBUG2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 7909 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S1** [[THIS_ADDR]], metadata [[META320:![0-9]+]], metadata !DIExpression()), !dbg [[DBG321:![0-9]+]] 7910 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 7911 // DEBUG2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0, !dbg [[DBG322:![0-9]+]] 7912 // DEBUG2-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG324:![0-9]+]] 7913 // DEBUG2-NEXT: ret void, !dbg [[DBG325:![0-9]+]] 7914 // 7915 // 7916 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S2C2Ei 7917 // DEBUG2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG326:![0-9]+]] { 7918 // DEBUG2-NEXT: entry: 7919 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 7920 // DEBUG2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7921 // DEBUG2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 7922 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META327:![0-9]+]], metadata !DIExpression()), !dbg [[DBG328:![0-9]+]] 7923 // DEBUG2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7924 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META329:![0-9]+]], metadata !DIExpression()), !dbg [[DBG330:![0-9]+]] 7925 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 7926 // DEBUG2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG331:![0-9]+]] 7927 // DEBUG2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG332:![0-9]+]] 7928 // DEBUG2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG331]] 7929 // DEBUG2-NEXT: ret void, !dbg [[DBG333:![0-9]+]] 7930 // 7931 // 7932 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S2D2Ev 7933 // DEBUG2-SAME: (%struct.S2* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG334:![0-9]+]] { 7934 // DEBUG2-NEXT: entry: 7935 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S2*, align 8 7936 // DEBUG2-NEXT: store %struct.S2* [[THIS]], %struct.S2** [[THIS_ADDR]], align 8 7937 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S2** [[THIS_ADDR]], metadata [[META335:![0-9]+]], metadata !DIExpression()), !dbg [[DBG336:![0-9]+]] 7938 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S2*, %struct.S2** [[THIS_ADDR]], align 8 7939 // DEBUG2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S2:%.*]], %struct.S2* [[THIS1]], i32 0, i32 0, !dbg [[DBG337:![0-9]+]] 7940 // DEBUG2-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG339:![0-9]+]] 7941 // DEBUG2-NEXT: ret void, !dbg [[DBG340:![0-9]+]] 7942 // 7943 // 7944 // DEBUG2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainC2Ei 7945 // DEBUG2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] align 2 !dbg [[DBG341:![0-9]+]] { 7946 // DEBUG2-NEXT: entry: 7947 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 7948 // DEBUG2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7949 // DEBUG2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 7950 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META342:![0-9]+]], metadata !DIExpression()), !dbg [[DBG343:![0-9]+]] 7951 // DEBUG2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7952 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META344:![0-9]+]], metadata !DIExpression()), !dbg [[DBG345:![0-9]+]] 7953 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 7954 // DEBUG2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG346:![0-9]+]] 7955 // DEBUG2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG347:![0-9]+]] 7956 // DEBUG2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 8, !dbg [[DBG346]] 7957 // DEBUG2-NEXT: ret void, !dbg [[DBG348:![0-9]+]] 7958 // 7959 // 7960 // DEBUG2-LABEL: define {{[^@]+}}@_ZZ4mainEN5SmainD2Ev 7961 // DEBUG2-SAME: (%struct.Smain* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] align 2 !dbg [[DBG349:![0-9]+]] { 7962 // DEBUG2-NEXT: entry: 7963 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.Smain*, align 8 7964 // DEBUG2-NEXT: store %struct.Smain* [[THIS]], %struct.Smain** [[THIS_ADDR]], align 8 7965 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.Smain** [[THIS_ADDR]], metadata [[META350:![0-9]+]], metadata !DIExpression()), !dbg [[DBG351:![0-9]+]] 7966 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.Smain*, %struct.Smain** [[THIS_ADDR]], align 8 7967 // DEBUG2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SMAIN:%.*]], %struct.Smain* [[THIS1]], i32 0, i32 0, !dbg [[DBG352:![0-9]+]] 7968 // DEBUG2-NEXT: store i32 0, i32* [[A]], align 8, !dbg [[DBG354:![0-9]+]] 7969 // DEBUG2-NEXT: ret void, !dbg [[DBG355:![0-9]+]] 7970 // 7971 // 7972 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S4C2Ei 7973 // DEBUG2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG356:![0-9]+]] { 7974 // DEBUG2-NEXT: entry: 7975 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 7976 // DEBUG2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 7977 // DEBUG2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 7978 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META357:![0-9]+]], metadata !DIExpression()), !dbg [[DBG358:![0-9]+]] 7979 // DEBUG2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 7980 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata i32* [[A_ADDR]], metadata [[META359:![0-9]+]], metadata !DIExpression()), !dbg [[DBG360:![0-9]+]] 7981 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 7982 // DEBUG2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG361:![0-9]+]] 7983 // DEBUG2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4, !dbg [[DBG362:![0-9]+]] 7984 // DEBUG2-NEXT: store i32 [[TMP0]], i32* [[A2]], align 4, !dbg [[DBG361]] 7985 // DEBUG2-NEXT: ret void, !dbg [[DBG363:![0-9]+]] 7986 // 7987 // 7988 // DEBUG2-LABEL: define {{[^@]+}}@_ZN2S4D2Ev 7989 // DEBUG2-SAME: (%struct.S4* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 !dbg [[DBG364:![0-9]+]] { 7990 // DEBUG2-NEXT: entry: 7991 // DEBUG2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S4*, align 8 7992 // DEBUG2-NEXT: store %struct.S4* [[THIS]], %struct.S4** [[THIS_ADDR]], align 8 7993 // DEBUG2-NEXT: call void @llvm.dbg.declare(metadata %struct.S4** [[THIS_ADDR]], metadata [[META365:![0-9]+]], metadata !DIExpression()), !dbg [[DBG366:![0-9]+]] 7994 // DEBUG2-NEXT: [[THIS1:%.*]] = load %struct.S4*, %struct.S4** [[THIS_ADDR]], align 8 7995 // DEBUG2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S4:%.*]], %struct.S4* [[THIS1]], i32 0, i32 0, !dbg [[DBG367:![0-9]+]] 7996 // DEBUG2-NEXT: store i32 0, i32* [[A]], align 4, !dbg [[DBG369:![0-9]+]] 7997 // DEBUG2-NEXT: ret void, !dbg [[DBG370:![0-9]+]] 7998 // 7999 // 8000 // DEBUG2-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_threadprivate_codegen.cpp 8001 // DEBUG2-SAME: () #[[ATTR0]] !dbg [[DBG371:![0-9]+]] { 8002 // DEBUG2-NEXT: entry: 8003 // DEBUG2-NEXT: call void @__cxx_global_var_init(), !dbg [[DBG372:![0-9]+]] 8004 // DEBUG2-NEXT: call void @__cxx_global_var_init.1(), !dbg [[DBG372]] 8005 // DEBUG2-NEXT: call void @__cxx_global_var_init.2(), !dbg [[DBG372]] 8006 // DEBUG2-NEXT: ret void 8007 // 8008