1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test host codegen. 3 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 5 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 6 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 8 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 9 10 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 12 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 15 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 17 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 18 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 19 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 20 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 21 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 22 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 23 24 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 26 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 28 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 29 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 30 31 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK17 32 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 33 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK17 34 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK19 35 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 36 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK19 37 38 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 39 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 40 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 41 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 42 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 43 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -DARRAY -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 44 // expected-no-diagnostics 45 #ifndef HEADER 46 #define HEADER 47 #ifndef ARRAY 48 struct St { 49 int a, b; 50 St() : a(0), b(0) {} 51 St(const St &st) : a(st.a + st.b), b(0) {} 52 ~St() {} 53 }; 54 55 volatile int g __attribute__((aligned(128))) = 1212; 56 57 template <class T> 58 struct S { 59 T f; 60 S(T a) : f(a + g) {} 61 S() : f(g) {} 62 S(const S &s, St t = St()) : f(s.f + t.a) {} 63 operator T() { return T(); } 64 ~S() {} 65 }; 66 67 68 template <typename T> 69 T tmain() { 70 S<T> test; 71 T t_var __attribute__((aligned(128))) = T(); 72 T vec[] __attribute__((aligned(128))) = {1, 2}; 73 S<T> s_arr[] __attribute__((aligned(128))) = {1, 2}; 74 S<T> var __attribute__((aligned(128))) (3); 75 #pragma omp target 76 #pragma omp teams firstprivate(t_var, vec, s_arr, var) 77 { 78 vec[0] = t_var; 79 s_arr[0] = var; 80 } 81 #pragma omp target 82 #pragma omp teams firstprivate(t_var) 83 {} 84 return T(); 85 } 86 87 int main() { 88 static int sivar; 89 #ifdef LAMBDA 90 [&]() { 91 #pragma omp target 92 #pragma omp teams firstprivate(g, sivar) 93 { 94 g = 1; 95 sivar = 2; 96 [&]() { 97 g = 2; 98 sivar = 4; 99 }(); 100 } 101 }(); 102 return 0; 103 #else 104 S<float> test; 105 int t_var = 0; 106 int vec[] = {1, 2}; 107 S<float> s_arr[] = {1, 2}; 108 S<float> var(3); 109 #pragma omp target 110 #pragma omp teams firstprivate(t_var, vec, s_arr, var, sivar) 111 { 112 vec[0] = t_var; 113 s_arr[0] = var; 114 sivar = 2; 115 } 116 #pragma omp target 117 #pragma omp teams firstprivate(t_var) 118 {} 119 return tmain<int>(); 120 #endif 121 } 122 123 124 125 126 127 128 129 130 131 132 133 134 135 #else 136 struct St { 137 int a, b; 138 St() : a(0), b(0) {} 139 St(const St &) { } 140 ~St() {} 141 void St_func(St s[2], int n, long double vla1[n]) { 142 double vla2[n][n] __attribute__((aligned(128))); 143 a = b; 144 #pragma omp target 145 #pragma omp teams firstprivate(s, vla1, vla2) 146 vla1[b] = vla2[1][n - 1] = a = b; 147 } 148 }; 149 150 void array_func(float a[3], St s[2], int n, long double vla1[n]) { 151 double vla2[n][n] __attribute__((aligned(128))); 152 #pragma omp target 153 #pragma omp teams firstprivate(a, s, vla1, vla2) 154 s[0].St_func(s, n, vla1); 155 ; 156 } 157 158 #endif 159 #endif 160 // CHECK1-LABEL: define {{[^@]+}}@main 161 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 162 // CHECK1-NEXT: entry: 163 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 165 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 166 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 167 // CHECK1-NEXT: ret i32 0 168 // 169 // 170 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l91 171 // CHECK1-SAME: (i32* nonnull align 4 dereferenceable(4) [[G:%.*]], i64 [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 172 // CHECK1-NEXT: entry: 173 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 174 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 175 // CHECK1-NEXT: [[G1:%.*]] = alloca i32, align 128 176 // CHECK1-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 177 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 178 // CHECK1-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 179 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[G_ADDR]], align 8 180 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 181 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 128 182 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[G1]], align 128 183 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 184 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32* 185 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4 186 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8 187 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[G1]], i64 [[TMP3]]) 188 // CHECK1-NEXT: ret void 189 // 190 // 191 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 192 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[G:%.*]], i64 [[SIVAR:%.*]]) #[[ATTR2]] { 193 // CHECK1-NEXT: entry: 194 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 195 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 196 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 197 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 198 // CHECK1-NEXT: [[G1:%.*]] = alloca i32, align 128 199 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 200 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 201 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 202 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 203 // CHECK1-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 204 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[G_ADDR]], align 8 205 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 206 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 128 207 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[G1]], align 128 208 // CHECK1-NEXT: store i32 1, i32* [[G1]], align 128 209 // CHECK1-NEXT: store i32 2, i32* [[CONV]], align 4 210 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 211 // CHECK1-NEXT: store i32* [[G1]], i32** [[TMP2]], align 8 212 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 213 // CHECK1-NEXT: store i32* [[CONV]], i32** [[TMP3]], align 8 214 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 215 // CHECK1-NEXT: ret void 216 // 217 // 218 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 219 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 220 // CHECK1-NEXT: entry: 221 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 222 // CHECK1-NEXT: ret void 223 // 224 // 225 // CHECK3-LABEL: define {{[^@]+}}@main 226 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 227 // CHECK3-NEXT: entry: 228 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 229 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 230 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 231 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 232 // CHECK3-NEXT: ret i32 0 233 // 234 // 235 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l91 236 // CHECK3-SAME: (i32* nonnull align 4 dereferenceable(4) [[G:%.*]], i32 [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 237 // CHECK3-NEXT: entry: 238 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 239 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4 240 // CHECK3-NEXT: [[G1:%.*]] = alloca i32, align 128 241 // CHECK3-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4 242 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 243 // CHECK3-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4 244 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[G_ADDR]], align 4 245 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 128 246 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[G1]], align 128 247 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[SIVAR_ADDR]], align 4 248 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[SIVAR_CASTED]], align 4 249 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4 250 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[G1]], i32 [[TMP3]]) 251 // CHECK3-NEXT: ret void 252 // 253 // 254 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 255 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[G:%.*]], i32 [[SIVAR:%.*]]) #[[ATTR2]] { 256 // CHECK3-NEXT: entry: 257 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 258 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 259 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 260 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4 261 // CHECK3-NEXT: [[G1:%.*]] = alloca i32, align 128 262 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 263 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 264 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 265 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 266 // CHECK3-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4 267 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[G_ADDR]], align 4 268 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 128 269 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[G1]], align 128 270 // CHECK3-NEXT: store i32 1, i32* [[G1]], align 128 271 // CHECK3-NEXT: store i32 2, i32* [[SIVAR_ADDR]], align 4 272 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 273 // CHECK3-NEXT: store i32* [[G1]], i32** [[TMP2]], align 4 274 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 275 // CHECK3-NEXT: store i32* [[SIVAR_ADDR]], i32** [[TMP3]], align 4 276 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 277 // CHECK3-NEXT: ret void 278 // 279 // 280 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 281 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 282 // CHECK3-NEXT: entry: 283 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 284 // CHECK3-NEXT: ret void 285 // 286 // 287 // CHECK9-LABEL: define {{[^@]+}}@main 288 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 289 // CHECK9-NEXT: entry: 290 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 291 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 292 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 293 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 294 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 295 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 296 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 297 // CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 298 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 299 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 300 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 301 // CHECK9-NEXT: [[T_VAR_CASTED2:%.*]] = alloca i64, align 8 302 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8 303 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8 304 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8 305 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 306 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 307 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 308 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 309 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 310 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 311 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 312 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 313 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 314 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 315 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 316 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 317 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 318 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 319 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 320 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32* 321 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 322 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8 323 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 324 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 325 // CHECK9-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8 326 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 327 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 328 // CHECK9-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 329 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 330 // CHECK9-NEXT: store i8* null, i8** [[TMP9]], align 8 331 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 332 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to [2 x i32]** 333 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP11]], align 8 334 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 335 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 336 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 337 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 338 // CHECK9-NEXT: store i8* null, i8** [[TMP14]], align 8 339 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 340 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S]** 341 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP16]], align 8 342 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 343 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]** 344 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 8 345 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 346 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8 347 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 348 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S** 349 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP21]], align 8 350 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 351 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S** 352 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP23]], align 8 353 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 354 // CHECK9-NEXT: store i8* null, i8** [[TMP24]], align 8 355 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 356 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 357 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP26]], align 8 358 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 359 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 360 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP28]], align 8 361 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 362 // CHECK9-NEXT: store i8* null, i8** [[TMP29]], align 8 363 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 364 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 365 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 366 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 367 // CHECK9-NEXT: store i32 1, i32* [[TMP32]], align 4 368 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 369 // CHECK9-NEXT: store i32 5, i32* [[TMP33]], align 4 370 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 371 // CHECK9-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8 372 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 373 // CHECK9-NEXT: store i8** [[TMP31]], i8*** [[TMP35]], align 8 374 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 375 // CHECK9-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP36]], align 8 376 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 377 // CHECK9-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP37]], align 8 378 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 379 // CHECK9-NEXT: store i8** null, i8*** [[TMP38]], align 8 380 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 381 // CHECK9-NEXT: store i8** null, i8*** [[TMP39]], align 8 382 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 383 // CHECK9-NEXT: store i64 0, i64* [[TMP40]], align 8 384 // CHECK9-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l109.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 385 // CHECK9-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 386 // CHECK9-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 387 // CHECK9: omp_offload.failed: 388 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l109(i64 [[TMP2]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i64 [[TMP4]]) #[[ATTR4:[0-9]+]] 389 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 390 // CHECK9: omp_offload.cont: 391 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[T_VAR]], align 4 392 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[T_VAR_CASTED2]] to i32* 393 // CHECK9-NEXT: store i32 [[TMP43]], i32* [[CONV3]], align 4 394 // CHECK9-NEXT: [[TMP44:%.*]] = load i64, i64* [[T_VAR_CASTED2]], align 8 395 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 396 // CHECK9-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 397 // CHECK9-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 398 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 399 // CHECK9-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 400 // CHECK9-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 401 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 402 // CHECK9-NEXT: store i8* null, i8** [[TMP49]], align 8 403 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 404 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 405 // CHECK9-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 406 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0 407 // CHECK9-NEXT: store i32 1, i32* [[TMP52]], align 4 408 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1 409 // CHECK9-NEXT: store i32 1, i32* [[TMP53]], align 4 410 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2 411 // CHECK9-NEXT: store i8** [[TMP50]], i8*** [[TMP54]], align 8 412 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3 413 // CHECK9-NEXT: store i8** [[TMP51]], i8*** [[TMP55]], align 8 414 // CHECK9-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4 415 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP56]], align 8 416 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5 417 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP57]], align 8 418 // CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6 419 // CHECK9-NEXT: store i8** null, i8*** [[TMP58]], align 8 420 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7 421 // CHECK9-NEXT: store i8** null, i8*** [[TMP59]], align 8 422 // CHECK9-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8 423 // CHECK9-NEXT: store i64 0, i64* [[TMP60]], align 8 424 // CHECK9-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]]) 425 // CHECK9-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 426 // CHECK9-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 427 // CHECK9: omp_offload.failed8: 428 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116(i64 [[TMP44]]) #[[ATTR4]] 429 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT9]] 430 // CHECK9: omp_offload.cont9: 431 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 432 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 433 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 434 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 435 // CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 436 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 437 // CHECK9: arraydestroy.body: 438 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP63]], [[OMP_OFFLOAD_CONT9]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 439 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 440 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 441 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 442 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 443 // CHECK9: arraydestroy.done10: 444 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 445 // CHECK9-NEXT: [[TMP64:%.*]] = load i32, i32* [[RETVAL]], align 4 446 // CHECK9-NEXT: ret i32 [[TMP64]] 447 // 448 // 449 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 450 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 451 // CHECK9-NEXT: entry: 452 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 453 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 454 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 455 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 456 // CHECK9-NEXT: ret void 457 // 458 // 459 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 460 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 461 // CHECK9-NEXT: entry: 462 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 463 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 464 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 465 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 466 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 467 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 468 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 469 // CHECK9-NEXT: ret void 470 // 471 // 472 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l109 473 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] { 474 // CHECK9-NEXT: entry: 475 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 476 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 477 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 478 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 479 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 480 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 481 // CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 482 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 483 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 484 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 485 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 486 // CHECK9-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 487 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 488 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 489 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 490 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 491 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 492 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 493 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 494 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 495 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 496 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 4 497 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32* 498 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV3]], align 4 499 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8 500 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP2]], i64 [[TMP6]]) 501 // CHECK9-NEXT: ret void 502 // 503 // 504 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 505 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SIVAR:%.*]]) #[[ATTR3]] { 506 // CHECK9-NEXT: entry: 507 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 508 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 509 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 510 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 511 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 512 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 513 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 514 // CHECK9-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 515 // CHECK9-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 516 // CHECK9-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 517 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 518 // CHECK9-NEXT: [[AGG_TMP6:%.*]] = alloca [[STRUCT_ST]], align 4 519 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 520 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 521 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 522 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 523 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 524 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 525 // CHECK9-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 526 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 527 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 528 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 529 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 530 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 531 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 532 // CHECK9-NEXT: [[TMP4:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 533 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP3]], i8* align 4 [[TMP4]], i64 8, i1 false) 534 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 535 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S* 536 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 537 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP6]] 538 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 539 // CHECK9: omp.arraycpy.body: 540 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 541 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 542 // CHECK9-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 543 // CHECK9-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 544 // CHECK9-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 545 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 546 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 547 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]] 548 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 549 // CHECK9: omp.arraycpy.done4: 550 // CHECK9-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP6]]) 551 // CHECK9-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP2]], %struct.St* [[AGG_TMP6]]) 552 // CHECK9-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]] 553 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 554 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0 555 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[ARRAYIDX]], align 4 556 // CHECK9-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 0 557 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast %struct.S* [[ARRAYIDX7]] to i8* 558 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[VAR5]] to i8* 559 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP8]], i8* align 4 [[TMP9]], i64 4, i1 false) 560 // CHECK9-NEXT: store i32 2, i32* [[CONV1]], align 4 561 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 562 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 563 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2 564 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 565 // CHECK9: arraydestroy.body: 566 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP10]], [[OMP_ARRAYCPY_DONE4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 567 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 568 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 569 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 570 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 571 // CHECK9: arraydestroy.done9: 572 // CHECK9-NEXT: ret void 573 // 574 // 575 // CHECK9-LABEL: define {{[^@]+}}@_ZN2StC1Ev 576 // CHECK9-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 577 // CHECK9-NEXT: entry: 578 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 579 // CHECK9-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 580 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 581 // CHECK9-NEXT: call void @_ZN2StC2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) 582 // CHECK9-NEXT: ret void 583 // 584 // 585 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1ERKS0_2St 586 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 587 // CHECK9-NEXT: entry: 588 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 589 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 8 590 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 591 // CHECK9-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 8 592 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 593 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 8 594 // CHECK9-NEXT: call void @_ZN1SIfEC2ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 595 // CHECK9-NEXT: ret void 596 // 597 // 598 // CHECK9-LABEL: define {{[^@]+}}@_ZN2StD1Ev 599 // CHECK9-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 600 // CHECK9-NEXT: entry: 601 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 602 // CHECK9-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 603 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 604 // CHECK9-NEXT: call void @_ZN2StD2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR4]] 605 // CHECK9-NEXT: ret void 606 // 607 // 608 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 609 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 610 // CHECK9-NEXT: entry: 611 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 612 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 613 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 614 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 615 // CHECK9-NEXT: ret void 616 // 617 // 618 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116 619 // CHECK9-SAME: (i64 [[T_VAR:%.*]]) #[[ATTR3]] { 620 // CHECK9-NEXT: entry: 621 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 622 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 623 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 624 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 625 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 626 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 627 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4 628 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 629 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 630 // CHECK9-NEXT: ret void 631 // 632 // 633 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 634 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[T_VAR:%.*]]) #[[ATTR3]] { 635 // CHECK9-NEXT: entry: 636 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 637 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 638 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 639 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 640 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 641 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 642 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 643 // CHECK9-NEXT: ret void 644 // 645 // 646 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 647 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 648 // CHECK9-NEXT: entry: 649 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 650 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 651 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 652 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 653 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 654 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 655 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 656 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 657 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 658 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 659 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 660 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 661 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 662 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 128 663 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 664 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 665 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 666 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 667 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 668 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 669 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 signext 3) 670 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 671 // CHECK9-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32** 672 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 8 673 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 674 // CHECK9-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 675 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[TMP4]], align 8 676 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 677 // CHECK9-NEXT: store i8* null, i8** [[TMP5]], align 8 678 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 679 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to [2 x i32]** 680 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP7]], align 8 681 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 682 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to [2 x i32]** 683 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP9]], align 8 684 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 685 // CHECK9-NEXT: store i8* null, i8** [[TMP10]], align 8 686 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 687 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [2 x %struct.S.0]** 688 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP12]], align 8 689 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 690 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to [2 x %struct.S.0]** 691 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP14]], align 8 692 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 693 // CHECK9-NEXT: store i8* null, i8** [[TMP15]], align 8 694 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 695 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to %struct.S.0** 696 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[TMP17]], align 8 697 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 698 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.S.0** 699 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[TMP19]], align 8 700 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 701 // CHECK9-NEXT: store i8* null, i8** [[TMP20]], align 8 702 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 703 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 704 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 705 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 706 // CHECK9-NEXT: store i32 1, i32* [[TMP23]], align 4 707 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 708 // CHECK9-NEXT: store i32 4, i32* [[TMP24]], align 4 709 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 710 // CHECK9-NEXT: store i8** [[TMP21]], i8*** [[TMP25]], align 8 711 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 712 // CHECK9-NEXT: store i8** [[TMP22]], i8*** [[TMP26]], align 8 713 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 714 // CHECK9-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP27]], align 8 715 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 716 // CHECK9-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP28]], align 8 717 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 718 // CHECK9-NEXT: store i8** null, i8*** [[TMP29]], align 8 719 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 720 // CHECK9-NEXT: store i8** null, i8*** [[TMP30]], align 8 721 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 722 // CHECK9-NEXT: store i64 0, i64* [[TMP31]], align 8 723 // CHECK9-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 724 // CHECK9-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 725 // CHECK9-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 726 // CHECK9: omp_offload.failed: 727 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75(i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[VAR]]) #[[ATTR4]] 728 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 729 // CHECK9: omp_offload.cont: 730 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 731 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32** 732 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[TMP35]], align 8 733 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 734 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i32** 735 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[TMP37]], align 8 736 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 737 // CHECK9-NEXT: store i8* null, i8** [[TMP38]], align 8 738 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 739 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 740 // CHECK9-NEXT: [[KERNEL_ARGS4:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 741 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 0 742 // CHECK9-NEXT: store i32 1, i32* [[TMP41]], align 4 743 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 1 744 // CHECK9-NEXT: store i32 1, i32* [[TMP42]], align 4 745 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 2 746 // CHECK9-NEXT: store i8** [[TMP39]], i8*** [[TMP43]], align 8 747 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 3 748 // CHECK9-NEXT: store i8** [[TMP40]], i8*** [[TMP44]], align 8 749 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 4 750 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP45]], align 8 751 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 5 752 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP46]], align 8 753 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 6 754 // CHECK9-NEXT: store i8** null, i8*** [[TMP47]], align 8 755 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 7 756 // CHECK9-NEXT: store i8** null, i8*** [[TMP48]], align 8 757 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 8 758 // CHECK9-NEXT: store i64 0, i64* [[TMP49]], align 8 759 // CHECK9-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]]) 760 // CHECK9-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0 761 // CHECK9-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 762 // CHECK9: omp_offload.failed5: 763 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81(i32* [[T_VAR]]) #[[ATTR4]] 764 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 765 // CHECK9: omp_offload.cont6: 766 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 767 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 768 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 769 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 770 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 771 // CHECK9: arraydestroy.body: 772 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP52]], [[OMP_OFFLOAD_CONT6]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 773 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 774 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 775 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 776 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 777 // CHECK9: arraydestroy.done7: 778 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 779 // CHECK9-NEXT: [[TMP53:%.*]] = load i32, i32* [[RETVAL]], align 4 780 // CHECK9-NEXT: ret i32 [[TMP53]] 781 // 782 // 783 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 784 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 785 // CHECK9-NEXT: entry: 786 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 787 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 788 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 789 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 790 // CHECK9-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 791 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 792 // CHECK9-NEXT: store float [[CONV]], float* [[F]], align 4 793 // CHECK9-NEXT: ret void 794 // 795 // 796 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 797 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 798 // CHECK9-NEXT: entry: 799 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 800 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 801 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 802 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 803 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 804 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 805 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 806 // CHECK9-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 807 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 808 // CHECK9-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 809 // CHECK9-NEXT: store float [[ADD]], float* [[F]], align 4 810 // CHECK9-NEXT: ret void 811 // 812 // 813 // CHECK9-LABEL: define {{[^@]+}}@_ZN2StC2Ev 814 // CHECK9-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 815 // CHECK9-NEXT: entry: 816 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 817 // CHECK9-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 818 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 819 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 0 820 // CHECK9-NEXT: store i32 0, i32* [[A]], align 4 821 // CHECK9-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 822 // CHECK9-NEXT: store i32 0, i32* [[B]], align 4 823 // CHECK9-NEXT: ret void 824 // 825 // 826 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2ERKS0_2St 827 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 828 // CHECK9-NEXT: entry: 829 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 830 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 8 831 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 832 // CHECK9-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 8 833 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 834 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 835 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 8 836 // CHECK9-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP0]], i32 0, i32 0 837 // CHECK9-NEXT: [[TMP1:%.*]] = load float, float* [[F2]], align 4 838 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 839 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 840 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP2]] to float 841 // CHECK9-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CONV]] 842 // CHECK9-NEXT: store float [[ADD]], float* [[F]], align 4 843 // CHECK9-NEXT: ret void 844 // 845 // 846 // CHECK9-LABEL: define {{[^@]+}}@_ZN2StD2Ev 847 // CHECK9-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 848 // CHECK9-NEXT: entry: 849 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 850 // CHECK9-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 851 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 852 // CHECK9-NEXT: ret void 853 // 854 // 855 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 856 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 857 // CHECK9-NEXT: entry: 858 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 859 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 860 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 861 // CHECK9-NEXT: ret void 862 // 863 // 864 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 865 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 866 // CHECK9-NEXT: entry: 867 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 868 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 869 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 870 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 871 // CHECK9-NEXT: ret void 872 // 873 // 874 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 875 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 876 // CHECK9-NEXT: entry: 877 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 878 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 879 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 880 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 881 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 882 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 883 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 884 // CHECK9-NEXT: ret void 885 // 886 // 887 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 888 // CHECK9-SAME: (i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 889 // CHECK9-NEXT: entry: 890 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 891 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 892 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 893 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 894 // CHECK9-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 895 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 896 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 897 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 898 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 899 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 900 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 901 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 902 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 903 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 128 904 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[T_VAR1]], align 128 905 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP1]], i32* [[T_VAR1]], [2 x %struct.S.0]* [[TMP2]], %struct.S.0* [[TMP3]]) 906 // CHECK9-NEXT: ret void 907 // 908 // 909 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 910 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 911 // CHECK9-NEXT: entry: 912 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 913 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 914 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 915 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 916 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 917 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 918 // CHECK9-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 919 // CHECK9-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 128 920 // CHECK9-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 128 921 // CHECK9-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 922 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 923 // CHECK9-NEXT: [[AGG_TMP6:%.*]] = alloca [[STRUCT_ST]], align 4 924 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 925 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 926 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 927 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 928 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 929 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 930 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 931 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 932 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 933 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 934 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 128 935 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[T_VAR1]], align 128 936 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 937 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 938 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP5]], i8* align 128 [[TMP6]], i64 8, i1 false) 939 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 940 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 941 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 942 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]] 943 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 944 // CHECK9: omp.arraycpy.body: 945 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 946 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 947 // CHECK9-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 948 // CHECK9-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 949 // CHECK9-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 950 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 951 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 952 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 953 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 954 // CHECK9: omp.arraycpy.done4: 955 // CHECK9-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP6]]) 956 // CHECK9-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.St* [[AGG_TMP6]]) 957 // CHECK9-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]] 958 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR1]], align 128 959 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0 960 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 128 961 // CHECK9-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 0 962 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8* 963 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[VAR5]] to i8* 964 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP10]], i8* align 128 [[TMP11]], i64 4, i1 false) 965 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 966 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 967 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 968 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 969 // CHECK9: arraydestroy.body: 970 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_ARRAYCPY_DONE4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 971 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 972 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 973 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 974 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 975 // CHECK9: arraydestroy.done9: 976 // CHECK9-NEXT: ret void 977 // 978 // 979 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_2St 980 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 981 // CHECK9-NEXT: entry: 982 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 983 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.0*, align 8 984 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 985 // CHECK9-NEXT: store %struct.S.0* [[S]], %struct.S.0** [[S_ADDR]], align 8 986 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 987 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S.0*, %struct.S.0** [[S_ADDR]], align 8 988 // CHECK9-NEXT: call void @_ZN1SIiEC2ERKS0_2St(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 989 // CHECK9-NEXT: ret void 990 // 991 // 992 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 993 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 994 // CHECK9-NEXT: entry: 995 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 996 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 997 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 998 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 999 // CHECK9-NEXT: ret void 1000 // 1001 // 1002 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81 1003 // CHECK9-SAME: (i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] { 1004 // CHECK9-NEXT: entry: 1005 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1006 // CHECK9-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1007 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1008 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1009 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 128 1010 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[T_VAR1]], align 128 1011 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32* [[T_VAR1]]) 1012 // CHECK9-NEXT: ret void 1013 // 1014 // 1015 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 1016 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] { 1017 // CHECK9-NEXT: entry: 1018 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1019 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1020 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1021 // CHECK9-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1022 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1023 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1024 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1025 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1026 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 128 1027 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[T_VAR1]], align 128 1028 // CHECK9-NEXT: ret void 1029 // 1030 // 1031 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1032 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1033 // CHECK9-NEXT: entry: 1034 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1035 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1036 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1037 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1038 // CHECK9-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 1039 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1040 // CHECK9-NEXT: ret void 1041 // 1042 // 1043 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1044 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1045 // CHECK9-NEXT: entry: 1046 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1047 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1048 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1049 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1050 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1051 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1052 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1053 // CHECK9-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 1054 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 1055 // CHECK9-NEXT: store i32 [[ADD]], i32* [[F]], align 4 1056 // CHECK9-NEXT: ret void 1057 // 1058 // 1059 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_2St 1060 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1061 // CHECK9-NEXT: entry: 1062 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1063 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.0*, align 8 1064 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1065 // CHECK9-NEXT: store %struct.S.0* [[S]], %struct.S.0** [[S_ADDR]], align 8 1066 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1067 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1068 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S.0*, %struct.S.0** [[S_ADDR]], align 8 1069 // CHECK9-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TMP0]], i32 0, i32 0 1070 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[F2]], align 4 1071 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 1072 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 1073 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]] 1074 // CHECK9-NEXT: store i32 [[ADD]], i32* [[F]], align 4 1075 // CHECK9-NEXT: ret void 1076 // 1077 // 1078 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1079 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1080 // CHECK9-NEXT: entry: 1081 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1082 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1083 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1084 // CHECK9-NEXT: ret void 1085 // 1086 // 1087 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1088 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1089 // CHECK9-NEXT: entry: 1090 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1091 // CHECK9-NEXT: ret void 1092 // 1093 // 1094 // CHECK11-LABEL: define {{[^@]+}}@main 1095 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1096 // CHECK11-NEXT: entry: 1097 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1098 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1099 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1100 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1101 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1102 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 1103 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1104 // CHECK11-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4 1105 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 1106 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 1107 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 1108 // CHECK11-NEXT: [[T_VAR_CASTED1:%.*]] = alloca i32, align 4 1109 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [1 x i8*], align 4 1110 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS3:%.*]] = alloca [1 x i8*], align 4 1111 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [1 x i8*], align 4 1112 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1113 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1114 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 1115 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1116 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 1117 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1118 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1119 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 1120 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1121 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 1122 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 1123 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4 1124 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 1125 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 1126 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[SIVAR_CASTED]], align 4 1127 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4 1128 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1129 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 1130 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4 1131 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1132 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 1133 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 1134 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1135 // CHECK11-NEXT: store i8* null, i8** [[TMP9]], align 4 1136 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1137 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to [2 x i32]** 1138 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP11]], align 4 1139 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1140 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1141 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 1142 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1143 // CHECK11-NEXT: store i8* null, i8** [[TMP14]], align 4 1144 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1145 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S]** 1146 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP16]], align 4 1147 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1148 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]** 1149 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 4 1150 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1151 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 4 1152 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1153 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S** 1154 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP21]], align 4 1155 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1156 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S** 1157 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP23]], align 4 1158 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1159 // CHECK11-NEXT: store i8* null, i8** [[TMP24]], align 4 1160 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1161 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 1162 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[TMP26]], align 4 1163 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1164 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 1165 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[TMP28]], align 4 1166 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 1167 // CHECK11-NEXT: store i8* null, i8** [[TMP29]], align 4 1168 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1169 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1170 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1171 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1172 // CHECK11-NEXT: store i32 1, i32* [[TMP32]], align 4 1173 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1174 // CHECK11-NEXT: store i32 5, i32* [[TMP33]], align 4 1175 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1176 // CHECK11-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 4 1177 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1178 // CHECK11-NEXT: store i8** [[TMP31]], i8*** [[TMP35]], align 4 1179 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1180 // CHECK11-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP36]], align 4 1181 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1182 // CHECK11-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP37]], align 4 1183 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1184 // CHECK11-NEXT: store i8** null, i8*** [[TMP38]], align 4 1185 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1186 // CHECK11-NEXT: store i8** null, i8*** [[TMP39]], align 4 1187 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1188 // CHECK11-NEXT: store i64 0, i64* [[TMP40]], align 8 1189 // CHECK11-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l109.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1190 // CHECK11-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 1191 // CHECK11-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1192 // CHECK11: omp_offload.failed: 1193 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l109(i32 [[TMP2]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32 [[TMP4]]) #[[ATTR4:[0-9]+]] 1194 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1195 // CHECK11: omp_offload.cont: 1196 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[T_VAR]], align 4 1197 // CHECK11-NEXT: store i32 [[TMP43]], i32* [[T_VAR_CASTED1]], align 4 1198 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[T_VAR_CASTED1]], align 4 1199 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0 1200 // CHECK11-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 1201 // CHECK11-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 1202 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0 1203 // CHECK11-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 1204 // CHECK11-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 1205 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 0 1206 // CHECK11-NEXT: store i8* null, i8** [[TMP49]], align 4 1207 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0 1208 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0 1209 // CHECK11-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1210 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0 1211 // CHECK11-NEXT: store i32 1, i32* [[TMP52]], align 4 1212 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1 1213 // CHECK11-NEXT: store i32 1, i32* [[TMP53]], align 4 1214 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2 1215 // CHECK11-NEXT: store i8** [[TMP50]], i8*** [[TMP54]], align 4 1216 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3 1217 // CHECK11-NEXT: store i8** [[TMP51]], i8*** [[TMP55]], align 4 1218 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4 1219 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP56]], align 4 1220 // CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5 1221 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP57]], align 4 1222 // CHECK11-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6 1223 // CHECK11-NEXT: store i8** null, i8*** [[TMP58]], align 4 1224 // CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7 1225 // CHECK11-NEXT: store i8** null, i8*** [[TMP59]], align 4 1226 // CHECK11-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8 1227 // CHECK11-NEXT: store i64 0, i64* [[TMP60]], align 8 1228 // CHECK11-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]]) 1229 // CHECK11-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 1230 // CHECK11-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 1231 // CHECK11: omp_offload.failed6: 1232 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116(i32 [[TMP44]]) #[[ATTR4]] 1233 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]] 1234 // CHECK11: omp_offload.cont7: 1235 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1236 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1237 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1238 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1239 // CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1240 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1241 // CHECK11: arraydestroy.body: 1242 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP63]], [[OMP_OFFLOAD_CONT7]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1243 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1244 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1245 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1246 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1247 // CHECK11: arraydestroy.done8: 1248 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1249 // CHECK11-NEXT: [[TMP64:%.*]] = load i32, i32* [[RETVAL]], align 4 1250 // CHECK11-NEXT: ret i32 [[TMP64]] 1251 // 1252 // 1253 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1254 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1255 // CHECK11-NEXT: entry: 1256 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1257 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1258 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1259 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1260 // CHECK11-NEXT: ret void 1261 // 1262 // 1263 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1264 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1265 // CHECK11-NEXT: entry: 1266 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1267 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1268 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1269 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1270 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1271 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1272 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1273 // CHECK11-NEXT: ret void 1274 // 1275 // 1276 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l109 1277 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1278 // CHECK11-NEXT: entry: 1279 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1280 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 1281 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 1282 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 1283 // CHECK11-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4 1284 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1285 // CHECK11-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4 1286 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 1287 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 1288 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 1289 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 1290 // CHECK11-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4 1291 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 1292 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 1293 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 1294 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 1295 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 1296 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 1297 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[SIVAR_ADDR]], align 4 1298 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SIVAR_CASTED]], align 4 1299 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4 1300 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP2]], i32 [[TMP6]]) 1301 // CHECK11-NEXT: ret void 1302 // 1303 // 1304 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 1305 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SIVAR:%.*]]) #[[ATTR3]] { 1306 // CHECK11-NEXT: entry: 1307 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1308 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1309 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 1310 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1311 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 1312 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 1313 // CHECK11-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4 1314 // CHECK11-NEXT: [[VEC1:%.*]] = alloca [2 x i32], align 4 1315 // CHECK11-NEXT: [[S_ARR2:%.*]] = alloca [2 x %struct.S], align 4 1316 // CHECK11-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 1317 // CHECK11-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1318 // CHECK11-NEXT: [[AGG_TMP5:%.*]] = alloca [[STRUCT_ST]], align 4 1319 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1320 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1321 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 1322 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 1323 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 1324 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 1325 // CHECK11-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4 1326 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 1327 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 1328 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 1329 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast [2 x i32]* [[VEC1]] to i8* 1330 // CHECK11-NEXT: [[TMP4:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1331 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP3]], i8* align 4 [[TMP4]], i32 8, i1 false) 1332 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR2]], i32 0, i32 0 1333 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S* 1334 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1335 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP6]] 1336 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE3:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1337 // CHECK11: omp.arraycpy.body: 1338 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1339 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1340 // CHECK11-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 1341 // CHECK11-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 1342 // CHECK11-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 1343 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1344 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1345 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]] 1346 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE3]], label [[OMP_ARRAYCPY_BODY]] 1347 // CHECK11: omp.arraycpy.done3: 1348 // CHECK11-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP5]]) 1349 // CHECK11-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP2]], %struct.St* [[AGG_TMP5]]) 1350 // CHECK11-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP5]]) #[[ATTR4]] 1351 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 1352 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC1]], i32 0, i32 0 1353 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[ARRAYIDX]], align 4 1354 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR2]], i32 0, i32 0 1355 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 1356 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[VAR4]] to i8* 1357 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP8]], i8* align 4 [[TMP9]], i32 4, i1 false) 1358 // CHECK11-NEXT: store i32 2, i32* [[SIVAR_ADDR]], align 4 1359 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 1360 // CHECK11-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR2]], i32 0, i32 0 1361 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i32 2 1362 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1363 // CHECK11: arraydestroy.body: 1364 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP10]], [[OMP_ARRAYCPY_DONE3]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1365 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1366 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1367 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1368 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1369 // CHECK11: arraydestroy.done8: 1370 // CHECK11-NEXT: ret void 1371 // 1372 // 1373 // CHECK11-LABEL: define {{[^@]+}}@_ZN2StC1Ev 1374 // CHECK11-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1375 // CHECK11-NEXT: entry: 1376 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 1377 // CHECK11-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 1378 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 1379 // CHECK11-NEXT: call void @_ZN2StC2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) 1380 // CHECK11-NEXT: ret void 1381 // 1382 // 1383 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1ERKS0_2St 1384 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1385 // CHECK11-NEXT: entry: 1386 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1387 // CHECK11-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 4 1388 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1389 // CHECK11-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 4 1390 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1391 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 4 1392 // CHECK11-NEXT: call void @_ZN1SIfEC2ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 1393 // CHECK11-NEXT: ret void 1394 // 1395 // 1396 // CHECK11-LABEL: define {{[^@]+}}@_ZN2StD1Ev 1397 // CHECK11-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1398 // CHECK11-NEXT: entry: 1399 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 1400 // CHECK11-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 1401 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 1402 // CHECK11-NEXT: call void @_ZN2StD2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR4]] 1403 // CHECK11-NEXT: ret void 1404 // 1405 // 1406 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1407 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1408 // CHECK11-NEXT: entry: 1409 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1410 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1411 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1412 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1413 // CHECK11-NEXT: ret void 1414 // 1415 // 1416 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116 1417 // CHECK11-SAME: (i32 [[T_VAR:%.*]]) #[[ATTR3]] { 1418 // CHECK11-NEXT: entry: 1419 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1420 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1421 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 1422 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 1423 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[T_VAR_CASTED]], align 4 1424 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 1425 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 1426 // CHECK11-NEXT: ret void 1427 // 1428 // 1429 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 1430 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[T_VAR:%.*]]) #[[ATTR3]] { 1431 // CHECK11-NEXT: entry: 1432 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1433 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1434 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1435 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1436 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1437 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 1438 // CHECK11-NEXT: ret void 1439 // 1440 // 1441 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1442 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 1443 // CHECK11-NEXT: entry: 1444 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1445 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1446 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1447 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 1448 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 1449 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 1450 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 1451 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 1452 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 1453 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 1454 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 1455 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 1456 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1457 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 128 1458 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1459 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 1460 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1461 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 1462 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 1463 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 1464 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 1465 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1466 // CHECK11-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32** 1467 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 4 1468 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1469 // CHECK11-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 1470 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[TMP4]], align 4 1471 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1472 // CHECK11-NEXT: store i8* null, i8** [[TMP5]], align 4 1473 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1474 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to [2 x i32]** 1475 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP7]], align 4 1476 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1477 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to [2 x i32]** 1478 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP9]], align 4 1479 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1480 // CHECK11-NEXT: store i8* null, i8** [[TMP10]], align 4 1481 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1482 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [2 x %struct.S.0]** 1483 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP12]], align 4 1484 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1485 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to [2 x %struct.S.0]** 1486 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP14]], align 4 1487 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1488 // CHECK11-NEXT: store i8* null, i8** [[TMP15]], align 4 1489 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1490 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to %struct.S.0** 1491 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[TMP17]], align 4 1492 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1493 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.S.0** 1494 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[TMP19]], align 4 1495 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1496 // CHECK11-NEXT: store i8* null, i8** [[TMP20]], align 4 1497 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1498 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1499 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1500 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1501 // CHECK11-NEXT: store i32 1, i32* [[TMP23]], align 4 1502 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1503 // CHECK11-NEXT: store i32 4, i32* [[TMP24]], align 4 1504 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1505 // CHECK11-NEXT: store i8** [[TMP21]], i8*** [[TMP25]], align 4 1506 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1507 // CHECK11-NEXT: store i8** [[TMP22]], i8*** [[TMP26]], align 4 1508 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1509 // CHECK11-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP27]], align 4 1510 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1511 // CHECK11-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP28]], align 4 1512 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1513 // CHECK11-NEXT: store i8** null, i8*** [[TMP29]], align 4 1514 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1515 // CHECK11-NEXT: store i8** null, i8*** [[TMP30]], align 4 1516 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1517 // CHECK11-NEXT: store i64 0, i64* [[TMP31]], align 8 1518 // CHECK11-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1519 // CHECK11-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 1520 // CHECK11-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1521 // CHECK11: omp_offload.failed: 1522 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75(i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[VAR]]) #[[ATTR4]] 1523 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1524 // CHECK11: omp_offload.cont: 1525 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1526 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32** 1527 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[TMP35]], align 4 1528 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1529 // CHECK11-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i32** 1530 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[TMP37]], align 4 1531 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 1532 // CHECK11-NEXT: store i8* null, i8** [[TMP38]], align 4 1533 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1534 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1535 // CHECK11-NEXT: [[KERNEL_ARGS4:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1536 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 0 1537 // CHECK11-NEXT: store i32 1, i32* [[TMP41]], align 4 1538 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 1 1539 // CHECK11-NEXT: store i32 1, i32* [[TMP42]], align 4 1540 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 2 1541 // CHECK11-NEXT: store i8** [[TMP39]], i8*** [[TMP43]], align 4 1542 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 3 1543 // CHECK11-NEXT: store i8** [[TMP40]], i8*** [[TMP44]], align 4 1544 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 4 1545 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP45]], align 4 1546 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 5 1547 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP46]], align 4 1548 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 6 1549 // CHECK11-NEXT: store i8** null, i8*** [[TMP47]], align 4 1550 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 7 1551 // CHECK11-NEXT: store i8** null, i8*** [[TMP48]], align 4 1552 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]], i32 0, i32 8 1553 // CHECK11-NEXT: store i64 0, i64* [[TMP49]], align 8 1554 // CHECK11-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS4]]) 1555 // CHECK11-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0 1556 // CHECK11-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 1557 // CHECK11: omp_offload.failed5: 1558 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81(i32* [[T_VAR]]) #[[ATTR4]] 1559 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]] 1560 // CHECK11: omp_offload.cont6: 1561 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1562 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1563 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1564 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 1565 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1566 // CHECK11: arraydestroy.body: 1567 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP52]], [[OMP_OFFLOAD_CONT6]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1568 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1569 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1570 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1571 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1572 // CHECK11: arraydestroy.done7: 1573 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1574 // CHECK11-NEXT: [[TMP53:%.*]] = load i32, i32* [[RETVAL]], align 4 1575 // CHECK11-NEXT: ret i32 [[TMP53]] 1576 // 1577 // 1578 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1579 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1580 // CHECK11-NEXT: entry: 1581 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1582 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1583 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1584 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1585 // CHECK11-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 1586 // CHECK11-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 1587 // CHECK11-NEXT: store float [[CONV]], float* [[F]], align 4 1588 // CHECK11-NEXT: ret void 1589 // 1590 // 1591 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1592 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1593 // CHECK11-NEXT: entry: 1594 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1595 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1596 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1597 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1598 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1599 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1600 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1601 // CHECK11-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 1602 // CHECK11-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 1603 // CHECK11-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 1604 // CHECK11-NEXT: store float [[ADD]], float* [[F]], align 4 1605 // CHECK11-NEXT: ret void 1606 // 1607 // 1608 // CHECK11-LABEL: define {{[^@]+}}@_ZN2StC2Ev 1609 // CHECK11-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1610 // CHECK11-NEXT: entry: 1611 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 1612 // CHECK11-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 1613 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 1614 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 0 1615 // CHECK11-NEXT: store i32 0, i32* [[A]], align 4 1616 // CHECK11-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 1617 // CHECK11-NEXT: store i32 0, i32* [[B]], align 4 1618 // CHECK11-NEXT: ret void 1619 // 1620 // 1621 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2ERKS0_2St 1622 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1623 // CHECK11-NEXT: entry: 1624 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1625 // CHECK11-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 4 1626 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1627 // CHECK11-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 4 1628 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1629 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1630 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 4 1631 // CHECK11-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP0]], i32 0, i32 0 1632 // CHECK11-NEXT: [[TMP1:%.*]] = load float, float* [[F2]], align 4 1633 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 1634 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 1635 // CHECK11-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP2]] to float 1636 // CHECK11-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CONV]] 1637 // CHECK11-NEXT: store float [[ADD]], float* [[F]], align 4 1638 // CHECK11-NEXT: ret void 1639 // 1640 // 1641 // CHECK11-LABEL: define {{[^@]+}}@_ZN2StD2Ev 1642 // CHECK11-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1643 // CHECK11-NEXT: entry: 1644 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 1645 // CHECK11-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 1646 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 1647 // CHECK11-NEXT: ret void 1648 // 1649 // 1650 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1651 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1652 // CHECK11-NEXT: entry: 1653 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1654 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1655 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1656 // CHECK11-NEXT: ret void 1657 // 1658 // 1659 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1660 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1661 // CHECK11-NEXT: entry: 1662 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1663 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1664 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1665 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1666 // CHECK11-NEXT: ret void 1667 // 1668 // 1669 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1670 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1671 // CHECK11-NEXT: entry: 1672 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1673 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1674 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1675 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1676 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1677 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1678 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 1679 // CHECK11-NEXT: ret void 1680 // 1681 // 1682 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 1683 // CHECK11-SAME: (i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1684 // CHECK11-NEXT: entry: 1685 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 1686 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 1687 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 1688 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 1689 // CHECK11-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1690 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 1691 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 1692 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 1693 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 1694 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 1695 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 1696 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 1697 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 1698 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 128 1699 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[T_VAR1]], align 128 1700 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP1]], i32* [[T_VAR1]], [2 x %struct.S.0]* [[TMP2]], %struct.S.0* [[TMP3]]) 1701 // CHECK11-NEXT: ret void 1702 // 1703 // 1704 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 1705 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1706 // CHECK11-NEXT: entry: 1707 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1708 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1709 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 1710 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 1711 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 1712 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 1713 // CHECK11-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1714 // CHECK11-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 128 1715 // CHECK11-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 128 1716 // CHECK11-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 1717 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 1718 // CHECK11-NEXT: [[AGG_TMP6:%.*]] = alloca [[STRUCT_ST]], align 4 1719 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1720 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1721 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 1722 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 1723 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 1724 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 1725 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 1726 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 1727 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 1728 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 1729 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 128 1730 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[T_VAR1]], align 128 1731 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 1732 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1733 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP5]], i8* align 128 [[TMP6]], i32 8, i1 false) 1734 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1735 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 1736 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 1737 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]] 1738 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1739 // CHECK11: omp.arraycpy.body: 1740 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1741 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1742 // CHECK11-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 1743 // CHECK11-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 1744 // CHECK11-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 1745 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1746 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1747 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 1748 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 1749 // CHECK11: omp.arraycpy.done4: 1750 // CHECK11-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP6]]) 1751 // CHECK11-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.St* [[AGG_TMP6]]) 1752 // CHECK11-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]] 1753 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR1]], align 128 1754 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 0 1755 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 128 1756 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1757 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8* 1758 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[VAR5]] to i8* 1759 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP10]], i8* align 128 [[TMP11]], i32 4, i1 false) 1760 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1761 // CHECK11-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1762 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i32 2 1763 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1764 // CHECK11: arraydestroy.body: 1765 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_ARRAYCPY_DONE4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1766 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1767 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1768 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 1769 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 1770 // CHECK11: arraydestroy.done9: 1771 // CHECK11-NEXT: ret void 1772 // 1773 // 1774 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_2St 1775 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1776 // CHECK11-NEXT: entry: 1777 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1778 // CHECK11-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.0*, align 4 1779 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1780 // CHECK11-NEXT: store %struct.S.0* [[S]], %struct.S.0** [[S_ADDR]], align 4 1781 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1782 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S.0*, %struct.S.0** [[S_ADDR]], align 4 1783 // CHECK11-NEXT: call void @_ZN1SIiEC2ERKS0_2St(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 1784 // CHECK11-NEXT: ret void 1785 // 1786 // 1787 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1788 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1789 // CHECK11-NEXT: entry: 1790 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1791 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1792 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1793 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1794 // CHECK11-NEXT: ret void 1795 // 1796 // 1797 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81 1798 // CHECK11-SAME: (i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] { 1799 // CHECK11-NEXT: entry: 1800 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 1801 // CHECK11-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1802 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 1803 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 1804 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 128 1805 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[T_VAR1]], align 128 1806 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32* [[T_VAR1]]) 1807 // CHECK11-NEXT: ret void 1808 // 1809 // 1810 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 1811 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] { 1812 // CHECK11-NEXT: entry: 1813 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1814 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1815 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 1816 // CHECK11-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1817 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1818 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1819 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 1820 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 1821 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 128 1822 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[T_VAR1]], align 128 1823 // CHECK11-NEXT: ret void 1824 // 1825 // 1826 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1827 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1828 // CHECK11-NEXT: entry: 1829 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1830 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1831 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1832 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1833 // CHECK11-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 1834 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1835 // CHECK11-NEXT: ret void 1836 // 1837 // 1838 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1839 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1840 // CHECK11-NEXT: entry: 1841 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1842 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1843 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1844 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1845 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1846 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1847 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1848 // CHECK11-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 1849 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 1850 // CHECK11-NEXT: store i32 [[ADD]], i32* [[F]], align 4 1851 // CHECK11-NEXT: ret void 1852 // 1853 // 1854 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_2St 1855 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1856 // CHECK11-NEXT: entry: 1857 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1858 // CHECK11-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.0*, align 4 1859 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1860 // CHECK11-NEXT: store %struct.S.0* [[S]], %struct.S.0** [[S_ADDR]], align 4 1861 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1862 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1863 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S.0*, %struct.S.0** [[S_ADDR]], align 4 1864 // CHECK11-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TMP0]], i32 0, i32 0 1865 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[F2]], align 4 1866 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 1867 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 1868 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]] 1869 // CHECK11-NEXT: store i32 [[ADD]], i32* [[F]], align 4 1870 // CHECK11-NEXT: ret void 1871 // 1872 // 1873 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1874 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1875 // CHECK11-NEXT: entry: 1876 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1877 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1878 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1879 // CHECK11-NEXT: ret void 1880 // 1881 // 1882 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1883 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 1884 // CHECK11-NEXT: entry: 1885 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 1886 // CHECK11-NEXT: ret void 1887 // 1888 // 1889 // CHECK17-LABEL: define {{[^@]+}}@_Z10array_funcPfP2StiPg 1890 // CHECK17-SAME: (float* [[A:%.*]], %struct.St* [[S:%.*]], i32 signext [[N:%.*]], ppc_fp128* [[VLA1:%.*]]) #[[ATTR0:[0-9]+]] { 1891 // CHECK17-NEXT: entry: 1892 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8 1893 // CHECK17-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 8 1894 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1895 // CHECK17-NEXT: [[VLA1_ADDR:%.*]] = alloca ppc_fp128*, align 8 1896 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1897 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1898 // CHECK17-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 1899 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1900 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [8 x i8*], align 8 1901 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [8 x i8*], align 8 1902 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [8 x i8*], align 8 1903 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [8 x i64], align 8 1904 // CHECK17-NEXT: store float* [[A]], float** [[A_ADDR]], align 8 1905 // CHECK17-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 8 1906 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1907 // CHECK17-NEXT: store ppc_fp128* [[VLA1]], ppc_fp128** [[VLA1_ADDR]], align 8 1908 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1909 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1910 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 1911 // CHECK17-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 1912 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 1913 // CHECK17-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 1914 // CHECK17-NEXT: [[TMP6:%.*]] = call i8* @llvm.stacksave() 1915 // CHECK17-NEXT: store i8* [[TMP6]], i8** [[SAVED_STACK]], align 8 1916 // CHECK17-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP3]], [[TMP5]] 1917 // CHECK17-NEXT: [[VLA:%.*]] = alloca double, i64 [[TMP7]], align 128 1918 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR0]], align 8 1919 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 1920 // CHECK17-NEXT: [[TMP8:%.*]] = load float*, float** [[A_ADDR]], align 8 1921 // CHECK17-NEXT: [[TMP9:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 8 1922 // CHECK17-NEXT: [[TMP10:%.*]] = load ppc_fp128*, ppc_fp128** [[VLA1_ADDR]], align 8 1923 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[N_ADDR]], align 4 1924 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1925 // CHECK17-NEXT: store i32 [[TMP11]], i32* [[CONV]], align 4 1926 // CHECK17-NEXT: [[TMP12:%.*]] = load i64, i64* [[N_CASTED]], align 8 1927 // CHECK17-NEXT: [[TMP13:%.*]] = mul nuw i64 [[TMP3]], [[TMP5]] 1928 // CHECK17-NEXT: [[TMP14:%.*]] = mul nuw i64 [[TMP13]], 8 1929 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast [8 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1930 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP15]], i8* align 8 bitcast ([8 x i64]* @.offload_sizes to i8*), i64 64, i1 false) 1931 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1932 // CHECK17-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to float** 1933 // CHECK17-NEXT: store float* [[TMP8]], float** [[TMP17]], align 8 1934 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1935 // CHECK17-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to float** 1936 // CHECK17-NEXT: store float* [[TMP8]], float** [[TMP19]], align 8 1937 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1938 // CHECK17-NEXT: store i8* null, i8** [[TMP20]], align 8 1939 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1940 // CHECK17-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to %struct.St** 1941 // CHECK17-NEXT: store %struct.St* [[TMP9]], %struct.St** [[TMP22]], align 8 1942 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1943 // CHECK17-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to %struct.St** 1944 // CHECK17-NEXT: store %struct.St* [[TMP9]], %struct.St** [[TMP24]], align 8 1945 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1946 // CHECK17-NEXT: store i8* null, i8** [[TMP25]], align 8 1947 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1948 // CHECK17-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 1949 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP27]], align 8 1950 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1951 // CHECK17-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 1952 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP29]], align 8 1953 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1954 // CHECK17-NEXT: store i8* null, i8** [[TMP30]], align 8 1955 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1956 // CHECK17-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to ppc_fp128** 1957 // CHECK17-NEXT: store ppc_fp128* [[TMP10]], ppc_fp128** [[TMP32]], align 8 1958 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1959 // CHECK17-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to ppc_fp128** 1960 // CHECK17-NEXT: store ppc_fp128* [[TMP10]], ppc_fp128** [[TMP34]], align 8 1961 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1962 // CHECK17-NEXT: store i8* null, i8** [[TMP35]], align 8 1963 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1964 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 1965 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP37]], align 8 1966 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1967 // CHECK17-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 1968 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP39]], align 8 1969 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1970 // CHECK17-NEXT: store i8* null, i8** [[TMP40]], align 8 1971 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 5 1972 // CHECK17-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 1973 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP42]], align 8 1974 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 5 1975 // CHECK17-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 1976 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP44]], align 8 1977 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 5 1978 // CHECK17-NEXT: store i8* null, i8** [[TMP45]], align 8 1979 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 6 1980 // CHECK17-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to double** 1981 // CHECK17-NEXT: store double* [[VLA]], double** [[TMP47]], align 8 1982 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 6 1983 // CHECK17-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to double** 1984 // CHECK17-NEXT: store double* [[VLA]], double** [[TMP49]], align 8 1985 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [8 x i64], [8 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 1986 // CHECK17-NEXT: store i64 [[TMP14]], i64* [[TMP50]], align 8 1987 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 6 1988 // CHECK17-NEXT: store i8* null, i8** [[TMP51]], align 8 1989 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 7 1990 // CHECK17-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64* 1991 // CHECK17-NEXT: store i64 [[TMP12]], i64* [[TMP53]], align 8 1992 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 7 1993 // CHECK17-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i64* 1994 // CHECK17-NEXT: store i64 [[TMP12]], i64* [[TMP55]], align 8 1995 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 7 1996 // CHECK17-NEXT: store i8* null, i8** [[TMP56]], align 8 1997 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1998 // CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1999 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds [8 x i64], [8 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2000 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2001 // CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 2002 // CHECK17-NEXT: store i32 1, i32* [[TMP60]], align 4 2003 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 2004 // CHECK17-NEXT: store i32 8, i32* [[TMP61]], align 4 2005 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 2006 // CHECK17-NEXT: store i8** [[TMP57]], i8*** [[TMP62]], align 8 2007 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 2008 // CHECK17-NEXT: store i8** [[TMP58]], i8*** [[TMP63]], align 8 2009 // CHECK17-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 2010 // CHECK17-NEXT: store i64* [[TMP59]], i64** [[TMP64]], align 8 2011 // CHECK17-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 2012 // CHECK17-NEXT: store i64* getelementptr inbounds ([8 x i64], [8 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP65]], align 8 2013 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 2014 // CHECK17-NEXT: store i8** null, i8*** [[TMP66]], align 8 2015 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 2016 // CHECK17-NEXT: store i8** null, i8*** [[TMP67]], align 8 2017 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 2018 // CHECK17-NEXT: store i64 0, i64* [[TMP68]], align 8 2019 // CHECK17-NEXT: [[TMP69:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z10array_funcPfP2StiPg_l152.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 2020 // CHECK17-NEXT: [[TMP70:%.*]] = icmp ne i32 [[TMP69]], 0 2021 // CHECK17-NEXT: br i1 [[TMP70]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2022 // CHECK17: omp_offload.failed: 2023 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z10array_funcPfP2StiPg_l152(float* [[TMP8]], %struct.St* [[TMP9]], i64 [[TMP1]], ppc_fp128* [[TMP10]], i64 [[TMP3]], i64 [[TMP5]], double* [[VLA]], i64 [[TMP12]]) #[[ATTR4:[0-9]+]] 2024 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 2025 // CHECK17: omp_offload.cont: 2026 // CHECK17-NEXT: [[TMP71:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2027 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP71]]) 2028 // CHECK17-NEXT: ret void 2029 // 2030 // 2031 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z10array_funcPfP2StiPg_l152 2032 // CHECK17-SAME: (float* [[A:%.*]], %struct.St* [[S:%.*]], i64 [[VLA:%.*]], ppc_fp128* [[VLA1:%.*]], i64 [[VLA2:%.*]], i64 [[VLA4:%.*]], double* nonnull align 8 dereferenceable(8) [[VLA26:%.*]], i64 [[N:%.*]]) #[[ATTR2:[0-9]+]] { 2033 // CHECK17-NEXT: entry: 2034 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8 2035 // CHECK17-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 8 2036 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2037 // CHECK17-NEXT: [[VLA1_ADDR:%.*]] = alloca ppc_fp128*, align 8 2038 // CHECK17-NEXT: [[VLA_ADDR3:%.*]] = alloca i64, align 8 2039 // CHECK17-NEXT: [[VLA_ADDR5:%.*]] = alloca i64, align 8 2040 // CHECK17-NEXT: [[VLA2_ADDR:%.*]] = alloca double*, align 8 2041 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2042 // CHECK17-NEXT: store float* [[A]], float** [[A_ADDR]], align 8 2043 // CHECK17-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 8 2044 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2045 // CHECK17-NEXT: store ppc_fp128* [[VLA1]], ppc_fp128** [[VLA1_ADDR]], align 8 2046 // CHECK17-NEXT: store i64 [[VLA2]], i64* [[VLA_ADDR3]], align 8 2047 // CHECK17-NEXT: store i64 [[VLA4]], i64* [[VLA_ADDR5]], align 8 2048 // CHECK17-NEXT: store double* [[VLA26]], double** [[VLA2_ADDR]], align 8 2049 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2050 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2051 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR3]], align 8 2052 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR5]], align 8 2053 // CHECK17-NEXT: [[TMP3:%.*]] = load double*, double** [[VLA2_ADDR]], align 8 2054 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2055 // CHECK17-NEXT: [[TMP4:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 8 2056 // CHECK17-NEXT: [[TMP5:%.*]] = load ppc_fp128*, ppc_fp128** [[VLA1_ADDR]], align 8 2057 // CHECK17-NEXT: [[TMP6:%.*]] = load float*, float** [[A_ADDR]], align 8 2058 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 8, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.St*, i32*, i64, ppc_fp128*, float*, i64, i64, double*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.St* [[TMP4]], i32* [[CONV]], i64 [[TMP0]], ppc_fp128* [[TMP5]], float* [[TMP6]], i64 [[TMP1]], i64 [[TMP2]], double* [[TMP3]]) 2059 // CHECK17-NEXT: ret void 2060 // 2061 // 2062 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 2063 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.St* [[S:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], ppc_fp128* [[VLA1:%.*]], float* [[A:%.*]], i64 [[VLA2:%.*]], i64 [[VLA4:%.*]], double* nonnull align 8 dereferenceable(8) [[VLA26:%.*]]) #[[ATTR2]] { 2064 // CHECK17-NEXT: entry: 2065 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2066 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2067 // CHECK17-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 8 2068 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2069 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2070 // CHECK17-NEXT: [[VLA1_ADDR:%.*]] = alloca ppc_fp128*, align 8 2071 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8 2072 // CHECK17-NEXT: [[VLA_ADDR3:%.*]] = alloca i64, align 8 2073 // CHECK17-NEXT: [[VLA_ADDR5:%.*]] = alloca i64, align 8 2074 // CHECK17-NEXT: [[VLA2_ADDR:%.*]] = alloca double*, align 8 2075 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2076 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2077 // CHECK17-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 2078 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2079 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2080 // CHECK17-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 8 2081 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2082 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2083 // CHECK17-NEXT: store ppc_fp128* [[VLA1]], ppc_fp128** [[VLA1_ADDR]], align 8 2084 // CHECK17-NEXT: store float* [[A]], float** [[A_ADDR]], align 8 2085 // CHECK17-NEXT: store i64 [[VLA2]], i64* [[VLA_ADDR3]], align 8 2086 // CHECK17-NEXT: store i64 [[VLA4]], i64* [[VLA_ADDR5]], align 8 2087 // CHECK17-NEXT: store double* [[VLA26]], double** [[VLA2_ADDR]], align 8 2088 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2089 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2090 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR3]], align 8 2091 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR5]], align 8 2092 // CHECK17-NEXT: [[TMP4:%.*]] = load double*, double** [[VLA2_ADDR]], align 8 2093 // CHECK17-NEXT: [[TMP5:%.*]] = call i8* @llvm.stacksave() 2094 // CHECK17-NEXT: store i8* [[TMP5]], i8** [[SAVED_STACK]], align 8 2095 // CHECK17-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP2]], [[TMP3]] 2096 // CHECK17-NEXT: [[VLA7:%.*]] = alloca double, i64 [[TMP6]], align 128 2097 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 2098 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 2099 // CHECK17-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP2]], [[TMP3]] 2100 // CHECK17-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 8 2101 // CHECK17-NEXT: [[TMP9:%.*]] = bitcast double* [[VLA7]] to i8* 2102 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast double* [[TMP4]] to i8* 2103 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP9]], i8* align 128 [[TMP10]], i64 [[TMP8]], i1 false) 2104 // CHECK17-NEXT: [[TMP11:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 8 2105 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[TMP11]], i64 0 2106 // CHECK17-NEXT: [[TMP12:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 8 2107 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP0]], align 4 2108 // CHECK17-NEXT: [[TMP14:%.*]] = load ppc_fp128*, ppc_fp128** [[VLA1_ADDR]], align 8 2109 // CHECK17-NEXT: call void @_ZN2St7St_funcEPS_iPg(%struct.St* nonnull align 4 dereferenceable(8) [[ARRAYIDX]], %struct.St* [[TMP12]], i32 signext [[TMP13]], ppc_fp128* [[TMP14]]) 2110 // CHECK17-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2111 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP15]]) 2112 // CHECK17-NEXT: ret void 2113 // 2114 // 2115 // CHECK17-LABEL: define {{[^@]+}}@_ZN2St7St_funcEPS_iPg 2116 // CHECK17-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]], %struct.St* [[S:%.*]], i32 signext [[N:%.*]], ppc_fp128* [[VLA1:%.*]]) #[[ATTR0]] comdat align 2 { 2117 // CHECK17-NEXT: entry: 2118 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 2119 // CHECK17-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 8 2120 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2121 // CHECK17-NEXT: [[VLA1_ADDR:%.*]] = alloca ppc_fp128*, align 8 2122 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2123 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2124 // CHECK17-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 2125 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2126 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [10 x i8*], align 8 2127 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [10 x i8*], align 8 2128 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [10 x i8*], align 8 2129 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 8 2130 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 2131 // CHECK17-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 8 2132 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2133 // CHECK17-NEXT: store ppc_fp128* [[VLA1]], ppc_fp128** [[VLA1_ADDR]], align 8 2134 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 2135 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 2136 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2137 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2138 // CHECK17-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 2139 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 2140 // CHECK17-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 2141 // CHECK17-NEXT: [[TMP6:%.*]] = call i8* @llvm.stacksave() 2142 // CHECK17-NEXT: store i8* [[TMP6]], i8** [[SAVED_STACK]], align 8 2143 // CHECK17-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP3]], [[TMP5]] 2144 // CHECK17-NEXT: [[VLA:%.*]] = alloca double, i64 [[TMP7]], align 128 2145 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR0]], align 8 2146 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 2147 // CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 1 2148 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[B]], align 4 2149 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 0 2150 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[A]], align 4 2151 // CHECK17-NEXT: [[TMP9:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 8 2152 // CHECK17-NEXT: [[TMP10:%.*]] = load ppc_fp128*, ppc_fp128** [[VLA1_ADDR]], align 8 2153 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[N_ADDR]], align 4 2154 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2155 // CHECK17-NEXT: store i32 [[TMP11]], i32* [[CONV]], align 4 2156 // CHECK17-NEXT: [[TMP12:%.*]] = load i64, i64* [[N_CASTED]], align 8 2157 // CHECK17-NEXT: [[TMP13:%.*]] = mul nuw i64 [[TMP3]], [[TMP5]] 2158 // CHECK17-NEXT: [[TMP14:%.*]] = mul nuw i64 [[TMP13]], 8 2159 // CHECK17-NEXT: [[B2:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 2160 // CHECK17-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 0 2161 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr i32, i32* [[B2]], i32 1 2162 // CHECK17-NEXT: [[TMP16:%.*]] = bitcast i32* [[A3]] to i8* 2163 // CHECK17-NEXT: [[TMP17:%.*]] = bitcast i32* [[TMP15]] to i8* 2164 // CHECK17-NEXT: [[TMP18:%.*]] = ptrtoint i8* [[TMP17]] to i64 2165 // CHECK17-NEXT: [[TMP19:%.*]] = ptrtoint i8* [[TMP16]] to i64 2166 // CHECK17-NEXT: [[TMP20:%.*]] = sub i64 [[TMP18]], [[TMP19]] 2167 // CHECK17-NEXT: [[TMP21:%.*]] = sdiv exact i64 [[TMP20]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64) 2168 // CHECK17-NEXT: [[TMP22:%.*]] = bitcast [10 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2169 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP22]], i8* align 8 bitcast ([10 x i64]* @.offload_sizes.2 to i8*), i64 80, i1 false) 2170 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2171 // CHECK17-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to %struct.St** 2172 // CHECK17-NEXT: store %struct.St* [[TMP9]], %struct.St** [[TMP24]], align 8 2173 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2174 // CHECK17-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to %struct.St** 2175 // CHECK17-NEXT: store %struct.St* [[TMP9]], %struct.St** [[TMP26]], align 8 2176 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2177 // CHECK17-NEXT: store i8* null, i8** [[TMP27]], align 8 2178 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2179 // CHECK17-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 2180 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP29]], align 8 2181 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2182 // CHECK17-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 2183 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP31]], align 8 2184 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2185 // CHECK17-NEXT: store i8* null, i8** [[TMP32]], align 8 2186 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2187 // CHECK17-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to ppc_fp128** 2188 // CHECK17-NEXT: store ppc_fp128* [[TMP10]], ppc_fp128** [[TMP34]], align 8 2189 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2190 // CHECK17-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to ppc_fp128** 2191 // CHECK17-NEXT: store ppc_fp128* [[TMP10]], ppc_fp128** [[TMP36]], align 8 2192 // CHECK17-NEXT: [[TMP37:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2193 // CHECK17-NEXT: store i8* null, i8** [[TMP37]], align 8 2194 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2195 // CHECK17-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 2196 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP39]], align 8 2197 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2198 // CHECK17-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64* 2199 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP41]], align 8 2200 // CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 2201 // CHECK17-NEXT: store i8* null, i8** [[TMP42]], align 8 2202 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2203 // CHECK17-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 2204 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP44]], align 8 2205 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2206 // CHECK17-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 2207 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP46]], align 8 2208 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 2209 // CHECK17-NEXT: store i8* null, i8** [[TMP47]], align 8 2210 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 5 2211 // CHECK17-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to double** 2212 // CHECK17-NEXT: store double* [[VLA]], double** [[TMP49]], align 8 2213 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 5 2214 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to double** 2215 // CHECK17-NEXT: store double* [[VLA]], double** [[TMP51]], align 8 2216 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5 2217 // CHECK17-NEXT: store i64 [[TMP14]], i64* [[TMP52]], align 8 2218 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 5 2219 // CHECK17-NEXT: store i8* null, i8** [[TMP53]], align 8 2220 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 6 2221 // CHECK17-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.St** 2222 // CHECK17-NEXT: store %struct.St* [[THIS1]], %struct.St** [[TMP55]], align 8 2223 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 6 2224 // CHECK17-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32** 2225 // CHECK17-NEXT: store i32* [[A3]], i32** [[TMP57]], align 8 2226 // CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 2227 // CHECK17-NEXT: store i64 [[TMP21]], i64* [[TMP58]], align 8 2228 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 6 2229 // CHECK17-NEXT: store i8* null, i8** [[TMP59]], align 8 2230 // CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 7 2231 // CHECK17-NEXT: [[TMP61:%.*]] = bitcast i8** [[TMP60]] to %struct.St** 2232 // CHECK17-NEXT: store %struct.St* [[THIS1]], %struct.St** [[TMP61]], align 8 2233 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 7 2234 // CHECK17-NEXT: [[TMP63:%.*]] = bitcast i8** [[TMP62]] to i32** 2235 // CHECK17-NEXT: store i32* [[B2]], i32** [[TMP63]], align 8 2236 // CHECK17-NEXT: [[TMP64:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 7 2237 // CHECK17-NEXT: store i8* null, i8** [[TMP64]], align 8 2238 // CHECK17-NEXT: [[TMP65:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 8 2239 // CHECK17-NEXT: [[TMP66:%.*]] = bitcast i8** [[TMP65]] to %struct.St** 2240 // CHECK17-NEXT: store %struct.St* [[THIS1]], %struct.St** [[TMP66]], align 8 2241 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 8 2242 // CHECK17-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i32** 2243 // CHECK17-NEXT: store i32* [[A3]], i32** [[TMP68]], align 8 2244 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 8 2245 // CHECK17-NEXT: store i8* null, i8** [[TMP69]], align 8 2246 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 9 2247 // CHECK17-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 2248 // CHECK17-NEXT: store i64 [[TMP12]], i64* [[TMP71]], align 8 2249 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 9 2250 // CHECK17-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 2251 // CHECK17-NEXT: store i64 [[TMP12]], i64* [[TMP73]], align 8 2252 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 9 2253 // CHECK17-NEXT: store i8* null, i8** [[TMP74]], align 8 2254 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2255 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2256 // CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2257 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2258 // CHECK17-NEXT: [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 2259 // CHECK17-NEXT: store i32 1, i32* [[TMP78]], align 4 2260 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 2261 // CHECK17-NEXT: store i32 10, i32* [[TMP79]], align 4 2262 // CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 2263 // CHECK17-NEXT: store i8** [[TMP75]], i8*** [[TMP80]], align 8 2264 // CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 2265 // CHECK17-NEXT: store i8** [[TMP76]], i8*** [[TMP81]], align 8 2266 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 2267 // CHECK17-NEXT: store i64* [[TMP77]], i64** [[TMP82]], align 8 2268 // CHECK17-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 2269 // CHECK17-NEXT: store i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP83]], align 8 2270 // CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 2271 // CHECK17-NEXT: store i8** null, i8*** [[TMP84]], align 8 2272 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 2273 // CHECK17-NEXT: store i8** null, i8*** [[TMP85]], align 8 2274 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 2275 // CHECK17-NEXT: store i64 0, i64* [[TMP86]], align 8 2276 // CHECK17-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2St7St_funcEPS_iPg_l144.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 2277 // CHECK17-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0 2278 // CHECK17-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2279 // CHECK17: omp_offload.failed: 2280 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2St7St_funcEPS_iPg_l144(%struct.St* [[TMP9]], i64 [[TMP1]], ppc_fp128* [[TMP10]], i64 [[TMP3]], i64 [[TMP5]], double* [[VLA]], %struct.St* [[THIS1]], i64 [[TMP12]]) #[[ATTR4]] 2281 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 2282 // CHECK17: omp_offload.cont: 2283 // CHECK17-NEXT: [[TMP89:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2284 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP89]]) 2285 // CHECK17-NEXT: ret void 2286 // 2287 // 2288 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2St7St_funcEPS_iPg_l144 2289 // CHECK17-SAME: (%struct.St* [[S:%.*]], i64 [[VLA:%.*]], ppc_fp128* [[VLA1:%.*]], i64 [[VLA2:%.*]], i64 [[VLA4:%.*]], double* nonnull align 8 dereferenceable(8) [[VLA26:%.*]], %struct.St* [[THIS:%.*]], i64 [[N:%.*]]) #[[ATTR2]] { 2290 // CHECK17-NEXT: entry: 2291 // CHECK17-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 8 2292 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2293 // CHECK17-NEXT: [[VLA1_ADDR:%.*]] = alloca ppc_fp128*, align 8 2294 // CHECK17-NEXT: [[VLA_ADDR3:%.*]] = alloca i64, align 8 2295 // CHECK17-NEXT: [[VLA_ADDR5:%.*]] = alloca i64, align 8 2296 // CHECK17-NEXT: [[VLA2_ADDR:%.*]] = alloca double*, align 8 2297 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 2298 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2299 // CHECK17-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 8 2300 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2301 // CHECK17-NEXT: store ppc_fp128* [[VLA1]], ppc_fp128** [[VLA1_ADDR]], align 8 2302 // CHECK17-NEXT: store i64 [[VLA2]], i64* [[VLA_ADDR3]], align 8 2303 // CHECK17-NEXT: store i64 [[VLA4]], i64* [[VLA_ADDR5]], align 8 2304 // CHECK17-NEXT: store double* [[VLA26]], double** [[VLA2_ADDR]], align 8 2305 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 2306 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2307 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2308 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR3]], align 8 2309 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR5]], align 8 2310 // CHECK17-NEXT: [[TMP3:%.*]] = load double*, double** [[VLA2_ADDR]], align 8 2311 // CHECK17-NEXT: [[TMP4:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 2312 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2313 // CHECK17-NEXT: [[TMP5:%.*]] = load ppc_fp128*, ppc_fp128** [[VLA1_ADDR]], align 8 2314 // CHECK17-NEXT: [[TMP6:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 8 2315 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 8, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, ppc_fp128*, %struct.St*, i64, i64, double*, i32*, %struct.St*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP0]], ppc_fp128* [[TMP5]], %struct.St* [[TMP4]], i64 [[TMP1]], i64 [[TMP2]], double* [[TMP3]], i32* [[CONV]], %struct.St* [[TMP6]]) 2316 // CHECK17-NEXT: ret void 2317 // 2318 // 2319 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1 2320 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[VLA:%.*]], ppc_fp128* [[VLA1:%.*]], %struct.St* [[THIS:%.*]], i64 [[VLA2:%.*]], i64 [[VLA4:%.*]], double* nonnull align 8 dereferenceable(8) [[VLA26:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], %struct.St* [[S:%.*]]) #[[ATTR2]] { 2321 // CHECK17-NEXT: entry: 2322 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2323 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2324 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2325 // CHECK17-NEXT: [[VLA1_ADDR:%.*]] = alloca ppc_fp128*, align 8 2326 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 2327 // CHECK17-NEXT: [[VLA_ADDR3:%.*]] = alloca i64, align 8 2328 // CHECK17-NEXT: [[VLA_ADDR5:%.*]] = alloca i64, align 8 2329 // CHECK17-NEXT: [[VLA2_ADDR:%.*]] = alloca double*, align 8 2330 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2331 // CHECK17-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 8 2332 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2333 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2334 // CHECK17-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 2335 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2336 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2337 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2338 // CHECK17-NEXT: store ppc_fp128* [[VLA1]], ppc_fp128** [[VLA1_ADDR]], align 8 2339 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 2340 // CHECK17-NEXT: store i64 [[VLA2]], i64* [[VLA_ADDR3]], align 8 2341 // CHECK17-NEXT: store i64 [[VLA4]], i64* [[VLA_ADDR5]], align 8 2342 // CHECK17-NEXT: store double* [[VLA26]], double** [[VLA2_ADDR]], align 8 2343 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2344 // CHECK17-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 8 2345 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2346 // CHECK17-NEXT: [[TMP1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 2347 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR3]], align 8 2348 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR5]], align 8 2349 // CHECK17-NEXT: [[TMP4:%.*]] = load double*, double** [[VLA2_ADDR]], align 8 2350 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2351 // CHECK17-NEXT: [[TMP6:%.*]] = call i8* @llvm.stacksave() 2352 // CHECK17-NEXT: store i8* [[TMP6]], i8** [[SAVED_STACK]], align 8 2353 // CHECK17-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP2]], [[TMP3]] 2354 // CHECK17-NEXT: [[VLA7:%.*]] = alloca double, i64 [[TMP7]], align 128 2355 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 2356 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 2357 // CHECK17-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP2]], [[TMP3]] 2358 // CHECK17-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 8 2359 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast double* [[VLA7]] to i8* 2360 // CHECK17-NEXT: [[TMP11:%.*]] = bitcast double* [[TMP4]] to i8* 2361 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP10]], i8* align 128 [[TMP11]], i64 [[TMP9]], i1 false) 2362 // CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[TMP1]], i32 0, i32 1 2363 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[B]], align 4 2364 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[TMP1]], i32 0, i32 0 2365 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[A]], align 4 2366 // CHECK17-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double 2367 // CHECK17-NEXT: [[TMP13:%.*]] = mul nsw i64 1, [[TMP3]] 2368 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[VLA7]], i64 [[TMP13]] 2369 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP5]], align 4 2370 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP14]], 1 2371 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[SUB]] to i64 2372 // CHECK17-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX]], i64 [[IDXPROM]] 2373 // CHECK17-NEXT: store double [[CONV]], double* [[ARRAYIDX8]], align 8 2374 // CHECK17-NEXT: [[CONV9:%.*]] = fpext double [[CONV]] to ppc_fp128 2375 // CHECK17-NEXT: [[TMP15:%.*]] = load ppc_fp128*, ppc_fp128** [[VLA1_ADDR]], align 8 2376 // CHECK17-NEXT: [[B10:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[TMP1]], i32 0, i32 1 2377 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[B10]], align 4 2378 // CHECK17-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP16]] to i64 2379 // CHECK17-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds ppc_fp128, ppc_fp128* [[TMP15]], i64 [[IDXPROM11]] 2380 // CHECK17-NEXT: store ppc_fp128 [[CONV9]], ppc_fp128* [[ARRAYIDX12]], align 16 2381 // CHECK17-NEXT: [[TMP17:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2382 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP17]]) 2383 // CHECK17-NEXT: ret void 2384 // 2385 // 2386 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2387 // CHECK17-SAME: () #[[ATTR5:[0-9]+]] { 2388 // CHECK17-NEXT: entry: 2389 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 2390 // CHECK17-NEXT: ret void 2391 // 2392 // 2393 // CHECK19-LABEL: define {{[^@]+}}@_Z10array_funcPfP2StiPe 2394 // CHECK19-SAME: (float* [[A:%.*]], %struct.St* [[S:%.*]], i32 [[N:%.*]], x86_fp80* [[VLA1:%.*]]) #[[ATTR0:[0-9]+]] { 2395 // CHECK19-NEXT: entry: 2396 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca float*, align 4 2397 // CHECK19-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 4 2398 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2399 // CHECK19-NEXT: [[VLA1_ADDR:%.*]] = alloca x86_fp80*, align 4 2400 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2401 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2402 // CHECK19-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 2403 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2404 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [8 x i8*], align 4 2405 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [8 x i8*], align 4 2406 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [8 x i8*], align 4 2407 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [8 x i64], align 4 2408 // CHECK19-NEXT: store float* [[A]], float** [[A_ADDR]], align 4 2409 // CHECK19-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 4 2410 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2411 // CHECK19-NEXT: store x86_fp80* [[VLA1]], x86_fp80** [[VLA1_ADDR]], align 4 2412 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 2413 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2414 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2415 // CHECK19-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 2416 // CHECK19-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 4 2417 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP1]], [[TMP2]] 2418 // CHECK19-NEXT: [[VLA:%.*]] = alloca double, i32 [[TMP4]], align 128 2419 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 2420 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[__VLA_EXPR1]], align 4 2421 // CHECK19-NEXT: [[TMP5:%.*]] = load float*, float** [[A_ADDR]], align 4 2422 // CHECK19-NEXT: [[TMP6:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 4 2423 // CHECK19-NEXT: [[TMP7:%.*]] = load x86_fp80*, x86_fp80** [[VLA1_ADDR]], align 4 2424 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4 2425 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[N_CASTED]], align 4 2426 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[N_CASTED]], align 4 2427 // CHECK19-NEXT: [[TMP10:%.*]] = mul nuw i32 [[TMP1]], [[TMP2]] 2428 // CHECK19-NEXT: [[TMP11:%.*]] = mul nuw i32 [[TMP10]], 8 2429 // CHECK19-NEXT: [[TMP12:%.*]] = sext i32 [[TMP11]] to i64 2430 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast [8 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2431 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 bitcast ([8 x i64]* @.offload_sizes to i8*), i32 64, i1 false) 2432 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2433 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to float** 2434 // CHECK19-NEXT: store float* [[TMP5]], float** [[TMP15]], align 4 2435 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2436 // CHECK19-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to float** 2437 // CHECK19-NEXT: store float* [[TMP5]], float** [[TMP17]], align 4 2438 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2439 // CHECK19-NEXT: store i8* null, i8** [[TMP18]], align 4 2440 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2441 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to %struct.St** 2442 // CHECK19-NEXT: store %struct.St* [[TMP6]], %struct.St** [[TMP20]], align 4 2443 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2444 // CHECK19-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to %struct.St** 2445 // CHECK19-NEXT: store %struct.St* [[TMP6]], %struct.St** [[TMP22]], align 4 2446 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2447 // CHECK19-NEXT: store i8* null, i8** [[TMP23]], align 4 2448 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2449 // CHECK19-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 2450 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4 2451 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2452 // CHECK19-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 2453 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP27]], align 4 2454 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2455 // CHECK19-NEXT: store i8* null, i8** [[TMP28]], align 4 2456 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2457 // CHECK19-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to x86_fp80** 2458 // CHECK19-NEXT: store x86_fp80* [[TMP7]], x86_fp80** [[TMP30]], align 4 2459 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2460 // CHECK19-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to x86_fp80** 2461 // CHECK19-NEXT: store x86_fp80* [[TMP7]], x86_fp80** [[TMP32]], align 4 2462 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2463 // CHECK19-NEXT: store i8* null, i8** [[TMP33]], align 4 2464 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2465 // CHECK19-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32* 2466 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP35]], align 4 2467 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2468 // CHECK19-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i32* 2469 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP37]], align 4 2470 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2471 // CHECK19-NEXT: store i8* null, i8** [[TMP38]], align 4 2472 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 5 2473 // CHECK19-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 2474 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[TMP40]], align 4 2475 // CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 5 2476 // CHECK19-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i32* 2477 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[TMP42]], align 4 2478 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 5 2479 // CHECK19-NEXT: store i8* null, i8** [[TMP43]], align 4 2480 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 6 2481 // CHECK19-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to double** 2482 // CHECK19-NEXT: store double* [[VLA]], double** [[TMP45]], align 4 2483 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 6 2484 // CHECK19-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to double** 2485 // CHECK19-NEXT: store double* [[VLA]], double** [[TMP47]], align 4 2486 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [8 x i64], [8 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 2487 // CHECK19-NEXT: store i64 [[TMP12]], i64* [[TMP48]], align 4 2488 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 6 2489 // CHECK19-NEXT: store i8* null, i8** [[TMP49]], align 4 2490 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 7 2491 // CHECK19-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32* 2492 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[TMP51]], align 4 2493 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 7 2494 // CHECK19-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i32* 2495 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[TMP53]], align 4 2496 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 7 2497 // CHECK19-NEXT: store i8* null, i8** [[TMP54]], align 4 2498 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2499 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [8 x i8*], [8 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2500 // CHECK19-NEXT: [[TMP57:%.*]] = getelementptr inbounds [8 x i64], [8 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2501 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2502 // CHECK19-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 2503 // CHECK19-NEXT: store i32 1, i32* [[TMP58]], align 4 2504 // CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 2505 // CHECK19-NEXT: store i32 8, i32* [[TMP59]], align 4 2506 // CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 2507 // CHECK19-NEXT: store i8** [[TMP55]], i8*** [[TMP60]], align 4 2508 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 2509 // CHECK19-NEXT: store i8** [[TMP56]], i8*** [[TMP61]], align 4 2510 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 2511 // CHECK19-NEXT: store i64* [[TMP57]], i64** [[TMP62]], align 4 2512 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 2513 // CHECK19-NEXT: store i64* getelementptr inbounds ([8 x i64], [8 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP63]], align 4 2514 // CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 2515 // CHECK19-NEXT: store i8** null, i8*** [[TMP64]], align 4 2516 // CHECK19-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 2517 // CHECK19-NEXT: store i8** null, i8*** [[TMP65]], align 4 2518 // CHECK19-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 2519 // CHECK19-NEXT: store i64 0, i64* [[TMP66]], align 8 2520 // CHECK19-NEXT: [[TMP67:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z10array_funcPfP2StiPe_l152.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 2521 // CHECK19-NEXT: [[TMP68:%.*]] = icmp ne i32 [[TMP67]], 0 2522 // CHECK19-NEXT: br i1 [[TMP68]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2523 // CHECK19: omp_offload.failed: 2524 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z10array_funcPfP2StiPe_l152(float* [[TMP5]], %struct.St* [[TMP6]], i32 [[TMP0]], x86_fp80* [[TMP7]], i32 [[TMP1]], i32 [[TMP2]], double* [[VLA]], i32 [[TMP9]]) #[[ATTR4:[0-9]+]] 2525 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 2526 // CHECK19: omp_offload.cont: 2527 // CHECK19-NEXT: [[TMP69:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2528 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP69]]) 2529 // CHECK19-NEXT: ret void 2530 // 2531 // 2532 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z10array_funcPfP2StiPe_l152 2533 // CHECK19-SAME: (float* [[A:%.*]], %struct.St* [[S:%.*]], i32 [[VLA:%.*]], x86_fp80* [[VLA1:%.*]], i32 [[VLA2:%.*]], i32 [[VLA4:%.*]], double* nonnull align 4 dereferenceable(8) [[VLA26:%.*]], i32 [[N:%.*]]) #[[ATTR2:[0-9]+]] { 2534 // CHECK19-NEXT: entry: 2535 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca float*, align 4 2536 // CHECK19-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 4 2537 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2538 // CHECK19-NEXT: [[VLA1_ADDR:%.*]] = alloca x86_fp80*, align 4 2539 // CHECK19-NEXT: [[VLA_ADDR3:%.*]] = alloca i32, align 4 2540 // CHECK19-NEXT: [[VLA_ADDR5:%.*]] = alloca i32, align 4 2541 // CHECK19-NEXT: [[VLA2_ADDR:%.*]] = alloca double*, align 4 2542 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2543 // CHECK19-NEXT: store float* [[A]], float** [[A_ADDR]], align 4 2544 // CHECK19-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 4 2545 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2546 // CHECK19-NEXT: store x86_fp80* [[VLA1]], x86_fp80** [[VLA1_ADDR]], align 4 2547 // CHECK19-NEXT: store i32 [[VLA2]], i32* [[VLA_ADDR3]], align 4 2548 // CHECK19-NEXT: store i32 [[VLA4]], i32* [[VLA_ADDR5]], align 4 2549 // CHECK19-NEXT: store double* [[VLA26]], double** [[VLA2_ADDR]], align 4 2550 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2551 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2552 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR3]], align 4 2553 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR5]], align 4 2554 // CHECK19-NEXT: [[TMP3:%.*]] = load double*, double** [[VLA2_ADDR]], align 4 2555 // CHECK19-NEXT: [[TMP4:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 4 2556 // CHECK19-NEXT: [[TMP5:%.*]] = load x86_fp80*, x86_fp80** [[VLA1_ADDR]], align 4 2557 // CHECK19-NEXT: [[TMP6:%.*]] = load float*, float** [[A_ADDR]], align 4 2558 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 8, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.St*, i32*, i32, x86_fp80*, float*, i32, i32, double*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.St* [[TMP4]], i32* [[N_ADDR]], i32 [[TMP0]], x86_fp80* [[TMP5]], float* [[TMP6]], i32 [[TMP1]], i32 [[TMP2]], double* [[TMP3]]) 2559 // CHECK19-NEXT: ret void 2560 // 2561 // 2562 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 2563 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.St* [[S:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], x86_fp80* [[VLA1:%.*]], float* [[A:%.*]], i32 [[VLA2:%.*]], i32 [[VLA4:%.*]], double* nonnull align 4 dereferenceable(8) [[VLA26:%.*]]) #[[ATTR2]] { 2564 // CHECK19-NEXT: entry: 2565 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2566 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2567 // CHECK19-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 4 2568 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2569 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2570 // CHECK19-NEXT: [[VLA1_ADDR:%.*]] = alloca x86_fp80*, align 4 2571 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca float*, align 4 2572 // CHECK19-NEXT: [[VLA_ADDR3:%.*]] = alloca i32, align 4 2573 // CHECK19-NEXT: [[VLA_ADDR5:%.*]] = alloca i32, align 4 2574 // CHECK19-NEXT: [[VLA2_ADDR:%.*]] = alloca double*, align 4 2575 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2576 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2577 // CHECK19-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 2578 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2579 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2580 // CHECK19-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 4 2581 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2582 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2583 // CHECK19-NEXT: store x86_fp80* [[VLA1]], x86_fp80** [[VLA1_ADDR]], align 4 2584 // CHECK19-NEXT: store float* [[A]], float** [[A_ADDR]], align 4 2585 // CHECK19-NEXT: store i32 [[VLA2]], i32* [[VLA_ADDR3]], align 4 2586 // CHECK19-NEXT: store i32 [[VLA4]], i32* [[VLA_ADDR5]], align 4 2587 // CHECK19-NEXT: store double* [[VLA26]], double** [[VLA2_ADDR]], align 4 2588 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2589 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2590 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR3]], align 4 2591 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR5]], align 4 2592 // CHECK19-NEXT: [[TMP4:%.*]] = load double*, double** [[VLA2_ADDR]], align 4 2593 // CHECK19-NEXT: [[TMP5:%.*]] = call i8* @llvm.stacksave() 2594 // CHECK19-NEXT: store i8* [[TMP5]], i8** [[SAVED_STACK]], align 4 2595 // CHECK19-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP2]], [[TMP3]] 2596 // CHECK19-NEXT: [[VLA7:%.*]] = alloca double, i32 [[TMP6]], align 128 2597 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[__VLA_EXPR0]], align 4 2598 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4 2599 // CHECK19-NEXT: [[TMP7:%.*]] = mul nuw i32 [[TMP2]], [[TMP3]] 2600 // CHECK19-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 8 2601 // CHECK19-NEXT: [[TMP9:%.*]] = bitcast double* [[VLA7]] to i8* 2602 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast double* [[TMP4]] to i8* 2603 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP9]], i8* align 128 [[TMP10]], i32 [[TMP8]], i1 false) 2604 // CHECK19-NEXT: [[TMP11:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 4 2605 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[TMP11]], i32 0 2606 // CHECK19-NEXT: [[TMP12:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 4 2607 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP0]], align 4 2608 // CHECK19-NEXT: [[TMP14:%.*]] = load x86_fp80*, x86_fp80** [[VLA1_ADDR]], align 4 2609 // CHECK19-NEXT: call void @_ZN2St7St_funcEPS_iPe(%struct.St* nonnull align 4 dereferenceable(8) [[ARRAYIDX]], %struct.St* [[TMP12]], i32 [[TMP13]], x86_fp80* [[TMP14]]) 2610 // CHECK19-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2611 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP15]]) 2612 // CHECK19-NEXT: ret void 2613 // 2614 // 2615 // CHECK19-LABEL: define {{[^@]+}}@_ZN2St7St_funcEPS_iPe 2616 // CHECK19-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]], %struct.St* [[S:%.*]], i32 [[N:%.*]], x86_fp80* [[VLA1:%.*]]) #[[ATTR0]] comdat align 2 { 2617 // CHECK19-NEXT: entry: 2618 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 2619 // CHECK19-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 4 2620 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2621 // CHECK19-NEXT: [[VLA1_ADDR:%.*]] = alloca x86_fp80*, align 4 2622 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2623 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2624 // CHECK19-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 2625 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2626 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [10 x i8*], align 4 2627 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [10 x i8*], align 4 2628 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [10 x i8*], align 4 2629 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 4 2630 // CHECK19-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 2631 // CHECK19-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 4 2632 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2633 // CHECK19-NEXT: store x86_fp80* [[VLA1]], x86_fp80** [[VLA1_ADDR]], align 4 2634 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 2635 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 2636 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2637 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2638 // CHECK19-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 2639 // CHECK19-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 4 2640 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP1]], [[TMP2]] 2641 // CHECK19-NEXT: [[VLA:%.*]] = alloca double, i32 [[TMP4]], align 128 2642 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 2643 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[__VLA_EXPR1]], align 4 2644 // CHECK19-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 1 2645 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 2646 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 0 2647 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[A]], align 4 2648 // CHECK19-NEXT: [[TMP6:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 4 2649 // CHECK19-NEXT: [[TMP7:%.*]] = load x86_fp80*, x86_fp80** [[VLA1_ADDR]], align 4 2650 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4 2651 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[N_CASTED]], align 4 2652 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[N_CASTED]], align 4 2653 // CHECK19-NEXT: [[TMP10:%.*]] = mul nuw i32 [[TMP1]], [[TMP2]] 2654 // CHECK19-NEXT: [[TMP11:%.*]] = mul nuw i32 [[TMP10]], 8 2655 // CHECK19-NEXT: [[TMP12:%.*]] = sext i32 [[TMP11]] to i64 2656 // CHECK19-NEXT: [[B2:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 2657 // CHECK19-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 0 2658 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[B2]], i32 1 2659 // CHECK19-NEXT: [[TMP14:%.*]] = bitcast i32* [[A3]] to i8* 2660 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i32* [[TMP13]] to i8* 2661 // CHECK19-NEXT: [[TMP16:%.*]] = ptrtoint i8* [[TMP15]] to i64 2662 // CHECK19-NEXT: [[TMP17:%.*]] = ptrtoint i8* [[TMP14]] to i64 2663 // CHECK19-NEXT: [[TMP18:%.*]] = sub i64 [[TMP16]], [[TMP17]] 2664 // CHECK19-NEXT: [[TMP19:%.*]] = sdiv exact i64 [[TMP18]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64) 2665 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast [10 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2666 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP20]], i8* align 4 bitcast ([10 x i64]* @.offload_sizes.2 to i8*), i32 80, i1 false) 2667 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2668 // CHECK19-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to %struct.St** 2669 // CHECK19-NEXT: store %struct.St* [[TMP6]], %struct.St** [[TMP22]], align 4 2670 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2671 // CHECK19-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to %struct.St** 2672 // CHECK19-NEXT: store %struct.St* [[TMP6]], %struct.St** [[TMP24]], align 4 2673 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2674 // CHECK19-NEXT: store i8* null, i8** [[TMP25]], align 4 2675 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2676 // CHECK19-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 2677 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP27]], align 4 2678 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2679 // CHECK19-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32* 2680 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP29]], align 4 2681 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2682 // CHECK19-NEXT: store i8* null, i8** [[TMP30]], align 4 2683 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2684 // CHECK19-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to x86_fp80** 2685 // CHECK19-NEXT: store x86_fp80* [[TMP7]], x86_fp80** [[TMP32]], align 4 2686 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2687 // CHECK19-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to x86_fp80** 2688 // CHECK19-NEXT: store x86_fp80* [[TMP7]], x86_fp80** [[TMP34]], align 4 2689 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2690 // CHECK19-NEXT: store i8* null, i8** [[TMP35]], align 4 2691 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2692 // CHECK19-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i32* 2693 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP37]], align 4 2694 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2695 // CHECK19-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32* 2696 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP39]], align 4 2697 // CHECK19-NEXT: [[TMP40:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2698 // CHECK19-NEXT: store i8* null, i8** [[TMP40]], align 4 2699 // CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2700 // CHECK19-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i32* 2701 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[TMP42]], align 4 2702 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2703 // CHECK19-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32* 2704 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[TMP44]], align 4 2705 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2706 // CHECK19-NEXT: store i8* null, i8** [[TMP45]], align 4 2707 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 5 2708 // CHECK19-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to double** 2709 // CHECK19-NEXT: store double* [[VLA]], double** [[TMP47]], align 4 2710 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 5 2711 // CHECK19-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to double** 2712 // CHECK19-NEXT: store double* [[VLA]], double** [[TMP49]], align 4 2713 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5 2714 // CHECK19-NEXT: store i64 [[TMP12]], i64* [[TMP50]], align 4 2715 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 5 2716 // CHECK19-NEXT: store i8* null, i8** [[TMP51]], align 4 2717 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 6 2718 // CHECK19-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to %struct.St** 2719 // CHECK19-NEXT: store %struct.St* [[THIS1]], %struct.St** [[TMP53]], align 4 2720 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 6 2721 // CHECK19-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32** 2722 // CHECK19-NEXT: store i32* [[A3]], i32** [[TMP55]], align 4 2723 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 2724 // CHECK19-NEXT: store i64 [[TMP19]], i64* [[TMP56]], align 4 2725 // CHECK19-NEXT: [[TMP57:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 6 2726 // CHECK19-NEXT: store i8* null, i8** [[TMP57]], align 4 2727 // CHECK19-NEXT: [[TMP58:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 7 2728 // CHECK19-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to %struct.St** 2729 // CHECK19-NEXT: store %struct.St* [[THIS1]], %struct.St** [[TMP59]], align 4 2730 // CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 7 2731 // CHECK19-NEXT: [[TMP61:%.*]] = bitcast i8** [[TMP60]] to i32** 2732 // CHECK19-NEXT: store i32* [[B2]], i32** [[TMP61]], align 4 2733 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 7 2734 // CHECK19-NEXT: store i8* null, i8** [[TMP62]], align 4 2735 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 8 2736 // CHECK19-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to %struct.St** 2737 // CHECK19-NEXT: store %struct.St* [[THIS1]], %struct.St** [[TMP64]], align 4 2738 // CHECK19-NEXT: [[TMP65:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 8 2739 // CHECK19-NEXT: [[TMP66:%.*]] = bitcast i8** [[TMP65]] to i32** 2740 // CHECK19-NEXT: store i32* [[A3]], i32** [[TMP66]], align 4 2741 // CHECK19-NEXT: [[TMP67:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 8 2742 // CHECK19-NEXT: store i8* null, i8** [[TMP67]], align 4 2743 // CHECK19-NEXT: [[TMP68:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 9 2744 // CHECK19-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i32* 2745 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[TMP69]], align 4 2746 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 9 2747 // CHECK19-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 2748 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[TMP71]], align 4 2749 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 9 2750 // CHECK19-NEXT: store i8* null, i8** [[TMP72]], align 4 2751 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2752 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2753 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2754 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2755 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 2756 // CHECK19-NEXT: store i32 1, i32* [[TMP76]], align 4 2757 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 2758 // CHECK19-NEXT: store i32 10, i32* [[TMP77]], align 4 2759 // CHECK19-NEXT: [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 2760 // CHECK19-NEXT: store i8** [[TMP73]], i8*** [[TMP78]], align 4 2761 // CHECK19-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 2762 // CHECK19-NEXT: store i8** [[TMP74]], i8*** [[TMP79]], align 4 2763 // CHECK19-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 2764 // CHECK19-NEXT: store i64* [[TMP75]], i64** [[TMP80]], align 4 2765 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 2766 // CHECK19-NEXT: store i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP81]], align 4 2767 // CHECK19-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 2768 // CHECK19-NEXT: store i8** null, i8*** [[TMP82]], align 4 2769 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 2770 // CHECK19-NEXT: store i8** null, i8*** [[TMP83]], align 4 2771 // CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 2772 // CHECK19-NEXT: store i64 0, i64* [[TMP84]], align 8 2773 // CHECK19-NEXT: [[TMP85:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2St7St_funcEPS_iPe_l144.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 2774 // CHECK19-NEXT: [[TMP86:%.*]] = icmp ne i32 [[TMP85]], 0 2775 // CHECK19-NEXT: br i1 [[TMP86]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2776 // CHECK19: omp_offload.failed: 2777 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2St7St_funcEPS_iPe_l144(%struct.St* [[TMP6]], i32 [[TMP0]], x86_fp80* [[TMP7]], i32 [[TMP1]], i32 [[TMP2]], double* [[VLA]], %struct.St* [[THIS1]], i32 [[TMP9]]) #[[ATTR4]] 2778 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 2779 // CHECK19: omp_offload.cont: 2780 // CHECK19-NEXT: [[TMP87:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2781 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP87]]) 2782 // CHECK19-NEXT: ret void 2783 // 2784 // 2785 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2St7St_funcEPS_iPe_l144 2786 // CHECK19-SAME: (%struct.St* [[S:%.*]], i32 [[VLA:%.*]], x86_fp80* [[VLA1:%.*]], i32 [[VLA2:%.*]], i32 [[VLA4:%.*]], double* nonnull align 4 dereferenceable(8) [[VLA26:%.*]], %struct.St* [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR2]] { 2787 // CHECK19-NEXT: entry: 2788 // CHECK19-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 4 2789 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2790 // CHECK19-NEXT: [[VLA1_ADDR:%.*]] = alloca x86_fp80*, align 4 2791 // CHECK19-NEXT: [[VLA_ADDR3:%.*]] = alloca i32, align 4 2792 // CHECK19-NEXT: [[VLA_ADDR5:%.*]] = alloca i32, align 4 2793 // CHECK19-NEXT: [[VLA2_ADDR:%.*]] = alloca double*, align 4 2794 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 2795 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2796 // CHECK19-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 4 2797 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2798 // CHECK19-NEXT: store x86_fp80* [[VLA1]], x86_fp80** [[VLA1_ADDR]], align 4 2799 // CHECK19-NEXT: store i32 [[VLA2]], i32* [[VLA_ADDR3]], align 4 2800 // CHECK19-NEXT: store i32 [[VLA4]], i32* [[VLA_ADDR5]], align 4 2801 // CHECK19-NEXT: store double* [[VLA26]], double** [[VLA2_ADDR]], align 4 2802 // CHECK19-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 2803 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2804 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2805 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR3]], align 4 2806 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR5]], align 4 2807 // CHECK19-NEXT: [[TMP3:%.*]] = load double*, double** [[VLA2_ADDR]], align 4 2808 // CHECK19-NEXT: [[TMP4:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 2809 // CHECK19-NEXT: [[TMP5:%.*]] = load x86_fp80*, x86_fp80** [[VLA1_ADDR]], align 4 2810 // CHECK19-NEXT: [[TMP6:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 4 2811 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 8, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, x86_fp80*, %struct.St*, i32, i32, double*, i32*, %struct.St*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP0]], x86_fp80* [[TMP5]], %struct.St* [[TMP4]], i32 [[TMP1]], i32 [[TMP2]], double* [[TMP3]], i32* [[N_ADDR]], %struct.St* [[TMP6]]) 2812 // CHECK19-NEXT: ret void 2813 // 2814 // 2815 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1 2816 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[VLA:%.*]], x86_fp80* [[VLA1:%.*]], %struct.St* [[THIS:%.*]], i32 [[VLA2:%.*]], i32 [[VLA4:%.*]], double* nonnull align 4 dereferenceable(8) [[VLA26:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], %struct.St* [[S:%.*]]) #[[ATTR2]] { 2817 // CHECK19-NEXT: entry: 2818 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2819 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2820 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2821 // CHECK19-NEXT: [[VLA1_ADDR:%.*]] = alloca x86_fp80*, align 4 2822 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 2823 // CHECK19-NEXT: [[VLA_ADDR3:%.*]] = alloca i32, align 4 2824 // CHECK19-NEXT: [[VLA_ADDR5:%.*]] = alloca i32, align 4 2825 // CHECK19-NEXT: [[VLA2_ADDR:%.*]] = alloca double*, align 4 2826 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2827 // CHECK19-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 4 2828 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2829 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2830 // CHECK19-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 2831 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2832 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2833 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2834 // CHECK19-NEXT: store x86_fp80* [[VLA1]], x86_fp80** [[VLA1_ADDR]], align 4 2835 // CHECK19-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 2836 // CHECK19-NEXT: store i32 [[VLA2]], i32* [[VLA_ADDR3]], align 4 2837 // CHECK19-NEXT: store i32 [[VLA4]], i32* [[VLA_ADDR5]], align 4 2838 // CHECK19-NEXT: store double* [[VLA26]], double** [[VLA2_ADDR]], align 4 2839 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2840 // CHECK19-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 4 2841 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2842 // CHECK19-NEXT: [[TMP1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 2843 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR3]], align 4 2844 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR5]], align 4 2845 // CHECK19-NEXT: [[TMP4:%.*]] = load double*, double** [[VLA2_ADDR]], align 4 2846 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2847 // CHECK19-NEXT: [[TMP6:%.*]] = call i8* @llvm.stacksave() 2848 // CHECK19-NEXT: store i8* [[TMP6]], i8** [[SAVED_STACK]], align 4 2849 // CHECK19-NEXT: [[TMP7:%.*]] = mul nuw i32 [[TMP2]], [[TMP3]] 2850 // CHECK19-NEXT: [[VLA7:%.*]] = alloca double, i32 [[TMP7]], align 128 2851 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[__VLA_EXPR0]], align 4 2852 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4 2853 // CHECK19-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP2]], [[TMP3]] 2854 // CHECK19-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 8 2855 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast double* [[VLA7]] to i8* 2856 // CHECK19-NEXT: [[TMP11:%.*]] = bitcast double* [[TMP4]] to i8* 2857 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP10]], i8* align 128 [[TMP11]], i32 [[TMP9]], i1 false) 2858 // CHECK19-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[TMP1]], i32 0, i32 1 2859 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[B]], align 4 2860 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[TMP1]], i32 0, i32 0 2861 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[A]], align 4 2862 // CHECK19-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double 2863 // CHECK19-NEXT: [[TMP13:%.*]] = mul nsw i32 1, [[TMP3]] 2864 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[VLA7]], i32 [[TMP13]] 2865 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP5]], align 4 2866 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP14]], 1 2867 // CHECK19-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX]], i32 [[SUB]] 2868 // CHECK19-NEXT: store double [[CONV]], double* [[ARRAYIDX8]], align 8 2869 // CHECK19-NEXT: [[CONV9:%.*]] = fpext double [[CONV]] to x86_fp80 2870 // CHECK19-NEXT: [[TMP15:%.*]] = load x86_fp80*, x86_fp80** [[VLA1_ADDR]], align 4 2871 // CHECK19-NEXT: [[B10:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[TMP1]], i32 0, i32 1 2872 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[B10]], align 4 2873 // CHECK19-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds x86_fp80, x86_fp80* [[TMP15]], i32 [[TMP16]] 2874 // CHECK19-NEXT: store x86_fp80 [[CONV9]], x86_fp80* [[ARRAYIDX11]], align 4 2875 // CHECK19-NEXT: [[TMP17:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2876 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP17]]) 2877 // CHECK19-NEXT: ret void 2878 // 2879 // 2880 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2881 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] { 2882 // CHECK19-NEXT: entry: 2883 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 2884 // CHECK19-NEXT: ret void 2885 // 2886