1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4
8 
9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK6
12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7
13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8
15 
16 // RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
18 // RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping| FileCheck %s --check-prefix=CHECK10
19 // RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
21 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12
22 
23 // RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13
24 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
25 // RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK14
26 // RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15
27 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
28 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK16
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32 
33 template <class T>
34 struct S {
35   T f;
36   S(T a) : f(a) {}
37   S() : f() {}
38   operator T() { return T(); }
39   ~S() {}
40 };
41 
42 template <typename T>
43 T tmain() {
44   S<T> test;
45   T t_var = T();
46   T vec[] = {1, 2};
47   S<T> s_arr[] = {1, 2};
48   S<T> &var = test;
49   #pragma omp target
50   #pragma omp teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var)
51   for (int i = 0; i < 2; ++i) {
52     vec[i] = t_var;
53     s_arr[i] = var;
54   }
55   return T();
56 }
57 
58 int main() {
59   static int svar;
60   volatile double g;
61   volatile double &g1 = g;
62 
63   #ifdef LAMBDA
64   [&]() {
65     static float sfvar;
66 
67     #pragma omp target
68     #pragma omp teams distribute simd lastprivate(g, g1, svar, sfvar)
69     for (int i = 0; i < 2; ++i) {
70       // loop variables
71 
72       // init private variables
73       g = 1;
74       g1 = 1;
75       svar = 3;
76       sfvar = 4.0;
77 
78 
79       [&]() {
80         g = 2;
81         g1 = 2;
82         svar = 4;
83         sfvar = 8.0;
84 
85       }();
86     }
87   }();
88   return 0;
89   #else
90   S<float> test;
91   int t_var = 0;
92   int vec[] = {1, 2};
93   S<float> s_arr[] = {1, 2};
94   S<float> &var = test;
95 
96   #pragma omp target
97   #pragma omp teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)
98   for (int i = 0; i < 2; ++i) {
99     vec[i] = t_var;
100     s_arr[i] = var;
101   }
102   int i;
103 
104   return tmain<int>();
105   #endif
106 }
107 
108 
109 // skip loop variables
110 
111 // copy from parameters to local address variables
112 
113 // load content of local address variables
114 // the distribute loop
115 // assignment: vec[i] = t_var;
116 
117 // assignment: s_arr[i] = var;
118 
119 // lastprivates
120 
121 
122 // template tmain
123 
124 
125 
126 // skip alloca of global_tid and bound_tid
127 // skip loop variables
128 
129 // skip init of bound and global tid
130 // copy from parameters to local address variables
131 
132 // load content of local address variables
133 // assignment: vec[i] = t_var;
134 
135 // assignment: s_arr[i] = var;
136 
137 // lastprivates
138 
139 #endif
140 // CHECK1-LABEL: define {{[^@]+}}@main
141 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
142 // CHECK1-NEXT:  entry:
143 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
144 // CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8
145 // CHECK1-NEXT:    [[G1:%.*]] = alloca double*, align 8
146 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
147 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
148 // CHECK1-NEXT:    store double* [[G]], double** [[G1]], align 8
149 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
150 // CHECK1-NEXT:    store double* [[G]], double** [[TMP0]], align 8
151 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
152 // CHECK1-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 8
153 // CHECK1-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 8
154 // CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]])
155 // CHECK1-NEXT:    ret i32 0
156 //
157 //
158 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
159 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
160 // CHECK1-NEXT:  entry:
161 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8
162 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8
163 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
164 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8
165 // CHECK1-NEXT:    [[TMP:%.*]] = alloca double*, align 8
166 // CHECK1-NEXT:    store i64 [[G]], i64* [[G_ADDR]], align 8
167 // CHECK1-NEXT:    store i64 [[G1]], i64* [[G1_ADDR]], align 8
168 // CHECK1-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
169 // CHECK1-NEXT:    store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
170 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
171 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
172 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
173 // CHECK1-NEXT:    [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
174 // CHECK1-NEXT:    store double* [[CONV1]], double** [[TMP]], align 8
175 // CHECK1-NEXT:    [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
176 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
177 // CHECK1-NEXT:    ret void
178 //
179 //
180 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
181 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
182 // CHECK1-NEXT:  entry:
183 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
184 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
185 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 8
186 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 8
187 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 8
188 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca float*, align 8
189 // CHECK1-NEXT:    [[TMP:%.*]] = alloca double*, align 8
190 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
191 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
192 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
193 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
194 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
195 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
196 // CHECK1-NEXT:    [[G2:%.*]] = alloca double, align 8
197 // CHECK1-NEXT:    [[G13:%.*]] = alloca double, align 8
198 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca double*, align 8
199 // CHECK1-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4
200 // CHECK1-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4
201 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
202 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
203 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
204 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
205 // CHECK1-NEXT:    store double* [[G]], double** [[G_ADDR]], align 8
206 // CHECK1-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 8
207 // CHECK1-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
208 // CHECK1-NEXT:    store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
209 // CHECK1-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
210 // CHECK1-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
211 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
212 // CHECK1-NEXT:    [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
213 // CHECK1-NEXT:    store double* [[TMP1]], double** [[TMP]], align 8
214 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
215 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
216 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
217 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
218 // CHECK1-NEXT:    [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
219 // CHECK1-NEXT:    store double* [[G13]], double** [[_TMP4]], align 8
220 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
221 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
222 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
223 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
224 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
225 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
226 // CHECK1:       cond.true:
227 // CHECK1-NEXT:    br label [[COND_END:%.*]]
228 // CHECK1:       cond.false:
229 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
230 // CHECK1-NEXT:    br label [[COND_END]]
231 // CHECK1:       cond.end:
232 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
233 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
234 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
235 // CHECK1-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
236 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
237 // CHECK1:       omp.inner.for.cond:
238 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
239 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4
240 // CHECK1-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
241 // CHECK1-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
242 // CHECK1:       omp.inner.for.body:
243 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
244 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
245 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
246 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4
247 // CHECK1-NEXT:    store double 1.000000e+00, double* [[G2]], align 8, !llvm.access.group !4
248 // CHECK1-NEXT:    [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 8, !llvm.access.group !4
249 // CHECK1-NEXT:    store volatile double 1.000000e+00, double* [[TMP13]], align 8, !llvm.access.group !4
250 // CHECK1-NEXT:    store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !4
251 // CHECK1-NEXT:    store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !4
252 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
253 // CHECK1-NEXT:    store double* [[G2]], double** [[TMP14]], align 8, !llvm.access.group !4
254 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
255 // CHECK1-NEXT:    [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 8, !llvm.access.group !4
256 // CHECK1-NEXT:    store double* [[TMP16]], double** [[TMP15]], align 8, !llvm.access.group !4
257 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
258 // CHECK1-NEXT:    store i32* [[SVAR5]], i32** [[TMP17]], align 8, !llvm.access.group !4
259 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
260 // CHECK1-NEXT:    store float* [[SFVAR6]], float** [[TMP18]], align 8, !llvm.access.group !4
261 // CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef [[REF_TMP]]), !llvm.access.group !4
262 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
263 // CHECK1:       omp.body.continue:
264 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
265 // CHECK1:       omp.inner.for.inc:
266 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
267 // CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
268 // CHECK1-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
269 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
270 // CHECK1:       omp.inner.for.end:
271 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
272 // CHECK1:       omp.loop.exit:
273 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]])
274 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
275 // CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
276 // CHECK1-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
277 // CHECK1:       .omp.final.then:
278 // CHECK1-NEXT:    store i32 2, i32* [[I]], align 4
279 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
280 // CHECK1:       .omp.final.done:
281 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
282 // CHECK1-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
283 // CHECK1-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
284 // CHECK1:       .omp.lastprivate.then:
285 // CHECK1-NEXT:    [[TMP24:%.*]] = load double, double* [[G2]], align 8
286 // CHECK1-NEXT:    store volatile double [[TMP24]], double* [[TMP0]], align 8
287 // CHECK1-NEXT:    [[TMP25:%.*]] = load double*, double** [[_TMP4]], align 8
288 // CHECK1-NEXT:    [[TMP26:%.*]] = load double, double* [[TMP25]], align 8
289 // CHECK1-NEXT:    store volatile double [[TMP26]], double* [[TMP4]], align 8
290 // CHECK1-NEXT:    [[TMP27:%.*]] = load i32, i32* [[SVAR5]], align 4
291 // CHECK1-NEXT:    store i32 [[TMP27]], i32* [[TMP2]], align 4
292 // CHECK1-NEXT:    [[TMP28:%.*]] = load float, float* [[SFVAR6]], align 4
293 // CHECK1-NEXT:    store float [[TMP28]], float* [[TMP3]], align 4
294 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
295 // CHECK1:       .omp.lastprivate.done:
296 // CHECK1-NEXT:    ret void
297 //
298 //
299 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
300 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
301 // CHECK1-NEXT:  entry:
302 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
303 // CHECK1-NEXT:    ret void
304 //
305 //
306 // CHECK2-LABEL: define {{[^@]+}}@main
307 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
308 // CHECK2-NEXT:  entry:
309 // CHECK2-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
310 // CHECK2-NEXT:    [[G:%.*]] = alloca double, align 8
311 // CHECK2-NEXT:    [[G1:%.*]] = alloca double*, align 8
312 // CHECK2-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
313 // CHECK2-NEXT:    store i32 0, i32* [[RETVAL]], align 4
314 // CHECK2-NEXT:    store double* [[G]], double** [[G1]], align 8
315 // CHECK2-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
316 // CHECK2-NEXT:    store double* [[G]], double** [[TMP0]], align 8
317 // CHECK2-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
318 // CHECK2-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 8
319 // CHECK2-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 8
320 // CHECK2-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]])
321 // CHECK2-NEXT:    ret i32 0
322 //
323 //
324 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
325 // CHECK2-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
326 // CHECK2-NEXT:  entry:
327 // CHECK2-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8
328 // CHECK2-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8
329 // CHECK2-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
330 // CHECK2-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8
331 // CHECK2-NEXT:    [[TMP:%.*]] = alloca double*, align 8
332 // CHECK2-NEXT:    store i64 [[G]], i64* [[G_ADDR]], align 8
333 // CHECK2-NEXT:    store i64 [[G1]], i64* [[G1_ADDR]], align 8
334 // CHECK2-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
335 // CHECK2-NEXT:    store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
336 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
337 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
338 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
339 // CHECK2-NEXT:    [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
340 // CHECK2-NEXT:    store double* [[CONV1]], double** [[TMP]], align 8
341 // CHECK2-NEXT:    [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
342 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
343 // CHECK2-NEXT:    ret void
344 //
345 //
346 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
347 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
348 // CHECK2-NEXT:  entry:
349 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
350 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
351 // CHECK2-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 8
352 // CHECK2-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 8
353 // CHECK2-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 8
354 // CHECK2-NEXT:    [[SFVAR_ADDR:%.*]] = alloca float*, align 8
355 // CHECK2-NEXT:    [[TMP:%.*]] = alloca double*, align 8
356 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
357 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
358 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
359 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
360 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
361 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
362 // CHECK2-NEXT:    [[G2:%.*]] = alloca double, align 8
363 // CHECK2-NEXT:    [[G13:%.*]] = alloca double, align 8
364 // CHECK2-NEXT:    [[_TMP4:%.*]] = alloca double*, align 8
365 // CHECK2-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4
366 // CHECK2-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4
367 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
368 // CHECK2-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
369 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
370 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
371 // CHECK2-NEXT:    store double* [[G]], double** [[G_ADDR]], align 8
372 // CHECK2-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 8
373 // CHECK2-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
374 // CHECK2-NEXT:    store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
375 // CHECK2-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
376 // CHECK2-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
377 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
378 // CHECK2-NEXT:    [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
379 // CHECK2-NEXT:    store double* [[TMP1]], double** [[TMP]], align 8
380 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
381 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
382 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
383 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
384 // CHECK2-NEXT:    [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
385 // CHECK2-NEXT:    store double* [[G13]], double** [[_TMP4]], align 8
386 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
387 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
388 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
389 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
390 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
391 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
392 // CHECK2:       cond.true:
393 // CHECK2-NEXT:    br label [[COND_END:%.*]]
394 // CHECK2:       cond.false:
395 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
396 // CHECK2-NEXT:    br label [[COND_END]]
397 // CHECK2:       cond.end:
398 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
399 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
400 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
401 // CHECK2-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
402 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
403 // CHECK2:       omp.inner.for.cond:
404 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
405 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4
406 // CHECK2-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
407 // CHECK2-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
408 // CHECK2:       omp.inner.for.body:
409 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
410 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
411 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
412 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4
413 // CHECK2-NEXT:    store double 1.000000e+00, double* [[G2]], align 8, !llvm.access.group !4
414 // CHECK2-NEXT:    [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 8, !llvm.access.group !4
415 // CHECK2-NEXT:    store volatile double 1.000000e+00, double* [[TMP13]], align 8, !llvm.access.group !4
416 // CHECK2-NEXT:    store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !4
417 // CHECK2-NEXT:    store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !4
418 // CHECK2-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
419 // CHECK2-NEXT:    store double* [[G2]], double** [[TMP14]], align 8, !llvm.access.group !4
420 // CHECK2-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
421 // CHECK2-NEXT:    [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 8, !llvm.access.group !4
422 // CHECK2-NEXT:    store double* [[TMP16]], double** [[TMP15]], align 8, !llvm.access.group !4
423 // CHECK2-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
424 // CHECK2-NEXT:    store i32* [[SVAR5]], i32** [[TMP17]], align 8, !llvm.access.group !4
425 // CHECK2-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
426 // CHECK2-NEXT:    store float* [[SFVAR6]], float** [[TMP18]], align 8, !llvm.access.group !4
427 // CHECK2-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef [[REF_TMP]]), !llvm.access.group !4
428 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
429 // CHECK2:       omp.body.continue:
430 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
431 // CHECK2:       omp.inner.for.inc:
432 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
433 // CHECK2-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
434 // CHECK2-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
435 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
436 // CHECK2:       omp.inner.for.end:
437 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
438 // CHECK2:       omp.loop.exit:
439 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]])
440 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
441 // CHECK2-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
442 // CHECK2-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
443 // CHECK2:       .omp.final.then:
444 // CHECK2-NEXT:    store i32 2, i32* [[I]], align 4
445 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
446 // CHECK2:       .omp.final.done:
447 // CHECK2-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
448 // CHECK2-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
449 // CHECK2-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
450 // CHECK2:       .omp.lastprivate.then:
451 // CHECK2-NEXT:    [[TMP24:%.*]] = load double, double* [[G2]], align 8
452 // CHECK2-NEXT:    store volatile double [[TMP24]], double* [[TMP0]], align 8
453 // CHECK2-NEXT:    [[TMP25:%.*]] = load double*, double** [[_TMP4]], align 8
454 // CHECK2-NEXT:    [[TMP26:%.*]] = load double, double* [[TMP25]], align 8
455 // CHECK2-NEXT:    store volatile double [[TMP26]], double* [[TMP4]], align 8
456 // CHECK2-NEXT:    [[TMP27:%.*]] = load i32, i32* [[SVAR5]], align 4
457 // CHECK2-NEXT:    store i32 [[TMP27]], i32* [[TMP2]], align 4
458 // CHECK2-NEXT:    [[TMP28:%.*]] = load float, float* [[SFVAR6]], align 4
459 // CHECK2-NEXT:    store float [[TMP28]], float* [[TMP3]], align 4
460 // CHECK2-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
461 // CHECK2:       .omp.lastprivate.done:
462 // CHECK2-NEXT:    ret void
463 //
464 //
465 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
466 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
467 // CHECK2-NEXT:  entry:
468 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
469 // CHECK2-NEXT:    ret void
470 //
471 //
472 // CHECK3-LABEL: define {{[^@]+}}@main
473 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
474 // CHECK3-NEXT:  entry:
475 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
476 // CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8
477 // CHECK3-NEXT:    [[G1:%.*]] = alloca double*, align 4
478 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
479 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
480 // CHECK3-NEXT:    store double* [[G]], double** [[G1]], align 4
481 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
482 // CHECK3-NEXT:    store double* [[G]], double** [[TMP0]], align 4
483 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
484 // CHECK3-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 4
485 // CHECK3-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 4
486 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]])
487 // CHECK3-NEXT:    ret i32 0
488 //
489 //
490 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
491 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
492 // CHECK3-NEXT:  entry:
493 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 4
494 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 4
495 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
496 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4
497 // CHECK3-NEXT:    [[TMP:%.*]] = alloca double*, align 4
498 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
499 // CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8
500 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca double*, align 4
501 // CHECK3-NEXT:    store double* [[G]], double** [[G_ADDR]], align 4
502 // CHECK3-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 4
503 // CHECK3-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
504 // CHECK3-NEXT:    store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
505 // CHECK3-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
506 // CHECK3-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
507 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
508 // CHECK3-NEXT:    store double* [[TMP1]], double** [[TMP]], align 4
509 // CHECK3-NEXT:    [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
510 // CHECK3-NEXT:    store double [[TMP2]], double* [[G2]], align 8
511 // CHECK3-NEXT:    [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
512 // CHECK3-NEXT:    [[TMP4:%.*]] = load double, double* [[TMP3]], align 4
513 // CHECK3-NEXT:    store double [[TMP4]], double* [[G13]], align 8
514 // CHECK3-NEXT:    store double* [[G13]], double** [[_TMP4]], align 4
515 // CHECK3-NEXT:    [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
516 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
517 // CHECK3-NEXT:    ret void
518 //
519 //
520 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
521 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
522 // CHECK3-NEXT:  entry:
523 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
524 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
525 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 4
526 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 4
527 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 4
528 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca float*, align 4
529 // CHECK3-NEXT:    [[TMP:%.*]] = alloca double*, align 4
530 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
531 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
532 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
533 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
534 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
535 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
536 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
537 // CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8
538 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca double*, align 4
539 // CHECK3-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4
540 // CHECK3-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4
541 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
542 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
543 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
544 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
545 // CHECK3-NEXT:    store double* [[G]], double** [[G_ADDR]], align 4
546 // CHECK3-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 4
547 // CHECK3-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
548 // CHECK3-NEXT:    store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
549 // CHECK3-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
550 // CHECK3-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
551 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
552 // CHECK3-NEXT:    [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
553 // CHECK3-NEXT:    store double* [[TMP1]], double** [[TMP]], align 4
554 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
555 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
556 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
557 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
558 // CHECK3-NEXT:    [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
559 // CHECK3-NEXT:    store double* [[G13]], double** [[_TMP4]], align 4
560 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
561 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
562 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
563 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
564 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
565 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
566 // CHECK3:       cond.true:
567 // CHECK3-NEXT:    br label [[COND_END:%.*]]
568 // CHECK3:       cond.false:
569 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
570 // CHECK3-NEXT:    br label [[COND_END]]
571 // CHECK3:       cond.end:
572 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
573 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
574 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
575 // CHECK3-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
576 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
577 // CHECK3:       omp.inner.for.cond:
578 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
579 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
580 // CHECK3-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
581 // CHECK3-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
582 // CHECK3:       omp.inner.for.body:
583 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
584 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
585 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
586 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
587 // CHECK3-NEXT:    store double 1.000000e+00, double* [[G2]], align 8, !llvm.access.group !5
588 // CHECK3-NEXT:    [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5
589 // CHECK3-NEXT:    store volatile double 1.000000e+00, double* [[TMP13]], align 4, !llvm.access.group !5
590 // CHECK3-NEXT:    store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !5
591 // CHECK3-NEXT:    store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !5
592 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
593 // CHECK3-NEXT:    store double* [[G2]], double** [[TMP14]], align 4, !llvm.access.group !5
594 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
595 // CHECK3-NEXT:    [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5
596 // CHECK3-NEXT:    store double* [[TMP16]], double** [[TMP15]], align 4, !llvm.access.group !5
597 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
598 // CHECK3-NEXT:    store i32* [[SVAR5]], i32** [[TMP17]], align 4, !llvm.access.group !5
599 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
600 // CHECK3-NEXT:    store float* [[SFVAR6]], float** [[TMP18]], align 4, !llvm.access.group !5
601 // CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef [[REF_TMP]]), !llvm.access.group !5
602 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
603 // CHECK3:       omp.body.continue:
604 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
605 // CHECK3:       omp.inner.for.inc:
606 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
607 // CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
608 // CHECK3-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
609 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
610 // CHECK3:       omp.inner.for.end:
611 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
612 // CHECK3:       omp.loop.exit:
613 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]])
614 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
615 // CHECK3-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
616 // CHECK3-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
617 // CHECK3:       .omp.final.then:
618 // CHECK3-NEXT:    store i32 2, i32* [[I]], align 4
619 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
620 // CHECK3:       .omp.final.done:
621 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
622 // CHECK3-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
623 // CHECK3-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
624 // CHECK3:       .omp.lastprivate.then:
625 // CHECK3-NEXT:    [[TMP24:%.*]] = load double, double* [[G2]], align 8
626 // CHECK3-NEXT:    store volatile double [[TMP24]], double* [[TMP0]], align 8
627 // CHECK3-NEXT:    [[TMP25:%.*]] = load double*, double** [[_TMP4]], align 4
628 // CHECK3-NEXT:    [[TMP26:%.*]] = load double, double* [[TMP25]], align 4
629 // CHECK3-NEXT:    store volatile double [[TMP26]], double* [[TMP4]], align 4
630 // CHECK3-NEXT:    [[TMP27:%.*]] = load i32, i32* [[SVAR5]], align 4
631 // CHECK3-NEXT:    store i32 [[TMP27]], i32* [[TMP2]], align 4
632 // CHECK3-NEXT:    [[TMP28:%.*]] = load float, float* [[SFVAR6]], align 4
633 // CHECK3-NEXT:    store float [[TMP28]], float* [[TMP3]], align 4
634 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
635 // CHECK3:       .omp.lastprivate.done:
636 // CHECK3-NEXT:    ret void
637 //
638 //
639 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
640 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
641 // CHECK3-NEXT:  entry:
642 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
643 // CHECK3-NEXT:    ret void
644 //
645 //
646 // CHECK4-LABEL: define {{[^@]+}}@main
647 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
648 // CHECK4-NEXT:  entry:
649 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
650 // CHECK4-NEXT:    [[G:%.*]] = alloca double, align 8
651 // CHECK4-NEXT:    [[G1:%.*]] = alloca double*, align 4
652 // CHECK4-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
653 // CHECK4-NEXT:    store i32 0, i32* [[RETVAL]], align 4
654 // CHECK4-NEXT:    store double* [[G]], double** [[G1]], align 4
655 // CHECK4-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
656 // CHECK4-NEXT:    store double* [[G]], double** [[TMP0]], align 4
657 // CHECK4-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
658 // CHECK4-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 4
659 // CHECK4-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 4
660 // CHECK4-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]])
661 // CHECK4-NEXT:    ret i32 0
662 //
663 //
664 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
665 // CHECK4-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
666 // CHECK4-NEXT:  entry:
667 // CHECK4-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 4
668 // CHECK4-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 4
669 // CHECK4-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
670 // CHECK4-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4
671 // CHECK4-NEXT:    [[TMP:%.*]] = alloca double*, align 4
672 // CHECK4-NEXT:    [[G2:%.*]] = alloca double, align 8
673 // CHECK4-NEXT:    [[G13:%.*]] = alloca double, align 8
674 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca double*, align 4
675 // CHECK4-NEXT:    store double* [[G]], double** [[G_ADDR]], align 4
676 // CHECK4-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 4
677 // CHECK4-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
678 // CHECK4-NEXT:    store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
679 // CHECK4-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
680 // CHECK4-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
681 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
682 // CHECK4-NEXT:    store double* [[TMP1]], double** [[TMP]], align 4
683 // CHECK4-NEXT:    [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
684 // CHECK4-NEXT:    store double [[TMP2]], double* [[G2]], align 8
685 // CHECK4-NEXT:    [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
686 // CHECK4-NEXT:    [[TMP4:%.*]] = load double, double* [[TMP3]], align 4
687 // CHECK4-NEXT:    store double [[TMP4]], double* [[G13]], align 8
688 // CHECK4-NEXT:    store double* [[G13]], double** [[_TMP4]], align 4
689 // CHECK4-NEXT:    [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
690 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
691 // CHECK4-NEXT:    ret void
692 //
693 //
694 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
695 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
696 // CHECK4-NEXT:  entry:
697 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
698 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
699 // CHECK4-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 4
700 // CHECK4-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 4
701 // CHECK4-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 4
702 // CHECK4-NEXT:    [[SFVAR_ADDR:%.*]] = alloca float*, align 4
703 // CHECK4-NEXT:    [[TMP:%.*]] = alloca double*, align 4
704 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
705 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
706 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
707 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
708 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
709 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
710 // CHECK4-NEXT:    [[G2:%.*]] = alloca double, align 8
711 // CHECK4-NEXT:    [[G13:%.*]] = alloca double, align 8
712 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca double*, align 4
713 // CHECK4-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4
714 // CHECK4-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4
715 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
716 // CHECK4-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
717 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
718 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
719 // CHECK4-NEXT:    store double* [[G]], double** [[G_ADDR]], align 4
720 // CHECK4-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 4
721 // CHECK4-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
722 // CHECK4-NEXT:    store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
723 // CHECK4-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
724 // CHECK4-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
725 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
726 // CHECK4-NEXT:    [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
727 // CHECK4-NEXT:    store double* [[TMP1]], double** [[TMP]], align 4
728 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
729 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
730 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
731 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
732 // CHECK4-NEXT:    [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
733 // CHECK4-NEXT:    store double* [[G13]], double** [[_TMP4]], align 4
734 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
735 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
736 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
737 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
738 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
739 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
740 // CHECK4:       cond.true:
741 // CHECK4-NEXT:    br label [[COND_END:%.*]]
742 // CHECK4:       cond.false:
743 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
744 // CHECK4-NEXT:    br label [[COND_END]]
745 // CHECK4:       cond.end:
746 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
747 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
748 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
749 // CHECK4-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
750 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
751 // CHECK4:       omp.inner.for.cond:
752 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
753 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
754 // CHECK4-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
755 // CHECK4-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
756 // CHECK4:       omp.inner.for.body:
757 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
758 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
759 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
760 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
761 // CHECK4-NEXT:    store double 1.000000e+00, double* [[G2]], align 8, !llvm.access.group !5
762 // CHECK4-NEXT:    [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5
763 // CHECK4-NEXT:    store volatile double 1.000000e+00, double* [[TMP13]], align 4, !llvm.access.group !5
764 // CHECK4-NEXT:    store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !5
765 // CHECK4-NEXT:    store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !5
766 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
767 // CHECK4-NEXT:    store double* [[G2]], double** [[TMP14]], align 4, !llvm.access.group !5
768 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
769 // CHECK4-NEXT:    [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5
770 // CHECK4-NEXT:    store double* [[TMP16]], double** [[TMP15]], align 4, !llvm.access.group !5
771 // CHECK4-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
772 // CHECK4-NEXT:    store i32* [[SVAR5]], i32** [[TMP17]], align 4, !llvm.access.group !5
773 // CHECK4-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
774 // CHECK4-NEXT:    store float* [[SFVAR6]], float** [[TMP18]], align 4, !llvm.access.group !5
775 // CHECK4-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef [[REF_TMP]]), !llvm.access.group !5
776 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
777 // CHECK4:       omp.body.continue:
778 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
779 // CHECK4:       omp.inner.for.inc:
780 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
781 // CHECK4-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
782 // CHECK4-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
783 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
784 // CHECK4:       omp.inner.for.end:
785 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
786 // CHECK4:       omp.loop.exit:
787 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]])
788 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
789 // CHECK4-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
790 // CHECK4-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
791 // CHECK4:       .omp.final.then:
792 // CHECK4-NEXT:    store i32 2, i32* [[I]], align 4
793 // CHECK4-NEXT:    br label [[DOTOMP_FINAL_DONE]]
794 // CHECK4:       .omp.final.done:
795 // CHECK4-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
796 // CHECK4-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
797 // CHECK4-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
798 // CHECK4:       .omp.lastprivate.then:
799 // CHECK4-NEXT:    [[TMP24:%.*]] = load double, double* [[G2]], align 8
800 // CHECK4-NEXT:    store volatile double [[TMP24]], double* [[TMP0]], align 8
801 // CHECK4-NEXT:    [[TMP25:%.*]] = load double*, double** [[_TMP4]], align 4
802 // CHECK4-NEXT:    [[TMP26:%.*]] = load double, double* [[TMP25]], align 4
803 // CHECK4-NEXT:    store volatile double [[TMP26]], double* [[TMP4]], align 4
804 // CHECK4-NEXT:    [[TMP27:%.*]] = load i32, i32* [[SVAR5]], align 4
805 // CHECK4-NEXT:    store i32 [[TMP27]], i32* [[TMP2]], align 4
806 // CHECK4-NEXT:    [[TMP28:%.*]] = load float, float* [[SFVAR6]], align 4
807 // CHECK4-NEXT:    store float [[TMP28]], float* [[TMP3]], align 4
808 // CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
809 // CHECK4:       .omp.lastprivate.done:
810 // CHECK4-NEXT:    ret void
811 //
812 //
813 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
814 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
815 // CHECK4-NEXT:  entry:
816 // CHECK4-NEXT:    call void @__tgt_register_requires(i64 1)
817 // CHECK4-NEXT:    ret void
818 //
819 //
820 // CHECK5-LABEL: define {{[^@]+}}@main
821 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
822 // CHECK5-NEXT:  entry:
823 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
824 // CHECK5-NEXT:    [[G:%.*]] = alloca double, align 8
825 // CHECK5-NEXT:    [[G1:%.*]] = alloca double*, align 8
826 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
827 // CHECK5-NEXT:    store i32 0, i32* [[RETVAL]], align 4
828 // CHECK5-NEXT:    store double* [[G]], double** [[G1]], align 8
829 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
830 // CHECK5-NEXT:    store double* [[G]], double** [[TMP0]], align 8
831 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
832 // CHECK5-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 8
833 // CHECK5-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 8
834 // CHECK5-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]])
835 // CHECK5-NEXT:    ret i32 0
836 //
837 //
838 // CHECK6-LABEL: define {{[^@]+}}@main
839 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
840 // CHECK6-NEXT:  entry:
841 // CHECK6-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
842 // CHECK6-NEXT:    [[G:%.*]] = alloca double, align 8
843 // CHECK6-NEXT:    [[G1:%.*]] = alloca double*, align 8
844 // CHECK6-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
845 // CHECK6-NEXT:    store i32 0, i32* [[RETVAL]], align 4
846 // CHECK6-NEXT:    store double* [[G]], double** [[G1]], align 8
847 // CHECK6-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
848 // CHECK6-NEXT:    store double* [[G]], double** [[TMP0]], align 8
849 // CHECK6-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
850 // CHECK6-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 8
851 // CHECK6-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 8
852 // CHECK6-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]])
853 // CHECK6-NEXT:    ret i32 0
854 //
855 //
856 // CHECK7-LABEL: define {{[^@]+}}@main
857 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
858 // CHECK7-NEXT:  entry:
859 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
860 // CHECK7-NEXT:    [[G:%.*]] = alloca double, align 8
861 // CHECK7-NEXT:    [[G1:%.*]] = alloca double*, align 4
862 // CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
863 // CHECK7-NEXT:    store i32 0, i32* [[RETVAL]], align 4
864 // CHECK7-NEXT:    store double* [[G]], double** [[G1]], align 4
865 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
866 // CHECK7-NEXT:    store double* [[G]], double** [[TMP0]], align 4
867 // CHECK7-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
868 // CHECK7-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 4
869 // CHECK7-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 4
870 // CHECK7-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]])
871 // CHECK7-NEXT:    ret i32 0
872 //
873 //
874 // CHECK8-LABEL: define {{[^@]+}}@main
875 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
876 // CHECK8-NEXT:  entry:
877 // CHECK8-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
878 // CHECK8-NEXT:    [[G:%.*]] = alloca double, align 8
879 // CHECK8-NEXT:    [[G1:%.*]] = alloca double*, align 4
880 // CHECK8-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
881 // CHECK8-NEXT:    store i32 0, i32* [[RETVAL]], align 4
882 // CHECK8-NEXT:    store double* [[G]], double** [[G1]], align 4
883 // CHECK8-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
884 // CHECK8-NEXT:    store double* [[G]], double** [[TMP0]], align 4
885 // CHECK8-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
886 // CHECK8-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 4
887 // CHECK8-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 4
888 // CHECK8-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]])
889 // CHECK8-NEXT:    ret i32 0
890 //
891 //
892 // CHECK9-LABEL: define {{[^@]+}}@main
893 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
894 // CHECK9-NEXT:  entry:
895 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
896 // CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8
897 // CHECK9-NEXT:    [[G1:%.*]] = alloca double*, align 8
898 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
899 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
900 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
901 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
902 // CHECK9-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 8
903 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
904 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
905 // CHECK9-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
906 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
907 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
908 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
909 // CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
910 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
911 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
912 // CHECK9-NEXT:    store double* [[G]], double** [[G1]], align 8
913 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]])
914 // CHECK9-NEXT:    store i32 0, i32* [[T_VAR]], align 4
915 // CHECK9-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
916 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
917 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
918 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
919 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
920 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
921 // CHECK9-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
922 // CHECK9-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
923 // CHECK9-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
924 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
925 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
926 // CHECK9-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
927 // CHECK9-NEXT:    [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
928 // CHECK9-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
929 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
930 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
931 // CHECK9-NEXT:    store i32 [[TMP5]], i32* [[CONV1]], align 4
932 // CHECK9-NEXT:    [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
933 // CHECK9-NEXT:    [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
934 // CHECK9-NEXT:    [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
935 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
936 // CHECK9-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
937 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP10]], align 8
938 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
939 // CHECK9-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
940 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP12]], align 8
941 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
942 // CHECK9-NEXT:    store i8* null, i8** [[TMP13]], align 8
943 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
944 // CHECK9-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
945 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
946 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
947 // CHECK9-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
948 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
949 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
950 // CHECK9-NEXT:    store i8* null, i8** [[TMP18]], align 8
951 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
952 // CHECK9-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
953 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
954 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
955 // CHECK9-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
956 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
957 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
958 // CHECK9-NEXT:    store i8* null, i8** [[TMP23]], align 8
959 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
960 // CHECK9-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
961 // CHECK9-NEXT:    store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
962 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
963 // CHECK9-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
964 // CHECK9-NEXT:    store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
965 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
966 // CHECK9-NEXT:    store i8* null, i8** [[TMP28]], align 8
967 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
968 // CHECK9-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
969 // CHECK9-NEXT:    store i64 [[TMP6]], i64* [[TMP30]], align 8
970 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
971 // CHECK9-NEXT:    [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
972 // CHECK9-NEXT:    store i64 [[TMP6]], i64* [[TMP32]], align 8
973 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
974 // CHECK9-NEXT:    store i8* null, i8** [[TMP33]], align 8
975 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
976 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
977 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
978 // CHECK9-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
979 // CHECK9-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
980 // CHECK9-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
981 // CHECK9:       omp_offload.failed:
982 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
983 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
984 // CHECK9:       omp_offload.cont:
985 // CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
986 // CHECK9-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
987 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
988 // CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
989 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
990 // CHECK9:       arraydestroy.body:
991 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
992 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
993 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
994 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
995 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
996 // CHECK9:       arraydestroy.done3:
997 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]]
998 // CHECK9-NEXT:    [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
999 // CHECK9-NEXT:    ret i32 [[TMP39]]
1000 //
1001 //
1002 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1003 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1004 // CHECK9-NEXT:  entry:
1005 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1006 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1007 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1008 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]])
1009 // CHECK9-NEXT:    ret void
1010 //
1011 //
1012 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1013 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1014 // CHECK9-NEXT:  entry:
1015 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1016 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1017 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1018 // CHECK9-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1019 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1020 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1021 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]])
1022 // CHECK9-NEXT:    ret void
1023 //
1024 //
1025 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96
1026 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1027 // CHECK9-NEXT:  entry:
1028 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1029 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1030 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1031 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1032 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
1033 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
1034 // CHECK9-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1035 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1036 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1037 // CHECK9-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1038 // CHECK9-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1039 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1040 // CHECK9-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1041 // CHECK9-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1042 // CHECK9-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1043 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1044 // CHECK9-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1045 // CHECK9-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1046 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
1047 // CHECK9-NEXT:    ret void
1048 //
1049 //
1050 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1051 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1052 // CHECK9-NEXT:  entry:
1053 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1054 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1055 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1056 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1057 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1058 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1059 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 8
1060 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
1061 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1062 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1063 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1064 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1065 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1066 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1067 // CHECK9-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
1068 // CHECK9-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
1069 // CHECK9-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
1070 // CHECK9-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1071 // CHECK9-NEXT:    [[_TMP6:%.*]] = alloca %struct.S*, align 8
1072 // CHECK9-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4
1073 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1074 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1075 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1076 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1077 // CHECK9-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1078 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1079 // CHECK9-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1080 // CHECK9-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
1081 // CHECK9-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1082 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1083 // CHECK9-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1084 // CHECK9-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1085 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1086 // CHECK9-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1087 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1088 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1089 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1090 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1091 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
1092 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1093 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1094 // CHECK9:       arrayctor.loop:
1095 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1096 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]])
1097 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1098 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1099 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1100 // CHECK9:       arrayctor.cont:
1101 // CHECK9-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1102 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR5]])
1103 // CHECK9-NEXT:    store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8
1104 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1105 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1106 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1107 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1108 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1109 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1110 // CHECK9:       cond.true:
1111 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1112 // CHECK9:       cond.false:
1113 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1114 // CHECK9-NEXT:    br label [[COND_END]]
1115 // CHECK9:       cond.end:
1116 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1117 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1118 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1119 // CHECK9-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
1120 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1121 // CHECK9:       omp.inner.for.cond:
1122 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1123 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
1124 // CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1125 // CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1126 // CHECK9:       omp.inner.for.cond.cleanup:
1127 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1128 // CHECK9:       omp.inner.for.body:
1129 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1130 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
1131 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1132 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
1133 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !5
1134 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
1135 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1136 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
1137 // CHECK9-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
1138 // CHECK9-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8, !llvm.access.group !5
1139 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
1140 // CHECK9-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
1141 // CHECK9-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM9]]
1142 // CHECK9-NEXT:    [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8*
1143 // CHECK9-NEXT:    [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8*
1144 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false), !llvm.access.group !5
1145 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1146 // CHECK9:       omp.body.continue:
1147 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1148 // CHECK9:       omp.inner.for.inc:
1149 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1150 // CHECK9-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
1151 // CHECK9-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1152 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1153 // CHECK9:       omp.inner.for.end:
1154 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1155 // CHECK9:       omp.loop.exit:
1156 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1157 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1158 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1159 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1160 // CHECK9-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1161 // CHECK9-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1162 // CHECK9:       .omp.final.then:
1163 // CHECK9-NEXT:    store i32 2, i32* [[I]], align 4
1164 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1165 // CHECK9:       .omp.final.done:
1166 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1167 // CHECK9-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1168 // CHECK9-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1169 // CHECK9:       .omp.lastprivate.then:
1170 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, i32* [[T_VAR2]], align 4
1171 // CHECK9-NEXT:    store i32 [[TMP27]], i32* [[TMP1]], align 4
1172 // CHECK9-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1173 // CHECK9-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
1174 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 8, i1 false)
1175 // CHECK9-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
1176 // CHECK9-NEXT:    [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
1177 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
1178 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP31]]
1179 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1180 // CHECK9:       omp.arraycpy.body:
1181 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1182 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1183 // CHECK9-NEXT:    [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1184 // CHECK9-NEXT:    [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1185 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
1186 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1187 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1188 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
1189 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
1190 // CHECK9:       omp.arraycpy.done13:
1191 // CHECK9-NEXT:    [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8
1192 // CHECK9-NEXT:    [[TMP35:%.*]] = bitcast %struct.S* [[TMP5]] to i8*
1193 // CHECK9-NEXT:    [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8*
1194 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false)
1195 // CHECK9-NEXT:    [[TMP37:%.*]] = load i32, i32* [[SVAR7]], align 4
1196 // CHECK9-NEXT:    store i32 [[TMP37]], i32* [[TMP4]], align 4
1197 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1198 // CHECK9:       .omp.lastprivate.done:
1199 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR5]]) #[[ATTR4]]
1200 // CHECK9-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
1201 // CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
1202 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1203 // CHECK9:       arraydestroy.body:
1204 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1205 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1206 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1207 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1208 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1209 // CHECK9:       arraydestroy.done15:
1210 // CHECK9-NEXT:    ret void
1211 //
1212 //
1213 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1214 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1215 // CHECK9-NEXT:  entry:
1216 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1217 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1218 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1219 // CHECK9-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]]
1220 // CHECK9-NEXT:    ret void
1221 //
1222 //
1223 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1224 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
1225 // CHECK9-NEXT:  entry:
1226 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1227 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1228 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1229 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1230 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1231 // CHECK9-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
1232 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
1233 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1234 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1235 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1236 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1237 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1238 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]])
1239 // CHECK9-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1240 // CHECK9-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1241 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1242 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1243 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
1244 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1245 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
1246 // CHECK9-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1247 // CHECK9-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1248 // CHECK9-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1249 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1250 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1251 // CHECK9-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
1252 // CHECK9-NEXT:    [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1253 // CHECK9-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1254 // CHECK9-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1255 // CHECK9-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1256 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1257 // CHECK9-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1258 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP8]], align 8
1259 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1260 // CHECK9-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1261 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP10]], align 8
1262 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1263 // CHECK9-NEXT:    store i8* null, i8** [[TMP11]], align 8
1264 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1265 // CHECK9-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1266 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
1267 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1268 // CHECK9-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1269 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1270 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1271 // CHECK9-NEXT:    store i8* null, i8** [[TMP16]], align 8
1272 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1273 // CHECK9-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1274 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1275 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1276 // CHECK9-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1277 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
1278 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1279 // CHECK9-NEXT:    store i8* null, i8** [[TMP21]], align 8
1280 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1281 // CHECK9-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1282 // CHECK9-NEXT:    store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
1283 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1284 // CHECK9-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1285 // CHECK9-NEXT:    store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
1286 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1287 // CHECK9-NEXT:    store i8* null, i8** [[TMP26]], align 8
1288 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1289 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1290 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
1291 // CHECK9-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
1292 // CHECK9-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1293 // CHECK9-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1294 // CHECK9:       omp_offload.failed:
1295 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1296 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1297 // CHECK9:       omp_offload.cont:
1298 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1299 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1300 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1301 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1302 // CHECK9:       arraydestroy.body:
1303 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1304 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1305 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1306 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1307 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1308 // CHECK9:       arraydestroy.done2:
1309 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]]
1310 // CHECK9-NEXT:    [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
1311 // CHECK9-NEXT:    ret i32 [[TMP32]]
1312 //
1313 //
1314 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1315 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1316 // CHECK9-NEXT:  entry:
1317 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1318 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1319 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1320 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1321 // CHECK9-NEXT:    store float 0.000000e+00, float* [[F]], align 4
1322 // CHECK9-NEXT:    ret void
1323 //
1324 //
1325 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1326 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1327 // CHECK9-NEXT:  entry:
1328 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1329 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1330 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1331 // CHECK9-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1332 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1333 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1334 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1335 // CHECK9-NEXT:    store float [[TMP0]], float* [[F]], align 4
1336 // CHECK9-NEXT:    ret void
1337 //
1338 //
1339 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1340 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1341 // CHECK9-NEXT:  entry:
1342 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1343 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1344 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1345 // CHECK9-NEXT:    ret void
1346 //
1347 //
1348 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1349 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1350 // CHECK9-NEXT:  entry:
1351 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1352 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1353 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1354 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]])
1355 // CHECK9-NEXT:    ret void
1356 //
1357 //
1358 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1359 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1360 // CHECK9-NEXT:  entry:
1361 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1362 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1363 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1364 // CHECK9-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1365 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1366 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1367 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef signext [[TMP0]])
1368 // CHECK9-NEXT:    ret void
1369 //
1370 //
1371 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1372 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1373 // CHECK9-NEXT:  entry:
1374 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1375 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1376 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1377 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1378 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
1379 // CHECK9-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1380 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1381 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1382 // CHECK9-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1383 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1384 // CHECK9-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1385 // CHECK9-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1386 // CHECK9-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1387 // CHECK9-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1388 // CHECK9-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1389 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
1390 // CHECK9-NEXT:    ret void
1391 //
1392 //
1393 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1394 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1395 // CHECK9-NEXT:  entry:
1396 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1397 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1398 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1399 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1400 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1401 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1402 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
1403 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1404 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1405 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1406 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1407 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1408 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1409 // CHECK9-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
1410 // CHECK9-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
1411 // CHECK9-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
1412 // CHECK9-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1413 // CHECK9-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 8
1414 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1415 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1416 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1417 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1418 // CHECK9-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1419 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1420 // CHECK9-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1421 // CHECK9-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1422 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1423 // CHECK9-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1424 // CHECK9-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1425 // CHECK9-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
1426 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1427 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1428 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1429 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1430 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
1431 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1432 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1433 // CHECK9:       arrayctor.loop:
1434 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1435 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]])
1436 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1437 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1438 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1439 // CHECK9:       arrayctor.cont:
1440 // CHECK9-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1441 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR5]])
1442 // CHECK9-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8
1443 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1444 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1445 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1446 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1447 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
1448 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1449 // CHECK9:       cond.true:
1450 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1451 // CHECK9:       cond.false:
1452 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1453 // CHECK9-NEXT:    br label [[COND_END]]
1454 // CHECK9:       cond.end:
1455 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1456 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1457 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1458 // CHECK9-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1459 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1460 // CHECK9:       omp.inner.for.cond:
1461 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1462 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
1463 // CHECK9-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1464 // CHECK9-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1465 // CHECK9:       omp.inner.for.cond.cleanup:
1466 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1467 // CHECK9:       omp.inner.for.body:
1468 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1469 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
1470 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1471 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
1472 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !11
1473 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
1474 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
1475 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
1476 // CHECK9-NEXT:    store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
1477 // CHECK9-NEXT:    [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !11
1478 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
1479 // CHECK9-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64
1480 // CHECK9-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]]
1481 // CHECK9-NEXT:    [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
1482 // CHECK9-NEXT:    [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8*
1483 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 4, i1 false), !llvm.access.group !11
1484 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1485 // CHECK9:       omp.body.continue:
1486 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1487 // CHECK9:       omp.inner.for.inc:
1488 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1489 // CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1
1490 // CHECK9-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1491 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1492 // CHECK9:       omp.inner.for.end:
1493 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1494 // CHECK9:       omp.loop.exit:
1495 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1496 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
1497 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
1498 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1499 // CHECK9-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1500 // CHECK9-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1501 // CHECK9:       .omp.final.then:
1502 // CHECK9-NEXT:    store i32 2, i32* [[I]], align 4
1503 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1504 // CHECK9:       .omp.final.done:
1505 // CHECK9-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1506 // CHECK9-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1507 // CHECK9-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1508 // CHECK9:       .omp.lastprivate.then:
1509 // CHECK9-NEXT:    [[TMP26:%.*]] = load i32, i32* [[T_VAR2]], align 4
1510 // CHECK9-NEXT:    store i32 [[TMP26]], i32* [[TMP1]], align 4
1511 // CHECK9-NEXT:    [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1512 // CHECK9-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
1513 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 8, i1 false)
1514 // CHECK9-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
1515 // CHECK9-NEXT:    [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
1516 // CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
1517 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP30]]
1518 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1519 // CHECK9:       omp.arraycpy.body:
1520 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1521 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1522 // CHECK9-NEXT:    [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1523 // CHECK9-NEXT:    [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1524 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
1525 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1526 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1527 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
1528 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
1529 // CHECK9:       omp.arraycpy.done12:
1530 // CHECK9-NEXT:    [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8
1531 // CHECK9-NEXT:    [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8*
1532 // CHECK9-NEXT:    [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8*
1533 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false)
1534 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1535 // CHECK9:       .omp.lastprivate.done:
1536 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR5]]) #[[ATTR4]]
1537 // CHECK9-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
1538 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
1539 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1540 // CHECK9:       arraydestroy.body:
1541 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1542 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1543 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1544 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
1545 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
1546 // CHECK9:       arraydestroy.done14:
1547 // CHECK9-NEXT:    ret void
1548 //
1549 //
1550 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1551 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1552 // CHECK9-NEXT:  entry:
1553 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1554 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1555 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1556 // CHECK9-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]]
1557 // CHECK9-NEXT:    ret void
1558 //
1559 //
1560 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1561 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1562 // CHECK9-NEXT:  entry:
1563 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1564 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1565 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1566 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1567 // CHECK9-NEXT:    store i32 0, i32* [[F]], align 4
1568 // CHECK9-NEXT:    ret void
1569 //
1570 //
1571 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1572 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1573 // CHECK9-NEXT:  entry:
1574 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1575 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1576 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1577 // CHECK9-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1578 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1579 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1580 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1581 // CHECK9-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
1582 // CHECK9-NEXT:    ret void
1583 //
1584 //
1585 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1586 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1587 // CHECK9-NEXT:  entry:
1588 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1589 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1590 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1591 // CHECK9-NEXT:    ret void
1592 //
1593 //
1594 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1595 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1596 // CHECK9-NEXT:  entry:
1597 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
1598 // CHECK9-NEXT:    ret void
1599 //
1600 //
1601 // CHECK10-LABEL: define {{[^@]+}}@main
1602 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
1603 // CHECK10-NEXT:  entry:
1604 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1605 // CHECK10-NEXT:    [[G:%.*]] = alloca double, align 8
1606 // CHECK10-NEXT:    [[G1:%.*]] = alloca double*, align 8
1607 // CHECK10-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1608 // CHECK10-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1609 // CHECK10-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1610 // CHECK10-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1611 // CHECK10-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 8
1612 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
1613 // CHECK10-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1614 // CHECK10-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
1615 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
1616 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
1617 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
1618 // CHECK10-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1619 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
1620 // CHECK10-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1621 // CHECK10-NEXT:    store double* [[G]], double** [[G1]], align 8
1622 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]])
1623 // CHECK10-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1624 // CHECK10-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1625 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
1626 // CHECK10-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
1627 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1628 // CHECK10-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
1629 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1630 // CHECK10-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
1631 // CHECK10-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
1632 // CHECK10-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
1633 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1634 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1635 // CHECK10-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
1636 // CHECK10-NEXT:    [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1637 // CHECK10-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1638 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
1639 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
1640 // CHECK10-NEXT:    store i32 [[TMP5]], i32* [[CONV1]], align 4
1641 // CHECK10-NEXT:    [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
1642 // CHECK10-NEXT:    [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1643 // CHECK10-NEXT:    [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1644 // CHECK10-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1645 // CHECK10-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1646 // CHECK10-NEXT:    store i64 [[TMP3]], i64* [[TMP10]], align 8
1647 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1648 // CHECK10-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
1649 // CHECK10-NEXT:    store i64 [[TMP3]], i64* [[TMP12]], align 8
1650 // CHECK10-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1651 // CHECK10-NEXT:    store i8* null, i8** [[TMP13]], align 8
1652 // CHECK10-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1653 // CHECK10-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1654 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1655 // CHECK10-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1656 // CHECK10-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
1657 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
1658 // CHECK10-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1659 // CHECK10-NEXT:    store i8* null, i8** [[TMP18]], align 8
1660 // CHECK10-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1661 // CHECK10-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
1662 // CHECK10-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
1663 // CHECK10-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1664 // CHECK10-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
1665 // CHECK10-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
1666 // CHECK10-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1667 // CHECK10-NEXT:    store i8* null, i8** [[TMP23]], align 8
1668 // CHECK10-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1669 // CHECK10-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
1670 // CHECK10-NEXT:    store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
1671 // CHECK10-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1672 // CHECK10-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
1673 // CHECK10-NEXT:    store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
1674 // CHECK10-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1675 // CHECK10-NEXT:    store i8* null, i8** [[TMP28]], align 8
1676 // CHECK10-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1677 // CHECK10-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
1678 // CHECK10-NEXT:    store i64 [[TMP6]], i64* [[TMP30]], align 8
1679 // CHECK10-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1680 // CHECK10-NEXT:    [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
1681 // CHECK10-NEXT:    store i64 [[TMP6]], i64* [[TMP32]], align 8
1682 // CHECK10-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1683 // CHECK10-NEXT:    store i8* null, i8** [[TMP33]], align 8
1684 // CHECK10-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1685 // CHECK10-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1686 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
1687 // CHECK10-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
1688 // CHECK10-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1689 // CHECK10-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1690 // CHECK10:       omp_offload.failed:
1691 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
1692 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1693 // CHECK10:       omp_offload.cont:
1694 // CHECK10-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
1695 // CHECK10-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
1696 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1697 // CHECK10-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1698 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1699 // CHECK10:       arraydestroy.body:
1700 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1701 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1702 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1703 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1704 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1705 // CHECK10:       arraydestroy.done3:
1706 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]]
1707 // CHECK10-NEXT:    [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
1708 // CHECK10-NEXT:    ret i32 [[TMP39]]
1709 //
1710 //
1711 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1712 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1713 // CHECK10-NEXT:  entry:
1714 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1715 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1716 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1717 // CHECK10-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]])
1718 // CHECK10-NEXT:    ret void
1719 //
1720 //
1721 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1722 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1723 // CHECK10-NEXT:  entry:
1724 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1725 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1726 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1727 // CHECK10-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1728 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1729 // CHECK10-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1730 // CHECK10-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]])
1731 // CHECK10-NEXT:    ret void
1732 //
1733 //
1734 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96
1735 // CHECK10-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1736 // CHECK10-NEXT:  entry:
1737 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1738 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1739 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1740 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1741 // CHECK10-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
1742 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
1743 // CHECK10-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1744 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1745 // CHECK10-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1746 // CHECK10-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1747 // CHECK10-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1748 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1749 // CHECK10-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1750 // CHECK10-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1751 // CHECK10-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1752 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1753 // CHECK10-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1754 // CHECK10-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1755 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
1756 // CHECK10-NEXT:    ret void
1757 //
1758 //
1759 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
1760 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1761 // CHECK10-NEXT:  entry:
1762 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1763 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1764 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1765 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1766 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1767 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1768 // CHECK10-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 8
1769 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
1770 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1771 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1772 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1773 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1774 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1775 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1776 // CHECK10-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
1777 // CHECK10-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
1778 // CHECK10-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
1779 // CHECK10-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1780 // CHECK10-NEXT:    [[_TMP6:%.*]] = alloca %struct.S*, align 8
1781 // CHECK10-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4
1782 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
1783 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1784 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1785 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1786 // CHECK10-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1787 // CHECK10-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1788 // CHECK10-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1789 // CHECK10-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
1790 // CHECK10-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1791 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1792 // CHECK10-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1793 // CHECK10-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1794 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1795 // CHECK10-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1796 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1797 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1798 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1799 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1800 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
1801 // CHECK10-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1802 // CHECK10-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1803 // CHECK10:       arrayctor.loop:
1804 // CHECK10-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1805 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]])
1806 // CHECK10-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1807 // CHECK10-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1808 // CHECK10-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1809 // CHECK10:       arrayctor.cont:
1810 // CHECK10-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1811 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR5]])
1812 // CHECK10-NEXT:    store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8
1813 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1814 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1815 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1816 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1817 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1818 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1819 // CHECK10:       cond.true:
1820 // CHECK10-NEXT:    br label [[COND_END:%.*]]
1821 // CHECK10:       cond.false:
1822 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1823 // CHECK10-NEXT:    br label [[COND_END]]
1824 // CHECK10:       cond.end:
1825 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1826 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1827 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1828 // CHECK10-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
1829 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1830 // CHECK10:       omp.inner.for.cond:
1831 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1832 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
1833 // CHECK10-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1834 // CHECK10-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1835 // CHECK10:       omp.inner.for.cond.cleanup:
1836 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1837 // CHECK10:       omp.inner.for.body:
1838 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1839 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
1840 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1841 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
1842 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !5
1843 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
1844 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1845 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
1846 // CHECK10-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
1847 // CHECK10-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8, !llvm.access.group !5
1848 // CHECK10-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
1849 // CHECK10-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
1850 // CHECK10-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM9]]
1851 // CHECK10-NEXT:    [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8*
1852 // CHECK10-NEXT:    [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8*
1853 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false), !llvm.access.group !5
1854 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1855 // CHECK10:       omp.body.continue:
1856 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1857 // CHECK10:       omp.inner.for.inc:
1858 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1859 // CHECK10-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
1860 // CHECK10-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1861 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1862 // CHECK10:       omp.inner.for.end:
1863 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1864 // CHECK10:       omp.loop.exit:
1865 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1866 // CHECK10-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1867 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1868 // CHECK10-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1869 // CHECK10-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1870 // CHECK10-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1871 // CHECK10:       .omp.final.then:
1872 // CHECK10-NEXT:    store i32 2, i32* [[I]], align 4
1873 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1874 // CHECK10:       .omp.final.done:
1875 // CHECK10-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1876 // CHECK10-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1877 // CHECK10-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1878 // CHECK10:       .omp.lastprivate.then:
1879 // CHECK10-NEXT:    [[TMP27:%.*]] = load i32, i32* [[T_VAR2]], align 4
1880 // CHECK10-NEXT:    store i32 [[TMP27]], i32* [[TMP1]], align 4
1881 // CHECK10-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1882 // CHECK10-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
1883 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 8, i1 false)
1884 // CHECK10-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
1885 // CHECK10-NEXT:    [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
1886 // CHECK10-NEXT:    [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
1887 // CHECK10-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP31]]
1888 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1889 // CHECK10:       omp.arraycpy.body:
1890 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1891 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1892 // CHECK10-NEXT:    [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1893 // CHECK10-NEXT:    [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1894 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
1895 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1896 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1897 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
1898 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
1899 // CHECK10:       omp.arraycpy.done13:
1900 // CHECK10-NEXT:    [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8
1901 // CHECK10-NEXT:    [[TMP35:%.*]] = bitcast %struct.S* [[TMP5]] to i8*
1902 // CHECK10-NEXT:    [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8*
1903 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false)
1904 // CHECK10-NEXT:    [[TMP37:%.*]] = load i32, i32* [[SVAR7]], align 4
1905 // CHECK10-NEXT:    store i32 [[TMP37]], i32* [[TMP4]], align 4
1906 // CHECK10-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1907 // CHECK10:       .omp.lastprivate.done:
1908 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR5]]) #[[ATTR4]]
1909 // CHECK10-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
1910 // CHECK10-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
1911 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1912 // CHECK10:       arraydestroy.body:
1913 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1914 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1915 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1916 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1917 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1918 // CHECK10:       arraydestroy.done15:
1919 // CHECK10-NEXT:    ret void
1920 //
1921 //
1922 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1923 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1924 // CHECK10-NEXT:  entry:
1925 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1926 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1927 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1928 // CHECK10-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]]
1929 // CHECK10-NEXT:    ret void
1930 //
1931 //
1932 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1933 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat {
1934 // CHECK10-NEXT:  entry:
1935 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1936 // CHECK10-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1937 // CHECK10-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1938 // CHECK10-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1939 // CHECK10-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1940 // CHECK10-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
1941 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
1942 // CHECK10-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1943 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1944 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1945 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1946 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1947 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]])
1948 // CHECK10-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1949 // CHECK10-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1950 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1951 // CHECK10-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1952 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
1953 // CHECK10-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1954 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
1955 // CHECK10-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1956 // CHECK10-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1957 // CHECK10-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1958 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1959 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1960 // CHECK10-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
1961 // CHECK10-NEXT:    [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1962 // CHECK10-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1963 // CHECK10-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1964 // CHECK10-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1965 // CHECK10-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1966 // CHECK10-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1967 // CHECK10-NEXT:    store i64 [[TMP3]], i64* [[TMP8]], align 8
1968 // CHECK10-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1969 // CHECK10-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1970 // CHECK10-NEXT:    store i64 [[TMP3]], i64* [[TMP10]], align 8
1971 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1972 // CHECK10-NEXT:    store i8* null, i8** [[TMP11]], align 8
1973 // CHECK10-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1974 // CHECK10-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1975 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
1976 // CHECK10-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1977 // CHECK10-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1978 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1979 // CHECK10-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1980 // CHECK10-NEXT:    store i8* null, i8** [[TMP16]], align 8
1981 // CHECK10-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1982 // CHECK10-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1983 // CHECK10-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1984 // CHECK10-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1985 // CHECK10-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1986 // CHECK10-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
1987 // CHECK10-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1988 // CHECK10-NEXT:    store i8* null, i8** [[TMP21]], align 8
1989 // CHECK10-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1990 // CHECK10-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1991 // CHECK10-NEXT:    store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
1992 // CHECK10-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1993 // CHECK10-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1994 // CHECK10-NEXT:    store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
1995 // CHECK10-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1996 // CHECK10-NEXT:    store i8* null, i8** [[TMP26]], align 8
1997 // CHECK10-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1998 // CHECK10-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1999 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
2000 // CHECK10-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2001 // CHECK10-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2002 // CHECK10-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2003 // CHECK10:       omp_offload.failed:
2004 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
2005 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2006 // CHECK10:       omp_offload.cont:
2007 // CHECK10-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2008 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2009 // CHECK10-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2010 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2011 // CHECK10:       arraydestroy.body:
2012 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2013 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2014 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2015 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2016 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2017 // CHECK10:       arraydestroy.done2:
2018 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]]
2019 // CHECK10-NEXT:    [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
2020 // CHECK10-NEXT:    ret i32 [[TMP32]]
2021 //
2022 //
2023 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2024 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2025 // CHECK10-NEXT:  entry:
2026 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2027 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2028 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2029 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2030 // CHECK10-NEXT:    store float 0.000000e+00, float* [[F]], align 4
2031 // CHECK10-NEXT:    ret void
2032 //
2033 //
2034 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2035 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2036 // CHECK10-NEXT:  entry:
2037 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2038 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2039 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2040 // CHECK10-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
2041 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2042 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2043 // CHECK10-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2044 // CHECK10-NEXT:    store float [[TMP0]], float* [[F]], align 4
2045 // CHECK10-NEXT:    ret void
2046 //
2047 //
2048 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2049 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2050 // CHECK10-NEXT:  entry:
2051 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2052 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2053 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2054 // CHECK10-NEXT:    ret void
2055 //
2056 //
2057 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2058 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2059 // CHECK10-NEXT:  entry:
2060 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2061 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2062 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2063 // CHECK10-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]])
2064 // CHECK10-NEXT:    ret void
2065 //
2066 //
2067 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2068 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2069 // CHECK10-NEXT:  entry:
2070 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2071 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2072 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2073 // CHECK10-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2074 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2075 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2076 // CHECK10-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef signext [[TMP0]])
2077 // CHECK10-NEXT:    ret void
2078 //
2079 //
2080 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
2081 // CHECK10-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2082 // CHECK10-NEXT:  entry:
2083 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
2084 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2085 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2086 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2087 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
2088 // CHECK10-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
2089 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2090 // CHECK10-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2091 // CHECK10-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2092 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
2093 // CHECK10-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2094 // CHECK10-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2095 // CHECK10-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2096 // CHECK10-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
2097 // CHECK10-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2098 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
2099 // CHECK10-NEXT:    ret void
2100 //
2101 //
2102 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
2103 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2104 // CHECK10-NEXT:  entry:
2105 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2106 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2107 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2108 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2109 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2110 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2111 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
2112 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2113 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2114 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2115 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2116 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2117 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2118 // CHECK10-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2119 // CHECK10-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2120 // CHECK10-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
2121 // CHECK10-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2122 // CHECK10-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 8
2123 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
2124 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2125 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2126 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2127 // CHECK10-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2128 // CHECK10-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2129 // CHECK10-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2130 // CHECK10-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2131 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2132 // CHECK10-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2133 // CHECK10-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2134 // CHECK10-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
2135 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2136 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2137 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2138 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2139 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
2140 // CHECK10-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2141 // CHECK10-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2142 // CHECK10:       arrayctor.loop:
2143 // CHECK10-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2144 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]])
2145 // CHECK10-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
2146 // CHECK10-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2147 // CHECK10-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2148 // CHECK10:       arrayctor.cont:
2149 // CHECK10-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2150 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR5]])
2151 // CHECK10-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8
2152 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2153 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2154 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2155 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2156 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
2157 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2158 // CHECK10:       cond.true:
2159 // CHECK10-NEXT:    br label [[COND_END:%.*]]
2160 // CHECK10:       cond.false:
2161 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2162 // CHECK10-NEXT:    br label [[COND_END]]
2163 // CHECK10:       cond.end:
2164 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2165 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2166 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2167 // CHECK10-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
2168 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2169 // CHECK10:       omp.inner.for.cond:
2170 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2171 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
2172 // CHECK10-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2173 // CHECK10-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2174 // CHECK10:       omp.inner.for.cond.cleanup:
2175 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2176 // CHECK10:       omp.inner.for.body:
2177 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2178 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
2179 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2180 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
2181 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !11
2182 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
2183 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
2184 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
2185 // CHECK10-NEXT:    store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
2186 // CHECK10-NEXT:    [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !11
2187 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
2188 // CHECK10-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64
2189 // CHECK10-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]]
2190 // CHECK10-NEXT:    [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
2191 // CHECK10-NEXT:    [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8*
2192 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 4, i1 false), !llvm.access.group !11
2193 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2194 // CHECK10:       omp.body.continue:
2195 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2196 // CHECK10:       omp.inner.for.inc:
2197 // CHECK10-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2198 // CHECK10-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1
2199 // CHECK10-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2200 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2201 // CHECK10:       omp.inner.for.end:
2202 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2203 // CHECK10:       omp.loop.exit:
2204 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2205 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
2206 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
2207 // CHECK10-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2208 // CHECK10-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2209 // CHECK10-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2210 // CHECK10:       .omp.final.then:
2211 // CHECK10-NEXT:    store i32 2, i32* [[I]], align 4
2212 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2213 // CHECK10:       .omp.final.done:
2214 // CHECK10-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2215 // CHECK10-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2216 // CHECK10-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2217 // CHECK10:       .omp.lastprivate.then:
2218 // CHECK10-NEXT:    [[TMP26:%.*]] = load i32, i32* [[T_VAR2]], align 4
2219 // CHECK10-NEXT:    store i32 [[TMP26]], i32* [[TMP1]], align 4
2220 // CHECK10-NEXT:    [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2221 // CHECK10-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
2222 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 8, i1 false)
2223 // CHECK10-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
2224 // CHECK10-NEXT:    [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
2225 // CHECK10-NEXT:    [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
2226 // CHECK10-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP30]]
2227 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2228 // CHECK10:       omp.arraycpy.body:
2229 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2230 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2231 // CHECK10-NEXT:    [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2232 // CHECK10-NEXT:    [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2233 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
2234 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2235 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2236 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
2237 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
2238 // CHECK10:       omp.arraycpy.done12:
2239 // CHECK10-NEXT:    [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8
2240 // CHECK10-NEXT:    [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8*
2241 // CHECK10-NEXT:    [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8*
2242 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false)
2243 // CHECK10-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2244 // CHECK10:       .omp.lastprivate.done:
2245 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR5]]) #[[ATTR4]]
2246 // CHECK10-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
2247 // CHECK10-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
2248 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2249 // CHECK10:       arraydestroy.body:
2250 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2251 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2252 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2253 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2254 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2255 // CHECK10:       arraydestroy.done14:
2256 // CHECK10-NEXT:    ret void
2257 //
2258 //
2259 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2260 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2261 // CHECK10-NEXT:  entry:
2262 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2263 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2264 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2265 // CHECK10-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]]
2266 // CHECK10-NEXT:    ret void
2267 //
2268 //
2269 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2270 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2271 // CHECK10-NEXT:  entry:
2272 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2273 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2274 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2275 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2276 // CHECK10-NEXT:    store i32 0, i32* [[F]], align 4
2277 // CHECK10-NEXT:    ret void
2278 //
2279 //
2280 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2281 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2282 // CHECK10-NEXT:  entry:
2283 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2284 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2285 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2286 // CHECK10-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2287 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2288 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2289 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2290 // CHECK10-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
2291 // CHECK10-NEXT:    ret void
2292 //
2293 //
2294 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2295 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2296 // CHECK10-NEXT:  entry:
2297 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2298 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2299 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2300 // CHECK10-NEXT:    ret void
2301 //
2302 //
2303 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2304 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
2305 // CHECK10-NEXT:  entry:
2306 // CHECK10-NEXT:    call void @__tgt_register_requires(i64 1)
2307 // CHECK10-NEXT:    ret void
2308 //
2309 //
2310 // CHECK11-LABEL: define {{[^@]+}}@main
2311 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
2312 // CHECK11-NEXT:  entry:
2313 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2314 // CHECK11-NEXT:    [[G:%.*]] = alloca double, align 8
2315 // CHECK11-NEXT:    [[G1:%.*]] = alloca double*, align 4
2316 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2317 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2318 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2319 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2320 // CHECK11-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 4
2321 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
2322 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2323 // CHECK11-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
2324 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
2325 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
2326 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
2327 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2328 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2329 // CHECK11-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2330 // CHECK11-NEXT:    store double* [[G]], double** [[G1]], align 4
2331 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]])
2332 // CHECK11-NEXT:    store i32 0, i32* [[T_VAR]], align 4
2333 // CHECK11-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2334 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
2335 // CHECK11-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2336 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
2337 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
2338 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
2339 // CHECK11-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
2340 // CHECK11-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
2341 // CHECK11-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
2342 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2343 // CHECK11-NEXT:    store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2344 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2345 // CHECK11-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2346 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
2347 // CHECK11-NEXT:    store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
2348 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
2349 // CHECK11-NEXT:    [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2350 // CHECK11-NEXT:    [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2351 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2352 // CHECK11-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2353 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP10]], align 4
2354 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2355 // CHECK11-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
2356 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP12]], align 4
2357 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2358 // CHECK11-NEXT:    store i8* null, i8** [[TMP13]], align 4
2359 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2360 // CHECK11-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2361 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2362 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2363 // CHECK11-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
2364 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
2365 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2366 // CHECK11-NEXT:    store i8* null, i8** [[TMP18]], align 4
2367 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2368 // CHECK11-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
2369 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
2370 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2371 // CHECK11-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
2372 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
2373 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2374 // CHECK11-NEXT:    store i8* null, i8** [[TMP23]], align 4
2375 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2376 // CHECK11-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
2377 // CHECK11-NEXT:    store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
2378 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2379 // CHECK11-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
2380 // CHECK11-NEXT:    store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
2381 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2382 // CHECK11-NEXT:    store i8* null, i8** [[TMP28]], align 4
2383 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2384 // CHECK11-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
2385 // CHECK11-NEXT:    store i32 [[TMP6]], i32* [[TMP30]], align 4
2386 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2387 // CHECK11-NEXT:    [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
2388 // CHECK11-NEXT:    store i32 [[TMP6]], i32* [[TMP32]], align 4
2389 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
2390 // CHECK11-NEXT:    store i8* null, i8** [[TMP33]], align 4
2391 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2392 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2393 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
2394 // CHECK11-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2395 // CHECK11-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2396 // CHECK11-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2397 // CHECK11:       omp_offload.failed:
2398 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
2399 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2400 // CHECK11:       omp_offload.cont:
2401 // CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
2402 // CHECK11-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
2403 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2404 // CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2405 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2406 // CHECK11:       arraydestroy.body:
2407 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2408 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2409 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2410 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2411 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2412 // CHECK11:       arraydestroy.done2:
2413 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]]
2414 // CHECK11-NEXT:    [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
2415 // CHECK11-NEXT:    ret i32 [[TMP39]]
2416 //
2417 //
2418 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2419 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2420 // CHECK11-NEXT:  entry:
2421 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2422 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2423 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2424 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]])
2425 // CHECK11-NEXT:    ret void
2426 //
2427 //
2428 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2429 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2430 // CHECK11-NEXT:  entry:
2431 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2432 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2433 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2434 // CHECK11-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
2435 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2436 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2437 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]])
2438 // CHECK11-NEXT:    ret void
2439 //
2440 //
2441 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96
2442 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2443 // CHECK11-NEXT:  entry:
2444 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2445 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2446 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2447 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2448 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
2449 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
2450 // CHECK11-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2451 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2452 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2453 // CHECK11-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2454 // CHECK11-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
2455 // CHECK11-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2456 // CHECK11-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2457 // CHECK11-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2458 // CHECK11-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
2459 // CHECK11-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2460 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
2461 // CHECK11-NEXT:    ret void
2462 //
2463 //
2464 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2465 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2466 // CHECK11-NEXT:  entry:
2467 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2468 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2469 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2470 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2471 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2472 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2473 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 4
2474 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
2475 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2476 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2477 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2478 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2479 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2480 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2481 // CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2482 // CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2483 // CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
2484 // CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2485 // CHECK11-NEXT:    [[_TMP6:%.*]] = alloca %struct.S*, align 4
2486 // CHECK11-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4
2487 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2488 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2489 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2490 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2491 // CHECK11-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2492 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2493 // CHECK11-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2494 // CHECK11-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
2495 // CHECK11-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2496 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2497 // CHECK11-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2498 // CHECK11-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2499 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
2500 // CHECK11-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
2501 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2502 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2503 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2504 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2505 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
2506 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2507 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2508 // CHECK11:       arrayctor.loop:
2509 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2510 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]])
2511 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
2512 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2513 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2514 // CHECK11:       arrayctor.cont:
2515 // CHECK11-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2516 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR5]])
2517 // CHECK11-NEXT:    store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
2518 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2519 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2520 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2521 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2522 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2523 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2524 // CHECK11:       cond.true:
2525 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2526 // CHECK11:       cond.false:
2527 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2528 // CHECK11-NEXT:    br label [[COND_END]]
2529 // CHECK11:       cond.end:
2530 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2531 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2532 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2533 // CHECK11-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
2534 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2535 // CHECK11:       omp.inner.for.cond:
2536 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2537 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
2538 // CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2539 // CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2540 // CHECK11:       omp.inner.for.cond.cleanup:
2541 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2542 // CHECK11:       omp.inner.for.body:
2543 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2544 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
2545 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2546 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
2547 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6
2548 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
2549 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP15]]
2550 // CHECK11-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
2551 // CHECK11-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !6
2552 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
2553 // CHECK11-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP17]]
2554 // CHECK11-NEXT:    [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8*
2555 // CHECK11-NEXT:    [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8*
2556 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false), !llvm.access.group !6
2557 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2558 // CHECK11:       omp.body.continue:
2559 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2560 // CHECK11:       omp.inner.for.inc:
2561 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2562 // CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1
2563 // CHECK11-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2564 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2565 // CHECK11:       omp.inner.for.end:
2566 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2567 // CHECK11:       omp.loop.exit:
2568 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2569 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2570 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2571 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2572 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2573 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2574 // CHECK11:       .omp.final.then:
2575 // CHECK11-NEXT:    store i32 2, i32* [[I]], align 4
2576 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2577 // CHECK11:       .omp.final.done:
2578 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2579 // CHECK11-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2580 // CHECK11-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2581 // CHECK11:       .omp.lastprivate.then:
2582 // CHECK11-NEXT:    [[TMP27:%.*]] = load i32, i32* [[T_VAR2]], align 4
2583 // CHECK11-NEXT:    store i32 [[TMP27]], i32* [[TMP1]], align 4
2584 // CHECK11-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2585 // CHECK11-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
2586 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 8, i1 false)
2587 // CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
2588 // CHECK11-NEXT:    [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
2589 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
2590 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP31]]
2591 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2592 // CHECK11:       omp.arraycpy.body:
2593 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2594 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2595 // CHECK11-NEXT:    [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2596 // CHECK11-NEXT:    [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2597 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false)
2598 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2599 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2600 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
2601 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
2602 // CHECK11:       omp.arraycpy.done12:
2603 // CHECK11-NEXT:    [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
2604 // CHECK11-NEXT:    [[TMP35:%.*]] = bitcast %struct.S* [[TMP5]] to i8*
2605 // CHECK11-NEXT:    [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8*
2606 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i32 4, i1 false)
2607 // CHECK11-NEXT:    [[TMP37:%.*]] = load i32, i32* [[SVAR7]], align 4
2608 // CHECK11-NEXT:    store i32 [[TMP37]], i32* [[TMP4]], align 4
2609 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2610 // CHECK11:       .omp.lastprivate.done:
2611 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR5]]) #[[ATTR4]]
2612 // CHECK11-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
2613 // CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
2614 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2615 // CHECK11:       arraydestroy.body:
2616 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2617 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2618 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2619 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2620 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2621 // CHECK11:       arraydestroy.done14:
2622 // CHECK11-NEXT:    ret void
2623 //
2624 //
2625 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2626 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2627 // CHECK11-NEXT:  entry:
2628 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2629 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2630 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2631 // CHECK11-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]]
2632 // CHECK11-NEXT:    ret void
2633 //
2634 //
2635 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2636 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
2637 // CHECK11-NEXT:  entry:
2638 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2639 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2640 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2641 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2642 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2643 // CHECK11-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
2644 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
2645 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2646 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
2647 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
2648 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
2649 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2650 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]])
2651 // CHECK11-NEXT:    store i32 0, i32* [[T_VAR]], align 4
2652 // CHECK11-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2653 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2654 // CHECK11-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2655 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef 1)
2656 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
2657 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef 2)
2658 // CHECK11-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
2659 // CHECK11-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
2660 // CHECK11-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
2661 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2662 // CHECK11-NEXT:    store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2663 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2664 // CHECK11-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2665 // CHECK11-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2666 // CHECK11-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2667 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2668 // CHECK11-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
2669 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP8]], align 4
2670 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2671 // CHECK11-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2672 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP10]], align 4
2673 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2674 // CHECK11-NEXT:    store i8* null, i8** [[TMP11]], align 4
2675 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2676 // CHECK11-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
2677 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
2678 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2679 // CHECK11-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2680 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2681 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2682 // CHECK11-NEXT:    store i8* null, i8** [[TMP16]], align 4
2683 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2684 // CHECK11-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
2685 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
2686 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2687 // CHECK11-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
2688 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
2689 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2690 // CHECK11-NEXT:    store i8* null, i8** [[TMP21]], align 4
2691 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2692 // CHECK11-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
2693 // CHECK11-NEXT:    store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
2694 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2695 // CHECK11-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
2696 // CHECK11-NEXT:    store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
2697 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2698 // CHECK11-NEXT:    store i8* null, i8** [[TMP26]], align 4
2699 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2700 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2701 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
2702 // CHECK11-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2703 // CHECK11-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2704 // CHECK11-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2705 // CHECK11:       omp_offload.failed:
2706 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
2707 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2708 // CHECK11:       omp_offload.cont:
2709 // CHECK11-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2710 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2711 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2712 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2713 // CHECK11:       arraydestroy.body:
2714 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2715 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2716 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2717 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2718 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2719 // CHECK11:       arraydestroy.done2:
2720 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]]
2721 // CHECK11-NEXT:    [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
2722 // CHECK11-NEXT:    ret i32 [[TMP32]]
2723 //
2724 //
2725 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2726 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2727 // CHECK11-NEXT:  entry:
2728 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2729 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2730 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2731 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2732 // CHECK11-NEXT:    store float 0.000000e+00, float* [[F]], align 4
2733 // CHECK11-NEXT:    ret void
2734 //
2735 //
2736 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2737 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2738 // CHECK11-NEXT:  entry:
2739 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2740 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2741 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2742 // CHECK11-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
2743 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2744 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2745 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2746 // CHECK11-NEXT:    store float [[TMP0]], float* [[F]], align 4
2747 // CHECK11-NEXT:    ret void
2748 //
2749 //
2750 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2751 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2752 // CHECK11-NEXT:  entry:
2753 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2754 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2755 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2756 // CHECK11-NEXT:    ret void
2757 //
2758 //
2759 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2760 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2761 // CHECK11-NEXT:  entry:
2762 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2763 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2764 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2765 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]])
2766 // CHECK11-NEXT:    ret void
2767 //
2768 //
2769 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2770 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2771 // CHECK11-NEXT:  entry:
2772 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2773 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2774 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2775 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2776 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2777 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2778 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef [[TMP0]])
2779 // CHECK11-NEXT:    ret void
2780 //
2781 //
2782 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
2783 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2784 // CHECK11-NEXT:  entry:
2785 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2786 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2787 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2788 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2789 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
2790 // CHECK11-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2791 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2792 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2793 // CHECK11-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2794 // CHECK11-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2795 // CHECK11-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2796 // CHECK11-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2797 // CHECK11-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
2798 // CHECK11-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2799 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
2800 // CHECK11-NEXT:    ret void
2801 //
2802 //
2803 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2804 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2805 // CHECK11-NEXT:  entry:
2806 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2807 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2808 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2809 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2810 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2811 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2812 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
2813 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2814 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2815 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2816 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2817 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2818 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2819 // CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2820 // CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2821 // CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
2822 // CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2823 // CHECK11-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
2824 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2825 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2826 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2827 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2828 // CHECK11-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2829 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2830 // CHECK11-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2831 // CHECK11-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2832 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2833 // CHECK11-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2834 // CHECK11-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2835 // CHECK11-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
2836 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2837 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2838 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2839 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2840 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
2841 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2842 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2843 // CHECK11:       arrayctor.loop:
2844 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2845 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]])
2846 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2847 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2848 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2849 // CHECK11:       arrayctor.cont:
2850 // CHECK11-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2851 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR5]])
2852 // CHECK11-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
2853 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2854 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2855 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2856 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2857 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
2858 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2859 // CHECK11:       cond.true:
2860 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2861 // CHECK11:       cond.false:
2862 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2863 // CHECK11-NEXT:    br label [[COND_END]]
2864 // CHECK11:       cond.end:
2865 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2866 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2867 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2868 // CHECK11-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
2869 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2870 // CHECK11:       omp.inner.for.cond:
2871 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2872 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
2873 // CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2874 // CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2875 // CHECK11:       omp.inner.for.cond.cleanup:
2876 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2877 // CHECK11:       omp.inner.for.body:
2878 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2879 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
2880 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2881 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
2882 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !12
2883 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
2884 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP14]]
2885 // CHECK11-NEXT:    store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
2886 // CHECK11-NEXT:    [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !12
2887 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
2888 // CHECK11-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP16]]
2889 // CHECK11-NEXT:    [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
2890 // CHECK11-NEXT:    [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8*
2891 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 4, i1 false), !llvm.access.group !12
2892 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2893 // CHECK11:       omp.body.continue:
2894 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2895 // CHECK11:       omp.inner.for.inc:
2896 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2897 // CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], 1
2898 // CHECK11-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2899 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2900 // CHECK11:       omp.inner.for.end:
2901 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2902 // CHECK11:       omp.loop.exit:
2903 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2904 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
2905 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
2906 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2907 // CHECK11-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2908 // CHECK11-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2909 // CHECK11:       .omp.final.then:
2910 // CHECK11-NEXT:    store i32 2, i32* [[I]], align 4
2911 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2912 // CHECK11:       .omp.final.done:
2913 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2914 // CHECK11-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2915 // CHECK11-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2916 // CHECK11:       .omp.lastprivate.then:
2917 // CHECK11-NEXT:    [[TMP26:%.*]] = load i32, i32* [[T_VAR2]], align 4
2918 // CHECK11-NEXT:    store i32 [[TMP26]], i32* [[TMP1]], align 4
2919 // CHECK11-NEXT:    [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2920 // CHECK11-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
2921 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 8, i1 false)
2922 // CHECK11-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
2923 // CHECK11-NEXT:    [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
2924 // CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
2925 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP30]]
2926 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2927 // CHECK11:       omp.arraycpy.body:
2928 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2929 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2930 // CHECK11-NEXT:    [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2931 // CHECK11-NEXT:    [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2932 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
2933 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2934 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2935 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
2936 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
2937 // CHECK11:       omp.arraycpy.done11:
2938 // CHECK11-NEXT:    [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
2939 // CHECK11-NEXT:    [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8*
2940 // CHECK11-NEXT:    [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8*
2941 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i32 4, i1 false)
2942 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2943 // CHECK11:       .omp.lastprivate.done:
2944 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR5]]) #[[ATTR4]]
2945 // CHECK11-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
2946 // CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
2947 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2948 // CHECK11:       arraydestroy.body:
2949 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2950 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2951 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2952 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
2953 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
2954 // CHECK11:       arraydestroy.done13:
2955 // CHECK11-NEXT:    ret void
2956 //
2957 //
2958 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2959 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2960 // CHECK11-NEXT:  entry:
2961 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2962 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2963 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2964 // CHECK11-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]]
2965 // CHECK11-NEXT:    ret void
2966 //
2967 //
2968 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2969 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2970 // CHECK11-NEXT:  entry:
2971 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2972 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2973 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2974 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2975 // CHECK11-NEXT:    store i32 0, i32* [[F]], align 4
2976 // CHECK11-NEXT:    ret void
2977 //
2978 //
2979 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2980 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2981 // CHECK11-NEXT:  entry:
2982 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2983 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2984 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2985 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2986 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2987 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2988 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2989 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
2990 // CHECK11-NEXT:    ret void
2991 //
2992 //
2993 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2994 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2995 // CHECK11-NEXT:  entry:
2996 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2997 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2998 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2999 // CHECK11-NEXT:    ret void
3000 //
3001 //
3002 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3003 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
3004 // CHECK11-NEXT:  entry:
3005 // CHECK11-NEXT:    call void @__tgt_register_requires(i64 1)
3006 // CHECK11-NEXT:    ret void
3007 //
3008 //
3009 // CHECK12-LABEL: define {{[^@]+}}@main
3010 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
3011 // CHECK12-NEXT:  entry:
3012 // CHECK12-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3013 // CHECK12-NEXT:    [[G:%.*]] = alloca double, align 8
3014 // CHECK12-NEXT:    [[G1:%.*]] = alloca double*, align 4
3015 // CHECK12-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3016 // CHECK12-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3017 // CHECK12-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3018 // CHECK12-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3019 // CHECK12-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 4
3020 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
3021 // CHECK12-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3022 // CHECK12-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
3023 // CHECK12-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
3024 // CHECK12-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
3025 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
3026 // CHECK12-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3027 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
3028 // CHECK12-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3029 // CHECK12-NEXT:    store double* [[G]], double** [[G1]], align 4
3030 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]])
3031 // CHECK12-NEXT:    store i32 0, i32* [[T_VAR]], align 4
3032 // CHECK12-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3033 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
3034 // CHECK12-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3035 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
3036 // CHECK12-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
3037 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
3038 // CHECK12-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
3039 // CHECK12-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
3040 // CHECK12-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
3041 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
3042 // CHECK12-NEXT:    store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
3043 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3044 // CHECK12-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3045 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
3046 // CHECK12-NEXT:    store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
3047 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
3048 // CHECK12-NEXT:    [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3049 // CHECK12-NEXT:    [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3050 // CHECK12-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3051 // CHECK12-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3052 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[TMP10]], align 4
3053 // CHECK12-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3054 // CHECK12-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
3055 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[TMP12]], align 4
3056 // CHECK12-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3057 // CHECK12-NEXT:    store i8* null, i8** [[TMP13]], align 4
3058 // CHECK12-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3059 // CHECK12-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
3060 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
3061 // CHECK12-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3062 // CHECK12-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
3063 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
3064 // CHECK12-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3065 // CHECK12-NEXT:    store i8* null, i8** [[TMP18]], align 4
3066 // CHECK12-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3067 // CHECK12-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
3068 // CHECK12-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
3069 // CHECK12-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3070 // CHECK12-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
3071 // CHECK12-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
3072 // CHECK12-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3073 // CHECK12-NEXT:    store i8* null, i8** [[TMP23]], align 4
3074 // CHECK12-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3075 // CHECK12-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
3076 // CHECK12-NEXT:    store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
3077 // CHECK12-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3078 // CHECK12-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
3079 // CHECK12-NEXT:    store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
3080 // CHECK12-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3081 // CHECK12-NEXT:    store i8* null, i8** [[TMP28]], align 4
3082 // CHECK12-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
3083 // CHECK12-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
3084 // CHECK12-NEXT:    store i32 [[TMP6]], i32* [[TMP30]], align 4
3085 // CHECK12-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
3086 // CHECK12-NEXT:    [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
3087 // CHECK12-NEXT:    store i32 [[TMP6]], i32* [[TMP32]], align 4
3088 // CHECK12-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
3089 // CHECK12-NEXT:    store i8* null, i8** [[TMP33]], align 4
3090 // CHECK12-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3091 // CHECK12-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3092 // CHECK12-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
3093 // CHECK12-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3094 // CHECK12-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
3095 // CHECK12-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3096 // CHECK12:       omp_offload.failed:
3097 // CHECK12-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
3098 // CHECK12-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3099 // CHECK12:       omp_offload.cont:
3100 // CHECK12-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
3101 // CHECK12-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
3102 // CHECK12-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3103 // CHECK12-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3104 // CHECK12-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3105 // CHECK12:       arraydestroy.body:
3106 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3107 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3108 // CHECK12-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3109 // CHECK12-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3110 // CHECK12-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3111 // CHECK12:       arraydestroy.done2:
3112 // CHECK12-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]]
3113 // CHECK12-NEXT:    [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
3114 // CHECK12-NEXT:    ret i32 [[TMP39]]
3115 //
3116 //
3117 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3118 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3119 // CHECK12-NEXT:  entry:
3120 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3121 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3122 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3123 // CHECK12-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]])
3124 // CHECK12-NEXT:    ret void
3125 //
3126 //
3127 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3128 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3129 // CHECK12-NEXT:  entry:
3130 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3131 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3132 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3133 // CHECK12-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3134 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3135 // CHECK12-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3136 // CHECK12-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]])
3137 // CHECK12-NEXT:    ret void
3138 //
3139 //
3140 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96
3141 // CHECK12-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
3142 // CHECK12-NEXT:  entry:
3143 // CHECK12-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3144 // CHECK12-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3145 // CHECK12-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3146 // CHECK12-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3147 // CHECK12-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
3148 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
3149 // CHECK12-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3150 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3151 // CHECK12-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3152 // CHECK12-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3153 // CHECK12-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
3154 // CHECK12-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3155 // CHECK12-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3156 // CHECK12-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3157 // CHECK12-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
3158 // CHECK12-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3159 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
3160 // CHECK12-NEXT:    ret void
3161 //
3162 //
3163 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
3164 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
3165 // CHECK12-NEXT:  entry:
3166 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3167 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3168 // CHECK12-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3169 // CHECK12-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3170 // CHECK12-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3171 // CHECK12-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3172 // CHECK12-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 4
3173 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
3174 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3175 // CHECK12-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3176 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3177 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3178 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3179 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3180 // CHECK12-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
3181 // CHECK12-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
3182 // CHECK12-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
3183 // CHECK12-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3184 // CHECK12-NEXT:    [[_TMP6:%.*]] = alloca %struct.S*, align 4
3185 // CHECK12-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4
3186 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
3187 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3188 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3189 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3190 // CHECK12-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3191 // CHECK12-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3192 // CHECK12-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3193 // CHECK12-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
3194 // CHECK12-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3195 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3196 // CHECK12-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3197 // CHECK12-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3198 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
3199 // CHECK12-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
3200 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3201 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3202 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3203 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3204 // CHECK12-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
3205 // CHECK12-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3206 // CHECK12-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3207 // CHECK12:       arrayctor.loop:
3208 // CHECK12-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3209 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]])
3210 // CHECK12-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
3211 // CHECK12-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3212 // CHECK12-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3213 // CHECK12:       arrayctor.cont:
3214 // CHECK12-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3215 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR5]])
3216 // CHECK12-NEXT:    store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
3217 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3218 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
3219 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3220 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3221 // CHECK12-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
3222 // CHECK12-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3223 // CHECK12:       cond.true:
3224 // CHECK12-NEXT:    br label [[COND_END:%.*]]
3225 // CHECK12:       cond.false:
3226 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3227 // CHECK12-NEXT:    br label [[COND_END]]
3228 // CHECK12:       cond.end:
3229 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
3230 // CHECK12-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3231 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3232 // CHECK12-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
3233 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3234 // CHECK12:       omp.inner.for.cond:
3235 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3236 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
3237 // CHECK12-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
3238 // CHECK12-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3239 // CHECK12:       omp.inner.for.cond.cleanup:
3240 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3241 // CHECK12:       omp.inner.for.body:
3242 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3243 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
3244 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3245 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
3246 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6
3247 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
3248 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP15]]
3249 // CHECK12-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
3250 // CHECK12-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !6
3251 // CHECK12-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
3252 // CHECK12-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP17]]
3253 // CHECK12-NEXT:    [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8*
3254 // CHECK12-NEXT:    [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8*
3255 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false), !llvm.access.group !6
3256 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3257 // CHECK12:       omp.body.continue:
3258 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3259 // CHECK12:       omp.inner.for.inc:
3260 // CHECK12-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3261 // CHECK12-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1
3262 // CHECK12-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3263 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3264 // CHECK12:       omp.inner.for.end:
3265 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3266 // CHECK12:       omp.loop.exit:
3267 // CHECK12-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3268 // CHECK12-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
3269 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
3270 // CHECK12-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3271 // CHECK12-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3272 // CHECK12-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3273 // CHECK12:       .omp.final.then:
3274 // CHECK12-NEXT:    store i32 2, i32* [[I]], align 4
3275 // CHECK12-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3276 // CHECK12:       .omp.final.done:
3277 // CHECK12-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3278 // CHECK12-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3279 // CHECK12-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3280 // CHECK12:       .omp.lastprivate.then:
3281 // CHECK12-NEXT:    [[TMP27:%.*]] = load i32, i32* [[T_VAR2]], align 4
3282 // CHECK12-NEXT:    store i32 [[TMP27]], i32* [[TMP1]], align 4
3283 // CHECK12-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
3284 // CHECK12-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
3285 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 8, i1 false)
3286 // CHECK12-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
3287 // CHECK12-NEXT:    [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
3288 // CHECK12-NEXT:    [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
3289 // CHECK12-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP31]]
3290 // CHECK12-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3291 // CHECK12:       omp.arraycpy.body:
3292 // CHECK12-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3293 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3294 // CHECK12-NEXT:    [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3295 // CHECK12-NEXT:    [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3296 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false)
3297 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3298 // CHECK12-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3299 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
3300 // CHECK12-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
3301 // CHECK12:       omp.arraycpy.done12:
3302 // CHECK12-NEXT:    [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
3303 // CHECK12-NEXT:    [[TMP35:%.*]] = bitcast %struct.S* [[TMP5]] to i8*
3304 // CHECK12-NEXT:    [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8*
3305 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i32 4, i1 false)
3306 // CHECK12-NEXT:    [[TMP37:%.*]] = load i32, i32* [[SVAR7]], align 4
3307 // CHECK12-NEXT:    store i32 [[TMP37]], i32* [[TMP4]], align 4
3308 // CHECK12-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3309 // CHECK12:       .omp.lastprivate.done:
3310 // CHECK12-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR5]]) #[[ATTR4]]
3311 // CHECK12-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
3312 // CHECK12-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
3313 // CHECK12-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3314 // CHECK12:       arraydestroy.body:
3315 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3316 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3317 // CHECK12-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3318 // CHECK12-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
3319 // CHECK12-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
3320 // CHECK12:       arraydestroy.done14:
3321 // CHECK12-NEXT:    ret void
3322 //
3323 //
3324 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3325 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3326 // CHECK12-NEXT:  entry:
3327 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3328 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3329 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3330 // CHECK12-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]]
3331 // CHECK12-NEXT:    ret void
3332 //
3333 //
3334 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3335 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat {
3336 // CHECK12-NEXT:  entry:
3337 // CHECK12-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3338 // CHECK12-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3339 // CHECK12-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3340 // CHECK12-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3341 // CHECK12-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3342 // CHECK12-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
3343 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
3344 // CHECK12-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3345 // CHECK12-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
3346 // CHECK12-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
3347 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
3348 // CHECK12-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3349 // CHECK12-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]])
3350 // CHECK12-NEXT:    store i32 0, i32* [[T_VAR]], align 4
3351 // CHECK12-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3352 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
3353 // CHECK12-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3354 // CHECK12-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef 1)
3355 // CHECK12-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
3356 // CHECK12-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef 2)
3357 // CHECK12-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
3358 // CHECK12-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
3359 // CHECK12-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
3360 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
3361 // CHECK12-NEXT:    store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
3362 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3363 // CHECK12-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3364 // CHECK12-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3365 // CHECK12-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3366 // CHECK12-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3367 // CHECK12-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
3368 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[TMP8]], align 4
3369 // CHECK12-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3370 // CHECK12-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3371 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[TMP10]], align 4
3372 // CHECK12-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3373 // CHECK12-NEXT:    store i8* null, i8** [[TMP11]], align 4
3374 // CHECK12-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3375 // CHECK12-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
3376 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
3377 // CHECK12-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3378 // CHECK12-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
3379 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
3380 // CHECK12-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3381 // CHECK12-NEXT:    store i8* null, i8** [[TMP16]], align 4
3382 // CHECK12-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3383 // CHECK12-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
3384 // CHECK12-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
3385 // CHECK12-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3386 // CHECK12-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
3387 // CHECK12-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
3388 // CHECK12-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3389 // CHECK12-NEXT:    store i8* null, i8** [[TMP21]], align 4
3390 // CHECK12-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3391 // CHECK12-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
3392 // CHECK12-NEXT:    store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
3393 // CHECK12-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3394 // CHECK12-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
3395 // CHECK12-NEXT:    store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
3396 // CHECK12-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3397 // CHECK12-NEXT:    store i8* null, i8** [[TMP26]], align 4
3398 // CHECK12-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3399 // CHECK12-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3400 // CHECK12-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
3401 // CHECK12-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3402 // CHECK12-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
3403 // CHECK12-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3404 // CHECK12:       omp_offload.failed:
3405 // CHECK12-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
3406 // CHECK12-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3407 // CHECK12:       omp_offload.cont:
3408 // CHECK12-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3409 // CHECK12-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3410 // CHECK12-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3411 // CHECK12-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3412 // CHECK12:       arraydestroy.body:
3413 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3414 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3415 // CHECK12-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3416 // CHECK12-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3417 // CHECK12-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3418 // CHECK12:       arraydestroy.done2:
3419 // CHECK12-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]]
3420 // CHECK12-NEXT:    [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
3421 // CHECK12-NEXT:    ret i32 [[TMP32]]
3422 //
3423 //
3424 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3425 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3426 // CHECK12-NEXT:  entry:
3427 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3428 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3429 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3430 // CHECK12-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3431 // CHECK12-NEXT:    store float 0.000000e+00, float* [[F]], align 4
3432 // CHECK12-NEXT:    ret void
3433 //
3434 //
3435 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3436 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3437 // CHECK12-NEXT:  entry:
3438 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3439 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3440 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3441 // CHECK12-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3442 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3443 // CHECK12-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3444 // CHECK12-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3445 // CHECK12-NEXT:    store float [[TMP0]], float* [[F]], align 4
3446 // CHECK12-NEXT:    ret void
3447 //
3448 //
3449 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3450 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3451 // CHECK12-NEXT:  entry:
3452 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3453 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3454 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3455 // CHECK12-NEXT:    ret void
3456 //
3457 //
3458 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3459 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3460 // CHECK12-NEXT:  entry:
3461 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3462 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3463 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3464 // CHECK12-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]])
3465 // CHECK12-NEXT:    ret void
3466 //
3467 //
3468 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3469 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3470 // CHECK12-NEXT:  entry:
3471 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3472 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3473 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3474 // CHECK12-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3475 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3476 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3477 // CHECK12-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef [[TMP0]])
3478 // CHECK12-NEXT:    ret void
3479 //
3480 //
3481 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
3482 // CHECK12-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3483 // CHECK12-NEXT:  entry:
3484 // CHECK12-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3485 // CHECK12-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3486 // CHECK12-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3487 // CHECK12-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3488 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
3489 // CHECK12-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3490 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3491 // CHECK12-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3492 // CHECK12-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3493 // CHECK12-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3494 // CHECK12-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3495 // CHECK12-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3496 // CHECK12-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
3497 // CHECK12-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3498 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
3499 // CHECK12-NEXT:    ret void
3500 //
3501 //
3502 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
3503 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3504 // CHECK12-NEXT:  entry:
3505 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3506 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3507 // CHECK12-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3508 // CHECK12-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3509 // CHECK12-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3510 // CHECK12-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3511 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
3512 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3513 // CHECK12-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3514 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3515 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3516 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3517 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3518 // CHECK12-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
3519 // CHECK12-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
3520 // CHECK12-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
3521 // CHECK12-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3522 // CHECK12-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
3523 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
3524 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3525 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3526 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3527 // CHECK12-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3528 // CHECK12-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3529 // CHECK12-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3530 // CHECK12-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3531 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3532 // CHECK12-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3533 // CHECK12-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3534 // CHECK12-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
3535 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3536 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3537 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3538 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3539 // CHECK12-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
3540 // CHECK12-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3541 // CHECK12-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3542 // CHECK12:       arrayctor.loop:
3543 // CHECK12-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3544 // CHECK12-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]])
3545 // CHECK12-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
3546 // CHECK12-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3547 // CHECK12-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3548 // CHECK12:       arrayctor.cont:
3549 // CHECK12-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3550 // CHECK12-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR5]])
3551 // CHECK12-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
3552 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3553 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3554 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3555 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3556 // CHECK12-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
3557 // CHECK12-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3558 // CHECK12:       cond.true:
3559 // CHECK12-NEXT:    br label [[COND_END:%.*]]
3560 // CHECK12:       cond.false:
3561 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3562 // CHECK12-NEXT:    br label [[COND_END]]
3563 // CHECK12:       cond.end:
3564 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
3565 // CHECK12-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3566 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3567 // CHECK12-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3568 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3569 // CHECK12:       omp.inner.for.cond:
3570 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3571 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
3572 // CHECK12-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3573 // CHECK12-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3574 // CHECK12:       omp.inner.for.cond.cleanup:
3575 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3576 // CHECK12:       omp.inner.for.body:
3577 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3578 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
3579 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3580 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
3581 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !12
3582 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
3583 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP14]]
3584 // CHECK12-NEXT:    store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
3585 // CHECK12-NEXT:    [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !12
3586 // CHECK12-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
3587 // CHECK12-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP16]]
3588 // CHECK12-NEXT:    [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
3589 // CHECK12-NEXT:    [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8*
3590 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 4, i1 false), !llvm.access.group !12
3591 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3592 // CHECK12:       omp.body.continue:
3593 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3594 // CHECK12:       omp.inner.for.inc:
3595 // CHECK12-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3596 // CHECK12-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], 1
3597 // CHECK12-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3598 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
3599 // CHECK12:       omp.inner.for.end:
3600 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3601 // CHECK12:       omp.loop.exit:
3602 // CHECK12-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3603 // CHECK12-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
3604 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
3605 // CHECK12-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3606 // CHECK12-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
3607 // CHECK12-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3608 // CHECK12:       .omp.final.then:
3609 // CHECK12-NEXT:    store i32 2, i32* [[I]], align 4
3610 // CHECK12-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3611 // CHECK12:       .omp.final.done:
3612 // CHECK12-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3613 // CHECK12-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3614 // CHECK12-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3615 // CHECK12:       .omp.lastprivate.then:
3616 // CHECK12-NEXT:    [[TMP26:%.*]] = load i32, i32* [[T_VAR2]], align 4
3617 // CHECK12-NEXT:    store i32 [[TMP26]], i32* [[TMP1]], align 4
3618 // CHECK12-NEXT:    [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
3619 // CHECK12-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
3620 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 8, i1 false)
3621 // CHECK12-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
3622 // CHECK12-NEXT:    [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
3623 // CHECK12-NEXT:    [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
3624 // CHECK12-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP30]]
3625 // CHECK12-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3626 // CHECK12:       omp.arraycpy.body:
3627 // CHECK12-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3628 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3629 // CHECK12-NEXT:    [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3630 // CHECK12-NEXT:    [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3631 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
3632 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3633 // CHECK12-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3634 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
3635 // CHECK12-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
3636 // CHECK12:       omp.arraycpy.done11:
3637 // CHECK12-NEXT:    [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
3638 // CHECK12-NEXT:    [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8*
3639 // CHECK12-NEXT:    [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8*
3640 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i32 4, i1 false)
3641 // CHECK12-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3642 // CHECK12:       .omp.lastprivate.done:
3643 // CHECK12-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR5]]) #[[ATTR4]]
3644 // CHECK12-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
3645 // CHECK12-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
3646 // CHECK12-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3647 // CHECK12:       arraydestroy.body:
3648 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3649 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3650 // CHECK12-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3651 // CHECK12-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
3652 // CHECK12-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
3653 // CHECK12:       arraydestroy.done13:
3654 // CHECK12-NEXT:    ret void
3655 //
3656 //
3657 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3658 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3659 // CHECK12-NEXT:  entry:
3660 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3661 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3662 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3663 // CHECK12-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]]
3664 // CHECK12-NEXT:    ret void
3665 //
3666 //
3667 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3668 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3669 // CHECK12-NEXT:  entry:
3670 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3671 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3672 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3673 // CHECK12-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3674 // CHECK12-NEXT:    store i32 0, i32* [[F]], align 4
3675 // CHECK12-NEXT:    ret void
3676 //
3677 //
3678 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3679 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3680 // CHECK12-NEXT:  entry:
3681 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3682 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3683 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3684 // CHECK12-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3685 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3686 // CHECK12-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3687 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3688 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
3689 // CHECK12-NEXT:    ret void
3690 //
3691 //
3692 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3693 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3694 // CHECK12-NEXT:  entry:
3695 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3696 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3697 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3698 // CHECK12-NEXT:    ret void
3699 //
3700 //
3701 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3702 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] {
3703 // CHECK12-NEXT:  entry:
3704 // CHECK12-NEXT:    call void @__tgt_register_requires(i64 1)
3705 // CHECK12-NEXT:    ret void
3706 //
3707 //
3708 // CHECK13-LABEL: define {{[^@]+}}@main
3709 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
3710 // CHECK13-NEXT:  entry:
3711 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3712 // CHECK13-NEXT:    [[G:%.*]] = alloca double, align 8
3713 // CHECK13-NEXT:    [[G1:%.*]] = alloca double*, align 8
3714 // CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3715 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3716 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3717 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3718 // CHECK13-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 8
3719 // CHECK13-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
3720 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 8
3721 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3722 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3723 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3724 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3725 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
3726 // CHECK13-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
3727 // CHECK13-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
3728 // CHECK13-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
3729 // CHECK13-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S]], align 4
3730 // CHECK13-NEXT:    [[_TMP7:%.*]] = alloca %struct.S*, align 8
3731 // CHECK13-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
3732 // CHECK13-NEXT:    [[I15:%.*]] = alloca i32, align 4
3733 // CHECK13-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3734 // CHECK13-NEXT:    store double* [[G]], double** [[G1]], align 8
3735 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]])
3736 // CHECK13-NEXT:    store i32 0, i32* [[T_VAR]], align 4
3737 // CHECK13-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3738 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
3739 // CHECK13-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
3740 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
3741 // CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
3742 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
3743 // CHECK13-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
3744 // CHECK13-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
3745 // CHECK13-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
3746 // CHECK13-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
3747 // CHECK13-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
3748 // CHECK13-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8
3749 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3750 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3751 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3752 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3753 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3754 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
3755 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3756 // CHECK13:       arrayctor.loop:
3757 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3758 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]])
3759 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
3760 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3761 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3762 // CHECK13:       arrayctor.cont:
3763 // CHECK13-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
3764 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR6]])
3765 // CHECK13-NEXT:    store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
3766 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3767 // CHECK13:       omp.inner.for.cond:
3768 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3769 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
3770 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3771 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3772 // CHECK13:       omp.inner.for.cond.cleanup:
3773 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3774 // CHECK13:       omp.inner.for.body:
3775 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3776 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3777 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3778 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
3779 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !2
3780 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
3781 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
3782 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
3783 // CHECK13-NEXT:    store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
3784 // CHECK13-NEXT:    [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8, !llvm.access.group !2
3785 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
3786 // CHECK13-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP12]] to i64
3787 // CHECK13-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM8]]
3788 // CHECK13-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8*
3789 // CHECK13-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8*
3790 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !2
3791 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3792 // CHECK13:       omp.body.continue:
3793 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3794 // CHECK13:       omp.inner.for.inc:
3795 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3796 // CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
3797 // CHECK13-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3798 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3799 // CHECK13:       omp.inner.for.end:
3800 // CHECK13-NEXT:    store i32 2, i32* [[I]], align 4
3801 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4
3802 // CHECK13-NEXT:    store i32 [[TMP16]], i32* [[T_VAR]], align 4
3803 // CHECK13-NEXT:    [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3804 // CHECK13-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3805 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 8, i1 false)
3806 // CHECK13-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3807 // CHECK13-NEXT:    [[TMP19:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
3808 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2
3809 // CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP20]]
3810 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3811 // CHECK13:       omp.arraycpy.body:
3812 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3813 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3814 // CHECK13-NEXT:    [[TMP21:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3815 // CHECK13-NEXT:    [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3816 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 4, i1 false)
3817 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3818 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3819 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]]
3820 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
3821 // CHECK13:       omp.arraycpy.done12:
3822 // CHECK13-NEXT:    [[TMP23:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
3823 // CHECK13-NEXT:    [[TMP24:%.*]] = bitcast %struct.S* [[TMP5]] to i8*
3824 // CHECK13-NEXT:    [[TMP25:%.*]] = bitcast %struct.S* [[TMP23]] to i8*
3825 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 4, i1 false)
3826 // CHECK13-NEXT:    [[TMP26:%.*]] = load i32, i32* [[SVAR]], align 4
3827 // CHECK13-NEXT:    store i32 [[TMP26]], i32* @_ZZ4mainE4svar, align 4
3828 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR6]]) #[[ATTR4:[0-9]+]]
3829 // CHECK13-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3830 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2
3831 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3832 // CHECK13:       arraydestroy.body:
3833 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP27]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3834 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3835 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3836 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
3837 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
3838 // CHECK13:       arraydestroy.done14:
3839 // CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
3840 // CHECK13-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
3841 // CHECK13-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3842 // CHECK13-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN16]], i64 2
3843 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]
3844 // CHECK13:       arraydestroy.body17:
3845 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S* [ [[TMP28]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
3846 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1
3847 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]]
3848 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
3849 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
3850 // CHECK13:       arraydestroy.done21:
3851 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]]
3852 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4
3853 // CHECK13-NEXT:    ret i32 [[TMP29]]
3854 //
3855 //
3856 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3857 // CHECK13-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3858 // CHECK13-NEXT:  entry:
3859 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3860 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3861 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3862 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]])
3863 // CHECK13-NEXT:    ret void
3864 //
3865 //
3866 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3867 // CHECK13-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3868 // CHECK13-NEXT:  entry:
3869 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3870 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3871 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3872 // CHECK13-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3873 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3874 // CHECK13-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3875 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]])
3876 // CHECK13-NEXT:    ret void
3877 //
3878 //
3879 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3880 // CHECK13-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3881 // CHECK13-NEXT:  entry:
3882 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3883 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3884 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3885 // CHECK13-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]]
3886 // CHECK13-NEXT:    ret void
3887 //
3888 //
3889 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3890 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat {
3891 // CHECK13-NEXT:  entry:
3892 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3893 // CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3894 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3895 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3896 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3897 // CHECK13-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
3898 // CHECK13-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
3899 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
3900 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3901 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3902 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3903 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3904 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
3905 // CHECK13-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
3906 // CHECK13-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
3907 // CHECK13-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
3908 // CHECK13-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0]], align 4
3909 // CHECK13-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
3910 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]])
3911 // CHECK13-NEXT:    store i32 0, i32* [[T_VAR]], align 4
3912 // CHECK13-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3913 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
3914 // CHECK13-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
3915 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
3916 // CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
3917 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
3918 // CHECK13-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
3919 // CHECK13-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
3920 // CHECK13-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
3921 // CHECK13-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
3922 // CHECK13-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
3923 // CHECK13-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8
3924 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3925 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3926 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3927 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3928 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3929 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
3930 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3931 // CHECK13:       arrayctor.loop:
3932 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3933 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]])
3934 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
3935 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3936 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3937 // CHECK13:       arrayctor.cont:
3938 // CHECK13-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
3939 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR6]])
3940 // CHECK13-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
3941 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3942 // CHECK13:       omp.inner.for.cond:
3943 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3944 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
3945 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3946 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3947 // CHECK13:       omp.inner.for.cond.cleanup:
3948 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3949 // CHECK13:       omp.inner.for.body:
3950 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3951 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3952 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3953 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
3954 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !6
3955 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
3956 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
3957 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
3958 // CHECK13-NEXT:    store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
3959 // CHECK13-NEXT:    [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8, !llvm.access.group !6
3960 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
3961 // CHECK13-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP12]] to i64
3962 // CHECK13-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM8]]
3963 // CHECK13-NEXT:    [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
3964 // CHECK13-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8*
3965 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !6
3966 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3967 // CHECK13:       omp.body.continue:
3968 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3969 // CHECK13:       omp.inner.for.inc:
3970 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3971 // CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
3972 // CHECK13-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3973 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3974 // CHECK13:       omp.inner.for.end:
3975 // CHECK13-NEXT:    store i32 2, i32* [[I]], align 4
3976 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4
3977 // CHECK13-NEXT:    store i32 [[TMP16]], i32* [[T_VAR]], align 4
3978 // CHECK13-NEXT:    [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3979 // CHECK13-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3980 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 8, i1 false)
3981 // CHECK13-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3982 // CHECK13-NEXT:    [[TMP19:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
3983 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
3984 // CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP20]]
3985 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3986 // CHECK13:       omp.arraycpy.body:
3987 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3988 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3989 // CHECK13-NEXT:    [[TMP21:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3990 // CHECK13-NEXT:    [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3991 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 4, i1 false)
3992 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3993 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3994 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]]
3995 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
3996 // CHECK13:       omp.arraycpy.done12:
3997 // CHECK13-NEXT:    [[TMP23:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
3998 // CHECK13-NEXT:    [[TMP24:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
3999 // CHECK13-NEXT:    [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8*
4000 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 4, i1 false)
4001 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR6]]) #[[ATTR4]]
4002 // CHECK13-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
4003 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
4004 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4005 // CHECK13:       arraydestroy.body:
4006 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4007 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4008 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4009 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
4010 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
4011 // CHECK13:       arraydestroy.done14:
4012 // CHECK13-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4013 // CHECK13-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4014 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN15]], i64 2
4015 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]
4016 // CHECK13:       arraydestroy.body16:
4017 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi %struct.S.0* [ [[TMP27]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
4018 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST17]], i64 -1
4019 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]]
4020 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
4021 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
4022 // CHECK13:       arraydestroy.done20:
4023 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]]
4024 // CHECK13-NEXT:    [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4
4025 // CHECK13-NEXT:    ret i32 [[TMP28]]
4026 //
4027 //
4028 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4029 // CHECK13-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4030 // CHECK13-NEXT:  entry:
4031 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4032 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4033 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4034 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4035 // CHECK13-NEXT:    store float 0.000000e+00, float* [[F]], align 4
4036 // CHECK13-NEXT:    ret void
4037 //
4038 //
4039 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4040 // CHECK13-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4041 // CHECK13-NEXT:  entry:
4042 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4043 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4044 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4045 // CHECK13-NEXT:    ret void
4046 //
4047 //
4048 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4049 // CHECK13-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4050 // CHECK13-NEXT:  entry:
4051 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4052 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4053 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4054 // CHECK13-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4055 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4056 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4057 // CHECK13-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4058 // CHECK13-NEXT:    store float [[TMP0]], float* [[F]], align 4
4059 // CHECK13-NEXT:    ret void
4060 //
4061 //
4062 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4063 // CHECK13-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4064 // CHECK13-NEXT:  entry:
4065 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4066 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4067 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4068 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]])
4069 // CHECK13-NEXT:    ret void
4070 //
4071 //
4072 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4073 // CHECK13-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4074 // CHECK13-NEXT:  entry:
4075 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4076 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4077 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4078 // CHECK13-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4079 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4080 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4081 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef signext [[TMP0]])
4082 // CHECK13-NEXT:    ret void
4083 //
4084 //
4085 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4086 // CHECK13-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4087 // CHECK13-NEXT:  entry:
4088 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4089 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4090 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4091 // CHECK13-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]]
4092 // CHECK13-NEXT:    ret void
4093 //
4094 //
4095 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4096 // CHECK13-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4097 // CHECK13-NEXT:  entry:
4098 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4099 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4100 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4101 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4102 // CHECK13-NEXT:    store i32 0, i32* [[F]], align 4
4103 // CHECK13-NEXT:    ret void
4104 //
4105 //
4106 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4107 // CHECK13-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4108 // CHECK13-NEXT:  entry:
4109 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4110 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4111 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4112 // CHECK13-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4113 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4114 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4115 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4116 // CHECK13-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
4117 // CHECK13-NEXT:    ret void
4118 //
4119 //
4120 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4121 // CHECK13-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4122 // CHECK13-NEXT:  entry:
4123 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4124 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4125 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4126 // CHECK13-NEXT:    ret void
4127 //
4128 //
4129 // CHECK14-LABEL: define {{[^@]+}}@main
4130 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] {
4131 // CHECK14-NEXT:  entry:
4132 // CHECK14-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4133 // CHECK14-NEXT:    [[G:%.*]] = alloca double, align 8
4134 // CHECK14-NEXT:    [[G1:%.*]] = alloca double*, align 8
4135 // CHECK14-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4136 // CHECK14-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4137 // CHECK14-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4138 // CHECK14-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4139 // CHECK14-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 8
4140 // CHECK14-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
4141 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 8
4142 // CHECK14-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
4143 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4144 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4145 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4146 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
4147 // CHECK14-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
4148 // CHECK14-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
4149 // CHECK14-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
4150 // CHECK14-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S]], align 4
4151 // CHECK14-NEXT:    [[_TMP7:%.*]] = alloca %struct.S*, align 8
4152 // CHECK14-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
4153 // CHECK14-NEXT:    [[I15:%.*]] = alloca i32, align 4
4154 // CHECK14-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4155 // CHECK14-NEXT:    store double* [[G]], double** [[G1]], align 8
4156 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]])
4157 // CHECK14-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4158 // CHECK14-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4159 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
4160 // CHECK14-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
4161 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
4162 // CHECK14-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
4163 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
4164 // CHECK14-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
4165 // CHECK14-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
4166 // CHECK14-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
4167 // CHECK14-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
4168 // CHECK14-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
4169 // CHECK14-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8
4170 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4171 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4172 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4173 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4174 // CHECK14-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
4175 // CHECK14-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
4176 // CHECK14-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4177 // CHECK14:       arrayctor.loop:
4178 // CHECK14-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4179 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]])
4180 // CHECK14-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
4181 // CHECK14-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4182 // CHECK14-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4183 // CHECK14:       arrayctor.cont:
4184 // CHECK14-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
4185 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR6]])
4186 // CHECK14-NEXT:    store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
4187 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4188 // CHECK14:       omp.inner.for.cond:
4189 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4190 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
4191 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4192 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4193 // CHECK14:       omp.inner.for.cond.cleanup:
4194 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4195 // CHECK14:       omp.inner.for.body:
4196 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4197 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4198 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4199 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
4200 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !2
4201 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
4202 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
4203 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
4204 // CHECK14-NEXT:    store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
4205 // CHECK14-NEXT:    [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8, !llvm.access.group !2
4206 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
4207 // CHECK14-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP12]] to i64
4208 // CHECK14-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM8]]
4209 // CHECK14-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8*
4210 // CHECK14-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8*
4211 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !2
4212 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4213 // CHECK14:       omp.body.continue:
4214 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4215 // CHECK14:       omp.inner.for.inc:
4216 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4217 // CHECK14-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
4218 // CHECK14-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4219 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
4220 // CHECK14:       omp.inner.for.end:
4221 // CHECK14-NEXT:    store i32 2, i32* [[I]], align 4
4222 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4
4223 // CHECK14-NEXT:    store i32 [[TMP16]], i32* [[T_VAR]], align 4
4224 // CHECK14-NEXT:    [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4225 // CHECK14-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
4226 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 8, i1 false)
4227 // CHECK14-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4228 // CHECK14-NEXT:    [[TMP19:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
4229 // CHECK14-NEXT:    [[TMP20:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2
4230 // CHECK14-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP20]]
4231 // CHECK14-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4232 // CHECK14:       omp.arraycpy.body:
4233 // CHECK14-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4234 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4235 // CHECK14-NEXT:    [[TMP21:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4236 // CHECK14-NEXT:    [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4237 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 4, i1 false)
4238 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4239 // CHECK14-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4240 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]]
4241 // CHECK14-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
4242 // CHECK14:       omp.arraycpy.done12:
4243 // CHECK14-NEXT:    [[TMP23:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
4244 // CHECK14-NEXT:    [[TMP24:%.*]] = bitcast %struct.S* [[TMP5]] to i8*
4245 // CHECK14-NEXT:    [[TMP25:%.*]] = bitcast %struct.S* [[TMP23]] to i8*
4246 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 4, i1 false)
4247 // CHECK14-NEXT:    [[TMP26:%.*]] = load i32, i32* [[SVAR]], align 4
4248 // CHECK14-NEXT:    store i32 [[TMP26]], i32* @_ZZ4mainE4svar, align 4
4249 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR6]]) #[[ATTR4:[0-9]+]]
4250 // CHECK14-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
4251 // CHECK14-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2
4252 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4253 // CHECK14:       arraydestroy.body:
4254 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP27]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4255 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4256 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4257 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
4258 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
4259 // CHECK14:       arraydestroy.done14:
4260 // CHECK14-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
4261 // CHECK14-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
4262 // CHECK14-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4263 // CHECK14-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN16]], i64 2
4264 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]
4265 // CHECK14:       arraydestroy.body17:
4266 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S* [ [[TMP28]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
4267 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1
4268 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]]
4269 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
4270 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
4271 // CHECK14:       arraydestroy.done21:
4272 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]]
4273 // CHECK14-NEXT:    [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4
4274 // CHECK14-NEXT:    ret i32 [[TMP29]]
4275 //
4276 //
4277 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
4278 // CHECK14-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4279 // CHECK14-NEXT:  entry:
4280 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4281 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4282 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4283 // CHECK14-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]])
4284 // CHECK14-NEXT:    ret void
4285 //
4286 //
4287 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
4288 // CHECK14-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4289 // CHECK14-NEXT:  entry:
4290 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4291 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4292 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4293 // CHECK14-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4294 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4295 // CHECK14-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4296 // CHECK14-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]])
4297 // CHECK14-NEXT:    ret void
4298 //
4299 //
4300 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
4301 // CHECK14-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4302 // CHECK14-NEXT:  entry:
4303 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4304 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4305 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4306 // CHECK14-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]]
4307 // CHECK14-NEXT:    ret void
4308 //
4309 //
4310 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
4311 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat {
4312 // CHECK14-NEXT:  entry:
4313 // CHECK14-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4314 // CHECK14-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4315 // CHECK14-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4316 // CHECK14-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4317 // CHECK14-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
4318 // CHECK14-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
4319 // CHECK14-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
4320 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
4321 // CHECK14-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
4322 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4323 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4324 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4325 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
4326 // CHECK14-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
4327 // CHECK14-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
4328 // CHECK14-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
4329 // CHECK14-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0]], align 4
4330 // CHECK14-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
4331 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]])
4332 // CHECK14-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4333 // CHECK14-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4334 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
4335 // CHECK14-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
4336 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
4337 // CHECK14-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
4338 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
4339 // CHECK14-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
4340 // CHECK14-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
4341 // CHECK14-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
4342 // CHECK14-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
4343 // CHECK14-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
4344 // CHECK14-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8
4345 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4346 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4347 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4348 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4349 // CHECK14-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
4350 // CHECK14-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
4351 // CHECK14-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4352 // CHECK14:       arrayctor.loop:
4353 // CHECK14-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4354 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]])
4355 // CHECK14-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
4356 // CHECK14-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4357 // CHECK14-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4358 // CHECK14:       arrayctor.cont:
4359 // CHECK14-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
4360 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR6]])
4361 // CHECK14-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
4362 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4363 // CHECK14:       omp.inner.for.cond:
4364 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4365 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
4366 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4367 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4368 // CHECK14:       omp.inner.for.cond.cleanup:
4369 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4370 // CHECK14:       omp.inner.for.body:
4371 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4372 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4373 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4374 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
4375 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !6
4376 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
4377 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
4378 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
4379 // CHECK14-NEXT:    store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
4380 // CHECK14-NEXT:    [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8, !llvm.access.group !6
4381 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
4382 // CHECK14-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP12]] to i64
4383 // CHECK14-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM8]]
4384 // CHECK14-NEXT:    [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
4385 // CHECK14-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8*
4386 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !6
4387 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4388 // CHECK14:       omp.body.continue:
4389 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4390 // CHECK14:       omp.inner.for.inc:
4391 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4392 // CHECK14-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
4393 // CHECK14-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4394 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
4395 // CHECK14:       omp.inner.for.end:
4396 // CHECK14-NEXT:    store i32 2, i32* [[I]], align 4
4397 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4
4398 // CHECK14-NEXT:    store i32 [[TMP16]], i32* [[T_VAR]], align 4
4399 // CHECK14-NEXT:    [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4400 // CHECK14-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
4401 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 8, i1 false)
4402 // CHECK14-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4403 // CHECK14-NEXT:    [[TMP19:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
4404 // CHECK14-NEXT:    [[TMP20:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
4405 // CHECK14-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP20]]
4406 // CHECK14-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4407 // CHECK14:       omp.arraycpy.body:
4408 // CHECK14-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4409 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4410 // CHECK14-NEXT:    [[TMP21:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4411 // CHECK14-NEXT:    [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4412 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 4, i1 false)
4413 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4414 // CHECK14-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4415 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]]
4416 // CHECK14-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
4417 // CHECK14:       omp.arraycpy.done12:
4418 // CHECK14-NEXT:    [[TMP23:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
4419 // CHECK14-NEXT:    [[TMP24:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
4420 // CHECK14-NEXT:    [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8*
4421 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 4, i1 false)
4422 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR6]]) #[[ATTR4]]
4423 // CHECK14-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
4424 // CHECK14-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
4425 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4426 // CHECK14:       arraydestroy.body:
4427 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4428 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4429 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4430 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
4431 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
4432 // CHECK14:       arraydestroy.done14:
4433 // CHECK14-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4434 // CHECK14-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4435 // CHECK14-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN15]], i64 2
4436 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]
4437 // CHECK14:       arraydestroy.body16:
4438 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi %struct.S.0* [ [[TMP27]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
4439 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST17]], i64 -1
4440 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]]
4441 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
4442 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
4443 // CHECK14:       arraydestroy.done20:
4444 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]]
4445 // CHECK14-NEXT:    [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4
4446 // CHECK14-NEXT:    ret i32 [[TMP28]]
4447 //
4448 //
4449 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4450 // CHECK14-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4451 // CHECK14-NEXT:  entry:
4452 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4453 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4454 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4455 // CHECK14-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4456 // CHECK14-NEXT:    store float 0.000000e+00, float* [[F]], align 4
4457 // CHECK14-NEXT:    ret void
4458 //
4459 //
4460 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4461 // CHECK14-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4462 // CHECK14-NEXT:  entry:
4463 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4464 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4465 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4466 // CHECK14-NEXT:    ret void
4467 //
4468 //
4469 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4470 // CHECK14-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4471 // CHECK14-NEXT:  entry:
4472 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4473 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4474 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4475 // CHECK14-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4476 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4477 // CHECK14-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4478 // CHECK14-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4479 // CHECK14-NEXT:    store float [[TMP0]], float* [[F]], align 4
4480 // CHECK14-NEXT:    ret void
4481 //
4482 //
4483 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4484 // CHECK14-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4485 // CHECK14-NEXT:  entry:
4486 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4487 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4488 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4489 // CHECK14-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]])
4490 // CHECK14-NEXT:    ret void
4491 //
4492 //
4493 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4494 // CHECK14-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4495 // CHECK14-NEXT:  entry:
4496 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4497 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4498 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4499 // CHECK14-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4500 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4501 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4502 // CHECK14-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef signext [[TMP0]])
4503 // CHECK14-NEXT:    ret void
4504 //
4505 //
4506 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4507 // CHECK14-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4508 // CHECK14-NEXT:  entry:
4509 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4510 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4511 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4512 // CHECK14-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]]
4513 // CHECK14-NEXT:    ret void
4514 //
4515 //
4516 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4517 // CHECK14-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4518 // CHECK14-NEXT:  entry:
4519 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4520 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4521 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4522 // CHECK14-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4523 // CHECK14-NEXT:    store i32 0, i32* [[F]], align 4
4524 // CHECK14-NEXT:    ret void
4525 //
4526 //
4527 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4528 // CHECK14-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4529 // CHECK14-NEXT:  entry:
4530 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4531 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4532 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4533 // CHECK14-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4534 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4535 // CHECK14-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4536 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4537 // CHECK14-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
4538 // CHECK14-NEXT:    ret void
4539 //
4540 //
4541 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4542 // CHECK14-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4543 // CHECK14-NEXT:  entry:
4544 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4545 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4546 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4547 // CHECK14-NEXT:    ret void
4548 //
4549 //
4550 // CHECK15-LABEL: define {{[^@]+}}@main
4551 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
4552 // CHECK15-NEXT:  entry:
4553 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4554 // CHECK15-NEXT:    [[G:%.*]] = alloca double, align 8
4555 // CHECK15-NEXT:    [[G1:%.*]] = alloca double*, align 4
4556 // CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4557 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4558 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4559 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4560 // CHECK15-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 4
4561 // CHECK15-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
4562 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 4
4563 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
4564 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4565 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4566 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4567 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
4568 // CHECK15-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
4569 // CHECK15-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
4570 // CHECK15-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
4571 // CHECK15-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S]], align 4
4572 // CHECK15-NEXT:    [[_TMP7:%.*]] = alloca %struct.S*, align 4
4573 // CHECK15-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
4574 // CHECK15-NEXT:    [[I14:%.*]] = alloca i32, align 4
4575 // CHECK15-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4576 // CHECK15-NEXT:    store double* [[G]], double** [[G1]], align 4
4577 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]])
4578 // CHECK15-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4579 // CHECK15-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4580 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
4581 // CHECK15-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4582 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
4583 // CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
4584 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
4585 // CHECK15-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
4586 // CHECK15-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
4587 // CHECK15-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
4588 // CHECK15-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
4589 // CHECK15-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4590 // CHECK15-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4
4591 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4592 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4593 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4594 // CHECK15-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4595 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
4596 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
4597 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4598 // CHECK15:       arrayctor.loop:
4599 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4600 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]])
4601 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
4602 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4603 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4604 // CHECK15:       arrayctor.cont:
4605 // CHECK15-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
4606 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR6]])
4607 // CHECK15-NEXT:    store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 4
4608 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4609 // CHECK15:       omp.inner.for.cond:
4610 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4611 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
4612 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4613 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4614 // CHECK15:       omp.inner.for.cond.cleanup:
4615 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4616 // CHECK15:       omp.inner.for.body:
4617 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4618 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4619 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4620 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
4621 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !3
4622 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4623 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP10]]
4624 // CHECK15-NEXT:    store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
4625 // CHECK15-NEXT:    [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4, !llvm.access.group !3
4626 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4627 // CHECK15-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP12]]
4628 // CHECK15-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8*
4629 // CHECK15-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8*
4630 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !3
4631 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4632 // CHECK15:       omp.body.continue:
4633 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4634 // CHECK15:       omp.inner.for.inc:
4635 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4636 // CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
4637 // CHECK15-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4638 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
4639 // CHECK15:       omp.inner.for.end:
4640 // CHECK15-NEXT:    store i32 2, i32* [[I]], align 4
4641 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4
4642 // CHECK15-NEXT:    store i32 [[TMP16]], i32* [[T_VAR]], align 4
4643 // CHECK15-NEXT:    [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4644 // CHECK15-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
4645 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 8, i1 false)
4646 // CHECK15-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4647 // CHECK15-NEXT:    [[TMP19:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
4648 // CHECK15-NEXT:    [[TMP20:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2
4649 // CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN10]], [[TMP20]]
4650 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4651 // CHECK15:       omp.arraycpy.body:
4652 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4653 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4654 // CHECK15-NEXT:    [[TMP21:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4655 // CHECK15-NEXT:    [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4656 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i32 4, i1 false)
4657 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4658 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4659 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]]
4660 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
4661 // CHECK15:       omp.arraycpy.done11:
4662 // CHECK15-NEXT:    [[TMP23:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
4663 // CHECK15-NEXT:    [[TMP24:%.*]] = bitcast %struct.S* [[TMP5]] to i8*
4664 // CHECK15-NEXT:    [[TMP25:%.*]] = bitcast %struct.S* [[TMP23]] to i8*
4665 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 4, i1 false)
4666 // CHECK15-NEXT:    [[TMP26:%.*]] = load i32, i32* [[SVAR]], align 4
4667 // CHECK15-NEXT:    store i32 [[TMP26]], i32* @_ZZ4mainE4svar, align 4
4668 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR6]]) #[[ATTR4:[0-9]+]]
4669 // CHECK15-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
4670 // CHECK15-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i32 2
4671 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4672 // CHECK15:       arraydestroy.body:
4673 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP27]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4674 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4675 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4676 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
4677 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
4678 // CHECK15:       arraydestroy.done13:
4679 // CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
4680 // CHECK15-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
4681 // CHECK15-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4682 // CHECK15-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i32 2
4683 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]
4684 // CHECK15:       arraydestroy.body16:
4685 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi %struct.S* [ [[TMP28]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
4686 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST17]], i32 -1
4687 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]]
4688 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
4689 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
4690 // CHECK15:       arraydestroy.done20:
4691 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]]
4692 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4
4693 // CHECK15-NEXT:    ret i32 [[TMP29]]
4694 //
4695 //
4696 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
4697 // CHECK15-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4698 // CHECK15-NEXT:  entry:
4699 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4700 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4701 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4702 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]])
4703 // CHECK15-NEXT:    ret void
4704 //
4705 //
4706 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
4707 // CHECK15-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4708 // CHECK15-NEXT:  entry:
4709 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4710 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4711 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4712 // CHECK15-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4713 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4714 // CHECK15-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4715 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]])
4716 // CHECK15-NEXT:    ret void
4717 //
4718 //
4719 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
4720 // CHECK15-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4721 // CHECK15-NEXT:  entry:
4722 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4723 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4724 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4725 // CHECK15-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]]
4726 // CHECK15-NEXT:    ret void
4727 //
4728 //
4729 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
4730 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat {
4731 // CHECK15-NEXT:  entry:
4732 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4733 // CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4734 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4735 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4736 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
4737 // CHECK15-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
4738 // CHECK15-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
4739 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
4740 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
4741 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4742 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4743 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4744 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
4745 // CHECK15-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
4746 // CHECK15-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
4747 // CHECK15-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
4748 // CHECK15-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0]], align 4
4749 // CHECK15-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 4
4750 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]])
4751 // CHECK15-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4752 // CHECK15-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4753 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
4754 // CHECK15-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4755 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef 1)
4756 // CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
4757 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef 2)
4758 // CHECK15-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
4759 // CHECK15-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
4760 // CHECK15-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
4761 // CHECK15-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
4762 // CHECK15-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4763 // CHECK15-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4
4764 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4765 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4766 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4767 // CHECK15-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4768 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
4769 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
4770 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4771 // CHECK15:       arrayctor.loop:
4772 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4773 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]])
4774 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
4775 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4776 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4777 // CHECK15:       arrayctor.cont:
4778 // CHECK15-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
4779 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR6]])
4780 // CHECK15-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 4
4781 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4782 // CHECK15:       omp.inner.for.cond:
4783 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4784 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
4785 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4786 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4787 // CHECK15:       omp.inner.for.cond.cleanup:
4788 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4789 // CHECK15:       omp.inner.for.body:
4790 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4791 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4792 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4793 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
4794 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !7
4795 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
4796 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP10]]
4797 // CHECK15-NEXT:    store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
4798 // CHECK15-NEXT:    [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4, !llvm.access.group !7
4799 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
4800 // CHECK15-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP12]]
4801 // CHECK15-NEXT:    [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
4802 // CHECK15-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8*
4803 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !7
4804 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4805 // CHECK15:       omp.body.continue:
4806 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4807 // CHECK15:       omp.inner.for.inc:
4808 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4809 // CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
4810 // CHECK15-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4811 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
4812 // CHECK15:       omp.inner.for.end:
4813 // CHECK15-NEXT:    store i32 2, i32* [[I]], align 4
4814 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4
4815 // CHECK15-NEXT:    store i32 [[TMP16]], i32* [[T_VAR]], align 4
4816 // CHECK15-NEXT:    [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4817 // CHECK15-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
4818 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 8, i1 false)
4819 // CHECK15-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4820 // CHECK15-NEXT:    [[TMP19:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
4821 // CHECK15-NEXT:    [[TMP20:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
4822 // CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP20]]
4823 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4824 // CHECK15:       omp.arraycpy.body:
4825 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4826 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4827 // CHECK15-NEXT:    [[TMP21:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4828 // CHECK15-NEXT:    [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4829 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i32 4, i1 false)
4830 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4831 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4832 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]]
4833 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
4834 // CHECK15:       omp.arraycpy.done11:
4835 // CHECK15-NEXT:    [[TMP23:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
4836 // CHECK15-NEXT:    [[TMP24:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
4837 // CHECK15-NEXT:    [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8*
4838 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 4, i1 false)
4839 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR6]]) #[[ATTR4]]
4840 // CHECK15-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
4841 // CHECK15-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
4842 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4843 // CHECK15:       arraydestroy.body:
4844 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4845 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4846 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4847 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
4848 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
4849 // CHECK15:       arraydestroy.done13:
4850 // CHECK15-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4851 // CHECK15-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4852 // CHECK15-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i32 2
4853 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY15:%.*]]
4854 // CHECK15:       arraydestroy.body15:
4855 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi %struct.S.0* [ [[TMP27]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ]
4856 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST16]], i32 -1
4857 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR4]]
4858 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE18:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]]
4859 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]]
4860 // CHECK15:       arraydestroy.done19:
4861 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]]
4862 // CHECK15-NEXT:    [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4
4863 // CHECK15-NEXT:    ret i32 [[TMP28]]
4864 //
4865 //
4866 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4867 // CHECK15-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4868 // CHECK15-NEXT:  entry:
4869 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4870 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4871 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4872 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4873 // CHECK15-NEXT:    store float 0.000000e+00, float* [[F]], align 4
4874 // CHECK15-NEXT:    ret void
4875 //
4876 //
4877 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4878 // CHECK15-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4879 // CHECK15-NEXT:  entry:
4880 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4881 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4882 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4883 // CHECK15-NEXT:    ret void
4884 //
4885 //
4886 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4887 // CHECK15-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4888 // CHECK15-NEXT:  entry:
4889 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4890 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4891 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4892 // CHECK15-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4893 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4894 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4895 // CHECK15-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4896 // CHECK15-NEXT:    store float [[TMP0]], float* [[F]], align 4
4897 // CHECK15-NEXT:    ret void
4898 //
4899 //
4900 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4901 // CHECK15-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4902 // CHECK15-NEXT:  entry:
4903 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4904 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4905 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4906 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]])
4907 // CHECK15-NEXT:    ret void
4908 //
4909 //
4910 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4911 // CHECK15-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4912 // CHECK15-NEXT:  entry:
4913 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4914 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4915 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4916 // CHECK15-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4917 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4918 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4919 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef [[TMP0]])
4920 // CHECK15-NEXT:    ret void
4921 //
4922 //
4923 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4924 // CHECK15-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4925 // CHECK15-NEXT:  entry:
4926 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4927 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4928 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4929 // CHECK15-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]]
4930 // CHECK15-NEXT:    ret void
4931 //
4932 //
4933 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4934 // CHECK15-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4935 // CHECK15-NEXT:  entry:
4936 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4937 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4938 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4939 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4940 // CHECK15-NEXT:    store i32 0, i32* [[F]], align 4
4941 // CHECK15-NEXT:    ret void
4942 //
4943 //
4944 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4945 // CHECK15-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4946 // CHECK15-NEXT:  entry:
4947 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4948 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4949 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4950 // CHECK15-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4951 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4952 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4953 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4954 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
4955 // CHECK15-NEXT:    ret void
4956 //
4957 //
4958 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4959 // CHECK15-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4960 // CHECK15-NEXT:  entry:
4961 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4962 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4963 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4964 // CHECK15-NEXT:    ret void
4965 //
4966 //
4967 // CHECK16-LABEL: define {{[^@]+}}@main
4968 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] {
4969 // CHECK16-NEXT:  entry:
4970 // CHECK16-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4971 // CHECK16-NEXT:    [[G:%.*]] = alloca double, align 8
4972 // CHECK16-NEXT:    [[G1:%.*]] = alloca double*, align 4
4973 // CHECK16-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4974 // CHECK16-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4975 // CHECK16-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4976 // CHECK16-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4977 // CHECK16-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 4
4978 // CHECK16-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
4979 // CHECK16-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 4
4980 // CHECK16-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
4981 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4982 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4983 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4984 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
4985 // CHECK16-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
4986 // CHECK16-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
4987 // CHECK16-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
4988 // CHECK16-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S]], align 4
4989 // CHECK16-NEXT:    [[_TMP7:%.*]] = alloca %struct.S*, align 4
4990 // CHECK16-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
4991 // CHECK16-NEXT:    [[I14:%.*]] = alloca i32, align 4
4992 // CHECK16-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4993 // CHECK16-NEXT:    store double* [[G]], double** [[G1]], align 4
4994 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]])
4995 // CHECK16-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4996 // CHECK16-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4997 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
4998 // CHECK16-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4999 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
5000 // CHECK16-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
5001 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
5002 // CHECK16-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
5003 // CHECK16-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
5004 // CHECK16-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
5005 // CHECK16-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
5006 // CHECK16-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
5007 // CHECK16-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4
5008 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5009 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5010 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5011 // CHECK16-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5012 // CHECK16-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
5013 // CHECK16-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
5014 // CHECK16-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
5015 // CHECK16:       arrayctor.loop:
5016 // CHECK16-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5017 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]])
5018 // CHECK16-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
5019 // CHECK16-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5020 // CHECK16-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5021 // CHECK16:       arrayctor.cont:
5022 // CHECK16-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
5023 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR6]])
5024 // CHECK16-NEXT:    store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 4
5025 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5026 // CHECK16:       omp.inner.for.cond:
5027 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5028 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
5029 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5030 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5031 // CHECK16:       omp.inner.for.cond.cleanup:
5032 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5033 // CHECK16:       omp.inner.for.body:
5034 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5035 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5036 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5037 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
5038 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !3
5039 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
5040 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP10]]
5041 // CHECK16-NEXT:    store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
5042 // CHECK16-NEXT:    [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4, !llvm.access.group !3
5043 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
5044 // CHECK16-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP12]]
5045 // CHECK16-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8*
5046 // CHECK16-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8*
5047 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !3
5048 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5049 // CHECK16:       omp.body.continue:
5050 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5051 // CHECK16:       omp.inner.for.inc:
5052 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5053 // CHECK16-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
5054 // CHECK16-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5055 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
5056 // CHECK16:       omp.inner.for.end:
5057 // CHECK16-NEXT:    store i32 2, i32* [[I]], align 4
5058 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4
5059 // CHECK16-NEXT:    store i32 [[TMP16]], i32* [[T_VAR]], align 4
5060 // CHECK16-NEXT:    [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
5061 // CHECK16-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
5062 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 8, i1 false)
5063 // CHECK16-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
5064 // CHECK16-NEXT:    [[TMP19:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
5065 // CHECK16-NEXT:    [[TMP20:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2
5066 // CHECK16-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN10]], [[TMP20]]
5067 // CHECK16-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
5068 // CHECK16:       omp.arraycpy.body:
5069 // CHECK16-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5070 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5071 // CHECK16-NEXT:    [[TMP21:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
5072 // CHECK16-NEXT:    [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
5073 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i32 4, i1 false)
5074 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
5075 // CHECK16-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
5076 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]]
5077 // CHECK16-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
5078 // CHECK16:       omp.arraycpy.done11:
5079 // CHECK16-NEXT:    [[TMP23:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
5080 // CHECK16-NEXT:    [[TMP24:%.*]] = bitcast %struct.S* [[TMP5]] to i8*
5081 // CHECK16-NEXT:    [[TMP25:%.*]] = bitcast %struct.S* [[TMP23]] to i8*
5082 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 4, i1 false)
5083 // CHECK16-NEXT:    [[TMP26:%.*]] = load i32, i32* [[SVAR]], align 4
5084 // CHECK16-NEXT:    store i32 [[TMP26]], i32* @_ZZ4mainE4svar, align 4
5085 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR6]]) #[[ATTR4:[0-9]+]]
5086 // CHECK16-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
5087 // CHECK16-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i32 2
5088 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5089 // CHECK16:       arraydestroy.body:
5090 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP27]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5091 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
5092 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
5093 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
5094 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
5095 // CHECK16:       arraydestroy.done13:
5096 // CHECK16-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
5097 // CHECK16-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
5098 // CHECK16-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
5099 // CHECK16-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i32 2
5100 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]
5101 // CHECK16:       arraydestroy.body16:
5102 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi %struct.S* [ [[TMP28]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
5103 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST17]], i32 -1
5104 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]]
5105 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
5106 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
5107 // CHECK16:       arraydestroy.done20:
5108 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]]
5109 // CHECK16-NEXT:    [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4
5110 // CHECK16-NEXT:    ret i32 [[TMP29]]
5111 //
5112 //
5113 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
5114 // CHECK16-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
5115 // CHECK16-NEXT:  entry:
5116 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5117 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5118 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5119 // CHECK16-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]])
5120 // CHECK16-NEXT:    ret void
5121 //
5122 //
5123 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
5124 // CHECK16-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5125 // CHECK16-NEXT:  entry:
5126 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5127 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
5128 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5129 // CHECK16-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
5130 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5131 // CHECK16-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
5132 // CHECK16-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]])
5133 // CHECK16-NEXT:    ret void
5134 //
5135 //
5136 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
5137 // CHECK16-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5138 // CHECK16-NEXT:  entry:
5139 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5140 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5141 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5142 // CHECK16-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]]
5143 // CHECK16-NEXT:    ret void
5144 //
5145 //
5146 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
5147 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat {
5148 // CHECK16-NEXT:  entry:
5149 // CHECK16-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5150 // CHECK16-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
5151 // CHECK16-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
5152 // CHECK16-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
5153 // CHECK16-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
5154 // CHECK16-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
5155 // CHECK16-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
5156 // CHECK16-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
5157 // CHECK16-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
5158 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5159 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5160 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5161 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
5162 // CHECK16-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
5163 // CHECK16-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
5164 // CHECK16-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
5165 // CHECK16-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0]], align 4
5166 // CHECK16-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 4
5167 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]])
5168 // CHECK16-NEXT:    store i32 0, i32* [[T_VAR]], align 4
5169 // CHECK16-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
5170 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
5171 // CHECK16-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5172 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef 1)
5173 // CHECK16-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
5174 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef 2)
5175 // CHECK16-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
5176 // CHECK16-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
5177 // CHECK16-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
5178 // CHECK16-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
5179 // CHECK16-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
5180 // CHECK16-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4
5181 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5182 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5183 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5184 // CHECK16-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5185 // CHECK16-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
5186 // CHECK16-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
5187 // CHECK16-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
5188 // CHECK16:       arrayctor.loop:
5189 // CHECK16-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5190 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]])
5191 // CHECK16-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
5192 // CHECK16-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5193 // CHECK16-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5194 // CHECK16:       arrayctor.cont:
5195 // CHECK16-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
5196 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR6]])
5197 // CHECK16-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 4
5198 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5199 // CHECK16:       omp.inner.for.cond:
5200 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5201 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
5202 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5203 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5204 // CHECK16:       omp.inner.for.cond.cleanup:
5205 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5206 // CHECK16:       omp.inner.for.body:
5207 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5208 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5209 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5210 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
5211 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !7
5212 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
5213 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP10]]
5214 // CHECK16-NEXT:    store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
5215 // CHECK16-NEXT:    [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4, !llvm.access.group !7
5216 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
5217 // CHECK16-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP12]]
5218 // CHECK16-NEXT:    [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
5219 // CHECK16-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8*
5220 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !7
5221 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5222 // CHECK16:       omp.body.continue:
5223 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5224 // CHECK16:       omp.inner.for.inc:
5225 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5226 // CHECK16-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
5227 // CHECK16-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5228 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
5229 // CHECK16:       omp.inner.for.end:
5230 // CHECK16-NEXT:    store i32 2, i32* [[I]], align 4
5231 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4
5232 // CHECK16-NEXT:    store i32 [[TMP16]], i32* [[T_VAR]], align 4
5233 // CHECK16-NEXT:    [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
5234 // CHECK16-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
5235 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 8, i1 false)
5236 // CHECK16-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5237 // CHECK16-NEXT:    [[TMP19:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
5238 // CHECK16-NEXT:    [[TMP20:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
5239 // CHECK16-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP20]]
5240 // CHECK16-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
5241 // CHECK16:       omp.arraycpy.body:
5242 // CHECK16-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5243 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5244 // CHECK16-NEXT:    [[TMP21:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
5245 // CHECK16-NEXT:    [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
5246 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i32 4, i1 false)
5247 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
5248 // CHECK16-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
5249 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]]
5250 // CHECK16-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
5251 // CHECK16:       omp.arraycpy.done11:
5252 // CHECK16-NEXT:    [[TMP23:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
5253 // CHECK16-NEXT:    [[TMP24:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
5254 // CHECK16-NEXT:    [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8*
5255 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 4, i1 false)
5256 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR6]]) #[[ATTR4]]
5257 // CHECK16-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
5258 // CHECK16-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
5259 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5260 // CHECK16:       arraydestroy.body:
5261 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5262 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
5263 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
5264 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
5265 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
5266 // CHECK16:       arraydestroy.done13:
5267 // CHECK16-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5268 // CHECK16-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5269 // CHECK16-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i32 2
5270 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY15:%.*]]
5271 // CHECK16:       arraydestroy.body15:
5272 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi %struct.S.0* [ [[TMP27]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ]
5273 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST16]], i32 -1
5274 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR4]]
5275 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE18:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]]
5276 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]]
5277 // CHECK16:       arraydestroy.done19:
5278 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]]
5279 // CHECK16-NEXT:    [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4
5280 // CHECK16-NEXT:    ret i32 [[TMP28]]
5281 //
5282 //
5283 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
5284 // CHECK16-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5285 // CHECK16-NEXT:  entry:
5286 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5287 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5288 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5289 // CHECK16-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5290 // CHECK16-NEXT:    store float 0.000000e+00, float* [[F]], align 4
5291 // CHECK16-NEXT:    ret void
5292 //
5293 //
5294 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
5295 // CHECK16-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5296 // CHECK16-NEXT:  entry:
5297 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5298 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5299 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5300 // CHECK16-NEXT:    ret void
5301 //
5302 //
5303 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
5304 // CHECK16-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5305 // CHECK16-NEXT:  entry:
5306 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5307 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
5308 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5309 // CHECK16-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
5310 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5311 // CHECK16-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5312 // CHECK16-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
5313 // CHECK16-NEXT:    store float [[TMP0]], float* [[F]], align 4
5314 // CHECK16-NEXT:    ret void
5315 //
5316 //
5317 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
5318 // CHECK16-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5319 // CHECK16-NEXT:  entry:
5320 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5321 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5322 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5323 // CHECK16-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]])
5324 // CHECK16-NEXT:    ret void
5325 //
5326 //
5327 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
5328 // CHECK16-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5329 // CHECK16-NEXT:  entry:
5330 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5331 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5332 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5333 // CHECK16-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5334 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5335 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5336 // CHECK16-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef [[TMP0]])
5337 // CHECK16-NEXT:    ret void
5338 //
5339 //
5340 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
5341 // CHECK16-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5342 // CHECK16-NEXT:  entry:
5343 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5344 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5345 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5346 // CHECK16-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]]
5347 // CHECK16-NEXT:    ret void
5348 //
5349 //
5350 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
5351 // CHECK16-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5352 // CHECK16-NEXT:  entry:
5353 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5354 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5355 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5356 // CHECK16-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5357 // CHECK16-NEXT:    store i32 0, i32* [[F]], align 4
5358 // CHECK16-NEXT:    ret void
5359 //
5360 //
5361 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
5362 // CHECK16-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5363 // CHECK16-NEXT:  entry:
5364 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5365 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5366 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5367 // CHECK16-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5368 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5369 // CHECK16-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5370 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5371 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
5372 // CHECK16-NEXT:    ret void
5373 //
5374 //
5375 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
5376 // CHECK16-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5377 // CHECK16-NEXT:  entry:
5378 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5379 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5380 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5381 // CHECK16-NEXT:    ret void
5382 //
5383