1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X]; 25 float b; 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute simd 30 for(int i = 0; i < X; i++) { 31 a[i] = (T)0; 32 } 33 #pragma omp target 34 #pragma omp teams distribute simd dist_schedule(static) 35 for(int i = 0; i < X; i++) { 36 a[i] = (T)0; 37 } 38 #pragma omp target 39 #pragma omp teams distribute simd dist_schedule(static, X/2) 40 for(int i = 0; i < X; i++) { 41 a[i] = (T)0; 42 } 43 44 45 46 47 48 49 return a[0]; 50 } 51 }; 52 53 int teams_template_struct(void) { 54 SS<int, 123, 456> V; 55 return V.foo(); 56 57 } 58 #endif // CK1 59 60 // Test host codegen. 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 64 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 67 68 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 69 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 70 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 71 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 72 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 73 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 74 #ifdef CK2 75 76 template <typename T, int n> 77 int tmain(T argc) { 78 T a[n]; 79 #pragma omp target 80 #pragma omp teams distribute simd 81 for(int i = 0; i < n; i++) { 82 a[i] = (T)0; 83 } 84 #pragma omp target 85 #pragma omp teams distribute simd dist_schedule(static) 86 for(int i = 0; i < n; i++) { 87 a[i] = (T)0; 88 } 89 #pragma omp target 90 #pragma omp teams distribute simd dist_schedule(static, n) 91 for(int i = 0; i < n; i++) { 92 a[i] = (T)0; 93 } 94 return 0; 95 } 96 97 int main (int argc, char **argv) { 98 int n = 100; 99 int a[n]; 100 #pragma omp target 101 #pragma omp teams distribute simd 102 for(int i = 0; i < n; i++) { 103 a[i] = 0; 104 } 105 #pragma omp target 106 #pragma omp teams distribute simd dist_schedule(static) 107 for(int i = 0; i < n; i++) { 108 a[i] = 0; 109 } 110 #pragma omp target 111 #pragma omp teams distribute simd dist_schedule(static, n) 112 for(int i = 0; i < n; i++) { 113 a[i] = 0; 114 } 115 return tmain<int, 10>(argc); 116 } 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 #endif // CK2 133 #endif // #ifndef HEADER 134 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 135 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 136 // CHECK1-NEXT: entry: 137 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 138 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 139 // CHECK1-NEXT: ret i32 [[CALL]] 140 // 141 // 142 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 143 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 144 // CHECK1-NEXT: entry: 145 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 146 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 147 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 148 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 149 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 151 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 152 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 153 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 155 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 156 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 157 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 158 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 159 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 160 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 161 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 162 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 163 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 164 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 165 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 166 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 167 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 168 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 169 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 170 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 171 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 172 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 173 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 174 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 175 // CHECK1: omp_offload.failed: 176 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 177 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 178 // CHECK1: omp_offload.cont: 179 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 180 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 181 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 182 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 183 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 184 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 185 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 186 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 187 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 188 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 189 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 190 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 191 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 192 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 193 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 194 // CHECK1: omp_offload.failed7: 195 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]] 196 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 197 // CHECK1: omp_offload.cont8: 198 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 199 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 200 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 201 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 202 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 203 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 204 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 205 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 206 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 207 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 208 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 209 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 210 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 211 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 212 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 213 // CHECK1: omp_offload.failed14: 214 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]] 215 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] 216 // CHECK1: omp_offload.cont15: 217 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 218 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0 219 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 220 // CHECK1-NEXT: ret i32 [[TMP27]] 221 // 222 // 223 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 224 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 225 // CHECK1-NEXT: entry: 226 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 227 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 228 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 229 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 230 // CHECK1-NEXT: ret void 231 // 232 // 233 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 234 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 235 // CHECK1-NEXT: entry: 236 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 237 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 238 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 239 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 243 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 244 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 245 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 246 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 247 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 248 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 249 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 250 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 251 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 252 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 253 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 254 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 255 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 256 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 257 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 258 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 259 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 260 // CHECK1: cond.true: 261 // CHECK1-NEXT: br label [[COND_END:%.*]] 262 // CHECK1: cond.false: 263 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 264 // CHECK1-NEXT: br label [[COND_END]] 265 // CHECK1: cond.end: 266 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 267 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 268 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 269 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 270 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 271 // CHECK1: omp.inner.for.cond: 272 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 273 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 274 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 275 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 276 // CHECK1: omp.inner.for.body: 277 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 278 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 279 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 280 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 281 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 282 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 283 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 284 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 285 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 286 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 287 // CHECK1: omp.body.continue: 288 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 289 // CHECK1: omp.inner.for.inc: 290 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 291 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 292 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 293 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 294 // CHECK1: omp.inner.for.end: 295 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 296 // CHECK1: omp.loop.exit: 297 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 298 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 299 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 300 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 301 // CHECK1: .omp.final.then: 302 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 303 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 304 // CHECK1: .omp.final.done: 305 // CHECK1-NEXT: ret void 306 // 307 // 308 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 309 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 310 // CHECK1-NEXT: entry: 311 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 312 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 313 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 314 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 315 // CHECK1-NEXT: ret void 316 // 317 // 318 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 319 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 320 // CHECK1-NEXT: entry: 321 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 322 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 323 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 324 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 325 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 326 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 327 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 328 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 329 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 330 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 331 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 332 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 333 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 334 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 335 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 336 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 337 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 338 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 339 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 340 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 341 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 342 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 343 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 344 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 345 // CHECK1: cond.true: 346 // CHECK1-NEXT: br label [[COND_END:%.*]] 347 // CHECK1: cond.false: 348 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 349 // CHECK1-NEXT: br label [[COND_END]] 350 // CHECK1: cond.end: 351 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 352 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 353 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 354 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 355 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 356 // CHECK1: omp.inner.for.cond: 357 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 358 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 359 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 360 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 361 // CHECK1: omp.inner.for.body: 362 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 363 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 364 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 365 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 366 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 367 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 368 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 369 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 370 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 371 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 372 // CHECK1: omp.body.continue: 373 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 374 // CHECK1: omp.inner.for.inc: 375 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 376 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 377 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 378 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 379 // CHECK1: omp.inner.for.end: 380 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 381 // CHECK1: omp.loop.exit: 382 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 383 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 384 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 385 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 386 // CHECK1: .omp.final.then: 387 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 388 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 389 // CHECK1: .omp.final.done: 390 // CHECK1-NEXT: ret void 391 // 392 // 393 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 394 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 395 // CHECK1-NEXT: entry: 396 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 397 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 398 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 399 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 400 // CHECK1-NEXT: ret void 401 // 402 // 403 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 404 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 405 // CHECK1-NEXT: entry: 406 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 407 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 408 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 409 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 410 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 411 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 412 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 413 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 414 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 415 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 416 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 417 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 418 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 419 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 420 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 421 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 422 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 423 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 424 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 425 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 426 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 427 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 428 // CHECK1: omp.dispatch.cond: 429 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 430 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 431 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 432 // CHECK1: cond.true: 433 // CHECK1-NEXT: br label [[COND_END:%.*]] 434 // CHECK1: cond.false: 435 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 436 // CHECK1-NEXT: br label [[COND_END]] 437 // CHECK1: cond.end: 438 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 439 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 440 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 441 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 442 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 443 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 444 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 445 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 446 // CHECK1: omp.dispatch.body: 447 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 448 // CHECK1: omp.inner.for.cond: 449 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 450 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 451 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 452 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 453 // CHECK1: omp.inner.for.body: 454 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 455 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 456 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 457 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 458 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 459 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 460 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 461 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 462 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 463 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 464 // CHECK1: omp.body.continue: 465 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 466 // CHECK1: omp.inner.for.inc: 467 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 468 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 469 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 470 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 471 // CHECK1: omp.inner.for.end: 472 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 473 // CHECK1: omp.dispatch.inc: 474 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 475 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 476 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 477 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 478 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 479 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 480 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 481 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 482 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 483 // CHECK1: omp.dispatch.end: 484 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 485 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 486 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 487 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 488 // CHECK1: .omp.final.then: 489 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 490 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 491 // CHECK1: .omp.final.done: 492 // CHECK1-NEXT: ret void 493 // 494 // 495 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 496 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 497 // CHECK1-NEXT: entry: 498 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 499 // CHECK1-NEXT: ret void 500 // 501 // 502 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 503 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 504 // CHECK3-NEXT: entry: 505 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 506 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 507 // CHECK3-NEXT: ret i32 [[CALL]] 508 // 509 // 510 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 511 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 512 // CHECK3-NEXT: entry: 513 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 514 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 515 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 516 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 517 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 518 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 519 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 520 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 521 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 522 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 523 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 524 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 525 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 526 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 527 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 528 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 529 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 530 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 531 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 532 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 533 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 534 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 535 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 536 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 537 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 538 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 539 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 540 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 541 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 542 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 543 // CHECK3: omp_offload.failed: 544 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 545 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 546 // CHECK3: omp_offload.cont: 547 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 548 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 549 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 550 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 551 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 552 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 553 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 554 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 555 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 556 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 557 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 558 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 559 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 560 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 561 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 562 // CHECK3: omp_offload.failed7: 563 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]] 564 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 565 // CHECK3: omp_offload.cont8: 566 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 567 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 568 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 569 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 570 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 571 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 572 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 573 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 574 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 575 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 576 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 577 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 578 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 579 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 580 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 581 // CHECK3: omp_offload.failed14: 582 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]] 583 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] 584 // CHECK3: omp_offload.cont15: 585 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 586 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0 587 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 588 // CHECK3-NEXT: ret i32 [[TMP27]] 589 // 590 // 591 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 592 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 593 // CHECK3-NEXT: entry: 594 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 595 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 596 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 597 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 598 // CHECK3-NEXT: ret void 599 // 600 // 601 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 602 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 603 // CHECK3-NEXT: entry: 604 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 605 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 606 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 607 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 608 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 609 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 610 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 611 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 612 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 613 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 614 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 615 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 616 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 617 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 618 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 619 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 620 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 621 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 622 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 623 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 624 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 625 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 626 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 627 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 628 // CHECK3: cond.true: 629 // CHECK3-NEXT: br label [[COND_END:%.*]] 630 // CHECK3: cond.false: 631 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 632 // CHECK3-NEXT: br label [[COND_END]] 633 // CHECK3: cond.end: 634 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 635 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 636 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 637 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 638 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 639 // CHECK3: omp.inner.for.cond: 640 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 641 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 642 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 643 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 644 // CHECK3: omp.inner.for.body: 645 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 646 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 647 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 648 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 649 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 650 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 651 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 652 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 653 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 654 // CHECK3: omp.body.continue: 655 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 656 // CHECK3: omp.inner.for.inc: 657 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 658 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 659 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 660 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 661 // CHECK3: omp.inner.for.end: 662 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 663 // CHECK3: omp.loop.exit: 664 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 665 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 666 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 667 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 668 // CHECK3: .omp.final.then: 669 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 670 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 671 // CHECK3: .omp.final.done: 672 // CHECK3-NEXT: ret void 673 // 674 // 675 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 676 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 677 // CHECK3-NEXT: entry: 678 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 679 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 680 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 681 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 682 // CHECK3-NEXT: ret void 683 // 684 // 685 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 686 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 687 // CHECK3-NEXT: entry: 688 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 689 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 690 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 691 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 692 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 693 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 694 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 695 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 696 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 697 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 698 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 699 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 700 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 701 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 702 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 703 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 704 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 705 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 706 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 707 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 708 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 709 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 710 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 711 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 712 // CHECK3: cond.true: 713 // CHECK3-NEXT: br label [[COND_END:%.*]] 714 // CHECK3: cond.false: 715 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 716 // CHECK3-NEXT: br label [[COND_END]] 717 // CHECK3: cond.end: 718 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 719 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 720 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 721 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 722 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 723 // CHECK3: omp.inner.for.cond: 724 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 725 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 726 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 727 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 728 // CHECK3: omp.inner.for.body: 729 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 730 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 731 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 732 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 733 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 734 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 735 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 736 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 737 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 738 // CHECK3: omp.body.continue: 739 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 740 // CHECK3: omp.inner.for.inc: 741 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 742 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 743 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 744 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 745 // CHECK3: omp.inner.for.end: 746 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 747 // CHECK3: omp.loop.exit: 748 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 749 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 750 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 751 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 752 // CHECK3: .omp.final.then: 753 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 754 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 755 // CHECK3: .omp.final.done: 756 // CHECK3-NEXT: ret void 757 // 758 // 759 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 760 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 761 // CHECK3-NEXT: entry: 762 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 763 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 764 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 765 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 766 // CHECK3-NEXT: ret void 767 // 768 // 769 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 770 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 771 // CHECK3-NEXT: entry: 772 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 773 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 774 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 775 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 776 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 777 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 778 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 779 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 780 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 781 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 782 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 783 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 784 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 785 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 786 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 787 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 788 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 789 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 790 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 791 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 792 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 793 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 794 // CHECK3: omp.dispatch.cond: 795 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 796 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 797 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 798 // CHECK3: cond.true: 799 // CHECK3-NEXT: br label [[COND_END:%.*]] 800 // CHECK3: cond.false: 801 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 802 // CHECK3-NEXT: br label [[COND_END]] 803 // CHECK3: cond.end: 804 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 805 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 806 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 807 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 808 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 809 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 810 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 811 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 812 // CHECK3: omp.dispatch.body: 813 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 814 // CHECK3: omp.inner.for.cond: 815 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 816 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 817 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 818 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 819 // CHECK3: omp.inner.for.body: 820 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 821 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 822 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 823 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16 824 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 825 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 826 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 827 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 828 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 829 // CHECK3: omp.body.continue: 830 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 831 // CHECK3: omp.inner.for.inc: 832 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 833 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 834 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 835 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 836 // CHECK3: omp.inner.for.end: 837 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 838 // CHECK3: omp.dispatch.inc: 839 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 840 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 841 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 842 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 843 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 844 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 845 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 846 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 847 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 848 // CHECK3: omp.dispatch.end: 849 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 850 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 851 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 852 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 853 // CHECK3: .omp.final.then: 854 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 855 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 856 // CHECK3: .omp.final.done: 857 // CHECK3-NEXT: ret void 858 // 859 // 860 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 861 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 862 // CHECK3-NEXT: entry: 863 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 864 // CHECK3-NEXT: ret void 865 // 866 // 867 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 868 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 869 // CHECK5-NEXT: entry: 870 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 871 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 872 // CHECK5-NEXT: ret i32 [[CALL]] 873 // 874 // 875 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 876 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 877 // CHECK5-NEXT: entry: 878 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 879 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 880 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 881 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 882 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 883 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 884 // CHECK5-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 885 // CHECK5-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 886 // CHECK5-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 887 // CHECK5-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 888 // CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 4 889 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 890 // CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 891 // CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 892 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 893 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4 894 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 895 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 896 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 897 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 898 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 899 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 900 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 901 // CHECK5: omp.inner.for.cond: 902 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 903 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 904 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 905 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 906 // CHECK5: omp.inner.for.body: 907 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 908 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 909 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 910 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 911 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 912 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 913 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 914 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 915 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 916 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 917 // CHECK5: omp.body.continue: 918 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 919 // CHECK5: omp.inner.for.inc: 920 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 921 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 922 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 923 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 924 // CHECK5: omp.inner.for.end: 925 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 926 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 927 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 928 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 929 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 930 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 931 // CHECK5: omp.inner.for.cond8: 932 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 933 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6 934 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 935 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 936 // CHECK5: omp.inner.for.body10: 937 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 938 // CHECK5-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 939 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 940 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6 941 // CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 942 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6 943 // CHECK5-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64 944 // CHECK5-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]] 945 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6 946 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 947 // CHECK5: omp.body.continue16: 948 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 949 // CHECK5: omp.inner.for.inc17: 950 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 951 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 952 // CHECK5-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 953 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]] 954 // CHECK5: omp.inner.for.end19: 955 // CHECK5-NEXT: store i32 123, i32* [[I7]], align 4 956 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4 957 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4 958 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4 959 // CHECK5-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4 960 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]] 961 // CHECK5: omp.inner.for.cond25: 962 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 963 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9 964 // CHECK5-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 965 // CHECK5-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 966 // CHECK5: omp.inner.for.body27: 967 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 968 // CHECK5-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1 969 // CHECK5-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]] 970 // CHECK5-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9 971 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 972 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9 973 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64 974 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]] 975 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9 976 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 977 // CHECK5: omp.body.continue33: 978 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 979 // CHECK5: omp.inner.for.inc34: 980 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 981 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1 982 // CHECK5-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 983 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]] 984 // CHECK5: omp.inner.for.end36: 985 // CHECK5-NEXT: store i32 123, i32* [[I24]], align 4 986 // CHECK5-NEXT: [[A37:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 987 // CHECK5-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A37]], i64 0, i64 0 988 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX38]], align 4 989 // CHECK5-NEXT: ret i32 [[TMP18]] 990 // 991 // 992 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 993 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 994 // CHECK7-NEXT: entry: 995 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 996 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 997 // CHECK7-NEXT: ret i32 [[CALL]] 998 // 999 // 1000 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1001 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1002 // CHECK7-NEXT: entry: 1003 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1004 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 1005 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1006 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1007 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1008 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1009 // CHECK7-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1010 // CHECK7-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1011 // CHECK7-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1012 // CHECK7-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1013 // CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 4 1014 // CHECK7-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 1015 // CHECK7-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4 1016 // CHECK7-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4 1017 // CHECK7-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4 1018 // CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 4 1019 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1020 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1021 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1022 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1023 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1024 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 1025 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1026 // CHECK7: omp.inner.for.cond: 1027 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1028 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 1029 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1030 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1031 // CHECK7: omp.inner.for.body: 1032 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1033 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1034 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1035 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 1036 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1037 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 1038 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]] 1039 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 1040 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1041 // CHECK7: omp.body.continue: 1042 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1043 // CHECK7: omp.inner.for.inc: 1044 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1045 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1046 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1047 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1048 // CHECK7: omp.inner.for.end: 1049 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 1050 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 1051 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 1052 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 1053 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 1054 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1055 // CHECK7: omp.inner.for.cond8: 1056 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1057 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7 1058 // CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1059 // CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]] 1060 // CHECK7: omp.inner.for.body10: 1061 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1062 // CHECK7-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1063 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1064 // CHECK7-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7 1065 // CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1066 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7 1067 // CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]] 1068 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7 1069 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]] 1070 // CHECK7: omp.body.continue15: 1071 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]] 1072 // CHECK7: omp.inner.for.inc16: 1073 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1074 // CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1 1075 // CHECK7-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1076 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]] 1077 // CHECK7: omp.inner.for.end18: 1078 // CHECK7-NEXT: store i32 123, i32* [[I7]], align 4 1079 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4 1080 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4 1081 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4 1082 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4 1083 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]] 1084 // CHECK7: omp.inner.for.cond24: 1085 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1086 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10 1087 // CHECK7-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1088 // CHECK7-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]] 1089 // CHECK7: omp.inner.for.body26: 1090 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1091 // CHECK7-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1 1092 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]] 1093 // CHECK7-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10 1094 // CHECK7-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1095 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10 1096 // CHECK7-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]] 1097 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10 1098 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]] 1099 // CHECK7: omp.body.continue31: 1100 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]] 1101 // CHECK7: omp.inner.for.inc32: 1102 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1103 // CHECK7-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1 1104 // CHECK7-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1105 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]] 1106 // CHECK7: omp.inner.for.end34: 1107 // CHECK7-NEXT: store i32 123, i32* [[I23]], align 4 1108 // CHECK7-NEXT: [[A35:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1109 // CHECK7-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A35]], i32 0, i32 0 1110 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX36]], align 4 1111 // CHECK7-NEXT: ret i32 [[TMP18]] 1112 // 1113 // 1114 // CHECK9-LABEL: define {{[^@]+}}@main 1115 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1116 // CHECK9-NEXT: entry: 1117 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1118 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1119 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 1120 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1121 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1122 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1123 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1124 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 1125 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 1126 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 1127 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 1128 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1129 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1130 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1131 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 1132 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 1133 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 1134 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 1135 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 1136 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 1137 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1138 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 1139 // CHECK9-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 1140 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [3 x i8*], align 8 1141 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [3 x i8*], align 8 1142 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [3 x i8*], align 8 1143 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [3 x i64], align 8 1144 // CHECK9-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 1145 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 1146 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 1147 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1148 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1149 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 1150 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 1151 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1152 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1153 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1154 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 1155 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1156 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1157 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 1158 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1159 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1160 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 1161 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 1162 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1163 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 1164 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1165 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1166 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 1167 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1168 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1169 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 1170 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1171 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1172 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1173 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1174 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 1175 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1176 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1177 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 1178 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1179 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1180 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1181 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 1182 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 1183 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1184 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 1185 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 1186 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1187 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 1188 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1189 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1190 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1191 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1192 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1193 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 1194 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 1195 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1196 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 1197 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1198 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1199 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1200 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1201 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 1202 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 1203 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 1204 // CHECK9-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1205 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 1206 // CHECK9-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1207 // CHECK9: omp_offload.failed: 1208 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1209 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1210 // CHECK9: omp_offload.cont: 1211 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 1212 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 1213 // CHECK9-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 1214 // CHECK9-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 1215 // CHECK9-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 1216 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 1217 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 1218 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1219 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 1220 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 1221 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1222 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 1223 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 1224 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 1225 // CHECK9-NEXT: store i8* null, i8** [[TMP40]], align 8 1226 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1227 // CHECK9-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 1228 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 1229 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1230 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 1231 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 1232 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 1233 // CHECK9-NEXT: store i8* null, i8** [[TMP45]], align 8 1234 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 1235 // CHECK9-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 1236 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 1237 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 1238 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 1239 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 1240 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 1241 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 1242 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 1243 // CHECK9-NEXT: store i8* null, i8** [[TMP51]], align 8 1244 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1245 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1246 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 1247 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 1248 // CHECK9-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1249 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1250 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 1251 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 1252 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 1253 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 1254 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 1255 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 1256 // CHECK9-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 1257 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP58]]) 1258 // CHECK9-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1259 // CHECK9-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 1260 // CHECK9-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 1261 // CHECK9: omp_offload.failed16: 1262 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 1263 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]] 1264 // CHECK9: omp_offload.cont17: 1265 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[N]], align 4 1266 // CHECK9-NEXT: [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32* 1267 // CHECK9-NEXT: store i32 [[TMP61]], i32* [[CONV19]], align 4 1268 // CHECK9-NEXT: [[TMP62:%.*]] = load i64, i64* [[N_CASTED18]], align 8 1269 // CHECK9-NEXT: [[TMP63:%.*]] = mul nuw i64 [[TMP1]], 4 1270 // CHECK9-NEXT: [[TMP64:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES23]] to i8* 1271 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP64]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.5 to i8*), i64 24, i1 false) 1272 // CHECK9-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 1273 // CHECK9-NEXT: [[TMP66:%.*]] = bitcast i8** [[TMP65]] to i64* 1274 // CHECK9-NEXT: store i64 [[TMP62]], i64* [[TMP66]], align 8 1275 // CHECK9-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 1276 // CHECK9-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i64* 1277 // CHECK9-NEXT: store i64 [[TMP62]], i64* [[TMP68]], align 8 1278 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 1279 // CHECK9-NEXT: store i8* null, i8** [[TMP69]], align 8 1280 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 1281 // CHECK9-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 1282 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP71]], align 8 1283 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 1284 // CHECK9-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 1285 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP73]], align 8 1286 // CHECK9-NEXT: [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 1287 // CHECK9-NEXT: store i8* null, i8** [[TMP74]], align 8 1288 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 1289 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32** 1290 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP76]], align 8 1291 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 1292 // CHECK9-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32** 1293 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP78]], align 8 1294 // CHECK9-NEXT: [[TMP79:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 1295 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP79]], align 8 1296 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 1297 // CHECK9-NEXT: store i8* null, i8** [[TMP80]], align 8 1298 // CHECK9-NEXT: [[TMP81:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 1299 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 1300 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 1301 // CHECK9-NEXT: [[TMP84:%.*]] = load i32, i32* [[N]], align 4 1302 // CHECK9-NEXT: store i32 [[TMP84]], i32* [[DOTCAPTURE_EXPR_25]], align 4 1303 // CHECK9-NEXT: [[TMP85:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 1304 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP85]], 0 1305 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 1306 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 1307 // CHECK9-NEXT: store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4 1308 // CHECK9-NEXT: [[TMP86:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 1309 // CHECK9-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP86]], 1 1310 // CHECK9-NEXT: [[TMP87:%.*]] = zext i32 [[ADD30]] to i64 1311 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP87]]) 1312 // CHECK9-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP81]], i8** [[TMP82]], i64* [[TMP83]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1313 // CHECK9-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0 1314 // CHECK9-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]] 1315 // CHECK9: omp_offload.failed31: 1316 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP62]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 1317 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT32]] 1318 // CHECK9: omp_offload.cont32: 1319 // CHECK9-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1320 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP90]]) 1321 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1322 // CHECK9-NEXT: [[TMP91:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1323 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP91]]) 1324 // CHECK9-NEXT: [[TMP92:%.*]] = load i32, i32* [[RETVAL]], align 4 1325 // CHECK9-NEXT: ret i32 [[TMP92]] 1326 // 1327 // 1328 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100 1329 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1330 // CHECK9-NEXT: entry: 1331 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1332 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1333 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1334 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1335 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1336 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1337 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1338 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1339 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1340 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1341 // CHECK9-NEXT: ret void 1342 // 1343 // 1344 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1345 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1346 // CHECK9-NEXT: entry: 1347 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1348 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1349 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1350 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1351 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1352 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1353 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1354 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1355 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1356 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1357 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1358 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1359 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1360 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1361 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1362 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1363 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1364 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1365 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1366 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1367 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1368 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1369 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1370 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1371 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1372 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1373 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1374 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1375 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1376 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1377 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1378 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1379 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1380 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1381 // CHECK9: omp.precond.then: 1382 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1383 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1384 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1385 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1386 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1387 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1388 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1389 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1390 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1391 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1392 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1393 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1394 // CHECK9: cond.true: 1395 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1396 // CHECK9-NEXT: br label [[COND_END:%.*]] 1397 // CHECK9: cond.false: 1398 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1399 // CHECK9-NEXT: br label [[COND_END]] 1400 // CHECK9: cond.end: 1401 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1402 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1403 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1404 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1405 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1406 // CHECK9: omp.inner.for.cond: 1407 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1408 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1409 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1410 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1411 // CHECK9: omp.inner.for.body: 1412 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1413 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1414 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1415 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !9 1416 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !9 1417 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1418 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1419 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1420 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1421 // CHECK9: omp.body.continue: 1422 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1423 // CHECK9: omp.inner.for.inc: 1424 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1425 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 1426 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1427 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1428 // CHECK9: omp.inner.for.end: 1429 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1430 // CHECK9: omp.loop.exit: 1431 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1432 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1433 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1434 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1435 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1436 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1437 // CHECK9: .omp.final.then: 1438 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1439 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0 1440 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1441 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1442 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1443 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 1444 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1445 // CHECK9: .omp.final.done: 1446 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1447 // CHECK9: omp.precond.end: 1448 // CHECK9-NEXT: ret void 1449 // 1450 // 1451 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 1452 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1453 // CHECK9-NEXT: entry: 1454 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1455 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1456 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1457 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1458 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1459 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1460 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1461 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1462 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1463 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1464 // CHECK9-NEXT: ret void 1465 // 1466 // 1467 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1468 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1469 // CHECK9-NEXT: entry: 1470 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1471 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1472 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1473 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1474 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1475 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1476 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1477 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1478 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1479 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1480 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1481 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1482 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1483 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1484 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1485 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1486 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1487 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1488 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1489 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1490 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1491 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1492 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1493 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1494 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1495 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1496 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1497 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1498 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1499 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1500 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1501 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1502 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1503 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1504 // CHECK9: omp.precond.then: 1505 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1506 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1507 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1508 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1509 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1510 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1511 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1512 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1513 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1514 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1515 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1516 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1517 // CHECK9: cond.true: 1518 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1519 // CHECK9-NEXT: br label [[COND_END:%.*]] 1520 // CHECK9: cond.false: 1521 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1522 // CHECK9-NEXT: br label [[COND_END]] 1523 // CHECK9: cond.end: 1524 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1525 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1526 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1527 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1528 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1529 // CHECK9: omp.inner.for.cond: 1530 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1531 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 1532 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1533 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1534 // CHECK9: omp.inner.for.body: 1535 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1536 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1537 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1538 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15 1539 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15 1540 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1541 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1542 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 1543 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1544 // CHECK9: omp.body.continue: 1545 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1546 // CHECK9: omp.inner.for.inc: 1547 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1548 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 1549 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1550 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1551 // CHECK9: omp.inner.for.end: 1552 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1553 // CHECK9: omp.loop.exit: 1554 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1555 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1556 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1557 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1558 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1559 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1560 // CHECK9: .omp.final.then: 1561 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1562 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0 1563 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1564 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1565 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1566 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 1567 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1568 // CHECK9: .omp.final.done: 1569 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1570 // CHECK9: omp.precond.end: 1571 // CHECK9-NEXT: ret void 1572 // 1573 // 1574 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110 1575 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1576 // CHECK9-NEXT: entry: 1577 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1578 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1579 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1580 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1581 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1582 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1583 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1584 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1585 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1586 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1587 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1588 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1589 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1590 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1591 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1592 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 1593 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1594 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 1595 // CHECK9-NEXT: ret void 1596 // 1597 // 1598 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 1599 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1600 // CHECK9-NEXT: entry: 1601 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1602 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1603 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1604 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1605 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1606 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1607 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1608 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1609 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1610 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1611 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1612 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1613 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1614 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1615 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1616 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 1617 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1618 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1619 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1620 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1621 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1622 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1623 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1624 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1625 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1626 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1627 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1628 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1629 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1630 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1631 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1632 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1633 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1634 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1635 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1636 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1637 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1638 // CHECK9: omp.precond.then: 1639 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1640 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1641 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1642 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1643 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1644 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 1645 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1646 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1647 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 1648 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1649 // CHECK9: omp.dispatch.cond: 1650 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1651 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1652 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1653 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1654 // CHECK9: cond.true: 1655 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1656 // CHECK9-NEXT: br label [[COND_END:%.*]] 1657 // CHECK9: cond.false: 1658 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1659 // CHECK9-NEXT: br label [[COND_END]] 1660 // CHECK9: cond.end: 1661 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1662 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1663 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1664 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1665 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1666 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1667 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1668 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1669 // CHECK9: omp.dispatch.body: 1670 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1671 // CHECK9: omp.inner.for.cond: 1672 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1673 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 1674 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1675 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1676 // CHECK9: omp.inner.for.body: 1677 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1678 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1679 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1680 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !18 1681 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !18 1682 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 1683 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1684 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 1685 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1686 // CHECK9: omp.body.continue: 1687 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1688 // CHECK9: omp.inner.for.inc: 1689 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1690 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 1691 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1692 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 1693 // CHECK9: omp.inner.for.end: 1694 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1695 // CHECK9: omp.dispatch.inc: 1696 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1697 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1698 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 1699 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 1700 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1701 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1702 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 1703 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 1704 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 1705 // CHECK9: omp.dispatch.end: 1706 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1707 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 1708 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 1709 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1710 // CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 1711 // CHECK9-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1712 // CHECK9: .omp.final.then: 1713 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1714 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP30]], 0 1715 // CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1716 // CHECK9-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 1717 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 1718 // CHECK9-NEXT: store i32 [[ADD14]], i32* [[I4]], align 4 1719 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1720 // CHECK9: .omp.final.done: 1721 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1722 // CHECK9: omp.precond.end: 1723 // CHECK9-NEXT: ret void 1724 // 1725 // 1726 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 1727 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1728 // CHECK9-NEXT: entry: 1729 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1730 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 1731 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1732 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1733 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1734 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1735 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 1736 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 1737 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 1738 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1739 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8 1740 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8 1741 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8 1742 // CHECK9-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 1743 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1744 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1745 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 1746 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 1747 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1748 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 1749 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 1750 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1751 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 1752 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1753 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1754 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1755 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1756 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1757 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1758 // CHECK9: omp_offload.failed: 1759 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]] 1760 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1761 // CHECK9: omp_offload.cont: 1762 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1763 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 1764 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 1765 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1766 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 1767 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 1768 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 1769 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 1770 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1771 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1772 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1773 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1774 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1775 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 1776 // CHECK9: omp_offload.failed5: 1777 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 1778 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 1779 // CHECK9: omp_offload.cont6: 1780 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 1781 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 1782 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 1783 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 1784 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 1785 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 1786 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 1787 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1788 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 1789 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 1790 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1791 // CHECK9-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1792 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1793 // CHECK9-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 1794 // CHECK9: omp_offload.failed11: 1795 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]] 1796 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT12]] 1797 // CHECK9: omp_offload.cont12: 1798 // CHECK9-NEXT: ret i32 0 1799 // 1800 // 1801 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79 1802 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1803 // CHECK9-NEXT: entry: 1804 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1805 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1806 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1807 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1808 // CHECK9-NEXT: ret void 1809 // 1810 // 1811 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 1812 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1813 // CHECK9-NEXT: entry: 1814 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1815 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1816 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1817 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1818 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1819 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1820 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1821 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1822 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1823 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1824 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1825 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1826 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1827 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1828 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1829 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1830 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1831 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1832 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1833 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1834 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1835 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1836 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1837 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1838 // CHECK9: cond.true: 1839 // CHECK9-NEXT: br label [[COND_END:%.*]] 1840 // CHECK9: cond.false: 1841 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1842 // CHECK9-NEXT: br label [[COND_END]] 1843 // CHECK9: cond.end: 1844 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1845 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1846 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1847 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1848 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1849 // CHECK9: omp.inner.for.cond: 1850 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 1851 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 1852 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1853 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1854 // CHECK9: omp.inner.for.body: 1855 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 1856 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1857 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1858 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 1859 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 1860 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1861 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1862 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 1863 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1864 // CHECK9: omp.body.continue: 1865 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1866 // CHECK9: omp.inner.for.inc: 1867 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 1868 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1869 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 1870 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 1871 // CHECK9: omp.inner.for.end: 1872 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1873 // CHECK9: omp.loop.exit: 1874 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1875 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1876 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1877 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1878 // CHECK9: .omp.final.then: 1879 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 1880 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1881 // CHECK9: .omp.final.done: 1882 // CHECK9-NEXT: ret void 1883 // 1884 // 1885 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 1886 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1887 // CHECK9-NEXT: entry: 1888 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1889 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1890 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1891 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1892 // CHECK9-NEXT: ret void 1893 // 1894 // 1895 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 1896 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1897 // CHECK9-NEXT: entry: 1898 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1899 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1900 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1901 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1902 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1903 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1904 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1905 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1906 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1907 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1908 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1909 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1910 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1911 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1912 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1913 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1914 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1915 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1916 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1917 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1918 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1919 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1920 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1921 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1922 // CHECK9: cond.true: 1923 // CHECK9-NEXT: br label [[COND_END:%.*]] 1924 // CHECK9: cond.false: 1925 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1926 // CHECK9-NEXT: br label [[COND_END]] 1927 // CHECK9: cond.end: 1928 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1929 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1930 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1931 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1932 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1933 // CHECK9: omp.inner.for.cond: 1934 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 1935 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 1936 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1937 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1938 // CHECK9: omp.inner.for.body: 1939 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 1940 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1941 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1942 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 1943 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 1944 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1945 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1946 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 1947 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1948 // CHECK9: omp.body.continue: 1949 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1950 // CHECK9: omp.inner.for.inc: 1951 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 1952 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1953 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 1954 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 1955 // CHECK9: omp.inner.for.end: 1956 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1957 // CHECK9: omp.loop.exit: 1958 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1959 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1960 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1961 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1962 // CHECK9: .omp.final.then: 1963 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 1964 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1965 // CHECK9: .omp.final.done: 1966 // CHECK9-NEXT: ret void 1967 // 1968 // 1969 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89 1970 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1971 // CHECK9-NEXT: entry: 1972 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1973 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1974 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1975 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1976 // CHECK9-NEXT: ret void 1977 // 1978 // 1979 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13 1980 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1981 // CHECK9-NEXT: entry: 1982 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1983 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1984 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1985 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1986 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1987 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1988 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1989 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1990 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1991 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1992 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1993 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1994 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1995 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1996 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1997 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1998 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1999 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2000 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2001 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2002 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 2003 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2004 // CHECK9: omp.dispatch.cond: 2005 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2006 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2007 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2008 // CHECK9: cond.true: 2009 // CHECK9-NEXT: br label [[COND_END:%.*]] 2010 // CHECK9: cond.false: 2011 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2012 // CHECK9-NEXT: br label [[COND_END]] 2013 // CHECK9: cond.end: 2014 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2015 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2016 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2017 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2018 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2019 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2020 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2021 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2022 // CHECK9: omp.dispatch.body: 2023 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2024 // CHECK9: omp.inner.for.cond: 2025 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2026 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27 2027 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2028 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2029 // CHECK9: omp.inner.for.body: 2030 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2031 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2032 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2033 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27 2034 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27 2035 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2036 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2037 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27 2038 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2039 // CHECK9: omp.body.continue: 2040 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2041 // CHECK9: omp.inner.for.inc: 2042 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2043 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2044 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2045 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 2046 // CHECK9: omp.inner.for.end: 2047 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2048 // CHECK9: omp.dispatch.inc: 2049 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2050 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2051 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2052 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 2053 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2054 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2055 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 2056 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 2057 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 2058 // CHECK9: omp.dispatch.end: 2059 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2060 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2061 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2062 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2063 // CHECK9: .omp.final.then: 2064 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 2065 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2066 // CHECK9: .omp.final.done: 2067 // CHECK9-NEXT: ret void 2068 // 2069 // 2070 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2071 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 2072 // CHECK9-NEXT: entry: 2073 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2074 // CHECK9-NEXT: ret void 2075 // 2076 // 2077 // CHECK11-LABEL: define {{[^@]+}}@main 2078 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2079 // CHECK11-NEXT: entry: 2080 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2081 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2082 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 2083 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2084 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2085 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2086 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2087 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 2088 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 2089 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 2090 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 2091 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2092 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2093 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2094 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 2095 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 2096 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 2097 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 2098 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 2099 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 2100 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 2101 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 2102 // CHECK11-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 2103 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [3 x i8*], align 4 2104 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [3 x i8*], align 4 2105 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [3 x i8*], align 4 2106 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [3 x i64], align 4 2107 // CHECK11-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 2108 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 2109 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 2110 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2111 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2112 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 2113 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 2114 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2115 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2116 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2117 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2118 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2119 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 2120 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2121 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2122 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 2123 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 2124 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2125 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 2126 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2127 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2128 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 2129 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2130 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2131 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2132 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2133 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2134 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2135 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2136 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 2137 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2138 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2139 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 2140 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2141 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2142 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2143 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 2144 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 2145 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2146 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 2147 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 2148 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2149 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 2150 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2151 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 2152 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2153 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2154 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2155 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 2156 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 2157 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2158 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 2159 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2160 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2161 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2162 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2163 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 2164 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 2165 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 2166 // CHECK11-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2167 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2168 // CHECK11-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2169 // CHECK11: omp_offload.failed: 2170 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2171 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2172 // CHECK11: omp_offload.cont: 2173 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 2174 // CHECK11-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 2175 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 2176 // CHECK11-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 2177 // CHECK11-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 2178 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 2179 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 2180 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 2181 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 2182 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 2183 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 2184 // CHECK11-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 2185 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 2186 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 2187 // CHECK11-NEXT: store i8* null, i8** [[TMP41]], align 4 2188 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 2189 // CHECK11-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 2190 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 2191 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 2192 // CHECK11-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 2193 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 2194 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 2195 // CHECK11-NEXT: store i8* null, i8** [[TMP46]], align 4 2196 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 2197 // CHECK11-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 2198 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 2199 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 2200 // CHECK11-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 2201 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 2202 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 2203 // CHECK11-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 2204 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 2205 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 2206 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 2207 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 2208 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 2209 // CHECK11-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 2210 // CHECK11-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 2211 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 2212 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 2213 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 2214 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 2215 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 2216 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 2217 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 2218 // CHECK11-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 2219 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP59]]) 2220 // CHECK11-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2221 // CHECK11-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 2222 // CHECK11-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 2223 // CHECK11: omp_offload.failed15: 2224 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 2225 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]] 2226 // CHECK11: omp_offload.cont16: 2227 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 2228 // CHECK11-NEXT: store i32 [[TMP62]], i32* [[N_CASTED17]], align 4 2229 // CHECK11-NEXT: [[TMP63:%.*]] = load i32, i32* [[N_CASTED17]], align 4 2230 // CHECK11-NEXT: [[TMP64:%.*]] = mul nuw i32 [[TMP0]], 4 2231 // CHECK11-NEXT: [[TMP65:%.*]] = sext i32 [[TMP64]] to i64 2232 // CHECK11-NEXT: [[TMP66:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES21]] to i8* 2233 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP66]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.5 to i8*), i32 24, i1 false) 2234 // CHECK11-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 2235 // CHECK11-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i32* 2236 // CHECK11-NEXT: store i32 [[TMP63]], i32* [[TMP68]], align 4 2237 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 2238 // CHECK11-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i32* 2239 // CHECK11-NEXT: store i32 [[TMP63]], i32* [[TMP70]], align 4 2240 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 2241 // CHECK11-NEXT: store i8* null, i8** [[TMP71]], align 4 2242 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 2243 // CHECK11-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 2244 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP73]], align 4 2245 // CHECK11-NEXT: [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 2246 // CHECK11-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32* 2247 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP75]], align 4 2248 // CHECK11-NEXT: [[TMP76:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 2249 // CHECK11-NEXT: store i8* null, i8** [[TMP76]], align 4 2250 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 2251 // CHECK11-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32** 2252 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP78]], align 4 2253 // CHECK11-NEXT: [[TMP79:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 2254 // CHECK11-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32** 2255 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP80]], align 4 2256 // CHECK11-NEXT: [[TMP81:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2 2257 // CHECK11-NEXT: store i64 [[TMP65]], i64* [[TMP81]], align 4 2258 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 2259 // CHECK11-NEXT: store i8* null, i8** [[TMP82]], align 4 2260 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 2261 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 2262 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 2263 // CHECK11-NEXT: [[TMP86:%.*]] = load i32, i32* [[N]], align 4 2264 // CHECK11-NEXT: store i32 [[TMP86]], i32* [[DOTCAPTURE_EXPR_23]], align 4 2265 // CHECK11-NEXT: [[TMP87:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 2266 // CHECK11-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP87]], 0 2267 // CHECK11-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 2268 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 2269 // CHECK11-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 2270 // CHECK11-NEXT: [[TMP88:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 2271 // CHECK11-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP88]], 1 2272 // CHECK11-NEXT: [[TMP89:%.*]] = zext i32 [[ADD28]] to i64 2273 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP89]]) 2274 // CHECK11-NEXT: [[TMP90:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP83]], i8** [[TMP84]], i64* [[TMP85]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2275 // CHECK11-NEXT: [[TMP91:%.*]] = icmp ne i32 [[TMP90]], 0 2276 // CHECK11-NEXT: br i1 [[TMP91]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 2277 // CHECK11: omp_offload.failed29: 2278 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP63]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 2279 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT30]] 2280 // CHECK11: omp_offload.cont30: 2281 // CHECK11-NEXT: [[TMP92:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2282 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP92]]) 2283 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2284 // CHECK11-NEXT: [[TMP93:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2285 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP93]]) 2286 // CHECK11-NEXT: [[TMP94:%.*]] = load i32, i32* [[RETVAL]], align 4 2287 // CHECK11-NEXT: ret i32 [[TMP94]] 2288 // 2289 // 2290 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100 2291 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2292 // CHECK11-NEXT: entry: 2293 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2294 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2295 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2296 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2297 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2298 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2299 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2300 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2301 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2302 // CHECK11-NEXT: ret void 2303 // 2304 // 2305 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2306 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2307 // CHECK11-NEXT: entry: 2308 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2309 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2310 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2311 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2312 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2313 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2314 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2315 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2316 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2317 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2318 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2319 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2320 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2321 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2322 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2323 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2324 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2325 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2326 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2327 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2328 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2329 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2330 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2331 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2332 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2333 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2334 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2335 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2336 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2337 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2338 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2339 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2340 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2341 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2342 // CHECK11: omp.precond.then: 2343 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2344 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2345 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2346 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2347 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2348 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2349 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2350 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2351 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2352 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2353 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2354 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2355 // CHECK11: cond.true: 2356 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2357 // CHECK11-NEXT: br label [[COND_END:%.*]] 2358 // CHECK11: cond.false: 2359 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2360 // CHECK11-NEXT: br label [[COND_END]] 2361 // CHECK11: cond.end: 2362 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2363 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2364 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2365 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2366 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2367 // CHECK11: omp.inner.for.cond: 2368 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2369 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 2370 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2371 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2372 // CHECK11: omp.inner.for.body: 2373 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2374 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2375 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2376 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !10 2377 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !10 2378 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 2379 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 2380 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2381 // CHECK11: omp.body.continue: 2382 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2383 // CHECK11: omp.inner.for.inc: 2384 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2385 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2386 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2387 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 2388 // CHECK11: omp.inner.for.end: 2389 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2390 // CHECK11: omp.loop.exit: 2391 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2392 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2393 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2394 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2395 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2396 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2397 // CHECK11: .omp.final.then: 2398 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2399 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0 2400 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2401 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 2402 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 2403 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 2404 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2405 // CHECK11: .omp.final.done: 2406 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2407 // CHECK11: omp.precond.end: 2408 // CHECK11-NEXT: ret void 2409 // 2410 // 2411 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 2412 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2413 // CHECK11-NEXT: entry: 2414 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2415 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2416 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2417 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2418 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2419 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2420 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2421 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2422 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2423 // CHECK11-NEXT: ret void 2424 // 2425 // 2426 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2427 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2428 // CHECK11-NEXT: entry: 2429 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2430 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2431 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2432 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2433 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2434 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2435 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2436 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2437 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2438 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2439 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2440 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2441 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2442 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2443 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2444 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2445 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2446 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2447 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2448 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2449 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2450 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2451 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2452 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2453 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2454 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2455 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2456 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2457 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2458 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2459 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2460 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2461 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2462 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2463 // CHECK11: omp.precond.then: 2464 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2465 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2466 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2467 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2468 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2469 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2470 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2471 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2472 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2473 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2474 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2475 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2476 // CHECK11: cond.true: 2477 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2478 // CHECK11-NEXT: br label [[COND_END:%.*]] 2479 // CHECK11: cond.false: 2480 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2481 // CHECK11-NEXT: br label [[COND_END]] 2482 // CHECK11: cond.end: 2483 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2484 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2485 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2486 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2487 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2488 // CHECK11: omp.inner.for.cond: 2489 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2490 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 2491 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2492 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2493 // CHECK11: omp.inner.for.body: 2494 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2495 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2496 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2497 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 2498 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 2499 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 2500 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 2501 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2502 // CHECK11: omp.body.continue: 2503 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2504 // CHECK11: omp.inner.for.inc: 2505 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2506 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2507 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2508 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 2509 // CHECK11: omp.inner.for.end: 2510 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2511 // CHECK11: omp.loop.exit: 2512 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2513 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2514 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2515 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2516 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2517 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2518 // CHECK11: .omp.final.then: 2519 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2520 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0 2521 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2522 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 2523 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 2524 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 2525 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2526 // CHECK11: .omp.final.done: 2527 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2528 // CHECK11: omp.precond.end: 2529 // CHECK11-NEXT: ret void 2530 // 2531 // 2532 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110 2533 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2534 // CHECK11-NEXT: entry: 2535 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2536 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2537 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2538 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2539 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 2540 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2541 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2542 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2543 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2544 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2545 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2546 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2547 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2548 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2549 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2550 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 2551 // CHECK11-NEXT: ret void 2552 // 2553 // 2554 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 2555 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2556 // CHECK11-NEXT: entry: 2557 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2558 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2559 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2560 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2561 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2562 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2563 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2564 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2565 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2566 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2567 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2568 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2569 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2570 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2571 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2572 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2573 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2574 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2575 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2576 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2577 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2578 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2579 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2580 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2581 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2582 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2583 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2584 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2585 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2586 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2587 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2588 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2589 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2590 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2591 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2592 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2593 // CHECK11: omp.precond.then: 2594 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2595 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2596 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2597 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2598 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2599 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2600 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2601 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2602 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 2603 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2604 // CHECK11: omp.dispatch.cond: 2605 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2606 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2607 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2608 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2609 // CHECK11: cond.true: 2610 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2611 // CHECK11-NEXT: br label [[COND_END:%.*]] 2612 // CHECK11: cond.false: 2613 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2614 // CHECK11-NEXT: br label [[COND_END]] 2615 // CHECK11: cond.end: 2616 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2617 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2618 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2619 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2620 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2621 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2622 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2623 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2624 // CHECK11: omp.dispatch.body: 2625 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2626 // CHECK11: omp.inner.for.cond: 2627 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2628 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 2629 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2630 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2631 // CHECK11: omp.inner.for.body: 2632 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2633 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 2634 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2635 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 2636 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 2637 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 2638 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 2639 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2640 // CHECK11: omp.body.continue: 2641 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2642 // CHECK11: omp.inner.for.inc: 2643 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2644 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 2645 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2646 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 2647 // CHECK11: omp.inner.for.end: 2648 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2649 // CHECK11: omp.dispatch.inc: 2650 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2651 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2652 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2653 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 2654 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2655 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2656 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 2657 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 2658 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 2659 // CHECK11: omp.dispatch.end: 2660 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2661 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 2662 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 2663 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2664 // CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 2665 // CHECK11-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2666 // CHECK11: .omp.final.then: 2667 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2668 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP30]], 0 2669 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 2670 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 2671 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 2672 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I4]], align 4 2673 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2674 // CHECK11: .omp.final.done: 2675 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2676 // CHECK11: omp.precond.end: 2677 // CHECK11-NEXT: ret void 2678 // 2679 // 2680 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 2681 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2682 // CHECK11-NEXT: entry: 2683 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2684 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 2685 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2686 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2687 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2688 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2689 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 2690 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 2691 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 2692 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2693 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4 2694 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4 2695 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4 2696 // CHECK11-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 2697 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2698 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2699 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 2700 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 2701 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2702 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 2703 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 2704 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2705 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 2706 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2707 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2708 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2709 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2710 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2711 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2712 // CHECK11: omp_offload.failed: 2713 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]] 2714 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2715 // CHECK11: omp_offload.cont: 2716 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2717 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 2718 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 2719 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2720 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 2721 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 2722 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 2723 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 2724 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2725 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2726 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2727 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2728 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2729 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 2730 // CHECK11: omp_offload.failed5: 2731 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 2732 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]] 2733 // CHECK11: omp_offload.cont6: 2734 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2735 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 2736 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 2737 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2738 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 2739 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 2740 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 2741 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 2742 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2743 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2744 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2745 // CHECK11-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2746 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2747 // CHECK11-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 2748 // CHECK11: omp_offload.failed11: 2749 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]] 2750 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT12]] 2751 // CHECK11: omp_offload.cont12: 2752 // CHECK11-NEXT: ret i32 0 2753 // 2754 // 2755 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79 2756 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2757 // CHECK11-NEXT: entry: 2758 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2759 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2760 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2761 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2762 // CHECK11-NEXT: ret void 2763 // 2764 // 2765 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 2766 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2767 // CHECK11-NEXT: entry: 2768 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2769 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2770 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2771 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2772 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2773 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2774 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2775 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2776 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2777 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2778 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2779 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2780 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2781 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2782 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2783 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2784 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2785 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2786 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2787 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2788 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2789 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2790 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2791 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2792 // CHECK11: cond.true: 2793 // CHECK11-NEXT: br label [[COND_END:%.*]] 2794 // CHECK11: cond.false: 2795 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2796 // CHECK11-NEXT: br label [[COND_END]] 2797 // CHECK11: cond.end: 2798 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2799 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2800 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2801 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2802 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2803 // CHECK11: omp.inner.for.cond: 2804 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2805 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 2806 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2807 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2808 // CHECK11: omp.inner.for.body: 2809 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2810 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2811 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2812 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 2813 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 2814 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 2815 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 2816 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2817 // CHECK11: omp.body.continue: 2818 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2819 // CHECK11: omp.inner.for.inc: 2820 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2821 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2822 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2823 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 2824 // CHECK11: omp.inner.for.end: 2825 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2826 // CHECK11: omp.loop.exit: 2827 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2828 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2829 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2830 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2831 // CHECK11: .omp.final.then: 2832 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 2833 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2834 // CHECK11: .omp.final.done: 2835 // CHECK11-NEXT: ret void 2836 // 2837 // 2838 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 2839 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2840 // CHECK11-NEXT: entry: 2841 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2842 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2843 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2844 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2845 // CHECK11-NEXT: ret void 2846 // 2847 // 2848 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 2849 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2850 // CHECK11-NEXT: entry: 2851 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2852 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2853 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2854 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2855 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2856 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2857 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2858 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2859 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2860 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2861 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2862 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2863 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2864 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2865 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2866 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2867 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2868 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2869 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2870 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2871 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2872 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2873 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2874 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2875 // CHECK11: cond.true: 2876 // CHECK11-NEXT: br label [[COND_END:%.*]] 2877 // CHECK11: cond.false: 2878 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2879 // CHECK11-NEXT: br label [[COND_END]] 2880 // CHECK11: cond.end: 2881 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2882 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2883 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2884 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2885 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2886 // CHECK11: omp.inner.for.cond: 2887 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 2888 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 2889 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2890 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2891 // CHECK11: omp.inner.for.body: 2892 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 2893 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2894 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2895 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 2896 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 2897 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 2898 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 2899 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2900 // CHECK11: omp.body.continue: 2901 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2902 // CHECK11: omp.inner.for.inc: 2903 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 2904 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2905 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 2906 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 2907 // CHECK11: omp.inner.for.end: 2908 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2909 // CHECK11: omp.loop.exit: 2910 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2911 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2912 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2913 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2914 // CHECK11: .omp.final.then: 2915 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 2916 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2917 // CHECK11: .omp.final.done: 2918 // CHECK11-NEXT: ret void 2919 // 2920 // 2921 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89 2922 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2923 // CHECK11-NEXT: entry: 2924 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2925 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2926 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2927 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2928 // CHECK11-NEXT: ret void 2929 // 2930 // 2931 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13 2932 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2933 // CHECK11-NEXT: entry: 2934 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2935 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2936 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2937 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2938 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2939 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2940 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2941 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2942 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2943 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2944 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2945 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2946 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2947 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2948 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2949 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2950 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2951 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2952 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2953 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2954 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 2955 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2956 // CHECK11: omp.dispatch.cond: 2957 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2958 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2959 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2960 // CHECK11: cond.true: 2961 // CHECK11-NEXT: br label [[COND_END:%.*]] 2962 // CHECK11: cond.false: 2963 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2964 // CHECK11-NEXT: br label [[COND_END]] 2965 // CHECK11: cond.end: 2966 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2967 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2968 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2969 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2970 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2971 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2972 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2973 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2974 // CHECK11: omp.dispatch.body: 2975 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2976 // CHECK11: omp.inner.for.cond: 2977 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 2978 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28 2979 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2980 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2981 // CHECK11: omp.inner.for.body: 2982 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 2983 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2984 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2985 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28 2986 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28 2987 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 2988 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28 2989 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2990 // CHECK11: omp.body.continue: 2991 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2992 // CHECK11: omp.inner.for.inc: 2993 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 2994 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2995 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 2996 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 2997 // CHECK11: omp.inner.for.end: 2998 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2999 // CHECK11: omp.dispatch.inc: 3000 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3001 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3002 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 3003 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 3004 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3005 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3006 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 3007 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 3008 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 3009 // CHECK11: omp.dispatch.end: 3010 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3011 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3012 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 3013 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3014 // CHECK11: .omp.final.then: 3015 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 3016 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3017 // CHECK11: .omp.final.done: 3018 // CHECK11-NEXT: ret void 3019 // 3020 // 3021 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3022 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 3023 // CHECK11-NEXT: entry: 3024 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 3025 // CHECK11-NEXT: ret void 3026 // 3027 // 3028 // CHECK13-LABEL: define {{[^@]+}}@main 3029 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3030 // CHECK13-NEXT: entry: 3031 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3032 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3033 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3034 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 3035 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3036 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3037 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3038 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3039 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3040 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3041 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3042 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3043 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3044 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 3045 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3046 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 3047 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 3048 // CHECK13-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 3049 // CHECK13-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 3050 // CHECK13-NEXT: [[I18:%.*]] = alloca i32, align 4 3051 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3052 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 3053 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 3054 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 3055 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 3056 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 3057 // CHECK13-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4 3058 // CHECK13-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4 3059 // CHECK13-NEXT: [[I48:%.*]] = alloca i32, align 4 3060 // CHECK13-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4 3061 // CHECK13-NEXT: [[I52:%.*]] = alloca i32, align 4 3062 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3063 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3064 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3065 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 3066 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3067 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3068 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3069 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3070 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3071 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3072 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 3073 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3074 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3075 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3076 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3077 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3078 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3079 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3080 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3081 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 3082 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3083 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3084 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3085 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3086 // CHECK13: simd.if.then: 3087 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3088 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3089 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3090 // CHECK13: omp.inner.for.cond: 3091 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3092 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 3093 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3094 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3095 // CHECK13: omp.inner.for.body: 3096 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3097 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3098 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3099 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2 3100 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2 3101 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3102 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 3103 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 3104 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3105 // CHECK13: omp.body.continue: 3106 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3107 // CHECK13: omp.inner.for.inc: 3108 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3109 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1 3110 // CHECK13-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3111 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3112 // CHECK13: omp.inner.for.end: 3113 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3114 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0 3115 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3116 // CHECK13-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 3117 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 3118 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4 3119 // CHECK13-NEXT: br label [[SIMD_IF_END]] 3120 // CHECK13: simd.if.end: 3121 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4 3122 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 3123 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3124 // CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0 3125 // CHECK13-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 3126 // CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 3127 // CHECK13-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4 3128 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4 3129 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 3130 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4 3131 // CHECK13-NEXT: store i32 0, i32* [[I18]], align 4 3132 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3133 // CHECK13-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]] 3134 // CHECK13-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]] 3135 // CHECK13: simd.if.then20: 3136 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4 3137 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4 3138 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3139 // CHECK13: omp.inner.for.cond23: 3140 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3141 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6 3142 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 3143 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 3144 // CHECK13: omp.inner.for.body25: 3145 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3146 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1 3147 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3148 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6 3149 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6 3150 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64 3151 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]] 3152 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6 3153 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 3154 // CHECK13: omp.body.continue30: 3155 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 3156 // CHECK13: omp.inner.for.inc31: 3157 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3158 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1 3159 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3160 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]] 3161 // CHECK13: omp.inner.for.end33: 3162 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3163 // CHECK13-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0 3164 // CHECK13-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1 3165 // CHECK13-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1 3166 // CHECK13-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]] 3167 // CHECK13-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4 3168 // CHECK13-NEXT: br label [[SIMD_IF_END38]] 3169 // CHECK13: simd.if.end38: 3170 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4 3171 // CHECK13-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4 3172 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 3173 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4 3174 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3175 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0 3176 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 3177 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 3178 // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 3179 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4 3180 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 3181 // CHECK13-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4 3182 // CHECK13-NEXT: store i32 0, i32* [[I48]], align 4 3183 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3184 // CHECK13-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]] 3185 // CHECK13-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]] 3186 // CHECK13: simd.if.then50: 3187 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4 3188 // CHECK13-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4 3189 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]] 3190 // CHECK13: omp.inner.for.cond53: 3191 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3192 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9 3193 // CHECK13-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]] 3194 // CHECK13-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]] 3195 // CHECK13: omp.inner.for.body55: 3196 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3197 // CHECK13-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1 3198 // CHECK13-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]] 3199 // CHECK13-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9 3200 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9 3201 // CHECK13-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64 3202 // CHECK13-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]] 3203 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9 3204 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]] 3205 // CHECK13: omp.body.continue60: 3206 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]] 3207 // CHECK13: omp.inner.for.inc61: 3208 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3209 // CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1 3210 // CHECK13-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3211 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]] 3212 // CHECK13: omp.inner.for.end63: 3213 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3214 // CHECK13-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0 3215 // CHECK13-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1 3216 // CHECK13-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1 3217 // CHECK13-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]] 3218 // CHECK13-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4 3219 // CHECK13-NEXT: br label [[SIMD_IF_END68]] 3220 // CHECK13: simd.if.end68: 3221 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3222 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]]) 3223 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3224 // CHECK13-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3225 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP38]]) 3226 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 3227 // CHECK13-NEXT: ret i32 [[TMP39]] 3228 // 3229 // 3230 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3231 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 3232 // CHECK13-NEXT: entry: 3233 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3234 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3235 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3236 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3237 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3238 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3239 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3240 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3241 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3242 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3243 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3244 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 3245 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 3246 // CHECK13-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4 3247 // CHECK13-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4 3248 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3249 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 3250 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3251 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3252 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3253 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3254 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 3255 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3256 // CHECK13: omp.inner.for.cond: 3257 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3258 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 3259 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3260 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3261 // CHECK13: omp.inner.for.body: 3262 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3263 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3264 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3265 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 3266 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 3267 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 3268 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 3269 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 3270 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3271 // CHECK13: omp.body.continue: 3272 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3273 // CHECK13: omp.inner.for.inc: 3274 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3275 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 3276 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3277 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3278 // CHECK13: omp.inner.for.end: 3279 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 3280 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4 3281 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4 3282 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4 3283 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4 3284 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3285 // CHECK13: omp.inner.for.cond7: 3286 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3287 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !15 3288 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3289 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 3290 // CHECK13: omp.inner.for.body9: 3291 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3292 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 3293 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3294 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !15 3295 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 3296 // CHECK13-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64 3297 // CHECK13-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]] 3298 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !15 3299 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 3300 // CHECK13: omp.body.continue14: 3301 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 3302 // CHECK13: omp.inner.for.inc15: 3303 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3304 // CHECK13-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1 3305 // CHECK13-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3306 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]] 3307 // CHECK13: omp.inner.for.end17: 3308 // CHECK13-NEXT: store i32 10, i32* [[I6]], align 4 3309 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4 3310 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4 3311 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4 3312 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV21]], align 4 3313 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3314 // CHECK13: omp.inner.for.cond23: 3315 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3316 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !18 3317 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3318 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 3319 // CHECK13: omp.inner.for.body25: 3320 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3321 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 1 3322 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3323 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !18 3324 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !18 3325 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i64 3326 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]] 3327 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !18 3328 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 3329 // CHECK13: omp.body.continue30: 3330 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 3331 // CHECK13: omp.inner.for.inc31: 3332 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3333 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP17]], 1 3334 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3335 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]] 3336 // CHECK13: omp.inner.for.end33: 3337 // CHECK13-NEXT: store i32 10, i32* [[I22]], align 4 3338 // CHECK13-NEXT: ret i32 0 3339 // 3340 // 3341 // CHECK15-LABEL: define {{[^@]+}}@main 3342 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3343 // CHECK15-NEXT: entry: 3344 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3345 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3346 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 3347 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 3348 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3349 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3350 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 3351 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3352 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3353 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3354 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3355 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3356 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3357 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 3358 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3359 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 3360 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 3361 // CHECK15-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 3362 // CHECK15-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 3363 // CHECK15-NEXT: [[I18:%.*]] = alloca i32, align 4 3364 // CHECK15-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3365 // CHECK15-NEXT: [[I22:%.*]] = alloca i32, align 4 3366 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 3367 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 3368 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 3369 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 3370 // CHECK15-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4 3371 // CHECK15-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4 3372 // CHECK15-NEXT: [[I47:%.*]] = alloca i32, align 4 3373 // CHECK15-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4 3374 // CHECK15-NEXT: [[I51:%.*]] = alloca i32, align 4 3375 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 3376 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3377 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 3378 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 3379 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3380 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3381 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3382 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3383 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3384 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 3385 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 3386 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3387 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 3388 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3389 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3390 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3391 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3392 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3393 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 3394 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 3395 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3396 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3397 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3398 // CHECK15: simd.if.then: 3399 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3400 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3401 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3402 // CHECK15: omp.inner.for.cond: 3403 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3404 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 3405 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3406 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3407 // CHECK15: omp.inner.for.body: 3408 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3409 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3410 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3411 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3 3412 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3 3413 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]] 3414 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 3415 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3416 // CHECK15: omp.body.continue: 3417 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3418 // CHECK15: omp.inner.for.inc: 3419 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3420 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1 3421 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3422 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3423 // CHECK15: omp.inner.for.end: 3424 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3425 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0 3426 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3427 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 3428 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 3429 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4 3430 // CHECK15-NEXT: br label [[SIMD_IF_END]] 3431 // CHECK15: simd.if.end: 3432 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4 3433 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4 3434 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3435 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0 3436 // CHECK15-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 3437 // CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 3438 // CHECK15-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4 3439 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4 3440 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 3441 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4 3442 // CHECK15-NEXT: store i32 0, i32* [[I18]], align 4 3443 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3444 // CHECK15-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]] 3445 // CHECK15-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]] 3446 // CHECK15: simd.if.then20: 3447 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4 3448 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4 3449 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3450 // CHECK15: omp.inner.for.cond23: 3451 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3452 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7 3453 // CHECK15-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 3454 // CHECK15-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]] 3455 // CHECK15: omp.inner.for.body25: 3456 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3457 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1 3458 // CHECK15-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3459 // CHECK15-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7 3460 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7 3461 // CHECK15-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]] 3462 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7 3463 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]] 3464 // CHECK15: omp.body.continue29: 3465 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]] 3466 // CHECK15: omp.inner.for.inc30: 3467 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3468 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1 3469 // CHECK15-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3470 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]] 3471 // CHECK15: omp.inner.for.end32: 3472 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3473 // CHECK15-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0 3474 // CHECK15-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1 3475 // CHECK15-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1 3476 // CHECK15-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]] 3477 // CHECK15-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4 3478 // CHECK15-NEXT: br label [[SIMD_IF_END37]] 3479 // CHECK15: simd.if.end37: 3480 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[N]], align 4 3481 // CHECK15-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4 3482 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4 3483 // CHECK15-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4 3484 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 3485 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0 3486 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 3487 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 3488 // CHECK15-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4 3489 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4 3490 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3491 // CHECK15-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4 3492 // CHECK15-NEXT: store i32 0, i32* [[I47]], align 4 3493 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 3494 // CHECK15-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]] 3495 // CHECK15-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]] 3496 // CHECK15: simd.if.then49: 3497 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4 3498 // CHECK15-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4 3499 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]] 3500 // CHECK15: omp.inner.for.cond52: 3501 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3502 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10 3503 // CHECK15-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]] 3504 // CHECK15-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]] 3505 // CHECK15: omp.inner.for.body54: 3506 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3507 // CHECK15-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1 3508 // CHECK15-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]] 3509 // CHECK15-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10 3510 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10 3511 // CHECK15-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]] 3512 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10 3513 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]] 3514 // CHECK15: omp.body.continue58: 3515 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]] 3516 // CHECK15: omp.inner.for.inc59: 3517 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3518 // CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1 3519 // CHECK15-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3520 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]] 3521 // CHECK15: omp.inner.for.end61: 3522 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 3523 // CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0 3524 // CHECK15-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1 3525 // CHECK15-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1 3526 // CHECK15-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]] 3527 // CHECK15-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4 3528 // CHECK15-NEXT: br label [[SIMD_IF_END66]] 3529 // CHECK15: simd.if.end66: 3530 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3531 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]]) 3532 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3533 // CHECK15-NEXT: [[TMP37:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3534 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP37]]) 3535 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[RETVAL]], align 4 3536 // CHECK15-NEXT: ret i32 [[TMP38]] 3537 // 3538 // 3539 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3540 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 3541 // CHECK15-NEXT: entry: 3542 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3543 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3544 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 3545 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3546 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3547 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3548 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3549 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3550 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3551 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3552 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3553 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 3554 // CHECK15-NEXT: [[_TMP17:%.*]] = alloca i32, align 4 3555 // CHECK15-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 3556 // CHECK15-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 3557 // CHECK15-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4 3558 // CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 4 3559 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3560 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3561 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3562 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3563 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 3564 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3565 // CHECK15: omp.inner.for.cond: 3566 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3567 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 3568 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3569 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3570 // CHECK15: omp.inner.for.body: 3571 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3572 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3573 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3574 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 3575 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 3576 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]] 3577 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 3578 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3579 // CHECK15: omp.body.continue: 3580 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3581 // CHECK15: omp.inner.for.inc: 3582 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3583 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 3584 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3585 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 3586 // CHECK15: omp.inner.for.end: 3587 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 3588 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4 3589 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4 3590 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4 3591 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4 3592 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3593 // CHECK15: omp.inner.for.cond7: 3594 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3595 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16 3596 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3597 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]] 3598 // CHECK15: omp.inner.for.body9: 3599 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3600 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 3601 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3602 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16 3603 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !16 3604 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]] 3605 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !16 3606 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]] 3607 // CHECK15: omp.body.continue13: 3608 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]] 3609 // CHECK15: omp.inner.for.inc14: 3610 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3611 // CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1 3612 // CHECK15-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3613 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]] 3614 // CHECK15: omp.inner.for.end16: 3615 // CHECK15-NEXT: store i32 10, i32* [[I6]], align 4 3616 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4 3617 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4 3618 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4 3619 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV20]], align 4 3620 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]] 3621 // CHECK15: omp.inner.for.cond22: 3622 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3623 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !19 3624 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3625 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]] 3626 // CHECK15: omp.inner.for.body24: 3627 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3628 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1 3629 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]] 3630 // CHECK15-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !19 3631 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !19 3632 // CHECK15-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP16]] 3633 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !19 3634 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]] 3635 // CHECK15: omp.body.continue28: 3636 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]] 3637 // CHECK15: omp.inner.for.inc29: 3638 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3639 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP17]], 1 3640 // CHECK15-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3641 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]] 3642 // CHECK15: omp.inner.for.end31: 3643 // CHECK15-NEXT: store i32 10, i32* [[I21]], align 4 3644 // CHECK15-NEXT: ret i32 0 3645 // 3646