1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X]; 25 float b; 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute simd 30 for(int i = 0; i < X; i++) { 31 a[i] = (T)0; 32 } 33 #pragma omp target 34 #pragma omp teams distribute simd dist_schedule(static) 35 for(int i = 0; i < X; i++) { 36 a[i] = (T)0; 37 } 38 #pragma omp target 39 #pragma omp teams distribute simd dist_schedule(static, X/2) 40 for(int i = 0; i < X; i++) { 41 a[i] = (T)0; 42 } 43 44 45 46 47 48 49 return a[0]; 50 } 51 }; 52 53 int teams_template_struct(void) { 54 SS<int, 123, 456> V; 55 return V.foo(); 56 57 } 58 #endif // CK1 59 60 // Test host codegen. 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 64 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 67 68 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 69 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 70 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 71 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 72 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 73 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 74 #ifdef CK2 75 76 template <typename T, int n> 77 int tmain(T argc) { 78 T a[n]; 79 #pragma omp target 80 #pragma omp teams distribute simd 81 for(int i = 0; i < n; i++) { 82 a[i] = (T)0; 83 } 84 #pragma omp target 85 #pragma omp teams distribute simd dist_schedule(static) 86 for(int i = 0; i < n; i++) { 87 a[i] = (T)0; 88 } 89 #pragma omp target 90 #pragma omp teams distribute simd dist_schedule(static, n) 91 for(int i = 0; i < n; i++) { 92 a[i] = (T)0; 93 } 94 return 0; 95 } 96 97 int main (int argc, char **argv) { 98 int n = 100; 99 int a[n]; 100 #pragma omp target 101 #pragma omp teams distribute simd 102 for(int i = 0; i < n; i++) { 103 a[i] = 0; 104 } 105 #pragma omp target 106 #pragma omp teams distribute simd dist_schedule(static) 107 for(int i = 0; i < n; i++) { 108 a[i] = 0; 109 } 110 #pragma omp target 111 #pragma omp teams distribute simd dist_schedule(static, n) 112 for(int i = 0; i < n; i++) { 113 a[i] = 0; 114 } 115 return tmain<int, 10>(argc); 116 } 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 #endif // CK2 133 #endif // #ifndef HEADER 134 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 135 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 136 // CHECK1-NEXT: entry: 137 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 138 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 139 // CHECK1-NEXT: ret i32 [[CALL]] 140 // 141 // 142 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 143 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 144 // CHECK1-NEXT: entry: 145 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 146 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 147 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 148 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 149 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 151 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 152 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 153 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 8 155 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 8 156 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 8 157 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 158 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 159 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 160 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 161 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 162 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 163 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 164 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 165 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 166 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 167 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 168 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 169 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 170 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 171 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 172 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 173 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4 174 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 175 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4 176 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 177 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8 178 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 179 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8 180 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 181 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8 182 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 183 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8 184 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 185 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8 186 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 187 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8 188 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 189 // CHECK1-NEXT: store i64 123, i64* [[TMP15]], align 8 190 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 191 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 192 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 193 // CHECK1: omp_offload.failed: 194 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 195 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 196 // CHECK1: omp_offload.cont: 197 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 198 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 199 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 200 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 201 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 202 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 203 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 8 204 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 205 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 206 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 207 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 208 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 209 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0 210 // CHECK1-NEXT: store i32 1, i32* [[TMP25]], align 4 211 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1 212 // CHECK1-NEXT: store i32 1, i32* [[TMP26]], align 4 213 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2 214 // CHECK1-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8 215 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3 216 // CHECK1-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8 217 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4 218 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP29]], align 8 219 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5 220 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP30]], align 8 221 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6 222 // CHECK1-NEXT: store i8** null, i8*** [[TMP31]], align 8 223 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7 224 // CHECK1-NEXT: store i8** null, i8*** [[TMP32]], align 8 225 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8 226 // CHECK1-NEXT: store i64 123, i64* [[TMP33]], align 8 227 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]]) 228 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 229 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 230 // CHECK1: omp_offload.failed8: 231 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]] 232 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]] 233 // CHECK1: omp_offload.cont9: 234 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 235 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 236 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 237 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 238 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 239 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 240 // CHECK1-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 8 241 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0 242 // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8 243 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 244 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 245 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 246 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0 247 // CHECK1-NEXT: store i32 1, i32* [[TMP43]], align 4 248 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1 249 // CHECK1-NEXT: store i32 1, i32* [[TMP44]], align 4 250 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2 251 // CHECK1-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8 252 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3 253 // CHECK1-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8 254 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4 255 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP47]], align 8 256 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5 257 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP48]], align 8 258 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6 259 // CHECK1-NEXT: store i8** null, i8*** [[TMP49]], align 8 260 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7 261 // CHECK1-NEXT: store i8** null, i8*** [[TMP50]], align 8 262 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8 263 // CHECK1-NEXT: store i64 123, i64* [[TMP51]], align 8 264 // CHECK1-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]]) 265 // CHECK1-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0 266 // CHECK1-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 267 // CHECK1: omp_offload.failed16: 268 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]] 269 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]] 270 // CHECK1: omp_offload.cont17: 271 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 272 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A18]], i64 0, i64 0 273 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 274 // CHECK1-NEXT: ret i32 [[TMP54]] 275 // 276 // 277 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 278 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 279 // CHECK1-NEXT: entry: 280 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 281 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 282 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 283 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 284 // CHECK1-NEXT: ret void 285 // 286 // 287 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 288 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 289 // CHECK1-NEXT: entry: 290 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 291 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 292 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 293 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 294 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 295 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 296 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 297 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 298 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 299 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 300 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 301 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 302 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 303 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 304 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 305 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 306 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 307 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 308 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 309 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 310 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 311 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 312 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 313 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 314 // CHECK1: cond.true: 315 // CHECK1-NEXT: br label [[COND_END:%.*]] 316 // CHECK1: cond.false: 317 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 318 // CHECK1-NEXT: br label [[COND_END]] 319 // CHECK1: cond.end: 320 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 321 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 322 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 323 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 324 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 325 // CHECK1: omp.inner.for.cond: 326 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 327 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 328 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 329 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 330 // CHECK1: omp.inner.for.body: 331 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 332 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 333 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 334 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 335 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 336 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 337 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 338 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 339 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 340 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 341 // CHECK1: omp.body.continue: 342 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 343 // CHECK1: omp.inner.for.inc: 344 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 345 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 346 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 347 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 348 // CHECK1: omp.inner.for.end: 349 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 350 // CHECK1: omp.loop.exit: 351 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 352 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 353 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 354 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 355 // CHECK1: .omp.final.then: 356 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 357 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 358 // CHECK1: .omp.final.done: 359 // CHECK1-NEXT: ret void 360 // 361 // 362 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 363 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 364 // CHECK1-NEXT: entry: 365 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 366 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 367 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 368 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 369 // CHECK1-NEXT: ret void 370 // 371 // 372 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 373 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 374 // CHECK1-NEXT: entry: 375 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 376 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 377 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 378 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 379 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 380 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 381 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 382 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 383 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 384 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 385 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 386 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 387 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 388 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 389 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 390 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 391 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 392 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 393 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 394 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 395 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 396 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 397 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 398 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 399 // CHECK1: cond.true: 400 // CHECK1-NEXT: br label [[COND_END:%.*]] 401 // CHECK1: cond.false: 402 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 403 // CHECK1-NEXT: br label [[COND_END]] 404 // CHECK1: cond.end: 405 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 406 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 407 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 408 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 409 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 410 // CHECK1: omp.inner.for.cond: 411 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 412 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 413 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 414 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 415 // CHECK1: omp.inner.for.body: 416 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 417 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 418 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 419 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 420 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 421 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 422 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 423 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 424 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 425 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 426 // CHECK1: omp.body.continue: 427 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 428 // CHECK1: omp.inner.for.inc: 429 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 430 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 431 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 432 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 433 // CHECK1: omp.inner.for.end: 434 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 435 // CHECK1: omp.loop.exit: 436 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 437 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 438 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 439 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 440 // CHECK1: .omp.final.then: 441 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 442 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 443 // CHECK1: .omp.final.done: 444 // CHECK1-NEXT: ret void 445 // 446 // 447 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 448 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 449 // CHECK1-NEXT: entry: 450 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 451 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 452 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 453 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 454 // CHECK1-NEXT: ret void 455 // 456 // 457 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 458 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 459 // CHECK1-NEXT: entry: 460 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 461 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 462 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 463 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 464 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 465 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 466 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 467 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 468 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 469 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 470 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 471 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 472 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 473 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 474 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 475 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 476 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 477 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 478 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 479 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 480 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 481 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 482 // CHECK1: omp.dispatch.cond: 483 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 484 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 485 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 486 // CHECK1: cond.true: 487 // CHECK1-NEXT: br label [[COND_END:%.*]] 488 // CHECK1: cond.false: 489 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 490 // CHECK1-NEXT: br label [[COND_END]] 491 // CHECK1: cond.end: 492 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 493 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 494 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 495 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 496 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 497 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 498 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 499 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 500 // CHECK1: omp.dispatch.body: 501 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 502 // CHECK1: omp.inner.for.cond: 503 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 504 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 505 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 506 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 507 // CHECK1: omp.inner.for.body: 508 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 509 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 510 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 511 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 512 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 513 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 514 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 515 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 516 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 517 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 518 // CHECK1: omp.body.continue: 519 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 520 // CHECK1: omp.inner.for.inc: 521 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 522 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 523 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 524 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 525 // CHECK1: omp.inner.for.end: 526 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 527 // CHECK1: omp.dispatch.inc: 528 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 529 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 530 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 531 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 532 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 533 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 534 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 535 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 536 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 537 // CHECK1: omp.dispatch.end: 538 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 539 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 540 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 541 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 542 // CHECK1: .omp.final.then: 543 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 544 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 545 // CHECK1: .omp.final.done: 546 // CHECK1-NEXT: ret void 547 // 548 // 549 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 550 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 551 // CHECK1-NEXT: entry: 552 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 553 // CHECK1-NEXT: ret void 554 // 555 // 556 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 557 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 558 // CHECK3-NEXT: entry: 559 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 560 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 561 // CHECK3-NEXT: ret i32 [[CALL]] 562 // 563 // 564 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 565 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 566 // CHECK3-NEXT: entry: 567 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 568 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 569 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 570 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 571 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 572 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 573 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 574 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 575 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 576 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 4 577 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 4 578 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 4 579 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 580 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 581 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 582 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 583 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 584 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 585 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 586 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 587 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 588 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 589 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 590 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 591 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 592 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 593 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 594 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 595 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4 596 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 597 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4 598 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 599 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4 600 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 601 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4 602 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 603 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4 604 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 605 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4 606 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 607 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4 608 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 609 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4 610 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 611 // CHECK3-NEXT: store i64 123, i64* [[TMP15]], align 8 612 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 613 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 614 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 615 // CHECK3: omp_offload.failed: 616 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 617 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 618 // CHECK3: omp_offload.cont: 619 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 620 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 621 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 622 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 623 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 624 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 625 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 4 626 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 627 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 628 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 629 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 630 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 631 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0 632 // CHECK3-NEXT: store i32 1, i32* [[TMP25]], align 4 633 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1 634 // CHECK3-NEXT: store i32 1, i32* [[TMP26]], align 4 635 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2 636 // CHECK3-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4 637 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3 638 // CHECK3-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4 639 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4 640 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP29]], align 4 641 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5 642 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP30]], align 4 643 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6 644 // CHECK3-NEXT: store i8** null, i8*** [[TMP31]], align 4 645 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7 646 // CHECK3-NEXT: store i8** null, i8*** [[TMP32]], align 4 647 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8 648 // CHECK3-NEXT: store i64 123, i64* [[TMP33]], align 8 649 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]]) 650 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 651 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 652 // CHECK3: omp_offload.failed8: 653 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]] 654 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]] 655 // CHECK3: omp_offload.cont9: 656 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 657 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 658 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 659 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 660 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 661 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 662 // CHECK3-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 4 663 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0 664 // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 4 665 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 666 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 667 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 668 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0 669 // CHECK3-NEXT: store i32 1, i32* [[TMP43]], align 4 670 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1 671 // CHECK3-NEXT: store i32 1, i32* [[TMP44]], align 4 672 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2 673 // CHECK3-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4 674 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3 675 // CHECK3-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4 676 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4 677 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP47]], align 4 678 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5 679 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP48]], align 4 680 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6 681 // CHECK3-NEXT: store i8** null, i8*** [[TMP49]], align 4 682 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7 683 // CHECK3-NEXT: store i8** null, i8*** [[TMP50]], align 4 684 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8 685 // CHECK3-NEXT: store i64 123, i64* [[TMP51]], align 8 686 // CHECK3-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]]) 687 // CHECK3-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0 688 // CHECK3-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 689 // CHECK3: omp_offload.failed16: 690 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]] 691 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]] 692 // CHECK3: omp_offload.cont17: 693 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 694 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A18]], i32 0, i32 0 695 // CHECK3-NEXT: [[TMP54:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 696 // CHECK3-NEXT: ret i32 [[TMP54]] 697 // 698 // 699 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 700 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 701 // CHECK3-NEXT: entry: 702 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 703 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 704 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 705 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 706 // CHECK3-NEXT: ret void 707 // 708 // 709 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 710 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 711 // CHECK3-NEXT: entry: 712 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 713 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 714 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 715 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 716 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 717 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 718 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 719 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 720 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 721 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 722 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 723 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 724 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 725 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 726 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 727 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 728 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 729 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 730 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 731 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 732 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 733 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 734 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 735 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 736 // CHECK3: cond.true: 737 // CHECK3-NEXT: br label [[COND_END:%.*]] 738 // CHECK3: cond.false: 739 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 740 // CHECK3-NEXT: br label [[COND_END]] 741 // CHECK3: cond.end: 742 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 743 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 744 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 745 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 746 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 747 // CHECK3: omp.inner.for.cond: 748 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 749 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 750 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 751 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 752 // CHECK3: omp.inner.for.body: 753 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 754 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 755 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 756 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 757 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 758 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 759 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 760 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 761 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 762 // CHECK3: omp.body.continue: 763 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 764 // CHECK3: omp.inner.for.inc: 765 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 766 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 767 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 768 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 769 // CHECK3: omp.inner.for.end: 770 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 771 // CHECK3: omp.loop.exit: 772 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 773 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 774 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 775 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 776 // CHECK3: .omp.final.then: 777 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 778 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 779 // CHECK3: .omp.final.done: 780 // CHECK3-NEXT: ret void 781 // 782 // 783 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 784 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 785 // CHECK3-NEXT: entry: 786 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 787 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 788 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 789 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 790 // CHECK3-NEXT: ret void 791 // 792 // 793 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 794 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 795 // CHECK3-NEXT: entry: 796 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 797 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 798 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 799 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 800 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 801 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 802 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 803 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 804 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 805 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 806 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 807 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 808 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 809 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 810 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 811 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 812 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 813 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 814 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 815 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 816 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 817 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 818 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 819 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 820 // CHECK3: cond.true: 821 // CHECK3-NEXT: br label [[COND_END:%.*]] 822 // CHECK3: cond.false: 823 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 824 // CHECK3-NEXT: br label [[COND_END]] 825 // CHECK3: cond.end: 826 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 827 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 828 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 829 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 830 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 831 // CHECK3: omp.inner.for.cond: 832 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 833 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 834 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 835 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 836 // CHECK3: omp.inner.for.body: 837 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 838 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 839 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 840 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 841 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 842 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 843 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 844 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 845 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 846 // CHECK3: omp.body.continue: 847 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 848 // CHECK3: omp.inner.for.inc: 849 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 850 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 851 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 852 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 853 // CHECK3: omp.inner.for.end: 854 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 855 // CHECK3: omp.loop.exit: 856 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 857 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 858 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 859 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 860 // CHECK3: .omp.final.then: 861 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 862 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 863 // CHECK3: .omp.final.done: 864 // CHECK3-NEXT: ret void 865 // 866 // 867 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 868 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 869 // CHECK3-NEXT: entry: 870 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 871 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 872 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 873 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 874 // CHECK3-NEXT: ret void 875 // 876 // 877 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 878 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 879 // CHECK3-NEXT: entry: 880 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 881 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 882 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 883 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 884 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 885 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 886 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 887 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 888 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 889 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 890 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 891 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 892 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 893 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 894 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 895 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 896 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 897 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 898 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 899 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 900 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 901 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 902 // CHECK3: omp.dispatch.cond: 903 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 904 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 905 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 906 // CHECK3: cond.true: 907 // CHECK3-NEXT: br label [[COND_END:%.*]] 908 // CHECK3: cond.false: 909 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 910 // CHECK3-NEXT: br label [[COND_END]] 911 // CHECK3: cond.end: 912 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 913 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 914 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 915 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 916 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 917 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 918 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 919 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 920 // CHECK3: omp.dispatch.body: 921 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 922 // CHECK3: omp.inner.for.cond: 923 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 924 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 925 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 926 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 927 // CHECK3: omp.inner.for.body: 928 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 929 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 930 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 931 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16 932 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 933 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 934 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 935 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 936 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 937 // CHECK3: omp.body.continue: 938 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 939 // CHECK3: omp.inner.for.inc: 940 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 941 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 942 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 943 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 944 // CHECK3: omp.inner.for.end: 945 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 946 // CHECK3: omp.dispatch.inc: 947 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 948 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 949 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 950 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 951 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 952 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 953 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 954 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 955 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 956 // CHECK3: omp.dispatch.end: 957 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 958 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 959 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 960 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 961 // CHECK3: .omp.final.then: 962 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 963 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 964 // CHECK3: .omp.final.done: 965 // CHECK3-NEXT: ret void 966 // 967 // 968 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 969 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 970 // CHECK3-NEXT: entry: 971 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 972 // CHECK3-NEXT: ret void 973 // 974 // 975 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 976 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 977 // CHECK5-NEXT: entry: 978 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 979 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 980 // CHECK5-NEXT: ret i32 [[CALL]] 981 // 982 // 983 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 984 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 985 // CHECK5-NEXT: entry: 986 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 987 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 988 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 989 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 990 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 991 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 992 // CHECK5-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 993 // CHECK5-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 994 // CHECK5-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 995 // CHECK5-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 996 // CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 4 997 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 998 // CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 999 // CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 1000 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1001 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4 1002 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1003 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1004 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1005 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1006 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1007 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 1008 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1009 // CHECK5: omp.inner.for.cond: 1010 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1011 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 1012 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1013 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1014 // CHECK5: omp.inner.for.body: 1015 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1016 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1017 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1018 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 1019 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1020 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 1021 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 1022 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1023 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 1024 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1025 // CHECK5: omp.body.continue: 1026 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1027 // CHECK5: omp.inner.for.inc: 1028 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1029 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1030 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1031 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1032 // CHECK5: omp.inner.for.end: 1033 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 1034 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 1035 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 1036 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 1037 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 1038 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1039 // CHECK5: omp.inner.for.cond8: 1040 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1041 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6 1042 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1043 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 1044 // CHECK5: omp.inner.for.body10: 1045 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1046 // CHECK5-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1047 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1048 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6 1049 // CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1050 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6 1051 // CHECK5-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64 1052 // CHECK5-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]] 1053 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6 1054 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 1055 // CHECK5: omp.body.continue16: 1056 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 1057 // CHECK5: omp.inner.for.inc17: 1058 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1059 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 1060 // CHECK5-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1061 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]] 1062 // CHECK5: omp.inner.for.end19: 1063 // CHECK5-NEXT: store i32 123, i32* [[I7]], align 4 1064 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4 1065 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4 1066 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4 1067 // CHECK5-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4 1068 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]] 1069 // CHECK5: omp.inner.for.cond25: 1070 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1071 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9 1072 // CHECK5-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1073 // CHECK5-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 1074 // CHECK5: omp.inner.for.body27: 1075 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1076 // CHECK5-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1 1077 // CHECK5-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]] 1078 // CHECK5-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9 1079 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1080 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9 1081 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64 1082 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]] 1083 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9 1084 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 1085 // CHECK5: omp.body.continue33: 1086 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 1087 // CHECK5: omp.inner.for.inc34: 1088 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1089 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1 1090 // CHECK5-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1091 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]] 1092 // CHECK5: omp.inner.for.end36: 1093 // CHECK5-NEXT: store i32 123, i32* [[I24]], align 4 1094 // CHECK5-NEXT: [[A37:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1095 // CHECK5-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A37]], i64 0, i64 0 1096 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX38]], align 4 1097 // CHECK5-NEXT: ret i32 [[TMP18]] 1098 // 1099 // 1100 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1101 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1102 // CHECK7-NEXT: entry: 1103 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1104 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 1105 // CHECK7-NEXT: ret i32 [[CALL]] 1106 // 1107 // 1108 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1109 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1110 // CHECK7-NEXT: entry: 1111 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1112 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 1113 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1114 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1115 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1116 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1117 // CHECK7-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1118 // CHECK7-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1119 // CHECK7-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1120 // CHECK7-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1121 // CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 4 1122 // CHECK7-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 1123 // CHECK7-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4 1124 // CHECK7-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4 1125 // CHECK7-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4 1126 // CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 4 1127 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1128 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1129 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1130 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1131 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1132 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 1133 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1134 // CHECK7: omp.inner.for.cond: 1135 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1136 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 1137 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1138 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1139 // CHECK7: omp.inner.for.body: 1140 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1141 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1142 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1143 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 1144 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1145 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 1146 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]] 1147 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 1148 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1149 // CHECK7: omp.body.continue: 1150 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1151 // CHECK7: omp.inner.for.inc: 1152 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1153 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1154 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1155 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1156 // CHECK7: omp.inner.for.end: 1157 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 1158 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 1159 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 1160 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 1161 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 1162 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1163 // CHECK7: omp.inner.for.cond8: 1164 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1165 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7 1166 // CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1167 // CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]] 1168 // CHECK7: omp.inner.for.body10: 1169 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1170 // CHECK7-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1171 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1172 // CHECK7-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7 1173 // CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1174 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7 1175 // CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]] 1176 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7 1177 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]] 1178 // CHECK7: omp.body.continue15: 1179 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]] 1180 // CHECK7: omp.inner.for.inc16: 1181 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1182 // CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1 1183 // CHECK7-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1184 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]] 1185 // CHECK7: omp.inner.for.end18: 1186 // CHECK7-NEXT: store i32 123, i32* [[I7]], align 4 1187 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4 1188 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4 1189 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4 1190 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4 1191 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]] 1192 // CHECK7: omp.inner.for.cond24: 1193 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1194 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10 1195 // CHECK7-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1196 // CHECK7-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]] 1197 // CHECK7: omp.inner.for.body26: 1198 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1199 // CHECK7-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1 1200 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]] 1201 // CHECK7-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10 1202 // CHECK7-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1203 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10 1204 // CHECK7-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]] 1205 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10 1206 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]] 1207 // CHECK7: omp.body.continue31: 1208 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]] 1209 // CHECK7: omp.inner.for.inc32: 1210 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1211 // CHECK7-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1 1212 // CHECK7-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1213 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]] 1214 // CHECK7: omp.inner.for.end34: 1215 // CHECK7-NEXT: store i32 123, i32* [[I23]], align 4 1216 // CHECK7-NEXT: [[A35:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1217 // CHECK7-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A35]], i32 0, i32 0 1218 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX36]], align 4 1219 // CHECK7-NEXT: ret i32 [[TMP18]] 1220 // 1221 // 1222 // CHECK9-LABEL: define {{[^@]+}}@main 1223 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1224 // CHECK9-NEXT: entry: 1225 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1226 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1227 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 1228 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1229 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1230 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1231 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1232 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 1233 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 1234 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 1235 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 1236 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1237 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1238 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1239 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 1240 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 1241 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 1242 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 1243 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 1244 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 1245 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1246 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 1247 // CHECK9-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 1248 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [3 x i8*], align 8 1249 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [3 x i8*], align 8 1250 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [3 x i8*], align 8 1251 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [3 x i64], align 8 1252 // CHECK9-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 1253 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 1254 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 1255 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1256 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1257 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 1258 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 1259 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1260 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1261 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1262 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 1263 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1264 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1265 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 1266 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1267 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1268 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 1269 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 1270 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1271 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 1272 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1273 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1274 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 1275 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1276 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1277 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 1278 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1279 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1280 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1281 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1282 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 1283 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1284 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1285 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 1286 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1287 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1288 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1289 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 1290 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 1291 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1292 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 1293 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 1294 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1295 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 1296 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1297 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1298 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1299 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1300 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1301 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 1302 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 1303 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1304 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 1305 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1306 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1307 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1308 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1309 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 1310 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 1311 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1312 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1313 // CHECK9-NEXT: store i32 1, i32* [[TMP30]], align 4 1314 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1315 // CHECK9-NEXT: store i32 3, i32* [[TMP31]], align 4 1316 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1317 // CHECK9-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8 1318 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1319 // CHECK9-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8 1320 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1321 // CHECK9-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8 1322 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1323 // CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8 1324 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1325 // CHECK9-NEXT: store i8** null, i8*** [[TMP36]], align 8 1326 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1327 // CHECK9-NEXT: store i8** null, i8*** [[TMP37]], align 8 1328 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1329 // CHECK9-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8 1330 // CHECK9-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1331 // CHECK9-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 1332 // CHECK9-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1333 // CHECK9: omp_offload.failed: 1334 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1335 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1336 // CHECK9: omp_offload.cont: 1337 // CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4 1338 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 1339 // CHECK9-NEXT: store i32 [[TMP41]], i32* [[CONV4]], align 4 1340 // CHECK9-NEXT: [[TMP42:%.*]] = load i64, i64* [[N_CASTED3]], align 8 1341 // CHECK9-NEXT: [[TMP43:%.*]] = mul nuw i64 [[TMP1]], 4 1342 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 1343 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP44]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 1344 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1345 // CHECK9-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 1346 // CHECK9-NEXT: store i64 [[TMP42]], i64* [[TMP46]], align 8 1347 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1348 // CHECK9-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 1349 // CHECK9-NEXT: store i64 [[TMP42]], i64* [[TMP48]], align 8 1350 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 1351 // CHECK9-NEXT: store i8* null, i8** [[TMP49]], align 8 1352 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1353 // CHECK9-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64* 1354 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP51]], align 8 1355 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1356 // CHECK9-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64* 1357 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP53]], align 8 1358 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 1359 // CHECK9-NEXT: store i8* null, i8** [[TMP54]], align 8 1360 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 1361 // CHECK9-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32** 1362 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP56]], align 8 1363 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 1364 // CHECK9-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32** 1365 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP58]], align 8 1366 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 1367 // CHECK9-NEXT: store i64 [[TMP43]], i64* [[TMP59]], align 8 1368 // CHECK9-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 1369 // CHECK9-NEXT: store i8* null, i8** [[TMP60]], align 8 1370 // CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1371 // CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1372 // CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 1373 // CHECK9-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4 1374 // CHECK9-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1375 // CHECK9-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1376 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP65]], 0 1377 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 1378 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 1379 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 1380 // CHECK9-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 1381 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP66]], 1 1382 // CHECK9-NEXT: [[TMP67:%.*]] = zext i32 [[ADD15]] to i64 1383 // CHECK9-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1384 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 0 1385 // CHECK9-NEXT: store i32 1, i32* [[TMP68]], align 4 1386 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 1 1387 // CHECK9-NEXT: store i32 3, i32* [[TMP69]], align 4 1388 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 2 1389 // CHECK9-NEXT: store i8** [[TMP61]], i8*** [[TMP70]], align 8 1390 // CHECK9-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 3 1391 // CHECK9-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 8 1392 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 4 1393 // CHECK9-NEXT: store i64* [[TMP63]], i64** [[TMP72]], align 8 1394 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 5 1395 // CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP73]], align 8 1396 // CHECK9-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 6 1397 // CHECK9-NEXT: store i8** null, i8*** [[TMP74]], align 8 1398 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 7 1399 // CHECK9-NEXT: store i8** null, i8*** [[TMP75]], align 8 1400 // CHECK9-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 8 1401 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8 1402 // CHECK9-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]]) 1403 // CHECK9-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0 1404 // CHECK9-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 1405 // CHECK9: omp_offload.failed17: 1406 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP42]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 1407 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT18]] 1408 // CHECK9: omp_offload.cont18: 1409 // CHECK9-NEXT: [[TMP79:%.*]] = load i32, i32* [[N]], align 4 1410 // CHECK9-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 1411 // CHECK9-NEXT: store i32 [[TMP79]], i32* [[CONV20]], align 4 1412 // CHECK9-NEXT: [[TMP80:%.*]] = load i64, i64* [[N_CASTED19]], align 8 1413 // CHECK9-NEXT: [[TMP81:%.*]] = mul nuw i64 [[TMP1]], 4 1414 // CHECK9-NEXT: [[TMP82:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES24]] to i8* 1415 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP82]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.5 to i8*), i64 24, i1 false) 1416 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 1417 // CHECK9-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i64* 1418 // CHECK9-NEXT: store i64 [[TMP80]], i64* [[TMP84]], align 8 1419 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 1420 // CHECK9-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i64* 1421 // CHECK9-NEXT: store i64 [[TMP80]], i64* [[TMP86]], align 8 1422 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 1423 // CHECK9-NEXT: store i8* null, i8** [[TMP87]], align 8 1424 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 1425 // CHECK9-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64* 1426 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP89]], align 8 1427 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 1428 // CHECK9-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i64* 1429 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP91]], align 8 1430 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 1431 // CHECK9-NEXT: store i8* null, i8** [[TMP92]], align 8 1432 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 1433 // CHECK9-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32** 1434 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP94]], align 8 1435 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 1436 // CHECK9-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32** 1437 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP96]], align 8 1438 // CHECK9-NEXT: [[TMP97:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2 1439 // CHECK9-NEXT: store i64 [[TMP81]], i64* [[TMP97]], align 8 1440 // CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 1441 // CHECK9-NEXT: store i8* null, i8** [[TMP98]], align 8 1442 // CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 1443 // CHECK9-NEXT: [[TMP100:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 1444 // CHECK9-NEXT: [[TMP101:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 1445 // CHECK9-NEXT: [[TMP102:%.*]] = load i32, i32* [[N]], align 4 1446 // CHECK9-NEXT: store i32 [[TMP102]], i32* [[DOTCAPTURE_EXPR_26]], align 4 1447 // CHECK9-NEXT: [[TMP103:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 1448 // CHECK9-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP103]], 0 1449 // CHECK9-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 1450 // CHECK9-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 1451 // CHECK9-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 1452 // CHECK9-NEXT: [[TMP104:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 1453 // CHECK9-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP104]], 1 1454 // CHECK9-NEXT: [[TMP105:%.*]] = zext i32 [[ADD31]] to i64 1455 // CHECK9-NEXT: [[KERNEL_ARGS32:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1456 // CHECK9-NEXT: [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS32]], i32 0, i32 0 1457 // CHECK9-NEXT: store i32 1, i32* [[TMP106]], align 4 1458 // CHECK9-NEXT: [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS32]], i32 0, i32 1 1459 // CHECK9-NEXT: store i32 3, i32* [[TMP107]], align 4 1460 // CHECK9-NEXT: [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS32]], i32 0, i32 2 1461 // CHECK9-NEXT: store i8** [[TMP99]], i8*** [[TMP108]], align 8 1462 // CHECK9-NEXT: [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS32]], i32 0, i32 3 1463 // CHECK9-NEXT: store i8** [[TMP100]], i8*** [[TMP109]], align 8 1464 // CHECK9-NEXT: [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS32]], i32 0, i32 4 1465 // CHECK9-NEXT: store i64* [[TMP101]], i64** [[TMP110]], align 8 1466 // CHECK9-NEXT: [[TMP111:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS32]], i32 0, i32 5 1467 // CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP111]], align 8 1468 // CHECK9-NEXT: [[TMP112:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS32]], i32 0, i32 6 1469 // CHECK9-NEXT: store i8** null, i8*** [[TMP112]], align 8 1470 // CHECK9-NEXT: [[TMP113:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS32]], i32 0, i32 7 1471 // CHECK9-NEXT: store i8** null, i8*** [[TMP113]], align 8 1472 // CHECK9-NEXT: [[TMP114:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS32]], i32 0, i32 8 1473 // CHECK9-NEXT: store i64 [[TMP105]], i64* [[TMP114]], align 8 1474 // CHECK9-NEXT: [[TMP115:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS32]]) 1475 // CHECK9-NEXT: [[TMP116:%.*]] = icmp ne i32 [[TMP115]], 0 1476 // CHECK9-NEXT: br i1 [[TMP116]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 1477 // CHECK9: omp_offload.failed33: 1478 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP80]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 1479 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT34]] 1480 // CHECK9: omp_offload.cont34: 1481 // CHECK9-NEXT: [[TMP117:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1482 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP117]]) 1483 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1484 // CHECK9-NEXT: [[TMP118:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1485 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP118]]) 1486 // CHECK9-NEXT: [[TMP119:%.*]] = load i32, i32* [[RETVAL]], align 4 1487 // CHECK9-NEXT: ret i32 [[TMP119]] 1488 // 1489 // 1490 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100 1491 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1492 // CHECK9-NEXT: entry: 1493 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1494 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1495 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1496 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1497 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1498 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1499 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1500 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1501 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1502 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1503 // CHECK9-NEXT: ret void 1504 // 1505 // 1506 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1507 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1508 // CHECK9-NEXT: entry: 1509 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1510 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1511 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1512 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1513 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1514 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1515 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1516 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1517 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1518 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1519 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1520 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1521 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1522 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1523 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1524 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1525 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1526 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1527 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1528 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1529 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1530 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1531 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1532 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1533 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1534 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1535 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1536 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1537 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1538 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1539 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1540 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1541 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1542 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1543 // CHECK9: omp.precond.then: 1544 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1545 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1546 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1547 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1548 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1549 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1550 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1551 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1552 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1553 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1554 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1555 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1556 // CHECK9: cond.true: 1557 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1558 // CHECK9-NEXT: br label [[COND_END:%.*]] 1559 // CHECK9: cond.false: 1560 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1561 // CHECK9-NEXT: br label [[COND_END]] 1562 // CHECK9: cond.end: 1563 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1564 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1565 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1566 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1567 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1568 // CHECK9: omp.inner.for.cond: 1569 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1570 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1571 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1572 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1573 // CHECK9: omp.inner.for.body: 1574 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1575 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1576 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1577 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !9 1578 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !9 1579 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1580 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1581 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1582 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1583 // CHECK9: omp.body.continue: 1584 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1585 // CHECK9: omp.inner.for.inc: 1586 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1587 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 1588 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1589 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1590 // CHECK9: omp.inner.for.end: 1591 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1592 // CHECK9: omp.loop.exit: 1593 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1594 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1595 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1596 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1597 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1598 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1599 // CHECK9: .omp.final.then: 1600 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1601 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0 1602 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1603 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1604 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1605 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 1606 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1607 // CHECK9: .omp.final.done: 1608 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1609 // CHECK9: omp.precond.end: 1610 // CHECK9-NEXT: ret void 1611 // 1612 // 1613 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 1614 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1615 // CHECK9-NEXT: entry: 1616 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1617 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1618 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1619 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1620 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1621 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1622 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1623 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1624 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1625 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1626 // CHECK9-NEXT: ret void 1627 // 1628 // 1629 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1630 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1631 // CHECK9-NEXT: entry: 1632 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1633 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1634 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1635 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1636 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1637 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1638 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1639 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1640 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1641 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1642 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1643 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1644 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1645 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1646 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1647 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1648 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1649 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1650 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1651 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1652 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1653 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1654 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1655 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1656 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1657 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1658 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1659 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1660 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1661 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1662 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1663 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1664 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1665 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1666 // CHECK9: omp.precond.then: 1667 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1668 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1669 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1670 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1671 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1672 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1673 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1674 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1675 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1676 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1677 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1678 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1679 // CHECK9: cond.true: 1680 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1681 // CHECK9-NEXT: br label [[COND_END:%.*]] 1682 // CHECK9: cond.false: 1683 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1684 // CHECK9-NEXT: br label [[COND_END]] 1685 // CHECK9: cond.end: 1686 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1687 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1688 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1689 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1690 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1691 // CHECK9: omp.inner.for.cond: 1692 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1693 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 1694 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1695 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1696 // CHECK9: omp.inner.for.body: 1697 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1698 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1699 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1700 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15 1701 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15 1702 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1703 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1704 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 1705 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1706 // CHECK9: omp.body.continue: 1707 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1708 // CHECK9: omp.inner.for.inc: 1709 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1710 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 1711 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1712 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1713 // CHECK9: omp.inner.for.end: 1714 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1715 // CHECK9: omp.loop.exit: 1716 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1717 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1718 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1719 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1720 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1721 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1722 // CHECK9: .omp.final.then: 1723 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1724 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0 1725 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1726 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1727 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1728 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 1729 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1730 // CHECK9: .omp.final.done: 1731 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1732 // CHECK9: omp.precond.end: 1733 // CHECK9-NEXT: ret void 1734 // 1735 // 1736 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110 1737 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1738 // CHECK9-NEXT: entry: 1739 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1740 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1741 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1742 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1743 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1744 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1745 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1746 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1747 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1748 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1749 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1750 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1751 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1752 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1753 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1754 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 1755 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1756 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 1757 // CHECK9-NEXT: ret void 1758 // 1759 // 1760 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 1761 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1762 // CHECK9-NEXT: entry: 1763 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1764 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1765 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1766 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1767 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1768 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1769 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1770 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1771 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1772 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1773 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1774 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1775 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1776 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1777 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1778 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 1779 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1780 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1781 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1782 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1783 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1784 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1785 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1786 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1787 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1788 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1789 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1790 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1791 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1792 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1793 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1794 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1795 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1796 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1797 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1798 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1799 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1800 // CHECK9: omp.precond.then: 1801 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1802 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1803 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1804 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1805 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1806 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 1807 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1808 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1809 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 1810 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1811 // CHECK9: omp.dispatch.cond: 1812 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1813 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1814 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1815 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1816 // CHECK9: cond.true: 1817 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1818 // CHECK9-NEXT: br label [[COND_END:%.*]] 1819 // CHECK9: cond.false: 1820 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1821 // CHECK9-NEXT: br label [[COND_END]] 1822 // CHECK9: cond.end: 1823 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1824 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1825 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1826 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1827 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1828 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1829 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1830 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1831 // CHECK9: omp.dispatch.body: 1832 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1833 // CHECK9: omp.inner.for.cond: 1834 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1835 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 1836 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1837 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1838 // CHECK9: omp.inner.for.body: 1839 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1840 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1841 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1842 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !18 1843 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !18 1844 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 1845 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1846 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 1847 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1848 // CHECK9: omp.body.continue: 1849 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1850 // CHECK9: omp.inner.for.inc: 1851 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1852 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 1853 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1854 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 1855 // CHECK9: omp.inner.for.end: 1856 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1857 // CHECK9: omp.dispatch.inc: 1858 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1859 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1860 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 1861 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 1862 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1863 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1864 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 1865 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 1866 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 1867 // CHECK9: omp.dispatch.end: 1868 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1869 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 1870 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 1871 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1872 // CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 1873 // CHECK9-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1874 // CHECK9: .omp.final.then: 1875 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1876 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP30]], 0 1877 // CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1878 // CHECK9-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 1879 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 1880 // CHECK9-NEXT: store i32 [[ADD14]], i32* [[I4]], align 4 1881 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1882 // CHECK9: .omp.final.done: 1883 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1884 // CHECK9: omp.precond.end: 1885 // CHECK9-NEXT: ret void 1886 // 1887 // 1888 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 1889 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1890 // CHECK9-NEXT: entry: 1891 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1892 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 1893 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1894 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1895 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1896 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1897 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 1898 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 1899 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 1900 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1901 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x i8*], align 8 1902 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x i8*], align 8 1903 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x i8*], align 8 1904 // CHECK9-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 1905 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1906 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1907 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 1908 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 1909 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1910 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 1911 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 1912 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1913 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 1914 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1915 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1916 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1917 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1918 // CHECK9-NEXT: store i32 1, i32* [[TMP7]], align 4 1919 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1920 // CHECK9-NEXT: store i32 1, i32* [[TMP8]], align 4 1921 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1922 // CHECK9-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8 1923 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1924 // CHECK9-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8 1925 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1926 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP11]], align 8 1927 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1928 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP12]], align 8 1929 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1930 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8 1931 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1932 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8 1933 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1934 // CHECK9-NEXT: store i64 10, i64* [[TMP15]], align 8 1935 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1936 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1937 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1938 // CHECK9: omp_offload.failed: 1939 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]] 1940 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1941 // CHECK9: omp_offload.cont: 1942 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1943 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 1944 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 1945 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1946 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 1947 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 1948 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 1949 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1950 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1951 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1952 // CHECK9-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1953 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0 1954 // CHECK9-NEXT: store i32 1, i32* [[TMP25]], align 4 1955 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1 1956 // CHECK9-NEXT: store i32 1, i32* [[TMP26]], align 4 1957 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2 1958 // CHECK9-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8 1959 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3 1960 // CHECK9-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8 1961 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4 1962 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64** [[TMP29]], align 8 1963 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5 1964 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i64** [[TMP30]], align 8 1965 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6 1966 // CHECK9-NEXT: store i8** null, i8*** [[TMP31]], align 8 1967 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7 1968 // CHECK9-NEXT: store i8** null, i8*** [[TMP32]], align 8 1969 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8 1970 // CHECK9-NEXT: store i64 10, i64* [[TMP33]], align 8 1971 // CHECK9-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]]) 1972 // CHECK9-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1973 // CHECK9-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 1974 // CHECK9: omp_offload.failed6: 1975 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 1976 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]] 1977 // CHECK9: omp_offload.cont7: 1978 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 1979 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 1980 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 1981 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 1982 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [10 x i32]** 1983 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP39]], align 8 1984 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 1985 // CHECK9-NEXT: store i8* null, i8** [[TMP40]], align 8 1986 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 1987 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 1988 // CHECK9-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1989 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0 1990 // CHECK9-NEXT: store i32 1, i32* [[TMP43]], align 4 1991 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1 1992 // CHECK9-NEXT: store i32 1, i32* [[TMP44]], align 4 1993 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2 1994 // CHECK9-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8 1995 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3 1996 // CHECK9-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8 1997 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4 1998 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64** [[TMP47]], align 8 1999 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5 2000 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i64** [[TMP48]], align 8 2001 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6 2002 // CHECK9-NEXT: store i8** null, i8*** [[TMP49]], align 8 2003 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7 2004 // CHECK9-NEXT: store i8** null, i8*** [[TMP50]], align 8 2005 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8 2006 // CHECK9-NEXT: store i64 10, i64* [[TMP51]], align 8 2007 // CHECK9-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]]) 2008 // CHECK9-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0 2009 // CHECK9-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 2010 // CHECK9: omp_offload.failed13: 2011 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]] 2012 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT14]] 2013 // CHECK9: omp_offload.cont14: 2014 // CHECK9-NEXT: ret i32 0 2015 // 2016 // 2017 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79 2018 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2019 // CHECK9-NEXT: entry: 2020 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2021 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2022 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2023 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2024 // CHECK9-NEXT: ret void 2025 // 2026 // 2027 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 2028 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2029 // CHECK9-NEXT: entry: 2030 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2031 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2032 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2033 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2034 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2035 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2036 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2037 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2038 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2039 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2040 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2041 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2042 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2043 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2044 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2045 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2046 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2047 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2048 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2049 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2050 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2051 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2052 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2053 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2054 // CHECK9: cond.true: 2055 // CHECK9-NEXT: br label [[COND_END:%.*]] 2056 // CHECK9: cond.false: 2057 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2058 // CHECK9-NEXT: br label [[COND_END]] 2059 // CHECK9: cond.end: 2060 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2061 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2062 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2063 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2064 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2065 // CHECK9: omp.inner.for.cond: 2066 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 2067 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 2068 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2069 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2070 // CHECK9: omp.inner.for.body: 2071 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 2072 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2073 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2074 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 2075 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 2076 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2077 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2078 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 2079 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2080 // CHECK9: omp.body.continue: 2081 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2082 // CHECK9: omp.inner.for.inc: 2083 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 2084 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2085 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 2086 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 2087 // CHECK9: omp.inner.for.end: 2088 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2089 // CHECK9: omp.loop.exit: 2090 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2091 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2092 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2093 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2094 // CHECK9: .omp.final.then: 2095 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 2096 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2097 // CHECK9: .omp.final.done: 2098 // CHECK9-NEXT: ret void 2099 // 2100 // 2101 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 2102 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2103 // CHECK9-NEXT: entry: 2104 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2105 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2106 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2107 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2108 // CHECK9-NEXT: ret void 2109 // 2110 // 2111 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 2112 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2113 // CHECK9-NEXT: entry: 2114 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2115 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2116 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2117 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2118 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2119 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2120 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2121 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2122 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2123 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2124 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2125 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2126 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2127 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2128 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2129 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2130 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2131 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2132 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2133 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2134 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2135 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2136 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2137 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2138 // CHECK9: cond.true: 2139 // CHECK9-NEXT: br label [[COND_END:%.*]] 2140 // CHECK9: cond.false: 2141 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2142 // CHECK9-NEXT: br label [[COND_END]] 2143 // CHECK9: cond.end: 2144 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2145 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2146 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2147 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2148 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2149 // CHECK9: omp.inner.for.cond: 2150 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 2151 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 2152 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2153 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2154 // CHECK9: omp.inner.for.body: 2155 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 2156 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2157 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2158 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 2159 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 2160 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2161 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2162 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 2163 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2164 // CHECK9: omp.body.continue: 2165 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2166 // CHECK9: omp.inner.for.inc: 2167 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 2168 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2169 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 2170 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 2171 // CHECK9: omp.inner.for.end: 2172 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2173 // CHECK9: omp.loop.exit: 2174 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2175 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2176 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2177 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2178 // CHECK9: .omp.final.then: 2179 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 2180 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2181 // CHECK9: .omp.final.done: 2182 // CHECK9-NEXT: ret void 2183 // 2184 // 2185 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89 2186 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2187 // CHECK9-NEXT: entry: 2188 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2189 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2190 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2191 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2192 // CHECK9-NEXT: ret void 2193 // 2194 // 2195 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13 2196 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2197 // CHECK9-NEXT: entry: 2198 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2199 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2200 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2201 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2202 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2203 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2204 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2205 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2206 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2207 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2208 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2209 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2210 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2211 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2212 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2213 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2214 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2215 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2216 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2217 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2218 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 2219 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2220 // CHECK9: omp.dispatch.cond: 2221 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2222 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2223 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2224 // CHECK9: cond.true: 2225 // CHECK9-NEXT: br label [[COND_END:%.*]] 2226 // CHECK9: cond.false: 2227 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2228 // CHECK9-NEXT: br label [[COND_END]] 2229 // CHECK9: cond.end: 2230 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2231 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2232 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2233 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2234 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2235 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2236 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2237 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2238 // CHECK9: omp.dispatch.body: 2239 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2240 // CHECK9: omp.inner.for.cond: 2241 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2242 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27 2243 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2244 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2245 // CHECK9: omp.inner.for.body: 2246 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2247 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2248 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2249 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27 2250 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27 2251 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2252 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2253 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27 2254 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2255 // CHECK9: omp.body.continue: 2256 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2257 // CHECK9: omp.inner.for.inc: 2258 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2259 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2260 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2261 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 2262 // CHECK9: omp.inner.for.end: 2263 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2264 // CHECK9: omp.dispatch.inc: 2265 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2266 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2267 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2268 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 2269 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2270 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2271 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 2272 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 2273 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 2274 // CHECK9: omp.dispatch.end: 2275 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2276 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2277 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2278 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2279 // CHECK9: .omp.final.then: 2280 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 2281 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2282 // CHECK9: .omp.final.done: 2283 // CHECK9-NEXT: ret void 2284 // 2285 // 2286 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2287 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 2288 // CHECK9-NEXT: entry: 2289 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2290 // CHECK9-NEXT: ret void 2291 // 2292 // 2293 // CHECK11-LABEL: define {{[^@]+}}@main 2294 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2295 // CHECK11-NEXT: entry: 2296 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2297 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2298 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 2299 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2300 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2301 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2302 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2303 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 2304 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 2305 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 2306 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 2307 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2308 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2309 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2310 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 2311 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 2312 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 2313 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 2314 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 2315 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 2316 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 2317 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 2318 // CHECK11-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4 2319 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [3 x i8*], align 4 2320 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [3 x i8*], align 4 2321 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [3 x i8*], align 4 2322 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [3 x i64], align 4 2323 // CHECK11-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 2324 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 2325 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 2326 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2327 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2328 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 2329 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 2330 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2331 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2332 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2333 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2334 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2335 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 2336 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2337 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2338 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 2339 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 2340 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2341 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 2342 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2343 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2344 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 2345 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2346 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2347 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2348 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2349 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2350 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2351 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2352 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 2353 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2354 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2355 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 2356 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2357 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2358 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2359 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 2360 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 2361 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2362 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 2363 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 2364 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2365 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 2366 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2367 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 2368 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2369 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2370 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2371 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 2372 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 2373 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2374 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 2375 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2376 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2377 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2378 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2379 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 2380 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 2381 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2382 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 2383 // CHECK11-NEXT: store i32 1, i32* [[TMP30]], align 4 2384 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 2385 // CHECK11-NEXT: store i32 3, i32* [[TMP31]], align 4 2386 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 2387 // CHECK11-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4 2388 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 2389 // CHECK11-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4 2390 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 2391 // CHECK11-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4 2392 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 2393 // CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4 2394 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 2395 // CHECK11-NEXT: store i8** null, i8*** [[TMP36]], align 4 2396 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 2397 // CHECK11-NEXT: store i8** null, i8*** [[TMP37]], align 4 2398 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 2399 // CHECK11-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8 2400 // CHECK11-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 2401 // CHECK11-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 2402 // CHECK11-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2403 // CHECK11: omp_offload.failed: 2404 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2405 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2406 // CHECK11: omp_offload.cont: 2407 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4 2408 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[N_CASTED3]], align 4 2409 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_CASTED3]], align 4 2410 // CHECK11-NEXT: [[TMP43:%.*]] = mul nuw i32 [[TMP0]], 4 2411 // CHECK11-NEXT: [[TMP44:%.*]] = sext i32 [[TMP43]] to i64 2412 // CHECK11-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 2413 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 2414 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 2415 // CHECK11-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32* 2416 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[TMP47]], align 4 2417 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 2418 // CHECK11-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32* 2419 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[TMP49]], align 4 2420 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 2421 // CHECK11-NEXT: store i8* null, i8** [[TMP50]], align 4 2422 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 2423 // CHECK11-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32* 2424 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP52]], align 4 2425 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 2426 // CHECK11-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32* 2427 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP54]], align 4 2428 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 2429 // CHECK11-NEXT: store i8* null, i8** [[TMP55]], align 4 2430 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 2431 // CHECK11-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32** 2432 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP57]], align 4 2433 // CHECK11-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 2434 // CHECK11-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i32** 2435 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP59]], align 4 2436 // CHECK11-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 2437 // CHECK11-NEXT: store i64 [[TMP44]], i64* [[TMP60]], align 4 2438 // CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 2439 // CHECK11-NEXT: store i8* null, i8** [[TMP61]], align 4 2440 // CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 2441 // CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 2442 // CHECK11-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 2443 // CHECK11-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4 2444 // CHECK11-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR_9]], align 4 2445 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 2446 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP66]], 0 2447 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 2448 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 2449 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 2450 // CHECK11-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 2451 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP67]], 1 2452 // CHECK11-NEXT: [[TMP68:%.*]] = zext i32 [[ADD14]] to i64 2453 // CHECK11-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2454 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0 2455 // CHECK11-NEXT: store i32 1, i32* [[TMP69]], align 4 2456 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1 2457 // CHECK11-NEXT: store i32 3, i32* [[TMP70]], align 4 2458 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2 2459 // CHECK11-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 4 2460 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3 2461 // CHECK11-NEXT: store i8** [[TMP63]], i8*** [[TMP72]], align 4 2462 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4 2463 // CHECK11-NEXT: store i64* [[TMP64]], i64** [[TMP73]], align 4 2464 // CHECK11-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5 2465 // CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP74]], align 4 2466 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6 2467 // CHECK11-NEXT: store i8** null, i8*** [[TMP75]], align 4 2468 // CHECK11-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7 2469 // CHECK11-NEXT: store i8** null, i8*** [[TMP76]], align 4 2470 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8 2471 // CHECK11-NEXT: store i64 [[TMP68]], i64* [[TMP77]], align 8 2472 // CHECK11-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]]) 2473 // CHECK11-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 2474 // CHECK11-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 2475 // CHECK11: omp_offload.failed16: 2476 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP42]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 2477 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT17]] 2478 // CHECK11: omp_offload.cont17: 2479 // CHECK11-NEXT: [[TMP80:%.*]] = load i32, i32* [[N]], align 4 2480 // CHECK11-NEXT: store i32 [[TMP80]], i32* [[N_CASTED18]], align 4 2481 // CHECK11-NEXT: [[TMP81:%.*]] = load i32, i32* [[N_CASTED18]], align 4 2482 // CHECK11-NEXT: [[TMP82:%.*]] = mul nuw i32 [[TMP0]], 4 2483 // CHECK11-NEXT: [[TMP83:%.*]] = sext i32 [[TMP82]] to i64 2484 // CHECK11-NEXT: [[TMP84:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES22]] to i8* 2485 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP84]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.5 to i8*), i32 24, i1 false) 2486 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 2487 // CHECK11-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32* 2488 // CHECK11-NEXT: store i32 [[TMP81]], i32* [[TMP86]], align 4 2489 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 2490 // CHECK11-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i32* 2491 // CHECK11-NEXT: store i32 [[TMP81]], i32* [[TMP88]], align 4 2492 // CHECK11-NEXT: [[TMP89:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 2493 // CHECK11-NEXT: store i8* null, i8** [[TMP89]], align 4 2494 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1 2495 // CHECK11-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32* 2496 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP91]], align 4 2497 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1 2498 // CHECK11-NEXT: [[TMP93:%.*]] = bitcast i8** [[TMP92]] to i32* 2499 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP93]], align 4 2500 // CHECK11-NEXT: [[TMP94:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1 2501 // CHECK11-NEXT: store i8* null, i8** [[TMP94]], align 4 2502 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2 2503 // CHECK11-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32** 2504 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP96]], align 4 2505 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2 2506 // CHECK11-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to i32** 2507 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP98]], align 4 2508 // CHECK11-NEXT: [[TMP99:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2 2509 // CHECK11-NEXT: store i64 [[TMP83]], i64* [[TMP99]], align 4 2510 // CHECK11-NEXT: [[TMP100:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2 2511 // CHECK11-NEXT: store i8* null, i8** [[TMP100]], align 4 2512 // CHECK11-NEXT: [[TMP101:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 2513 // CHECK11-NEXT: [[TMP102:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 2514 // CHECK11-NEXT: [[TMP103:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0 2515 // CHECK11-NEXT: [[TMP104:%.*]] = load i32, i32* [[N]], align 4 2516 // CHECK11-NEXT: store i32 [[TMP104]], i32* [[DOTCAPTURE_EXPR_24]], align 4 2517 // CHECK11-NEXT: [[TMP105:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 2518 // CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP105]], 0 2519 // CHECK11-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 2520 // CHECK11-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 2521 // CHECK11-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 2522 // CHECK11-NEXT: [[TMP106:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 2523 // CHECK11-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP106]], 1 2524 // CHECK11-NEXT: [[TMP107:%.*]] = zext i32 [[ADD29]] to i64 2525 // CHECK11-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2526 // CHECK11-NEXT: [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 0 2527 // CHECK11-NEXT: store i32 1, i32* [[TMP108]], align 4 2528 // CHECK11-NEXT: [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 1 2529 // CHECK11-NEXT: store i32 3, i32* [[TMP109]], align 4 2530 // CHECK11-NEXT: [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 2 2531 // CHECK11-NEXT: store i8** [[TMP101]], i8*** [[TMP110]], align 4 2532 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 3 2533 // CHECK11-NEXT: store i8** [[TMP102]], i8*** [[TMP111]], align 4 2534 // CHECK11-NEXT: [[TMP112:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 4 2535 // CHECK11-NEXT: store i64* [[TMP103]], i64** [[TMP112]], align 4 2536 // CHECK11-NEXT: [[TMP113:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 5 2537 // CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP113]], align 4 2538 // CHECK11-NEXT: [[TMP114:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 6 2539 // CHECK11-NEXT: store i8** null, i8*** [[TMP114]], align 4 2540 // CHECK11-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 7 2541 // CHECK11-NEXT: store i8** null, i8*** [[TMP115]], align 4 2542 // CHECK11-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 8 2543 // CHECK11-NEXT: store i64 [[TMP107]], i64* [[TMP116]], align 8 2544 // CHECK11-NEXT: [[TMP117:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]]) 2545 // CHECK11-NEXT: [[TMP118:%.*]] = icmp ne i32 [[TMP117]], 0 2546 // CHECK11-NEXT: br i1 [[TMP118]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]] 2547 // CHECK11: omp_offload.failed31: 2548 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP81]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 2549 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT32]] 2550 // CHECK11: omp_offload.cont32: 2551 // CHECK11-NEXT: [[TMP119:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2552 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP119]]) 2553 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2554 // CHECK11-NEXT: [[TMP120:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2555 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP120]]) 2556 // CHECK11-NEXT: [[TMP121:%.*]] = load i32, i32* [[RETVAL]], align 4 2557 // CHECK11-NEXT: ret i32 [[TMP121]] 2558 // 2559 // 2560 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100 2561 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2562 // CHECK11-NEXT: entry: 2563 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2564 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2565 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2566 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2567 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2568 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2569 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2570 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2571 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2572 // CHECK11-NEXT: ret void 2573 // 2574 // 2575 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2576 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2577 // CHECK11-NEXT: entry: 2578 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2579 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2580 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2581 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2582 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2583 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2584 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2585 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2586 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2587 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2588 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2589 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2590 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2591 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2592 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2593 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2594 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2595 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2596 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2597 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2598 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2599 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2600 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2601 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2602 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2603 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2604 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2605 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2606 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2607 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2608 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2609 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2610 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2611 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2612 // CHECK11: omp.precond.then: 2613 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2614 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2615 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2616 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2617 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2618 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2619 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2620 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2621 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2622 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2623 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2624 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2625 // CHECK11: cond.true: 2626 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2627 // CHECK11-NEXT: br label [[COND_END:%.*]] 2628 // CHECK11: cond.false: 2629 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2630 // CHECK11-NEXT: br label [[COND_END]] 2631 // CHECK11: cond.end: 2632 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2633 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2634 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2635 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2636 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2637 // CHECK11: omp.inner.for.cond: 2638 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2639 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 2640 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2641 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2642 // CHECK11: omp.inner.for.body: 2643 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2644 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2645 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2646 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !10 2647 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !10 2648 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 2649 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 2650 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2651 // CHECK11: omp.body.continue: 2652 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2653 // CHECK11: omp.inner.for.inc: 2654 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2655 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2656 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2657 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 2658 // CHECK11: omp.inner.for.end: 2659 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2660 // CHECK11: omp.loop.exit: 2661 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2662 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2663 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2664 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2665 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2666 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2667 // CHECK11: .omp.final.then: 2668 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2669 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0 2670 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2671 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 2672 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 2673 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 2674 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2675 // CHECK11: .omp.final.done: 2676 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2677 // CHECK11: omp.precond.end: 2678 // CHECK11-NEXT: ret void 2679 // 2680 // 2681 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 2682 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2683 // CHECK11-NEXT: entry: 2684 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2685 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2686 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2687 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2688 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2689 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2690 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2691 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2692 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2693 // CHECK11-NEXT: ret void 2694 // 2695 // 2696 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2697 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2698 // CHECK11-NEXT: entry: 2699 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2700 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2701 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2702 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2703 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2704 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2705 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2706 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2707 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2708 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2709 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2710 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2711 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2712 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2713 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2714 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2715 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2716 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2717 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2718 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2719 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2720 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2721 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2722 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2723 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2724 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2725 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2726 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2727 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2728 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2729 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2730 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2731 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2732 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2733 // CHECK11: omp.precond.then: 2734 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2735 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2736 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2737 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2738 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2739 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2740 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2741 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2742 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2743 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2744 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2745 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2746 // CHECK11: cond.true: 2747 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2748 // CHECK11-NEXT: br label [[COND_END:%.*]] 2749 // CHECK11: cond.false: 2750 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2751 // CHECK11-NEXT: br label [[COND_END]] 2752 // CHECK11: cond.end: 2753 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2754 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2755 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2756 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2757 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2758 // CHECK11: omp.inner.for.cond: 2759 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2760 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 2761 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2762 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2763 // CHECK11: omp.inner.for.body: 2764 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2765 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2766 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2767 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 2768 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 2769 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 2770 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 2771 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2772 // CHECK11: omp.body.continue: 2773 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2774 // CHECK11: omp.inner.for.inc: 2775 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2776 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2777 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2778 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 2779 // CHECK11: omp.inner.for.end: 2780 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2781 // CHECK11: omp.loop.exit: 2782 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2783 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2784 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2785 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2786 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2787 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2788 // CHECK11: .omp.final.then: 2789 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2790 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0 2791 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2792 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 2793 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 2794 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 2795 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2796 // CHECK11: .omp.final.done: 2797 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2798 // CHECK11: omp.precond.end: 2799 // CHECK11-NEXT: ret void 2800 // 2801 // 2802 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110 2803 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2804 // CHECK11-NEXT: entry: 2805 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2806 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2807 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2808 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2809 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 2810 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2811 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2812 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2813 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2814 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2815 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2816 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2817 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2818 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2819 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2820 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 2821 // CHECK11-NEXT: ret void 2822 // 2823 // 2824 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 2825 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2826 // CHECK11-NEXT: entry: 2827 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2828 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2829 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2830 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2831 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2832 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2833 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2834 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2835 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2836 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2837 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2838 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2839 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2840 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2841 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2842 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2843 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2844 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2845 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2846 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2847 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2848 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2849 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2850 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2851 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2852 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2853 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2854 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2855 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2856 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2857 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2858 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2859 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2860 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2861 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2862 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2863 // CHECK11: omp.precond.then: 2864 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2865 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2866 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2867 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2868 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2869 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2870 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2871 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2872 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 2873 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2874 // CHECK11: omp.dispatch.cond: 2875 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2876 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2877 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2878 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2879 // CHECK11: cond.true: 2880 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2881 // CHECK11-NEXT: br label [[COND_END:%.*]] 2882 // CHECK11: cond.false: 2883 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2884 // CHECK11-NEXT: br label [[COND_END]] 2885 // CHECK11: cond.end: 2886 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2887 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2888 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2889 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2890 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2891 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2892 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2893 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2894 // CHECK11: omp.dispatch.body: 2895 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2896 // CHECK11: omp.inner.for.cond: 2897 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2898 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 2899 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2900 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2901 // CHECK11: omp.inner.for.body: 2902 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2903 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 2904 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2905 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 2906 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 2907 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 2908 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 2909 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2910 // CHECK11: omp.body.continue: 2911 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2912 // CHECK11: omp.inner.for.inc: 2913 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2914 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 2915 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2916 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 2917 // CHECK11: omp.inner.for.end: 2918 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2919 // CHECK11: omp.dispatch.inc: 2920 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2921 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2922 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2923 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 2924 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2925 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2926 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 2927 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 2928 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 2929 // CHECK11: omp.dispatch.end: 2930 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2931 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 2932 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 2933 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2934 // CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 2935 // CHECK11-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2936 // CHECK11: .omp.final.then: 2937 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2938 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP30]], 0 2939 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 2940 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 2941 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 2942 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I4]], align 4 2943 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2944 // CHECK11: .omp.final.done: 2945 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2946 // CHECK11: omp.precond.end: 2947 // CHECK11-NEXT: ret void 2948 // 2949 // 2950 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 2951 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2952 // CHECK11-NEXT: entry: 2953 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2954 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 2955 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2956 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2957 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2958 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2959 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 2960 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 2961 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 2962 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2963 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x i8*], align 4 2964 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x i8*], align 4 2965 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x i8*], align 4 2966 // CHECK11-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 2967 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2968 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2969 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 2970 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 2971 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2972 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 2973 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 2974 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2975 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 2976 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2977 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2978 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2979 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 2980 // CHECK11-NEXT: store i32 1, i32* [[TMP7]], align 4 2981 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 2982 // CHECK11-NEXT: store i32 1, i32* [[TMP8]], align 4 2983 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 2984 // CHECK11-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4 2985 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 2986 // CHECK11-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4 2987 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 2988 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP11]], align 4 2989 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 2990 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP12]], align 4 2991 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 2992 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 4 2993 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 2994 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 4 2995 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 2996 // CHECK11-NEXT: store i64 10, i64* [[TMP15]], align 8 2997 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 2998 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2999 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3000 // CHECK11: omp_offload.failed: 3001 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]] 3002 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 3003 // CHECK11: omp_offload.cont: 3004 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3005 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 3006 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 3007 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3008 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 3009 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 3010 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 3011 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 3012 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3013 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3014 // CHECK11-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3015 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0 3016 // CHECK11-NEXT: store i32 1, i32* [[TMP25]], align 4 3017 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1 3018 // CHECK11-NEXT: store i32 1, i32* [[TMP26]], align 4 3019 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2 3020 // CHECK11-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4 3021 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3 3022 // CHECK11-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4 3023 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4 3024 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64** [[TMP29]], align 4 3025 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5 3026 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i64** [[TMP30]], align 4 3027 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6 3028 // CHECK11-NEXT: store i8** null, i8*** [[TMP31]], align 4 3029 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7 3030 // CHECK11-NEXT: store i8** null, i8*** [[TMP32]], align 4 3031 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8 3032 // CHECK11-NEXT: store i64 10, i64* [[TMP33]], align 8 3033 // CHECK11-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]]) 3034 // CHECK11-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 3035 // CHECK11-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 3036 // CHECK11: omp_offload.failed6: 3037 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 3038 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]] 3039 // CHECK11: omp_offload.cont7: 3040 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 3041 // CHECK11-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 3042 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 3043 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 3044 // CHECK11-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [10 x i32]** 3045 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP39]], align 4 3046 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 3047 // CHECK11-NEXT: store i8* null, i8** [[TMP40]], align 4 3048 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 3049 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 3050 // CHECK11-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3051 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0 3052 // CHECK11-NEXT: store i32 1, i32* [[TMP43]], align 4 3053 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1 3054 // CHECK11-NEXT: store i32 1, i32* [[TMP44]], align 4 3055 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2 3056 // CHECK11-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4 3057 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3 3058 // CHECK11-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4 3059 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4 3060 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64** [[TMP47]], align 4 3061 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5 3062 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i64** [[TMP48]], align 4 3063 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6 3064 // CHECK11-NEXT: store i8** null, i8*** [[TMP49]], align 4 3065 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7 3066 // CHECK11-NEXT: store i8** null, i8*** [[TMP50]], align 4 3067 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8 3068 // CHECK11-NEXT: store i64 10, i64* [[TMP51]], align 8 3069 // CHECK11-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]]) 3070 // CHECK11-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0 3071 // CHECK11-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 3072 // CHECK11: omp_offload.failed13: 3073 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]] 3074 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT14]] 3075 // CHECK11: omp_offload.cont14: 3076 // CHECK11-NEXT: ret i32 0 3077 // 3078 // 3079 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79 3080 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3081 // CHECK11-NEXT: entry: 3082 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 3083 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 3084 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 3085 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3086 // CHECK11-NEXT: ret void 3087 // 3088 // 3089 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 3090 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3091 // CHECK11-NEXT: entry: 3092 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3093 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3094 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 3095 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3096 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3097 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3098 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3099 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3100 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3101 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3102 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3103 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3104 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 3105 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 3106 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3107 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3108 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3109 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3110 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3111 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3112 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3113 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3114 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3115 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3116 // CHECK11: cond.true: 3117 // CHECK11-NEXT: br label [[COND_END:%.*]] 3118 // CHECK11: cond.false: 3119 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3120 // CHECK11-NEXT: br label [[COND_END]] 3121 // CHECK11: cond.end: 3122 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3123 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3124 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3125 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3126 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3127 // CHECK11: omp.inner.for.cond: 3128 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 3129 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 3130 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3131 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3132 // CHECK11: omp.inner.for.body: 3133 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 3134 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3135 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3136 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 3137 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 3138 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 3139 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 3140 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3141 // CHECK11: omp.body.continue: 3142 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3143 // CHECK11: omp.inner.for.inc: 3144 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 3145 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3146 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 3147 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 3148 // CHECK11: omp.inner.for.end: 3149 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3150 // CHECK11: omp.loop.exit: 3151 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3152 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3153 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3154 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3155 // CHECK11: .omp.final.then: 3156 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 3157 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3158 // CHECK11: .omp.final.done: 3159 // CHECK11-NEXT: ret void 3160 // 3161 // 3162 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 3163 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3164 // CHECK11-NEXT: entry: 3165 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 3166 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 3167 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 3168 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3169 // CHECK11-NEXT: ret void 3170 // 3171 // 3172 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 3173 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3174 // CHECK11-NEXT: entry: 3175 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3176 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3177 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 3178 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3179 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3180 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3181 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3182 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3183 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3184 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3185 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3186 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3187 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 3188 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 3189 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3190 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3191 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3192 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3193 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3194 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3195 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3196 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3197 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3198 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3199 // CHECK11: cond.true: 3200 // CHECK11-NEXT: br label [[COND_END:%.*]] 3201 // CHECK11: cond.false: 3202 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3203 // CHECK11-NEXT: br label [[COND_END]] 3204 // CHECK11: cond.end: 3205 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3206 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3207 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3208 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3209 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3210 // CHECK11: omp.inner.for.cond: 3211 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 3212 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 3213 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3214 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3215 // CHECK11: omp.inner.for.body: 3216 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 3217 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3218 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3219 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 3220 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 3221 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 3222 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 3223 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3224 // CHECK11: omp.body.continue: 3225 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3226 // CHECK11: omp.inner.for.inc: 3227 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 3228 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3229 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 3230 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 3231 // CHECK11: omp.inner.for.end: 3232 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3233 // CHECK11: omp.loop.exit: 3234 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3235 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3236 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3237 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3238 // CHECK11: .omp.final.then: 3239 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 3240 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3241 // CHECK11: .omp.final.done: 3242 // CHECK11-NEXT: ret void 3243 // 3244 // 3245 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89 3246 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3247 // CHECK11-NEXT: entry: 3248 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 3249 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 3250 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 3251 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3252 // CHECK11-NEXT: ret void 3253 // 3254 // 3255 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13 3256 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3257 // CHECK11-NEXT: entry: 3258 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3259 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3260 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 3261 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3262 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3263 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3264 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3265 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3266 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3267 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3268 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3269 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3270 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 3271 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 3272 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3273 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3274 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3275 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3276 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3277 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3278 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 3279 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3280 // CHECK11: omp.dispatch.cond: 3281 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3282 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3283 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3284 // CHECK11: cond.true: 3285 // CHECK11-NEXT: br label [[COND_END:%.*]] 3286 // CHECK11: cond.false: 3287 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3288 // CHECK11-NEXT: br label [[COND_END]] 3289 // CHECK11: cond.end: 3290 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3291 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3292 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3293 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3294 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3295 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3296 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3297 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3298 // CHECK11: omp.dispatch.body: 3299 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3300 // CHECK11: omp.inner.for.cond: 3301 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 3302 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28 3303 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3304 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3305 // CHECK11: omp.inner.for.body: 3306 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 3307 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3308 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3309 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28 3310 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28 3311 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 3312 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28 3313 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3314 // CHECK11: omp.body.continue: 3315 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3316 // CHECK11: omp.inner.for.inc: 3317 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 3318 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3319 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 3320 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 3321 // CHECK11: omp.inner.for.end: 3322 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3323 // CHECK11: omp.dispatch.inc: 3324 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3325 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3326 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 3327 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 3328 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3329 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3330 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 3331 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 3332 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 3333 // CHECK11: omp.dispatch.end: 3334 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3335 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3336 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 3337 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3338 // CHECK11: .omp.final.then: 3339 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 3340 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3341 // CHECK11: .omp.final.done: 3342 // CHECK11-NEXT: ret void 3343 // 3344 // 3345 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3346 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 3347 // CHECK11-NEXT: entry: 3348 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 3349 // CHECK11-NEXT: ret void 3350 // 3351 // 3352 // CHECK13-LABEL: define {{[^@]+}}@main 3353 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3354 // CHECK13-NEXT: entry: 3355 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3356 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3357 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3358 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 3359 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3360 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3361 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3362 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3363 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3364 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3365 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3366 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3367 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3368 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 3369 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3370 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 3371 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 3372 // CHECK13-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 3373 // CHECK13-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 3374 // CHECK13-NEXT: [[I18:%.*]] = alloca i32, align 4 3375 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3376 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 3377 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 3378 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 3379 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 3380 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 3381 // CHECK13-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4 3382 // CHECK13-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4 3383 // CHECK13-NEXT: [[I48:%.*]] = alloca i32, align 4 3384 // CHECK13-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4 3385 // CHECK13-NEXT: [[I52:%.*]] = alloca i32, align 4 3386 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3387 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3388 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3389 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 3390 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3391 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3392 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3393 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3394 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3395 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3396 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 3397 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3398 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3399 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3400 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3401 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3402 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3403 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3404 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3405 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 3406 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3407 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3408 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3409 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3410 // CHECK13: simd.if.then: 3411 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3412 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3413 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3414 // CHECK13: omp.inner.for.cond: 3415 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3416 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 3417 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3418 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3419 // CHECK13: omp.inner.for.body: 3420 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3421 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3422 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3423 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2 3424 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2 3425 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3426 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 3427 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 3428 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3429 // CHECK13: omp.body.continue: 3430 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3431 // CHECK13: omp.inner.for.inc: 3432 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3433 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1 3434 // CHECK13-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3435 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3436 // CHECK13: omp.inner.for.end: 3437 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3438 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0 3439 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3440 // CHECK13-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 3441 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 3442 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4 3443 // CHECK13-NEXT: br label [[SIMD_IF_END]] 3444 // CHECK13: simd.if.end: 3445 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4 3446 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 3447 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3448 // CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0 3449 // CHECK13-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 3450 // CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 3451 // CHECK13-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4 3452 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4 3453 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 3454 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4 3455 // CHECK13-NEXT: store i32 0, i32* [[I18]], align 4 3456 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3457 // CHECK13-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]] 3458 // CHECK13-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]] 3459 // CHECK13: simd.if.then20: 3460 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4 3461 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4 3462 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3463 // CHECK13: omp.inner.for.cond23: 3464 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3465 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6 3466 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 3467 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 3468 // CHECK13: omp.inner.for.body25: 3469 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3470 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1 3471 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3472 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6 3473 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6 3474 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64 3475 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]] 3476 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6 3477 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 3478 // CHECK13: omp.body.continue30: 3479 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 3480 // CHECK13: omp.inner.for.inc31: 3481 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3482 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1 3483 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3484 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]] 3485 // CHECK13: omp.inner.for.end33: 3486 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3487 // CHECK13-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0 3488 // CHECK13-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1 3489 // CHECK13-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1 3490 // CHECK13-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]] 3491 // CHECK13-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4 3492 // CHECK13-NEXT: br label [[SIMD_IF_END38]] 3493 // CHECK13: simd.if.end38: 3494 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4 3495 // CHECK13-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4 3496 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 3497 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4 3498 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3499 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0 3500 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 3501 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 3502 // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 3503 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4 3504 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 3505 // CHECK13-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4 3506 // CHECK13-NEXT: store i32 0, i32* [[I48]], align 4 3507 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3508 // CHECK13-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]] 3509 // CHECK13-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]] 3510 // CHECK13: simd.if.then50: 3511 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4 3512 // CHECK13-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4 3513 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]] 3514 // CHECK13: omp.inner.for.cond53: 3515 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3516 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9 3517 // CHECK13-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]] 3518 // CHECK13-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]] 3519 // CHECK13: omp.inner.for.body55: 3520 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3521 // CHECK13-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1 3522 // CHECK13-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]] 3523 // CHECK13-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9 3524 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9 3525 // CHECK13-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64 3526 // CHECK13-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]] 3527 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9 3528 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]] 3529 // CHECK13: omp.body.continue60: 3530 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]] 3531 // CHECK13: omp.inner.for.inc61: 3532 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3533 // CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1 3534 // CHECK13-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3535 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]] 3536 // CHECK13: omp.inner.for.end63: 3537 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3538 // CHECK13-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0 3539 // CHECK13-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1 3540 // CHECK13-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1 3541 // CHECK13-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]] 3542 // CHECK13-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4 3543 // CHECK13-NEXT: br label [[SIMD_IF_END68]] 3544 // CHECK13: simd.if.end68: 3545 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3546 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]]) 3547 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3548 // CHECK13-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3549 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP38]]) 3550 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 3551 // CHECK13-NEXT: ret i32 [[TMP39]] 3552 // 3553 // 3554 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3555 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 3556 // CHECK13-NEXT: entry: 3557 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3558 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3559 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3560 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3561 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3562 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3563 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3564 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3565 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3566 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3567 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3568 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 3569 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 3570 // CHECK13-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4 3571 // CHECK13-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4 3572 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3573 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 3574 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3575 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3576 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3577 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3578 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 3579 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3580 // CHECK13: omp.inner.for.cond: 3581 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3582 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 3583 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3584 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3585 // CHECK13: omp.inner.for.body: 3586 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3587 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3588 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3589 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 3590 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 3591 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 3592 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 3593 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 3594 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3595 // CHECK13: omp.body.continue: 3596 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3597 // CHECK13: omp.inner.for.inc: 3598 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3599 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 3600 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3601 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3602 // CHECK13: omp.inner.for.end: 3603 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 3604 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4 3605 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4 3606 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4 3607 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4 3608 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3609 // CHECK13: omp.inner.for.cond7: 3610 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3611 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !15 3612 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3613 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 3614 // CHECK13: omp.inner.for.body9: 3615 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3616 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 3617 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3618 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !15 3619 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 3620 // CHECK13-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64 3621 // CHECK13-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]] 3622 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !15 3623 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 3624 // CHECK13: omp.body.continue14: 3625 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 3626 // CHECK13: omp.inner.for.inc15: 3627 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3628 // CHECK13-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1 3629 // CHECK13-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3630 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]] 3631 // CHECK13: omp.inner.for.end17: 3632 // CHECK13-NEXT: store i32 10, i32* [[I6]], align 4 3633 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4 3634 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4 3635 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4 3636 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV21]], align 4 3637 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3638 // CHECK13: omp.inner.for.cond23: 3639 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3640 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !18 3641 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3642 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 3643 // CHECK13: omp.inner.for.body25: 3644 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3645 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 1 3646 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3647 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !18 3648 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !18 3649 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i64 3650 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]] 3651 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !18 3652 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 3653 // CHECK13: omp.body.continue30: 3654 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 3655 // CHECK13: omp.inner.for.inc31: 3656 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3657 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP17]], 1 3658 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3659 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]] 3660 // CHECK13: omp.inner.for.end33: 3661 // CHECK13-NEXT: store i32 10, i32* [[I22]], align 4 3662 // CHECK13-NEXT: ret i32 0 3663 // 3664 // 3665 // CHECK15-LABEL: define {{[^@]+}}@main 3666 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3667 // CHECK15-NEXT: entry: 3668 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3669 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3670 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 3671 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 3672 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3673 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3674 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 3675 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3676 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3677 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3678 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3679 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3680 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3681 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 3682 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3683 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 3684 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 3685 // CHECK15-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 3686 // CHECK15-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 3687 // CHECK15-NEXT: [[I18:%.*]] = alloca i32, align 4 3688 // CHECK15-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3689 // CHECK15-NEXT: [[I22:%.*]] = alloca i32, align 4 3690 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 3691 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 3692 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 3693 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 3694 // CHECK15-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4 3695 // CHECK15-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4 3696 // CHECK15-NEXT: [[I47:%.*]] = alloca i32, align 4 3697 // CHECK15-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4 3698 // CHECK15-NEXT: [[I51:%.*]] = alloca i32, align 4 3699 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 3700 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3701 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 3702 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 3703 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3704 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3705 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3706 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3707 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3708 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 3709 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 3710 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3711 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 3712 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3713 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3714 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3715 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3716 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3717 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 3718 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 3719 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3720 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3721 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3722 // CHECK15: simd.if.then: 3723 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3724 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3725 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3726 // CHECK15: omp.inner.for.cond: 3727 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3728 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 3729 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3730 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3731 // CHECK15: omp.inner.for.body: 3732 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3733 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3734 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3735 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3 3736 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3 3737 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]] 3738 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 3739 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3740 // CHECK15: omp.body.continue: 3741 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3742 // CHECK15: omp.inner.for.inc: 3743 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3744 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1 3745 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3746 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3747 // CHECK15: omp.inner.for.end: 3748 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3749 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0 3750 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3751 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 3752 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 3753 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4 3754 // CHECK15-NEXT: br label [[SIMD_IF_END]] 3755 // CHECK15: simd.if.end: 3756 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4 3757 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4 3758 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3759 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0 3760 // CHECK15-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 3761 // CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 3762 // CHECK15-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4 3763 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4 3764 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 3765 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4 3766 // CHECK15-NEXT: store i32 0, i32* [[I18]], align 4 3767 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3768 // CHECK15-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]] 3769 // CHECK15-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]] 3770 // CHECK15: simd.if.then20: 3771 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4 3772 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4 3773 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3774 // CHECK15: omp.inner.for.cond23: 3775 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3776 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7 3777 // CHECK15-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 3778 // CHECK15-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]] 3779 // CHECK15: omp.inner.for.body25: 3780 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3781 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1 3782 // CHECK15-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3783 // CHECK15-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7 3784 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7 3785 // CHECK15-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]] 3786 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7 3787 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]] 3788 // CHECK15: omp.body.continue29: 3789 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]] 3790 // CHECK15: omp.inner.for.inc30: 3791 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3792 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1 3793 // CHECK15-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3794 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]] 3795 // CHECK15: omp.inner.for.end32: 3796 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3797 // CHECK15-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0 3798 // CHECK15-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1 3799 // CHECK15-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1 3800 // CHECK15-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]] 3801 // CHECK15-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4 3802 // CHECK15-NEXT: br label [[SIMD_IF_END37]] 3803 // CHECK15: simd.if.end37: 3804 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[N]], align 4 3805 // CHECK15-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4 3806 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4 3807 // CHECK15-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4 3808 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 3809 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0 3810 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 3811 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 3812 // CHECK15-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4 3813 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4 3814 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3815 // CHECK15-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4 3816 // CHECK15-NEXT: store i32 0, i32* [[I47]], align 4 3817 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 3818 // CHECK15-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]] 3819 // CHECK15-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]] 3820 // CHECK15: simd.if.then49: 3821 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4 3822 // CHECK15-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4 3823 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]] 3824 // CHECK15: omp.inner.for.cond52: 3825 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3826 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10 3827 // CHECK15-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]] 3828 // CHECK15-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]] 3829 // CHECK15: omp.inner.for.body54: 3830 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3831 // CHECK15-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1 3832 // CHECK15-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]] 3833 // CHECK15-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10 3834 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10 3835 // CHECK15-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]] 3836 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10 3837 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]] 3838 // CHECK15: omp.body.continue58: 3839 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]] 3840 // CHECK15: omp.inner.for.inc59: 3841 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3842 // CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1 3843 // CHECK15-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3844 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]] 3845 // CHECK15: omp.inner.for.end61: 3846 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 3847 // CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0 3848 // CHECK15-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1 3849 // CHECK15-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1 3850 // CHECK15-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]] 3851 // CHECK15-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4 3852 // CHECK15-NEXT: br label [[SIMD_IF_END66]] 3853 // CHECK15: simd.if.end66: 3854 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3855 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]]) 3856 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3857 // CHECK15-NEXT: [[TMP37:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3858 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP37]]) 3859 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[RETVAL]], align 4 3860 // CHECK15-NEXT: ret i32 [[TMP38]] 3861 // 3862 // 3863 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3864 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 3865 // CHECK15-NEXT: entry: 3866 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3867 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3868 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 3869 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3870 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3871 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3872 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3873 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3874 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3875 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3876 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3877 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 3878 // CHECK15-NEXT: [[_TMP17:%.*]] = alloca i32, align 4 3879 // CHECK15-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 3880 // CHECK15-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 3881 // CHECK15-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4 3882 // CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 4 3883 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3884 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3885 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3886 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3887 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 3888 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3889 // CHECK15: omp.inner.for.cond: 3890 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3891 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 3892 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3893 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3894 // CHECK15: omp.inner.for.body: 3895 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3896 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3897 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3898 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 3899 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 3900 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]] 3901 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 3902 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3903 // CHECK15: omp.body.continue: 3904 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3905 // CHECK15: omp.inner.for.inc: 3906 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3907 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 3908 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3909 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 3910 // CHECK15: omp.inner.for.end: 3911 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 3912 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4 3913 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4 3914 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4 3915 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4 3916 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3917 // CHECK15: omp.inner.for.cond7: 3918 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3919 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16 3920 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3921 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]] 3922 // CHECK15: omp.inner.for.body9: 3923 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3924 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 3925 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3926 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16 3927 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !16 3928 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]] 3929 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !16 3930 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]] 3931 // CHECK15: omp.body.continue13: 3932 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]] 3933 // CHECK15: omp.inner.for.inc14: 3934 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3935 // CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1 3936 // CHECK15-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3937 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]] 3938 // CHECK15: omp.inner.for.end16: 3939 // CHECK15-NEXT: store i32 10, i32* [[I6]], align 4 3940 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4 3941 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4 3942 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4 3943 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV20]], align 4 3944 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]] 3945 // CHECK15: omp.inner.for.cond22: 3946 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3947 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !19 3948 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3949 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]] 3950 // CHECK15: omp.inner.for.body24: 3951 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3952 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1 3953 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]] 3954 // CHECK15-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !19 3955 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !19 3956 // CHECK15-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP16]] 3957 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !19 3958 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]] 3959 // CHECK15: omp.body.continue28: 3960 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]] 3961 // CHECK15: omp.inner.for.inc29: 3962 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3963 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP17]], 1 3964 // CHECK15-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3965 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]] 3966 // CHECK15: omp.inner.for.end31: 3967 // CHECK15-NEXT: store i32 10, i32* [[I21]], align 4 3968 // CHECK15-NEXT: ret i32 0 3969 // 3970