1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 20 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 template <typename T> 29 T tmain() { 30 T t_var = T(); 31 T vec[] = {1, 2}; 32 #pragma omp target 33 #pragma omp teams distribute reduction(+: t_var) 34 for (int i = 0; i < 2; ++i) { 35 t_var += (T) i; 36 } 37 return T(); 38 } 39 40 int main() { 41 static int sivar; 42 #ifdef LAMBDA 43 44 [&]() { 45 #pragma omp target 46 #pragma omp teams distribute reduction(+: sivar) 47 for (int i = 0; i < 2; ++i) { 48 49 // Skip global and bound tid vars 50 51 52 sivar += i; 53 54 [&]() { 55 56 sivar += 4; 57 58 }(); 59 } 60 }(); 61 return 0; 62 #else 63 #pragma omp target 64 #pragma omp teams distribute reduction(+: sivar) 65 for (int i = 0; i < 2; ++i) { 66 sivar += i; 67 } 68 return tmain<int>(); 69 #endif 70 } 71 72 73 74 75 // Skip global and bound tid vars 76 77 78 79 80 81 // Skip global and bound tid vars 82 83 84 #endif 85 // CHECK1-LABEL: define {{[^@]+}}@main 86 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 87 // CHECK1-NEXT: entry: 88 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 89 // CHECK1-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 90 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 91 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 92 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 93 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 94 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 95 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 96 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32* 97 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 98 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8 99 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 100 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64* 101 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8 102 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 103 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 104 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 105 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 106 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8 107 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 108 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 109 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 110 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 111 // CHECK1-NEXT: store i32 1, i32* [[TMP9]], align 4 112 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 113 // CHECK1-NEXT: store i32 1, i32* [[TMP10]], align 4 114 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 115 // CHECK1-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8 116 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 117 // CHECK1-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8 118 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 119 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 8 120 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 121 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 8 122 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 123 // CHECK1-NEXT: store i8** null, i8*** [[TMP15]], align 8 124 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 125 // CHECK1-NEXT: store i8** null, i8*** [[TMP16]], align 8 126 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 127 // CHECK1-NEXT: store i64 2, i64* [[TMP17]], align 8 128 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 129 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 130 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 131 // CHECK1: omp_offload.failed: 132 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63(i64 [[TMP1]]) #[[ATTR2:[0-9]+]] 133 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 134 // CHECK1: omp_offload.cont: 135 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 136 // CHECK1-NEXT: ret i32 [[CALL]] 137 // 138 // 139 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63 140 // CHECK1-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 141 // CHECK1-NEXT: entry: 142 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 143 // CHECK1-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 144 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 145 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]]) 146 // CHECK1-NEXT: ret void 147 // 148 // 149 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 150 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 151 // CHECK1-NEXT: entry: 152 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 153 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 154 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 155 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 156 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 157 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 158 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 159 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 160 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 161 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 162 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 163 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 164 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 165 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 166 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 167 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 168 // CHECK1-NEXT: store i32 0, i32* [[SIVAR1]], align 4 169 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 170 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 171 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 172 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 173 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 174 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 175 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 176 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 177 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 178 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 179 // CHECK1: cond.true: 180 // CHECK1-NEXT: br label [[COND_END:%.*]] 181 // CHECK1: cond.false: 182 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 183 // CHECK1-NEXT: br label [[COND_END]] 184 // CHECK1: cond.end: 185 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 186 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 187 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 188 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 189 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 190 // CHECK1: omp.inner.for.cond: 191 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 192 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 193 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 194 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 195 // CHECK1: omp.inner.for.body: 196 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 197 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 198 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 199 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 200 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 201 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 202 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 203 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 204 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 205 // CHECK1: omp.body.continue: 206 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 207 // CHECK1: omp.inner.for.inc: 208 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 209 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 210 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 211 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 212 // CHECK1: omp.inner.for.end: 213 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 214 // CHECK1: omp.loop.exit: 215 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 216 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 217 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 218 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 219 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 220 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 221 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 222 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 223 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 224 // CHECK1-NEXT: ] 225 // CHECK1: .omp.reduction.case1: 226 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 227 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 228 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 229 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 230 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 231 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 232 // CHECK1: .omp.reduction.case2: 233 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 234 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 235 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 236 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 237 // CHECK1: .omp.reduction.default: 238 // CHECK1-NEXT: ret void 239 // 240 // 241 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 242 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 243 // CHECK1-NEXT: entry: 244 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 245 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 246 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 247 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 248 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 249 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 250 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 251 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 252 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 253 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 254 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 255 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 256 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 257 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 258 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 259 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 260 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 261 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 262 // CHECK1-NEXT: ret void 263 // 264 // 265 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 266 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 267 // CHECK1-NEXT: entry: 268 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 269 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 270 // CHECK1-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 271 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 272 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 273 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 274 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 275 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 276 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 277 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 278 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 279 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 280 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 281 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 282 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 283 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64* 284 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8 285 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 286 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 287 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8 288 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 289 // CHECK1-NEXT: store i8* null, i8** [[TMP7]], align 8 290 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 291 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 292 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 293 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 294 // CHECK1-NEXT: store i32 1, i32* [[TMP10]], align 4 295 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 296 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4 297 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 298 // CHECK1-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8 299 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 300 // CHECK1-NEXT: store i8** [[TMP9]], i8*** [[TMP13]], align 8 301 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 302 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64** [[TMP14]], align 8 303 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 304 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i64** [[TMP15]], align 8 305 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 306 // CHECK1-NEXT: store i8** null, i8*** [[TMP16]], align 8 307 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 308 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8 309 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 310 // CHECK1-NEXT: store i64 2, i64* [[TMP18]], align 8 311 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 312 // CHECK1-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 313 // CHECK1-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 314 // CHECK1: omp_offload.failed: 315 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]] 316 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 317 // CHECK1: omp_offload.cont: 318 // CHECK1-NEXT: ret i32 0 319 // 320 // 321 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 322 // CHECK1-SAME: (i64 noundef [[T_VAR:%.*]]) #[[ATTR1]] { 323 // CHECK1-NEXT: entry: 324 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 325 // CHECK1-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 326 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 327 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]]) 328 // CHECK1-NEXT: ret void 329 // 330 // 331 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 332 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 333 // CHECK1-NEXT: entry: 334 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 335 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 336 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 337 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 338 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 339 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 340 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 341 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 342 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 343 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 344 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 345 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 346 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 347 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 348 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 349 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 350 // CHECK1-NEXT: store i32 0, i32* [[T_VAR1]], align 4 351 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 352 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 353 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 354 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 355 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 356 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 357 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 358 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 359 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 360 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 361 // CHECK1: cond.true: 362 // CHECK1-NEXT: br label [[COND_END:%.*]] 363 // CHECK1: cond.false: 364 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 365 // CHECK1-NEXT: br label [[COND_END]] 366 // CHECK1: cond.end: 367 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 368 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 369 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 370 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 371 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 372 // CHECK1: omp.inner.for.cond: 373 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 374 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 375 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 376 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 377 // CHECK1: omp.inner.for.body: 378 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 379 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 380 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 381 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 382 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 383 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 384 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 385 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 386 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 387 // CHECK1: omp.body.continue: 388 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 389 // CHECK1: omp.inner.for.inc: 390 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 391 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 392 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 393 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 394 // CHECK1: omp.inner.for.end: 395 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 396 // CHECK1: omp.loop.exit: 397 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 398 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 399 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 400 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 401 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 402 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 403 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 404 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 405 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 406 // CHECK1-NEXT: ] 407 // CHECK1: .omp.reduction.case1: 408 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 409 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 410 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 411 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 412 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 413 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 414 // CHECK1: .omp.reduction.case2: 415 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 416 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 417 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 418 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 419 // CHECK1: .omp.reduction.default: 420 // CHECK1-NEXT: ret void 421 // 422 // 423 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 424 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 425 // CHECK1-NEXT: entry: 426 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 427 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 428 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 429 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 430 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 431 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 432 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 433 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 434 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 435 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 436 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 437 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 438 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 439 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 440 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 441 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 442 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 443 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 444 // CHECK1-NEXT: ret void 445 // 446 // 447 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 448 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] { 449 // CHECK1-NEXT: entry: 450 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 451 // CHECK1-NEXT: ret void 452 // 453 // 454 // CHECK3-LABEL: define {{[^@]+}}@main 455 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 456 // CHECK3-NEXT: entry: 457 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 458 // CHECK3-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4 459 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 460 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 461 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 462 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 463 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 464 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 465 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4 466 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4 467 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 468 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32* 469 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4 470 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 471 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 472 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 473 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 474 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4 475 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 476 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 477 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 478 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 479 // CHECK3-NEXT: store i32 1, i32* [[TMP9]], align 4 480 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 481 // CHECK3-NEXT: store i32 1, i32* [[TMP10]], align 4 482 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 483 // CHECK3-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 4 484 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 485 // CHECK3-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 4 486 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 487 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 4 488 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 489 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 4 490 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 491 // CHECK3-NEXT: store i8** null, i8*** [[TMP15]], align 4 492 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 493 // CHECK3-NEXT: store i8** null, i8*** [[TMP16]], align 4 494 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 495 // CHECK3-NEXT: store i64 2, i64* [[TMP17]], align 8 496 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 497 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 498 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 499 // CHECK3: omp_offload.failed: 500 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63(i32 [[TMP1]]) #[[ATTR2:[0-9]+]] 501 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 502 // CHECK3: omp_offload.cont: 503 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 504 // CHECK3-NEXT: ret i32 [[CALL]] 505 // 506 // 507 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63 508 // CHECK3-SAME: (i32 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 509 // CHECK3-NEXT: entry: 510 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4 511 // CHECK3-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4 512 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]]) 513 // CHECK3-NEXT: ret void 514 // 515 // 516 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 517 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 518 // CHECK3-NEXT: entry: 519 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 520 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 521 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 522 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 523 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 524 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 525 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 526 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 527 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 528 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 529 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 530 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 531 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 532 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 533 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 534 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 535 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4 536 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 537 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 538 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 539 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 540 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 541 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 542 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 543 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 544 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 545 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 546 // CHECK3: cond.true: 547 // CHECK3-NEXT: br label [[COND_END:%.*]] 548 // CHECK3: cond.false: 549 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 550 // CHECK3-NEXT: br label [[COND_END]] 551 // CHECK3: cond.end: 552 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 553 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 554 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 555 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 556 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 557 // CHECK3: omp.inner.for.cond: 558 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 559 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 560 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 561 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 562 // CHECK3: omp.inner.for.body: 563 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 564 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 565 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 566 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 567 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 568 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 569 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 570 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 571 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 572 // CHECK3: omp.body.continue: 573 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 574 // CHECK3: omp.inner.for.inc: 575 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 576 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 577 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 578 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 579 // CHECK3: omp.inner.for.end: 580 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 581 // CHECK3: omp.loop.exit: 582 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 583 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 584 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 585 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 586 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 587 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 588 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 589 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 590 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 591 // CHECK3-NEXT: ] 592 // CHECK3: .omp.reduction.case1: 593 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 594 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 595 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 596 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 597 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 598 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 599 // CHECK3: .omp.reduction.case2: 600 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 601 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 602 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 603 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 604 // CHECK3: .omp.reduction.default: 605 // CHECK3-NEXT: ret void 606 // 607 // 608 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 609 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 610 // CHECK3-NEXT: entry: 611 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 612 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 613 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 614 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 615 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 616 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 617 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 618 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 619 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 620 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 621 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 622 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 623 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 624 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 625 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 626 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 627 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 628 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 629 // CHECK3-NEXT: ret void 630 // 631 // 632 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 633 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat { 634 // CHECK3-NEXT: entry: 635 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 636 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 637 // CHECK3-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 638 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 639 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 640 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 641 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 642 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4 643 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 644 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 645 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 646 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4 647 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 648 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 649 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32* 650 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4 651 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 652 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 653 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4 654 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 655 // CHECK3-NEXT: store i8* null, i8** [[TMP7]], align 4 656 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 657 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 658 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 659 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 660 // CHECK3-NEXT: store i32 1, i32* [[TMP10]], align 4 661 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 662 // CHECK3-NEXT: store i32 1, i32* [[TMP11]], align 4 663 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 664 // CHECK3-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 4 665 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 666 // CHECK3-NEXT: store i8** [[TMP9]], i8*** [[TMP13]], align 4 667 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 668 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64** [[TMP14]], align 4 669 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 670 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i64** [[TMP15]], align 4 671 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 672 // CHECK3-NEXT: store i8** null, i8*** [[TMP16]], align 4 673 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 674 // CHECK3-NEXT: store i8** null, i8*** [[TMP17]], align 4 675 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 676 // CHECK3-NEXT: store i64 2, i64* [[TMP18]], align 8 677 // CHECK3-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 678 // CHECK3-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 679 // CHECK3-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 680 // CHECK3: omp_offload.failed: 681 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]] 682 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 683 // CHECK3: omp_offload.cont: 684 // CHECK3-NEXT: ret i32 0 685 // 686 // 687 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 688 // CHECK3-SAME: (i32 noundef [[T_VAR:%.*]]) #[[ATTR1]] { 689 // CHECK3-NEXT: entry: 690 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 691 // CHECK3-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 692 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]]) 693 // CHECK3-NEXT: ret void 694 // 695 // 696 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 697 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 698 // CHECK3-NEXT: entry: 699 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 700 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 701 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 702 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 703 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 704 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 705 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 706 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 707 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 708 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 709 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 710 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 711 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 712 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 713 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 714 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 715 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4 716 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 717 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 718 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 719 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 720 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 721 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 722 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 723 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 724 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 725 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 726 // CHECK3: cond.true: 727 // CHECK3-NEXT: br label [[COND_END:%.*]] 728 // CHECK3: cond.false: 729 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 730 // CHECK3-NEXT: br label [[COND_END]] 731 // CHECK3: cond.end: 732 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 733 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 734 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 735 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 736 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 737 // CHECK3: omp.inner.for.cond: 738 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 739 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 740 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 741 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 742 // CHECK3: omp.inner.for.body: 743 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 744 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 745 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 746 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 747 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 748 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 749 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 750 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 751 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 752 // CHECK3: omp.body.continue: 753 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 754 // CHECK3: omp.inner.for.inc: 755 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 756 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 757 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 758 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 759 // CHECK3: omp.inner.for.end: 760 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 761 // CHECK3: omp.loop.exit: 762 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 763 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 764 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 765 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 766 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 767 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 768 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 769 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 770 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 771 // CHECK3-NEXT: ] 772 // CHECK3: .omp.reduction.case1: 773 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 774 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 775 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 776 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 777 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 778 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 779 // CHECK3: .omp.reduction.case2: 780 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 781 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 782 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 783 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 784 // CHECK3: .omp.reduction.default: 785 // CHECK3-NEXT: ret void 786 // 787 // 788 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 789 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 790 // CHECK3-NEXT: entry: 791 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 792 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 793 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 794 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 795 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 796 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 797 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 798 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 799 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 800 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 801 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 802 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 803 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 804 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 805 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 806 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 807 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 808 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 809 // CHECK3-NEXT: ret void 810 // 811 // 812 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 813 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] { 814 // CHECK3-NEXT: entry: 815 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 816 // CHECK3-NEXT: ret void 817 // 818 // 819 // CHECK9-LABEL: define {{[^@]+}}@main 820 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 821 // CHECK9-NEXT: entry: 822 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 823 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 824 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 825 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 826 // CHECK9-NEXT: ret i32 0 827 // 828 // 829 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45 830 // CHECK9-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 831 // CHECK9-NEXT: entry: 832 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 833 // CHECK9-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 834 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 835 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]]) 836 // CHECK9-NEXT: ret void 837 // 838 // 839 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 840 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 841 // CHECK9-NEXT: entry: 842 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 843 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 844 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 845 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 846 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 847 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 848 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 849 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 850 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 851 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 852 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 853 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 854 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 855 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 856 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 857 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 858 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 859 // CHECK9-NEXT: store i32 0, i32* [[SIVAR1]], align 4 860 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 861 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 862 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 863 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 864 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 865 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 866 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 867 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 868 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 869 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 870 // CHECK9: cond.true: 871 // CHECK9-NEXT: br label [[COND_END:%.*]] 872 // CHECK9: cond.false: 873 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 874 // CHECK9-NEXT: br label [[COND_END]] 875 // CHECK9: cond.end: 876 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 877 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 878 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 879 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 880 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 881 // CHECK9: omp.inner.for.cond: 882 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 883 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 884 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 885 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 886 // CHECK9: omp.inner.for.body: 887 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 888 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 889 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 890 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 891 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 892 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 893 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 894 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 895 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 896 // CHECK9-NEXT: store i32* [[SIVAR1]], i32** [[TMP11]], align 8 897 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 898 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 899 // CHECK9: omp.body.continue: 900 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 901 // CHECK9: omp.inner.for.inc: 902 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 903 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 904 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 905 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 906 // CHECK9: omp.inner.for.end: 907 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 908 // CHECK9: omp.loop.exit: 909 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 910 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 911 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i32* [[SIVAR1]] to i8* 912 // CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 913 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 914 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP15]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 915 // CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 916 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 917 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 918 // CHECK9-NEXT: ] 919 // CHECK9: .omp.reduction.case1: 920 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP0]], align 4 921 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 922 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 923 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 924 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 925 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 926 // CHECK9: .omp.reduction.case2: 927 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 928 // CHECK9-NEXT: [[TMP20:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP19]] monotonic, align 4 929 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 930 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 931 // CHECK9: .omp.reduction.default: 932 // CHECK9-NEXT: ret void 933 // 934 // 935 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 936 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 937 // CHECK9-NEXT: entry: 938 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 939 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 940 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 941 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 942 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 943 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 944 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 945 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 946 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 947 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 948 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 949 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 950 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 951 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 952 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 953 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 954 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 955 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 956 // CHECK9-NEXT: ret void 957 // 958 // 959 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 960 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 961 // CHECK9-NEXT: entry: 962 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 963 // CHECK9-NEXT: ret void 964 // 965