1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 20 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 template <typename T> 29 T tmain() { 30 T t_var = T(); 31 T vec[] = {1, 2}; 32 #pragma omp target 33 #pragma omp teams distribute reduction(+: t_var) 34 for (int i = 0; i < 2; ++i) { 35 t_var += (T) i; 36 } 37 return T(); 38 } 39 40 int main() { 41 static int sivar; 42 #ifdef LAMBDA 43 44 [&]() { 45 #pragma omp target 46 #pragma omp teams distribute reduction(+: sivar) 47 for (int i = 0; i < 2; ++i) { 48 49 // Skip global and bound tid vars 50 51 52 sivar += i; 53 54 [&]() { 55 56 sivar += 4; 57 58 }(); 59 } 60 }(); 61 return 0; 62 #else 63 #pragma omp target 64 #pragma omp teams distribute reduction(+: sivar) 65 for (int i = 0; i < 2; ++i) { 66 sivar += i; 67 } 68 return tmain<int>(); 69 #endif 70 } 71 72 73 74 75 // Skip global and bound tid vars 76 77 78 79 80 81 // Skip global and bound tid vars 82 83 84 #endif 85 // CHECK1-LABEL: define {{[^@]+}}@main 86 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 87 // CHECK1-NEXT: entry: 88 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 89 // CHECK1-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 90 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 91 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 92 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 93 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 94 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 95 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 96 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32* 97 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 98 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8 99 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 100 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64* 101 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8 102 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 103 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 104 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 105 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 106 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8 107 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 108 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 109 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 110 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 111 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 112 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 113 // CHECK1: omp_offload.failed: 114 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63(i64 [[TMP1]]) #[[ATTR2:[0-9]+]] 115 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 116 // CHECK1: omp_offload.cont: 117 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 118 // CHECK1-NEXT: ret i32 [[CALL]] 119 // 120 // 121 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63 122 // CHECK1-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 123 // CHECK1-NEXT: entry: 124 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 125 // CHECK1-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 126 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 127 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]]) 128 // CHECK1-NEXT: ret void 129 // 130 // 131 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 132 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 133 // CHECK1-NEXT: entry: 134 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 135 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 136 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 137 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 138 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 139 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 140 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 142 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 143 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 144 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 145 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 146 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 147 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 148 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 149 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 150 // CHECK1-NEXT: store i32 0, i32* [[SIVAR1]], align 4 151 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 152 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 153 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 154 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 155 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 156 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 157 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 158 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 159 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 160 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 161 // CHECK1: cond.true: 162 // CHECK1-NEXT: br label [[COND_END:%.*]] 163 // CHECK1: cond.false: 164 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 165 // CHECK1-NEXT: br label [[COND_END]] 166 // CHECK1: cond.end: 167 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 168 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 169 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 170 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 171 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 172 // CHECK1: omp.inner.for.cond: 173 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 174 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 175 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 176 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 177 // CHECK1: omp.inner.for.body: 178 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 179 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 180 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 181 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 182 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 183 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 184 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 185 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 186 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 187 // CHECK1: omp.body.continue: 188 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 189 // CHECK1: omp.inner.for.inc: 190 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 191 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 192 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 193 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 194 // CHECK1: omp.inner.for.end: 195 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 196 // CHECK1: omp.loop.exit: 197 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 198 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 199 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 200 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 201 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 202 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 203 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 204 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 205 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 206 // CHECK1-NEXT: ] 207 // CHECK1: .omp.reduction.case1: 208 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 209 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 210 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 211 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 212 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 213 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 214 // CHECK1: .omp.reduction.case2: 215 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 216 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 217 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 218 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 219 // CHECK1: .omp.reduction.default: 220 // CHECK1-NEXT: ret void 221 // 222 // 223 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 224 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 225 // CHECK1-NEXT: entry: 226 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 227 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 228 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 229 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 230 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 231 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 232 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 233 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 234 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 235 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 236 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 237 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 238 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 239 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 240 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 241 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 242 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 243 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 244 // CHECK1-NEXT: ret void 245 // 246 // 247 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 248 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 249 // CHECK1-NEXT: entry: 250 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 251 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 252 // CHECK1-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 253 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 254 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 255 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 256 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 257 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 258 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 259 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 260 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 261 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 262 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 263 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 264 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 265 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64* 266 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8 267 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 268 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 269 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8 270 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 271 // CHECK1-NEXT: store i8* null, i8** [[TMP7]], align 8 272 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 273 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 274 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 275 // CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 276 // CHECK1-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 277 // CHECK1-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 278 // CHECK1: omp_offload.failed: 279 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]] 280 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 281 // CHECK1: omp_offload.cont: 282 // CHECK1-NEXT: ret i32 0 283 // 284 // 285 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 286 // CHECK1-SAME: (i64 noundef [[T_VAR:%.*]]) #[[ATTR1]] { 287 // CHECK1-NEXT: entry: 288 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 289 // CHECK1-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 290 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 291 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]]) 292 // CHECK1-NEXT: ret void 293 // 294 // 295 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 296 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 297 // CHECK1-NEXT: entry: 298 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 299 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 300 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 301 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 302 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 303 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 304 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 305 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 306 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 307 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 308 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 309 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 310 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 311 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 312 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 313 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 314 // CHECK1-NEXT: store i32 0, i32* [[T_VAR1]], align 4 315 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 316 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 317 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 318 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 319 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 320 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 321 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 322 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 323 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 324 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 325 // CHECK1: cond.true: 326 // CHECK1-NEXT: br label [[COND_END:%.*]] 327 // CHECK1: cond.false: 328 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 329 // CHECK1-NEXT: br label [[COND_END]] 330 // CHECK1: cond.end: 331 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 332 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 333 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 334 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 335 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 336 // CHECK1: omp.inner.for.cond: 337 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 338 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 339 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 340 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 341 // CHECK1: omp.inner.for.body: 342 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 343 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 344 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 345 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 346 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 347 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 348 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 349 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 350 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 351 // CHECK1: omp.body.continue: 352 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 353 // CHECK1: omp.inner.for.inc: 354 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 355 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 356 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 357 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 358 // CHECK1: omp.inner.for.end: 359 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 360 // CHECK1: omp.loop.exit: 361 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 362 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 363 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 364 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 365 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 366 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 367 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 368 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 369 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 370 // CHECK1-NEXT: ] 371 // CHECK1: .omp.reduction.case1: 372 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 373 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 374 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 375 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 376 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 377 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 378 // CHECK1: .omp.reduction.case2: 379 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 380 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 381 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 382 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 383 // CHECK1: .omp.reduction.default: 384 // CHECK1-NEXT: ret void 385 // 386 // 387 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 388 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 389 // CHECK1-NEXT: entry: 390 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 391 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 392 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 393 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 394 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 395 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 396 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 397 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 398 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 399 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 400 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 401 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 402 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 403 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 404 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 405 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 406 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 407 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 408 // CHECK1-NEXT: ret void 409 // 410 // 411 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 412 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] { 413 // CHECK1-NEXT: entry: 414 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 415 // CHECK1-NEXT: ret void 416 // 417 // 418 // CHECK3-LABEL: define {{[^@]+}}@main 419 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 420 // CHECK3-NEXT: entry: 421 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 422 // CHECK3-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4 423 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 424 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 425 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 426 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 427 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 428 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 429 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4 430 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4 431 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 432 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32* 433 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4 434 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 435 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 436 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 437 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 438 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4 439 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 440 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 441 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 442 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 443 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 444 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 445 // CHECK3: omp_offload.failed: 446 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63(i32 [[TMP1]]) #[[ATTR2:[0-9]+]] 447 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 448 // CHECK3: omp_offload.cont: 449 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 450 // CHECK3-NEXT: ret i32 [[CALL]] 451 // 452 // 453 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63 454 // CHECK3-SAME: (i32 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 455 // CHECK3-NEXT: entry: 456 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4 457 // CHECK3-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4 458 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]]) 459 // CHECK3-NEXT: ret void 460 // 461 // 462 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 463 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 464 // CHECK3-NEXT: entry: 465 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 466 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 467 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 468 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 469 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 470 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 471 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 472 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 473 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 474 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 475 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 476 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 477 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 478 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 479 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 480 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 481 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4 482 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 483 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 484 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 485 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 486 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 487 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 488 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 489 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 490 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 491 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 492 // CHECK3: cond.true: 493 // CHECK3-NEXT: br label [[COND_END:%.*]] 494 // CHECK3: cond.false: 495 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 496 // CHECK3-NEXT: br label [[COND_END]] 497 // CHECK3: cond.end: 498 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 499 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 500 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 501 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 502 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 503 // CHECK3: omp.inner.for.cond: 504 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 505 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 506 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 507 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 508 // CHECK3: omp.inner.for.body: 509 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 510 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 511 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 512 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 513 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 514 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 515 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 516 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 517 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 518 // CHECK3: omp.body.continue: 519 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 520 // CHECK3: omp.inner.for.inc: 521 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 522 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 523 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 524 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 525 // CHECK3: omp.inner.for.end: 526 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 527 // CHECK3: omp.loop.exit: 528 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 529 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 530 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 531 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 532 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 533 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 534 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 535 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 536 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 537 // CHECK3-NEXT: ] 538 // CHECK3: .omp.reduction.case1: 539 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 540 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 541 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 542 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 543 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 544 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 545 // CHECK3: .omp.reduction.case2: 546 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 547 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 548 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 549 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 550 // CHECK3: .omp.reduction.default: 551 // CHECK3-NEXT: ret void 552 // 553 // 554 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 555 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 556 // CHECK3-NEXT: entry: 557 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 558 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 559 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 560 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 561 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 562 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 563 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 564 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 565 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 566 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 567 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 568 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 569 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 570 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 571 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 572 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 573 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 574 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 575 // CHECK3-NEXT: ret void 576 // 577 // 578 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 579 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat { 580 // CHECK3-NEXT: entry: 581 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 582 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 583 // CHECK3-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 584 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 585 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 586 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 587 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 588 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4 589 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 590 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 591 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 592 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4 593 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 594 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 595 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32* 596 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4 597 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 598 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 599 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4 600 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 601 // CHECK3-NEXT: store i8* null, i8** [[TMP7]], align 4 602 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 603 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 604 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 605 // CHECK3-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 606 // CHECK3-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 607 // CHECK3-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 608 // CHECK3: omp_offload.failed: 609 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]] 610 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 611 // CHECK3: omp_offload.cont: 612 // CHECK3-NEXT: ret i32 0 613 // 614 // 615 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 616 // CHECK3-SAME: (i32 noundef [[T_VAR:%.*]]) #[[ATTR1]] { 617 // CHECK3-NEXT: entry: 618 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 619 // CHECK3-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 620 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]]) 621 // CHECK3-NEXT: ret void 622 // 623 // 624 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 625 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 626 // CHECK3-NEXT: entry: 627 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 628 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 629 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 630 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 631 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 632 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 633 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 634 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 635 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 636 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 637 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 638 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 639 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 640 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 641 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 642 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 643 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4 644 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 645 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 646 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 647 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 648 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 649 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 650 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 651 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 652 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 653 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 654 // CHECK3: cond.true: 655 // CHECK3-NEXT: br label [[COND_END:%.*]] 656 // CHECK3: cond.false: 657 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 658 // CHECK3-NEXT: br label [[COND_END]] 659 // CHECK3: cond.end: 660 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 661 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 662 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 663 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 664 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 665 // CHECK3: omp.inner.for.cond: 666 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 667 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 668 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 669 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 670 // CHECK3: omp.inner.for.body: 671 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 672 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 673 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 674 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 675 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 676 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 677 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 678 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 679 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 680 // CHECK3: omp.body.continue: 681 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 682 // CHECK3: omp.inner.for.inc: 683 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 684 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 685 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 686 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 687 // CHECK3: omp.inner.for.end: 688 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 689 // CHECK3: omp.loop.exit: 690 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 691 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 692 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 693 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 694 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 695 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 696 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 697 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 698 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 699 // CHECK3-NEXT: ] 700 // CHECK3: .omp.reduction.case1: 701 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 702 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 703 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 704 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 705 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 706 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 707 // CHECK3: .omp.reduction.case2: 708 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 709 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 710 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 711 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 712 // CHECK3: .omp.reduction.default: 713 // CHECK3-NEXT: ret void 714 // 715 // 716 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 717 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 718 // CHECK3-NEXT: entry: 719 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 720 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 721 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 722 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 723 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 724 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 725 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 726 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 727 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 728 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 729 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 730 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 731 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 732 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 733 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 734 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 735 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 736 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 737 // CHECK3-NEXT: ret void 738 // 739 // 740 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 741 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] { 742 // CHECK3-NEXT: entry: 743 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 744 // CHECK3-NEXT: ret void 745 // 746 // 747 // CHECK9-LABEL: define {{[^@]+}}@main 748 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 749 // CHECK9-NEXT: entry: 750 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 751 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 752 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 753 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 754 // CHECK9-NEXT: ret i32 0 755 // 756 // 757 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45 758 // CHECK9-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 759 // CHECK9-NEXT: entry: 760 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 761 // CHECK9-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 762 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 763 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]]) 764 // CHECK9-NEXT: ret void 765 // 766 // 767 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 768 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 769 // CHECK9-NEXT: entry: 770 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 771 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 772 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 773 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 774 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 775 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 776 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 777 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 778 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 779 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 780 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 781 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 782 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 783 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 784 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 785 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 786 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 787 // CHECK9-NEXT: store i32 0, i32* [[SIVAR1]], align 4 788 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 789 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 790 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 791 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 792 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 793 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 794 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 795 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 796 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 797 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 798 // CHECK9: cond.true: 799 // CHECK9-NEXT: br label [[COND_END:%.*]] 800 // CHECK9: cond.false: 801 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 802 // CHECK9-NEXT: br label [[COND_END]] 803 // CHECK9: cond.end: 804 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 805 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 806 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 807 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 808 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 809 // CHECK9: omp.inner.for.cond: 810 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 811 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 812 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 813 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 814 // CHECK9: omp.inner.for.body: 815 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 816 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 817 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 818 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 819 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 820 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 821 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 822 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 823 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 824 // CHECK9-NEXT: store i32* [[SIVAR1]], i32** [[TMP11]], align 8 825 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 826 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 827 // CHECK9: omp.body.continue: 828 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 829 // CHECK9: omp.inner.for.inc: 830 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 831 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 832 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 833 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 834 // CHECK9: omp.inner.for.end: 835 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 836 // CHECK9: omp.loop.exit: 837 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 838 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 839 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i32* [[SIVAR1]] to i8* 840 // CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 841 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 842 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP15]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 843 // CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 844 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 845 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 846 // CHECK9-NEXT: ] 847 // CHECK9: .omp.reduction.case1: 848 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP0]], align 4 849 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 850 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 851 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 852 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 853 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 854 // CHECK9: .omp.reduction.case2: 855 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 856 // CHECK9-NEXT: [[TMP20:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP19]] monotonic, align 4 857 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 858 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 859 // CHECK9: .omp.reduction.default: 860 // CHECK9-NEXT: ret void 861 // 862 // 863 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 864 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 865 // CHECK9-NEXT: entry: 866 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 867 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 868 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 869 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 870 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 871 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 872 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 873 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 874 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 875 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 876 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 877 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 878 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 879 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 880 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 881 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 882 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 883 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 884 // CHECK9-NEXT: ret void 885 // 886 // 887 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 888 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 889 // CHECK9-NEXT: entry: 890 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 891 // CHECK9-NEXT: ret void 892 // 893