1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 // Test host codegen. 6 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 12 13 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 19 #ifdef CK1 20 21 int a[100]; 22 23 int teams_argument_global(int n){ 24 int te = n / 128; 25 int th = 128; 26 // discard n_addr 27 28 29 #pragma omp target 30 #pragma omp teams distribute parallel for simd num_teams(te), thread_limit(th) simdlen(64) 31 for(int i = 0; i < n; i++) { 32 a[i] = 0; 33 } 34 35 int i; 36 #pragma omp target 37 {{{ 38 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 39 for(i = 0; i < n; i++) { 40 a[i] = 0; 41 } 42 }}} 43 // outlined target regions 44 45 46 47 48 return a[0]; 49 } 50 51 52 #endif // CK1 53 54 // Test host codegen. 55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 56 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 57 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 61 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 64 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 67 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 68 #ifdef CK2 69 70 int teams_local_arg(void) { 71 int n = 100; 72 int a[n], i; 73 74 #pragma omp target 75 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 76 for(i = 0; i < n; i++) { 77 a[i] = 0; 78 } 79 80 // outlined target region 81 82 83 return a[0]; 84 } 85 86 87 #endif // CK2 88 89 // Test host codegen. 90 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 91 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 92 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17 93 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 94 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 95 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19 96 97 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21 98 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 99 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK21 100 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23 101 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 102 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK23 103 #ifdef CK3 104 105 106 template <typename T, int X, long long Y> 107 struct SS{ 108 T a[X]; 109 float b; 110 int foo(void) { 111 int i; 112 #pragma omp target 113 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 114 for(i = 0; i < X; i++) { 115 a[i] = (T)0; 116 } 117 118 // outlined target region 119 120 121 return a[0]; 122 } 123 }; 124 125 int teams_template_struct(void) { 126 SS<int, 123, 456> V; 127 return V.foo(); 128 129 } 130 131 #endif // CK3 132 133 // Test host codegen. 134 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK25 135 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 136 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK25 137 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK27 138 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 139 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK27 140 141 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29 142 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 143 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK29 144 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK31 145 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 146 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK31 147 148 #ifdef CK4 149 150 template <typename T, int n> 151 int tmain(T argc) { 152 T a[n]; 153 int te = n/128; 154 int th = 128; 155 #pragma omp target 156 #pragma omp teams distribute parallel for simd num_teams(te) thread_limit(th) simdlen(64) 157 for(int i = 0; i < n; i++) { 158 a[i] = (T)0; 159 } 160 return 0; 161 } 162 163 int main (int argc, char **argv) { 164 int n = 100; 165 int a[n], i; 166 #pragma omp target 167 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 168 for(i = 0; i < n; i++) { 169 a[i] = 0; 170 } 171 return tmain<int, 10>(argc); 172 } 173 174 175 176 177 178 179 180 181 #endif // CK4 182 #endif 183 184 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 185 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 186 // CHECK1-NEXT: entry: 187 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 188 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 191 // CHECK1-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 192 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 193 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 194 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 195 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 196 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 197 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 198 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 199 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 201 // CHECK1-NEXT: [[N_CASTED7:%.*]] = alloca i64, align 8 202 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [3 x i8*], align 8 203 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [3 x i8*], align 8 204 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [3 x i8*], align 8 205 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 206 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 207 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4 208 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 209 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 210 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 211 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 212 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4 213 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 214 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 215 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 216 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8 217 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 218 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 219 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 220 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8 221 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 222 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 223 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 224 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 225 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 226 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 227 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 228 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 229 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 230 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8 231 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 232 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 233 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 234 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 235 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8 236 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 237 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 238 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8 239 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 240 // CHECK1-NEXT: store i8* null, i8** [[TMP16]], align 8 241 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 242 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 243 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8 244 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 245 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 246 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8 247 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 248 // CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8 249 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 250 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 251 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8 252 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 253 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 254 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8 255 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 256 // CHECK1-NEXT: store i8* null, i8** [[TMP26]], align 8 257 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 258 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 259 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 260 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4 261 // CHECK1-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4 262 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 263 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0 264 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1 265 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1 266 // CHECK1-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 267 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 268 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1 269 // CHECK1-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64 270 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP33]]) 271 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 0) 272 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 273 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 274 // CHECK1: omp_offload.failed: 275 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 276 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 277 // CHECK1: omp_offload.cont: 278 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[I]], align 4 279 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[I_CASTED]] to i32* 280 // CHECK1-NEXT: store i32 [[TMP36]], i32* [[CONV6]], align 4 281 // CHECK1-NEXT: [[TMP37:%.*]] = load i64, i64* [[I_CASTED]], align 8 282 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[N_ADDR]], align 4 283 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED7]] to i32* 284 // CHECK1-NEXT: store i32 [[TMP38]], i32* [[CONV8]], align 4 285 // CHECK1-NEXT: [[TMP39:%.*]] = load i64, i64* [[N_CASTED7]], align 8 286 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 287 // CHECK1-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to [100 x i32]** 288 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP41]], align 8 289 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 290 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to [100 x i32]** 291 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP43]], align 8 292 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0 293 // CHECK1-NEXT: store i8* null, i8** [[TMP44]], align 8 294 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 1 295 // CHECK1-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 296 // CHECK1-NEXT: store i64 [[TMP37]], i64* [[TMP46]], align 8 297 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 1 298 // CHECK1-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 299 // CHECK1-NEXT: store i64 [[TMP37]], i64* [[TMP48]], align 8 300 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 1 301 // CHECK1-NEXT: store i8* null, i8** [[TMP49]], align 8 302 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 2 303 // CHECK1-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64* 304 // CHECK1-NEXT: store i64 [[TMP39]], i64* [[TMP51]], align 8 305 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 2 306 // CHECK1-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64* 307 // CHECK1-NEXT: store i64 [[TMP39]], i64* [[TMP53]], align 8 308 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 2 309 // CHECK1-NEXT: store i8* null, i8** [[TMP54]], align 8 310 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 311 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 312 // CHECK1-NEXT: [[TMP57:%.*]] = load i32, i32* [[N_ADDR]], align 4 313 // CHECK1-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_13]], align 4 314 // CHECK1-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 315 // CHECK1-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP58]], 0 316 // CHECK1-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 317 // CHECK1-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1 318 // CHECK1-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4 319 // CHECK1-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4 320 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP59]], 1 321 // CHECK1-NEXT: [[TMP60:%.*]] = zext i32 [[ADD18]] to i64 322 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]]) 323 // CHECK1-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 324 // CHECK1-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 325 // CHECK1-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]] 326 // CHECK1: omp_offload.failed19: 327 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36([100 x i32]* @a, i64 [[TMP37]], i64 [[TMP39]]) #[[ATTR2]] 328 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT20]] 329 // CHECK1: omp_offload.cont20: 330 // CHECK1-NEXT: [[TMP63:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 331 // CHECK1-NEXT: ret i32 [[TMP63]] 332 // 333 // 334 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 335 // CHECK1-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], i64 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 336 // CHECK1-NEXT: entry: 337 // CHECK1-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 338 // CHECK1-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 339 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 340 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 341 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 342 // CHECK1-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 343 // CHECK1-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 344 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 345 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 346 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 347 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 348 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32* 349 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 350 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 351 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 352 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 353 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]]) 354 // CHECK1-NEXT: ret void 355 // 356 // 357 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 358 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 359 // CHECK1-NEXT: entry: 360 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 361 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 362 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 363 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 364 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 365 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 366 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 367 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 368 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 369 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 370 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 371 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 372 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 373 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 374 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 375 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 376 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 377 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 378 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 379 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 380 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 381 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 382 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 383 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 384 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 385 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 386 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 387 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 388 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 389 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 390 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 391 // CHECK1: omp.precond.then: 392 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 393 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 394 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 395 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 396 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 397 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 398 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 399 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 400 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 401 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 402 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 403 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 404 // CHECK1: cond.true: 405 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 406 // CHECK1-NEXT: br label [[COND_END:%.*]] 407 // CHECK1: cond.false: 408 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 409 // CHECK1-NEXT: br label [[COND_END]] 410 // CHECK1: cond.end: 411 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 412 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 413 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 414 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 415 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 416 // CHECK1: omp.inner.for.cond: 417 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 418 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 419 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 420 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 421 // CHECK1: omp.inner.for.body: 422 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5 423 // CHECK1-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 424 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 425 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 426 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i32* [[TMP0]], [100 x i32]* [[TMP1]]), !llvm.access.group !5 427 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 428 // CHECK1: omp.inner.for.inc: 429 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 430 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5 431 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 432 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 433 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 434 // CHECK1: omp.inner.for.end: 435 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 436 // CHECK1: omp.loop.exit: 437 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 438 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 439 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 440 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 441 // CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 442 // CHECK1-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 443 // CHECK1: .omp.final.then: 444 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 445 // CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 446 // CHECK1-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 447 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 448 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 449 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 450 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 451 // CHECK1: .omp.final.done: 452 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 453 // CHECK1: omp.precond.end: 454 // CHECK1-NEXT: ret void 455 // 456 // 457 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 458 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 459 // CHECK1-NEXT: entry: 460 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 461 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 462 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 463 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 464 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 465 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 466 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 467 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 468 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 469 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 470 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 471 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 472 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 473 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 474 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 475 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 476 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 477 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 478 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 479 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 480 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 481 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 482 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 483 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 484 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 485 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 486 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 487 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 488 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 489 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 490 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 491 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 492 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 493 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 494 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 495 // CHECK1: omp.precond.then: 496 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 497 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 498 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 499 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 500 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 501 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 502 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 503 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 504 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 505 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 506 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 507 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 508 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 509 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 510 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 511 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 512 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 513 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 514 // CHECK1: cond.true: 515 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 516 // CHECK1-NEXT: br label [[COND_END:%.*]] 517 // CHECK1: cond.false: 518 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 519 // CHECK1-NEXT: br label [[COND_END]] 520 // CHECK1: cond.end: 521 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 522 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 523 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 524 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 525 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 526 // CHECK1: omp.inner.for.cond: 527 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 528 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 529 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 530 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 531 // CHECK1: omp.inner.for.body: 532 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 533 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 534 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 535 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !10 536 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !10 537 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 538 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 539 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 540 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 541 // CHECK1: omp.body.continue: 542 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 543 // CHECK1: omp.inner.for.inc: 544 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 545 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 546 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 547 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 548 // CHECK1: omp.inner.for.end: 549 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 550 // CHECK1: omp.loop.exit: 551 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 552 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 553 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 554 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 555 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 556 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 557 // CHECK1: .omp.final.then: 558 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 559 // CHECK1-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0 560 // CHECK1-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 561 // CHECK1-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 562 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 563 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4 564 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 565 // CHECK1: .omp.final.done: 566 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 567 // CHECK1: omp.precond.end: 568 // CHECK1-NEXT: ret void 569 // 570 // 571 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36 572 // CHECK1-SAME: ([100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] { 573 // CHECK1-NEXT: entry: 574 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 575 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 576 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 577 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 578 // CHECK1-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8 579 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 580 // CHECK1-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 581 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32* 582 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 583 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], [100 x i32]* [[TMP0]]) 584 // CHECK1-NEXT: ret void 585 // 586 // 587 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 588 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 589 // CHECK1-NEXT: entry: 590 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 591 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 592 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 593 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 594 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 595 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 596 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 597 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 598 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 599 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 600 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 601 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 602 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 603 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 604 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 605 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 606 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 607 // CHECK1-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 608 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 609 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 610 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 611 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 612 // CHECK1-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 613 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 614 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 615 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 616 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 617 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 618 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 619 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 620 // CHECK1-NEXT: store i32 0, i32* [[I3]], align 4 621 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 622 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 623 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 624 // CHECK1: omp.precond.then: 625 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 0 626 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ] 627 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 628 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 629 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 630 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 631 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 632 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 633 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 634 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 635 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 636 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 637 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 638 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 639 // CHECK1: cond.true: 640 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 641 // CHECK1-NEXT: br label [[COND_END:%.*]] 642 // CHECK1: cond.false: 643 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 644 // CHECK1-NEXT: br label [[COND_END]] 645 // CHECK1: cond.end: 646 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 647 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 648 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 649 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 650 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 651 // CHECK1: omp.inner.for.cond: 652 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 653 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 654 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 655 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 656 // CHECK1: omp.inner.for.body: 657 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 658 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 659 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 660 // CHECK1-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 661 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[I4]], i32* [[TMP1]], [100 x i32]* [[TMP2]]) 662 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 663 // CHECK1: omp.inner.for.inc: 664 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 665 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 666 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 667 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 668 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 669 // CHECK1: omp.inner.for.end: 670 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 671 // CHECK1: omp.loop.exit: 672 // CHECK1-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 673 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 674 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 675 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 676 // CHECK1-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 677 // CHECK1-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 678 // CHECK1: .omp.final.then: 679 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 680 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0 681 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 682 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 683 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 684 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 685 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 686 // CHECK1: .omp.final.done: 687 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 688 // CHECK1: omp.precond.end: 689 // CHECK1-NEXT: ret void 690 // 691 // 692 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 693 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 694 // CHECK1-NEXT: entry: 695 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 696 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 697 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 698 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 699 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 700 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 701 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 702 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 703 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 704 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 705 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 706 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 707 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 708 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 709 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 710 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 711 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 712 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 713 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4 714 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 715 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 716 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 717 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 718 // CHECK1-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 719 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 720 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 721 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 722 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 723 // CHECK1-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 724 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 725 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 726 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 727 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 728 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 729 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 730 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 731 // CHECK1-NEXT: store i32 0, i32* [[I3]], align 4 732 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 733 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 734 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 735 // CHECK1: omp.precond.then: 736 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 0 737 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ] 738 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 739 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4 740 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 741 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 742 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 743 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 744 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 745 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 746 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32 747 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 748 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 749 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 750 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 751 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 752 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 753 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP11]]) 754 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 755 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 756 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 757 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 758 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 759 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 760 // CHECK1-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 761 // CHECK1: cond.true: 762 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 763 // CHECK1-NEXT: br label [[COND_END:%.*]] 764 // CHECK1: cond.false: 765 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 766 // CHECK1-NEXT: br label [[COND_END]] 767 // CHECK1: cond.end: 768 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 769 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 770 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 771 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 772 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 773 // CHECK1: omp.inner.for.cond: 774 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 775 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 776 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 777 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 778 // CHECK1: omp.inner.for.body: 779 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 780 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 781 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 782 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 783 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[I5]], align 4 784 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 785 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 [[IDXPROM]] 786 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 787 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 788 // CHECK1: omp.body.continue: 789 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 790 // CHECK1: omp.inner.for.inc: 791 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 792 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP23]], 1 793 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 794 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 795 // CHECK1: omp.inner.for.end: 796 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 797 // CHECK1: omp.loop.exit: 798 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 799 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 800 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 801 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 802 // CHECK1-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 803 // CHECK1-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 804 // CHECK1: .omp.final.then: 805 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 806 // CHECK1-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0 807 // CHECK1-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 808 // CHECK1-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 809 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 810 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4 811 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 812 // CHECK1: .omp.final.done: 813 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 814 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 815 // CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 816 // CHECK1: .omp.linear.pu: 817 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 818 // CHECK1: .omp.linear.pu.done: 819 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 820 // CHECK1: omp.precond.end: 821 // CHECK1-NEXT: ret void 822 // 823 // 824 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 825 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 826 // CHECK1-NEXT: entry: 827 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 828 // CHECK1-NEXT: ret void 829 // 830 // 831 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 832 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 833 // CHECK3-NEXT: entry: 834 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 835 // CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4 836 // CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4 837 // CHECK3-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 838 // CHECK3-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 839 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 840 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 841 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 842 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 843 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 844 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 845 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 846 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 847 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 848 // CHECK3-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4 849 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 4 850 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 4 851 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 4 852 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 853 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 854 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 855 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 856 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 857 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 858 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 859 // CHECK3-NEXT: store i32 128, i32* [[TH]], align 4 860 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 861 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4 862 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4 863 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 864 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4 865 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4 866 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 867 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4 868 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4 869 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 870 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 871 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 872 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 873 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 874 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4 875 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 876 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4 877 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 878 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 879 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4 880 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 881 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 882 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4 883 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 884 // CHECK3-NEXT: store i8* null, i8** [[TMP16]], align 4 885 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 886 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 887 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4 888 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 889 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 890 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4 891 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 892 // CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4 893 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 894 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 895 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4 896 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 897 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 898 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4 899 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 900 // CHECK3-NEXT: store i8* null, i8** [[TMP26]], align 4 901 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 902 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 903 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 904 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4 905 // CHECK3-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4 906 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 907 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0 908 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 909 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 910 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 911 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 912 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1 913 // CHECK3-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64 914 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP33]]) 915 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 0) 916 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 917 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 918 // CHECK3: omp_offload.failed: 919 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 920 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 921 // CHECK3: omp_offload.cont: 922 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[I]], align 4 923 // CHECK3-NEXT: store i32 [[TMP36]], i32* [[I_CASTED]], align 4 924 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[I_CASTED]], align 4 925 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[N_ADDR]], align 4 926 // CHECK3-NEXT: store i32 [[TMP38]], i32* [[N_CASTED4]], align 4 927 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[N_CASTED4]], align 4 928 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 929 // CHECK3-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to [100 x i32]** 930 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP41]], align 4 931 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 932 // CHECK3-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to [100 x i32]** 933 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP43]], align 4 934 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 935 // CHECK3-NEXT: store i8* null, i8** [[TMP44]], align 4 936 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 937 // CHECK3-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 938 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[TMP46]], align 4 939 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 940 // CHECK3-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 941 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[TMP48]], align 4 942 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 943 // CHECK3-NEXT: store i8* null, i8** [[TMP49]], align 4 944 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 945 // CHECK3-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32* 946 // CHECK3-NEXT: store i32 [[TMP39]], i32* [[TMP51]], align 4 947 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 948 // CHECK3-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i32* 949 // CHECK3-NEXT: store i32 [[TMP39]], i32* [[TMP53]], align 4 950 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 2 951 // CHECK3-NEXT: store i8* null, i8** [[TMP54]], align 4 952 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 953 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 954 // CHECK3-NEXT: [[TMP57:%.*]] = load i32, i32* [[N_ADDR]], align 4 955 // CHECK3-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_9]], align 4 956 // CHECK3-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 957 // CHECK3-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP58]], 0 958 // CHECK3-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 959 // CHECK3-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 960 // CHECK3-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 961 // CHECK3-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 962 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP59]], 1 963 // CHECK3-NEXT: [[TMP60:%.*]] = zext i32 [[ADD14]] to i64 964 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]]) 965 // CHECK3-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 966 // CHECK3-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 967 // CHECK3-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 968 // CHECK3: omp_offload.failed15: 969 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36([100 x i32]* @a, i32 [[TMP37]], i32 [[TMP39]]) #[[ATTR2]] 970 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT16]] 971 // CHECK3: omp_offload.cont16: 972 // CHECK3-NEXT: [[TMP63:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 973 // CHECK3-NEXT: ret i32 [[TMP63]] 974 // 975 // 976 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 977 // CHECK3-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], i32 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 978 // CHECK3-NEXT: entry: 979 // CHECK3-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 980 // CHECK3-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 981 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 982 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 983 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 984 // CHECK3-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 985 // CHECK3-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 986 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 987 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 988 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 989 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 990 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 991 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 992 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]]) 993 // CHECK3-NEXT: ret void 994 // 995 // 996 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 997 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 998 // CHECK3-NEXT: entry: 999 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1000 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1001 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1002 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1003 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1004 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1005 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1006 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1007 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1008 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1009 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1010 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1011 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1012 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1013 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1014 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1015 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1016 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1017 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1018 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1019 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1020 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1021 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1022 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1023 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1024 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1025 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1026 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1027 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1028 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1029 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1030 // CHECK3: omp.precond.then: 1031 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1032 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1033 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 1034 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1035 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1036 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1037 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1038 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1039 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1040 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1041 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1042 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1043 // CHECK3: cond.true: 1044 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1045 // CHECK3-NEXT: br label [[COND_END:%.*]] 1046 // CHECK3: cond.false: 1047 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1048 // CHECK3-NEXT: br label [[COND_END]] 1049 // CHECK3: cond.end: 1050 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1051 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1052 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1053 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1054 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1055 // CHECK3: omp.inner.for.cond: 1056 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 1057 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 1058 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1059 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1060 // CHECK3: omp.inner.for.body: 1061 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !6 1062 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 1063 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32* [[TMP0]], [100 x i32]* [[TMP1]]), !llvm.access.group !6 1064 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1065 // CHECK3: omp.inner.for.inc: 1066 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 1067 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !6 1068 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1069 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 1070 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 1071 // CHECK3: omp.inner.for.end: 1072 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1073 // CHECK3: omp.loop.exit: 1074 // CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1075 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1076 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1077 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1078 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1079 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1080 // CHECK3: .omp.final.then: 1081 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1082 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP23]], 0 1083 // CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1084 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 1085 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 1086 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 1087 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1088 // CHECK3: .omp.final.done: 1089 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1090 // CHECK3: omp.precond.end: 1091 // CHECK3-NEXT: ret void 1092 // 1093 // 1094 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1095 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1096 // CHECK3-NEXT: entry: 1097 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1098 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1099 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1100 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1101 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1102 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1103 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1104 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1105 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1106 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1107 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1108 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1109 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1110 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1111 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1112 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1113 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1114 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1115 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1116 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1117 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1118 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1119 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1120 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1121 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1122 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1123 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1124 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1125 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1126 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1127 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1128 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1129 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1130 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1131 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1132 // CHECK3: omp.precond.then: 1133 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1134 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1135 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1136 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1137 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1138 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4 1139 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1140 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1141 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1142 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1143 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1144 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1145 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1146 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1147 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1148 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1149 // CHECK3: cond.true: 1150 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1151 // CHECK3-NEXT: br label [[COND_END:%.*]] 1152 // CHECK3: cond.false: 1153 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1154 // CHECK3-NEXT: br label [[COND_END]] 1155 // CHECK3: cond.end: 1156 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1157 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1158 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1159 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1160 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1161 // CHECK3: omp.inner.for.cond: 1162 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1163 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 1164 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1165 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1166 // CHECK3: omp.inner.for.body: 1167 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1168 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 1169 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1170 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !11 1171 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !11 1172 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP18]] 1173 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 1174 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1175 // CHECK3: omp.body.continue: 1176 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1177 // CHECK3: omp.inner.for.inc: 1178 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1179 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 1180 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1181 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1182 // CHECK3: omp.inner.for.end: 1183 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1184 // CHECK3: omp.loop.exit: 1185 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1186 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1187 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1188 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1189 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1190 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1191 // CHECK3: .omp.final.then: 1192 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1193 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 1194 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1195 // CHECK3-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1196 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1197 // CHECK3-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 1198 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1199 // CHECK3: .omp.final.done: 1200 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1201 // CHECK3: omp.precond.end: 1202 // CHECK3-NEXT: ret void 1203 // 1204 // 1205 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36 1206 // CHECK3-SAME: ([100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR1]] { 1207 // CHECK3-NEXT: entry: 1208 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1209 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 1210 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1211 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1212 // CHECK3-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4 1213 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1214 // CHECK3-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1215 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], [100 x i32]* [[TMP0]]) 1216 // CHECK3-NEXT: ret void 1217 // 1218 // 1219 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1220 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1221 // CHECK3-NEXT: entry: 1222 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1223 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1224 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 1225 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1226 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1227 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1228 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1229 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1230 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1231 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1232 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1233 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1234 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1235 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1236 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 1237 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1238 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1239 // CHECK3-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 1240 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1241 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1242 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 1243 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1244 // CHECK3-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1245 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 1246 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1247 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1248 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1249 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1250 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1251 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1252 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4 1253 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1254 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1255 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1256 // CHECK3: omp.precond.then: 1257 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 0 1258 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ] 1259 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1260 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1261 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 1262 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1263 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1264 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1265 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1266 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1267 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1268 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1269 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1270 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1271 // CHECK3: cond.true: 1272 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1273 // CHECK3-NEXT: br label [[COND_END:%.*]] 1274 // CHECK3: cond.false: 1275 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1276 // CHECK3-NEXT: br label [[COND_END]] 1277 // CHECK3: cond.end: 1278 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1279 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1280 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1281 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1282 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1283 // CHECK3: omp.inner.for.cond: 1284 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1285 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1286 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1287 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1288 // CHECK3: omp.inner.for.body: 1289 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1290 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1291 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[I4]], i32* [[TMP1]], [100 x i32]* [[TMP2]]) 1292 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1293 // CHECK3: omp.inner.for.inc: 1294 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1295 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1296 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1297 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1298 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1299 // CHECK3: omp.inner.for.end: 1300 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1301 // CHECK3: omp.loop.exit: 1302 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1303 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1304 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1305 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1306 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1307 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1308 // CHECK3: .omp.final.then: 1309 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1310 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 1311 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1312 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 1313 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 1314 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 1315 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1316 // CHECK3: .omp.final.done: 1317 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1318 // CHECK3: omp.precond.end: 1319 // CHECK3-NEXT: ret void 1320 // 1321 // 1322 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 1323 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1324 // CHECK3-NEXT: entry: 1325 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1326 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1327 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1328 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1329 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 1330 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1331 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1332 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1333 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1334 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1335 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1336 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1337 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1338 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1339 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1340 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1341 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1342 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 1343 // CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 4 1344 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1345 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1346 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1347 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1348 // CHECK3-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 1349 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1350 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1351 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 1352 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1353 // CHECK3-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1354 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 1355 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1356 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1357 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1358 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1359 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1360 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1361 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4 1362 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1363 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1364 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1365 // CHECK3: omp.precond.then: 1366 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 0 1367 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ] 1368 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 1369 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4 1370 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1371 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1372 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1373 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1374 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1375 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 1376 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 1377 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1378 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1379 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1380 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1381 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP11]]) 1382 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1383 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1384 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1385 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1386 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1387 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 1388 // CHECK3-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1389 // CHECK3: cond.true: 1390 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1391 // CHECK3-NEXT: br label [[COND_END:%.*]] 1392 // CHECK3: cond.false: 1393 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1394 // CHECK3-NEXT: br label [[COND_END]] 1395 // CHECK3: cond.end: 1396 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1397 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1398 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1399 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 1400 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1401 // CHECK3: omp.inner.for.cond: 1402 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1403 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1404 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 1405 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1406 // CHECK3: omp.inner.for.body: 1407 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1408 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 1409 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1410 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 1411 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4 1412 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 [[TMP22]] 1413 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1414 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1415 // CHECK3: omp.body.continue: 1416 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1417 // CHECK3: omp.inner.for.inc: 1418 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1419 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], 1 1420 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1421 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 1422 // CHECK3: omp.inner.for.end: 1423 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1424 // CHECK3: omp.loop.exit: 1425 // CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1426 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1427 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1428 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1429 // CHECK3-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 1430 // CHECK3-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1431 // CHECK3: .omp.final.then: 1432 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1433 // CHECK3-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP28]], 0 1434 // CHECK3-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 1435 // CHECK3-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 1436 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1437 // CHECK3-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4 1438 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1439 // CHECK3: .omp.final.done: 1440 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1441 // CHECK3-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1442 // CHECK3-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1443 // CHECK3: .omp.linear.pu: 1444 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1445 // CHECK3: .omp.linear.pu.done: 1446 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1447 // CHECK3: omp.precond.end: 1448 // CHECK3-NEXT: ret void 1449 // 1450 // 1451 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1452 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] { 1453 // CHECK3-NEXT: entry: 1454 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1455 // CHECK3-NEXT: ret void 1456 // 1457 // 1458 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1459 // CHECK5-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1460 // CHECK5-NEXT: entry: 1461 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1462 // CHECK5-NEXT: [[TE:%.*]] = alloca i32, align 4 1463 // CHECK5-NEXT: [[TH:%.*]] = alloca i32, align 4 1464 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1465 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1466 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1467 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1468 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1469 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1470 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1471 // CHECK5-NEXT: [[I4:%.*]] = alloca i32, align 4 1472 // CHECK5-NEXT: [[I11:%.*]] = alloca i32, align 4 1473 // CHECK5-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 1474 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 1475 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4 1476 // CHECK5-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 1477 // CHECK5-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 1478 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4 1479 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1480 // CHECK5-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1481 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4 1482 // CHECK5-NEXT: [[I25:%.*]] = alloca i32, align 4 1483 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1484 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1485 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1486 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1487 // CHECK5-NEXT: store i32 128, i32* [[TH]], align 4 1488 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1489 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1490 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1491 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1492 // CHECK5-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 1493 // CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 1494 // CHECK5-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1495 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1496 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1497 // CHECK5-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4 1498 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 1499 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1500 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1501 // CHECK5-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 1502 // CHECK5: simd.if.then: 1503 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1504 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1505 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1506 // CHECK5: omp.inner.for.cond: 1507 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1508 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 1509 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1510 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1511 // CHECK5: omp.inner.for.body: 1512 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1513 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1514 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1515 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !2 1516 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !2 1517 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1518 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM]] 1519 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 1520 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1521 // CHECK5: omp.body.continue: 1522 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1523 // CHECK5: omp.inner.for.inc: 1524 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1525 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 1526 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1527 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1528 // CHECK5: omp.inner.for.end: 1529 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1530 // CHECK5-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 0 1531 // CHECK5-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1532 // CHECK5-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1533 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1534 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 1535 // CHECK5-NEXT: br label [[SIMD_IF_END]] 1536 // CHECK5: simd.if.end: 1537 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[N_ADDR]], align 4 1538 // CHECK5-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_13]], align 4 1539 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1540 // CHECK5-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 0 1541 // CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1542 // CHECK5-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1 1543 // CHECK5-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4 1544 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4 1545 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4 1546 // CHECK5-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_UB19]], align 4 1547 // CHECK5-NEXT: store i32 0, i32* [[I20]], align 4 1548 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1549 // CHECK5-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]] 1550 // CHECK5-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END41:%.*]] 1551 // CHECK5: simd.if.then22: 1552 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4 1553 // CHECK5-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV23]], align 4 1554 // CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), i64 16) ] 1555 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[I11]], align 4 1556 // CHECK5-NEXT: store i32 [[TMP17]], i32* [[DOTLINEAR_START]], align 4 1557 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]] 1558 // CHECK5: omp.inner.for.cond26: 1559 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1560 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4 1561 // CHECK5-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 1562 // CHECK5-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 1563 // CHECK5: omp.inner.for.body28: 1564 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1565 // CHECK5-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1 1566 // CHECK5-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]] 1567 // CHECK5-NEXT: store i32 [[ADD30]], i32* [[I24]], align 4 1568 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[I24]], align 4 1569 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP21]] to i64 1570 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM31]] 1571 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4 1572 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 1573 // CHECK5: omp.body.continue33: 1574 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 1575 // CHECK5: omp.inner.for.inc34: 1576 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1577 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP22]], 1 1578 // CHECK5-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4 1579 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP7:![0-9]+]] 1580 // CHECK5: omp.inner.for.end36: 1581 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1582 // CHECK5-NEXT: [[SUB37:%.*]] = sub nsw i32 [[TMP23]], 0 1583 // CHECK5-NEXT: [[DIV38:%.*]] = sdiv i32 [[SUB37]], 1 1584 // CHECK5-NEXT: [[MUL39:%.*]] = mul nsw i32 [[DIV38]], 1 1585 // CHECK5-NEXT: [[ADD40:%.*]] = add nsw i32 0, [[MUL39]] 1586 // CHECK5-NEXT: store i32 [[ADD40]], i32* [[I11]], align 4 1587 // CHECK5-NEXT: br label [[SIMD_IF_END41]] 1588 // CHECK5: simd.if.end41: 1589 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 1590 // CHECK5-NEXT: ret i32 [[TMP24]] 1591 // 1592 // 1593 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1594 // CHECK7-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1595 // CHECK7-NEXT: entry: 1596 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1597 // CHECK7-NEXT: [[TE:%.*]] = alloca i32, align 4 1598 // CHECK7-NEXT: [[TH:%.*]] = alloca i32, align 4 1599 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 1600 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1601 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1602 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1603 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1604 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1605 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1606 // CHECK7-NEXT: [[I4:%.*]] = alloca i32, align 4 1607 // CHECK7-NEXT: [[I11:%.*]] = alloca i32, align 4 1608 // CHECK7-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 1609 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 1610 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4 1611 // CHECK7-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 1612 // CHECK7-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 1613 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4 1614 // CHECK7-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1615 // CHECK7-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1616 // CHECK7-NEXT: [[I24:%.*]] = alloca i32, align 4 1617 // CHECK7-NEXT: [[I25:%.*]] = alloca i32, align 4 1618 // CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1619 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1620 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1621 // CHECK7-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1622 // CHECK7-NEXT: store i32 128, i32* [[TH]], align 4 1623 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1624 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1625 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1626 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1627 // CHECK7-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 1628 // CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 1629 // CHECK7-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1630 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1631 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1632 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4 1633 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 1634 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1635 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1636 // CHECK7-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 1637 // CHECK7: simd.if.then: 1638 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1639 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1640 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1641 // CHECK7: omp.inner.for.cond: 1642 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1643 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 1644 // CHECK7-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1645 // CHECK7-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1646 // CHECK7: omp.inner.for.body: 1647 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1648 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1649 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1650 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !3 1651 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !3 1652 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP9]] 1653 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 1654 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1655 // CHECK7: omp.body.continue: 1656 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1657 // CHECK7: omp.inner.for.inc: 1658 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1659 // CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 1660 // CHECK7-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1661 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1662 // CHECK7: omp.inner.for.end: 1663 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1664 // CHECK7-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 0 1665 // CHECK7-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1666 // CHECK7-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1667 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1668 // CHECK7-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 1669 // CHECK7-NEXT: br label [[SIMD_IF_END]] 1670 // CHECK7: simd.if.end: 1671 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[N_ADDR]], align 4 1672 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_13]], align 4 1673 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1674 // CHECK7-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 0 1675 // CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1676 // CHECK7-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1 1677 // CHECK7-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4 1678 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4 1679 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4 1680 // CHECK7-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_UB19]], align 4 1681 // CHECK7-NEXT: store i32 0, i32* [[I20]], align 4 1682 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1683 // CHECK7-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]] 1684 // CHECK7-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END40:%.*]] 1685 // CHECK7: simd.if.then22: 1686 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4 1687 // CHECK7-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV23]], align 4 1688 // CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32 16) ] 1689 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[I11]], align 4 1690 // CHECK7-NEXT: store i32 [[TMP17]], i32* [[DOTLINEAR_START]], align 4 1691 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]] 1692 // CHECK7: omp.inner.for.cond26: 1693 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1694 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4 1695 // CHECK7-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 1696 // CHECK7-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END35:%.*]] 1697 // CHECK7: omp.inner.for.body28: 1698 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1699 // CHECK7-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1 1700 // CHECK7-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]] 1701 // CHECK7-NEXT: store i32 [[ADD30]], i32* [[I24]], align 4 1702 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[I24]], align 4 1703 // CHECK7-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP21]] 1704 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX31]], align 4 1705 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE32:%.*]] 1706 // CHECK7: omp.body.continue32: 1707 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC33:%.*]] 1708 // CHECK7: omp.inner.for.inc33: 1709 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1710 // CHECK7-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP22]], 1 1711 // CHECK7-NEXT: store i32 [[ADD34]], i32* [[DOTOMP_IV23]], align 4 1712 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP8:![0-9]+]] 1713 // CHECK7: omp.inner.for.end35: 1714 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1715 // CHECK7-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP23]], 0 1716 // CHECK7-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1 1717 // CHECK7-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1 1718 // CHECK7-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]] 1719 // CHECK7-NEXT: store i32 [[ADD39]], i32* [[I11]], align 4 1720 // CHECK7-NEXT: br label [[SIMD_IF_END40]] 1721 // CHECK7: simd.if.end40: 1722 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 1723 // CHECK7-NEXT: ret i32 [[TMP24]] 1724 // 1725 // 1726 // CHECK9-LABEL: define {{[^@]+}}@_Z15teams_local_argv 1727 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1728 // CHECK9-NEXT: entry: 1729 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1730 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1731 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1732 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1733 // CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 1734 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1735 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1736 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1737 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1738 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8 1739 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1740 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1741 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1742 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 1743 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1744 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1745 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1746 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 1747 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1748 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1749 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1750 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32* 1751 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1752 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8 1753 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4 1754 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1755 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1756 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 1757 // CHECK9-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4 1758 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1759 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP8]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes to i8*), i64 32, i1 false) 1760 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1761 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1762 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 1763 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1764 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 1765 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8 1766 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1767 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 1768 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1769 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32** 1770 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 8 1771 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1772 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32** 1773 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 8 1774 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 1775 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 8 1776 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1777 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8 1778 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1779 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 1780 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP21]], align 8 1781 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1782 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 1783 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP23]], align 8 1784 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1785 // CHECK9-NEXT: store i8* null, i8** [[TMP24]], align 8 1786 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1787 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 1788 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP26]], align 8 1789 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1790 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 1791 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP28]], align 8 1792 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1793 // CHECK9-NEXT: store i8* null, i8** [[TMP29]], align 8 1794 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1795 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1796 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1797 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 1798 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_]], align 4 1799 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1800 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 1801 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1802 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1803 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1804 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1805 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 1806 // CHECK9-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 1807 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP36]]) 1808 // CHECK9-NEXT: [[TMP37:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, i32 4, i8** [[TMP30]], i8** [[TMP31]], i64* [[TMP32]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1809 // CHECK9-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 1810 // CHECK9-NEXT: br i1 [[TMP38]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1811 // CHECK9: omp_offload.failed: 1812 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i64 [[TMP1]], i32* [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR5:[0-9]+]] 1813 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1814 // CHECK9: omp_offload.cont: 1815 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 1816 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1817 // CHECK9-NEXT: [[TMP40:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1818 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP40]]) 1819 // CHECK9-NEXT: ret i32 [[TMP39]] 1820 // 1821 // 1822 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74 1823 // CHECK9-SAME: (i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 1824 // CHECK9-NEXT: entry: 1825 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1826 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1827 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 1828 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1829 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1830 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1831 // CHECK9-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8 1832 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1833 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1834 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1835 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32* 1836 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1837 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]]) 1838 // CHECK9-NEXT: ret void 1839 // 1840 // 1841 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1842 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1843 // CHECK9-NEXT: entry: 1844 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1845 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1846 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 1847 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1848 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1849 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1850 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1851 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1852 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1853 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1854 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1855 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1856 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1857 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1858 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1859 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 1860 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1861 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1862 // CHECK9-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 1863 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1864 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1865 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1866 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 1867 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1868 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1869 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1870 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 1871 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1872 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1873 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1874 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1875 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1876 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1877 // CHECK9-NEXT: store i32 0, i32* [[I3]], align 4 1878 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1879 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1880 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1881 // CHECK9: omp.precond.then: 1882 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ] 1883 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1884 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1885 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 1886 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1887 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1888 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1889 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1890 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1891 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1892 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1893 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1894 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1895 // CHECK9: cond.true: 1896 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1897 // CHECK9-NEXT: br label [[COND_END:%.*]] 1898 // CHECK9: cond.false: 1899 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1900 // CHECK9-NEXT: br label [[COND_END]] 1901 // CHECK9: cond.end: 1902 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1903 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1904 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1905 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1906 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1907 // CHECK9: omp.inner.for.cond: 1908 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1909 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1910 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1911 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1912 // CHECK9: omp.inner.for.body: 1913 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1914 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 1915 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1916 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1917 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[I4]], i32* [[TMP1]], i64 [[TMP2]], i32* [[TMP3]]) 1918 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1919 // CHECK9: omp.inner.for.inc: 1920 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1921 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1922 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1923 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1924 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1925 // CHECK9: omp.inner.for.end: 1926 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1927 // CHECK9: omp.loop.exit: 1928 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1929 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1930 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1931 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1932 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1933 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1934 // CHECK9: .omp.final.then: 1935 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1936 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0 1937 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1938 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 1939 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 1940 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 1941 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1942 // CHECK9: .omp.final.done: 1943 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1944 // CHECK9: omp.precond.end: 1945 // CHECK9-NEXT: ret void 1946 // 1947 // 1948 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1949 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1950 // CHECK9-NEXT: entry: 1951 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1952 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1953 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1954 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1955 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 1956 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1957 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1958 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1959 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1960 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1961 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1962 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1963 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1964 // CHECK9-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1965 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1966 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1967 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1968 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1969 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 1970 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 1971 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1972 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1973 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1974 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1975 // CHECK9-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 1976 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1977 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1978 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1979 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 1980 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1981 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1982 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1983 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 1984 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1985 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1986 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1987 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1988 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1989 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1990 // CHECK9-NEXT: store i32 0, i32* [[I3]], align 4 1991 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1992 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1993 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1994 // CHECK9: omp.precond.then: 1995 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ] 1996 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4 1997 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 1998 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1999 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2000 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 2001 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2002 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 2003 // CHECK9-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2004 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i32 2005 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2006 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 2007 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2008 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2009 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2010 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2011 // CHECK9-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 2012 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2013 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2014 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2015 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2016 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2017 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 2018 // CHECK9-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2019 // CHECK9: cond.true: 2020 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2021 // CHECK9-NEXT: br label [[COND_END:%.*]] 2022 // CHECK9: cond.false: 2023 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2024 // CHECK9-NEXT: br label [[COND_END]] 2025 // CHECK9: cond.end: 2026 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2027 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2028 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2029 // CHECK9-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 2030 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2031 // CHECK9: omp.inner.for.cond: 2032 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2033 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2034 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2035 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2036 // CHECK9: omp.inner.for.body: 2037 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2038 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2039 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2040 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 2041 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I5]], align 4 2042 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 2043 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 [[IDXPROM]] 2044 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2045 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2046 // CHECK9: omp.body.continue: 2047 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2048 // CHECK9: omp.inner.for.inc: 2049 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2050 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 1 2051 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 2052 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2053 // CHECK9: omp.inner.for.end: 2054 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2055 // CHECK9: omp.loop.exit: 2056 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2057 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2058 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2059 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2060 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2061 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2062 // CHECK9: .omp.final.then: 2063 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2064 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0 2065 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 2066 // CHECK9-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 2067 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 2068 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4 2069 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2070 // CHECK9: .omp.final.done: 2071 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2072 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2073 // CHECK9-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2074 // CHECK9: .omp.linear.pu: 2075 // CHECK9-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2076 // CHECK9: .omp.linear.pu.done: 2077 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2078 // CHECK9: omp.precond.end: 2079 // CHECK9-NEXT: ret void 2080 // 2081 // 2082 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2083 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] { 2084 // CHECK9-NEXT: entry: 2085 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2086 // CHECK9-NEXT: ret void 2087 // 2088 // 2089 // CHECK11-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2090 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2091 // CHECK11-NEXT: entry: 2092 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2093 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2094 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2095 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2096 // CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 2097 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2098 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 2099 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 2100 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 2101 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4 2102 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2103 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2104 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2105 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 2106 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2107 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2108 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2109 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2110 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2111 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 2112 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[I_CASTED]], align 4 2113 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_CASTED]], align 4 2114 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 2115 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 2116 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 2117 // CHECK11-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4 2118 // CHECK11-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64 2119 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2120 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP8]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes to i8*), i32 32, i1 false) 2121 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2122 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2123 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP10]], align 4 2124 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2125 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 2126 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP12]], align 4 2127 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2128 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 2129 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2130 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32** 2131 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 4 2132 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2133 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32** 2134 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 4 2135 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 2136 // CHECK11-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 4 2137 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2138 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 4 2139 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2140 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 2141 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP21]], align 4 2142 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2143 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 2144 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP23]], align 4 2145 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2146 // CHECK11-NEXT: store i8* null, i8** [[TMP24]], align 4 2147 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2148 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 2149 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP26]], align 4 2150 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2151 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 2152 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP28]], align 4 2153 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2154 // CHECK11-NEXT: store i8* null, i8** [[TMP29]], align 4 2155 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2156 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2157 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2158 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 2159 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_]], align 4 2160 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2161 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 2162 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2163 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2164 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2165 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2166 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 2167 // CHECK11-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 2168 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP36]]) 2169 // CHECK11-NEXT: [[TMP37:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, i32 4, i8** [[TMP30]], i8** [[TMP31]], i64* [[TMP32]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2170 // CHECK11-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 2171 // CHECK11-NEXT: br i1 [[TMP38]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2172 // CHECK11: omp_offload.failed: 2173 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i32 [[TMP0]], i32* [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR5:[0-9]+]] 2174 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2175 // CHECK11: omp_offload.cont: 2176 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 2177 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2178 // CHECK11-NEXT: [[TMP40:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2179 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP40]]) 2180 // CHECK11-NEXT: ret i32 [[TMP39]] 2181 // 2182 // 2183 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74 2184 // CHECK11-SAME: (i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 2185 // CHECK11-NEXT: entry: 2186 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2187 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2188 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 2189 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2190 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2191 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2192 // CHECK11-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4 2193 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2194 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2195 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2196 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2197 // CHECK11-NEXT: ret void 2198 // 2199 // 2200 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2201 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2202 // CHECK11-NEXT: entry: 2203 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2204 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2205 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 2206 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2207 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2208 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2209 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2210 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2211 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2212 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2213 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2214 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2215 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2216 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2217 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2218 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2219 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2220 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2221 // CHECK11-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 2222 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2223 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2224 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2225 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 2226 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2227 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2228 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2229 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 2230 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2231 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2232 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2233 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2234 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2235 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2236 // CHECK11-NEXT: store i32 0, i32* [[I3]], align 4 2237 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2238 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2239 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2240 // CHECK11: omp.precond.then: 2241 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ] 2242 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2243 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2244 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 2245 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2246 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2247 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2248 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2249 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2250 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2251 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2252 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2253 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2254 // CHECK11: cond.true: 2255 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2256 // CHECK11-NEXT: br label [[COND_END:%.*]] 2257 // CHECK11: cond.false: 2258 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2259 // CHECK11-NEXT: br label [[COND_END]] 2260 // CHECK11: cond.end: 2261 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2262 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2263 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2264 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2265 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2266 // CHECK11: omp.inner.for.cond: 2267 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2268 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2269 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2270 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2271 // CHECK11: omp.inner.for.body: 2272 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2273 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2274 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[I4]], i32* [[TMP1]], i32 [[TMP2]], i32* [[TMP3]]) 2275 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2276 // CHECK11: omp.inner.for.inc: 2277 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2278 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2279 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2280 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2281 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2282 // CHECK11: omp.inner.for.end: 2283 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2284 // CHECK11: omp.loop.exit: 2285 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2286 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2287 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2288 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2289 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2290 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2291 // CHECK11: .omp.final.then: 2292 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2293 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0 2294 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2295 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 2296 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 2297 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 2298 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2299 // CHECK11: .omp.final.done: 2300 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2301 // CHECK11: omp.precond.end: 2302 // CHECK11-NEXT: ret void 2303 // 2304 // 2305 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2306 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2307 // CHECK11-NEXT: entry: 2308 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2309 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2310 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2311 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2312 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 2313 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2314 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2315 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2316 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2317 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2318 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2319 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2320 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2321 // CHECK11-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2322 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2323 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2324 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2325 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2326 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2327 // CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4 2328 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2329 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2330 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2331 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2332 // CHECK11-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 2333 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2334 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2335 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2336 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 2337 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2338 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2339 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2340 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 2341 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2342 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2343 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2344 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2345 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2346 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2347 // CHECK11-NEXT: store i32 0, i32* [[I3]], align 4 2348 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2349 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2350 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2351 // CHECK11: omp.precond.then: 2352 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ] 2353 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4 2354 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 2355 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2356 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2357 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 2358 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2359 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2360 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 2361 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 2362 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2363 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2364 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2365 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2366 // CHECK11-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 2367 // CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2368 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2369 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2370 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2371 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2372 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 2373 // CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2374 // CHECK11: cond.true: 2375 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2376 // CHECK11-NEXT: br label [[COND_END:%.*]] 2377 // CHECK11: cond.false: 2378 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2379 // CHECK11-NEXT: br label [[COND_END]] 2380 // CHECK11: cond.end: 2381 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2382 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2383 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2384 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 2385 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2386 // CHECK11: omp.inner.for.cond: 2387 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2388 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2389 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2390 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2391 // CHECK11: omp.inner.for.body: 2392 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2393 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2394 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2395 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 2396 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4 2397 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 [[TMP23]] 2398 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2399 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2400 // CHECK11: omp.body.continue: 2401 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2402 // CHECK11: omp.inner.for.inc: 2403 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2404 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1 2405 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2406 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 2407 // CHECK11: omp.inner.for.end: 2408 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2409 // CHECK11: omp.loop.exit: 2410 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2411 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2412 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2413 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2414 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2415 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2416 // CHECK11: .omp.final.then: 2417 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2418 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 0 2419 // CHECK11-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 2420 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 2421 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 2422 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4 2423 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2424 // CHECK11: .omp.final.done: 2425 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2426 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2427 // CHECK11-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2428 // CHECK11: .omp.linear.pu: 2429 // CHECK11-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2430 // CHECK11: .omp.linear.pu.done: 2431 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2432 // CHECK11: omp.precond.end: 2433 // CHECK11-NEXT: ret void 2434 // 2435 // 2436 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2437 // CHECK11-SAME: () #[[ATTR7:[0-9]+]] { 2438 // CHECK11-NEXT: entry: 2439 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2440 // CHECK11-NEXT: ret void 2441 // 2442 // 2443 // CHECK13-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2444 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 2445 // CHECK13-NEXT: entry: 2446 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 2447 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2448 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2449 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2450 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 2451 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2452 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2453 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2454 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2455 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 2456 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2457 // CHECK13-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2458 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 2459 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4 2460 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 2461 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2462 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2463 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2464 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2465 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2466 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2467 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2468 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2469 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2470 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2471 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2472 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2473 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2474 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2475 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2476 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2477 // CHECK13-NEXT: store i32 0, i32* [[I3]], align 4 2478 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2479 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2480 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 2481 // CHECK13: simd.if.then: 2482 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2483 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2484 // CHECK13-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i64 16) ] 2485 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 2486 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4 2487 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2488 // CHECK13: omp.inner.for.cond: 2489 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2490 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2491 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2492 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2493 // CHECK13: omp.inner.for.body: 2494 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2495 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2496 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2497 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 2498 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I4]], align 4 2499 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 2500 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 2501 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2502 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2503 // CHECK13: omp.body.continue: 2504 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2505 // CHECK13: omp.inner.for.inc: 2506 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2507 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1 2508 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2509 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2510 // CHECK13: omp.inner.for.end: 2511 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2512 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 0 2513 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 2514 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 2515 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 2516 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I]], align 4 2517 // CHECK13-NEXT: br label [[SIMD_IF_END]] 2518 // CHECK13: simd.if.end: 2519 // CHECK13-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 2520 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4 2521 // CHECK13-NEXT: [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2522 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP16]]) 2523 // CHECK13-NEXT: ret i32 [[TMP15]] 2524 // 2525 // 2526 // CHECK15-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2527 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 2528 // CHECK15-NEXT: entry: 2529 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 2530 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2531 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2532 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2533 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2534 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2535 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2536 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2537 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2538 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 2539 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2540 // CHECK15-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2541 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 2542 // CHECK15-NEXT: [[I5:%.*]] = alloca i32, align 4 2543 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 2544 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2545 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2546 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2547 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2548 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2549 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 2550 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2551 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2552 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2553 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2554 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2555 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2556 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2557 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2558 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 2559 // CHECK15-NEXT: store i32 0, i32* [[I3]], align 4 2560 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2561 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2562 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 2563 // CHECK15: simd.if.then: 2564 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2565 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2566 // CHECK15-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i32 16) ] 2567 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 2568 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 2569 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2570 // CHECK15: omp.inner.for.cond: 2571 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2572 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2573 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2574 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2575 // CHECK15: omp.inner.for.body: 2576 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2577 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2578 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2579 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 2580 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I4]], align 4 2581 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP11]] 2582 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2583 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2584 // CHECK15: omp.body.continue: 2585 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2586 // CHECK15: omp.inner.for.inc: 2587 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2588 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 2589 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2590 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2591 // CHECK15: omp.inner.for.end: 2592 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2593 // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 0 2594 // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 2595 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 2596 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 2597 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I]], align 4 2598 // CHECK15-NEXT: br label [[SIMD_IF_END]] 2599 // CHECK15: simd.if.end: 2600 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 2601 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4 2602 // CHECK15-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2603 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP15]]) 2604 // CHECK15-NEXT: ret i32 [[TMP14]] 2605 // 2606 // 2607 // CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2608 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] { 2609 // CHECK17-NEXT: entry: 2610 // CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2611 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2612 // CHECK17-NEXT: ret i32 [[CALL]] 2613 // 2614 // 2615 // CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2616 // CHECK17-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2617 // CHECK17-NEXT: entry: 2618 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2619 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 2620 // CHECK17-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 2621 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 2622 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 2623 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 2624 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2625 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2626 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2627 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2628 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32* 2629 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 2630 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[I_CASTED]], align 8 2631 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2632 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2633 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS** 2634 // CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP3]], align 8 2635 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2636 // CHECK17-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to [123 x i32]** 2637 // CHECK17-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP5]], align 8 2638 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2639 // CHECK17-NEXT: store i8* null, i8** [[TMP6]], align 8 2640 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2641 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2642 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 2643 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2644 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2645 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 2646 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2647 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8 2648 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2649 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2650 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 123) 2651 // CHECK17-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2652 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2653 // CHECK17-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2654 // CHECK17: omp_offload.failed: 2655 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(%struct.SS* [[THIS1]], i64 [[TMP1]]) #[[ATTR4:[0-9]+]] 2656 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 2657 // CHECK17: omp_offload.cont: 2658 // CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2659 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 2660 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2661 // CHECK17-NEXT: ret i32 [[TMP16]] 2662 // 2663 // 2664 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112 2665 // CHECK17-SAME: (%struct.SS* noundef [[THIS:%.*]], i64 noundef [[I:%.*]]) #[[ATTR1:[0-9]+]] { 2666 // CHECK17-NEXT: entry: 2667 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2668 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 2669 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2670 // CHECK17-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8 2671 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2672 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32* 2673 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], %struct.SS* [[TMP0]]) 2674 // CHECK17-NEXT: ret void 2675 // 2676 // 2677 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 2678 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2679 // CHECK17-NEXT: entry: 2680 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2681 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2682 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 2683 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2684 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2685 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2686 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2687 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2688 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2689 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2690 // CHECK17-NEXT: [[I1:%.*]] = alloca i32, align 4 2691 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2692 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2693 // CHECK17-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 2694 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2695 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 2696 // CHECK17-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2697 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0 2698 // CHECK17-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0 2699 // CHECK17-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ] 2700 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2701 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2702 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2703 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2704 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2705 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2706 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2707 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2708 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 122 2709 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2710 // CHECK17: cond.true: 2711 // CHECK17-NEXT: br label [[COND_END:%.*]] 2712 // CHECK17: cond.false: 2713 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2714 // CHECK17-NEXT: br label [[COND_END]] 2715 // CHECK17: cond.end: 2716 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2717 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2718 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2719 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2720 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2721 // CHECK17: omp.inner.for.cond: 2722 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2723 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2724 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2725 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2726 // CHECK17: omp.inner.for.body: 2727 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2728 // CHECK17-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2729 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2730 // CHECK17-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 2731 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], i32* [[I1]], %struct.SS* [[TMP1]]) 2732 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2733 // CHECK17: omp.inner.for.inc: 2734 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2735 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2736 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2737 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2738 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2739 // CHECK17: omp.inner.for.end: 2740 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2741 // CHECK17: omp.loop.exit: 2742 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2743 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2744 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 2745 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2746 // CHECK17: .omp.final.then: 2747 // CHECK17-NEXT: store i32 123, i32* [[TMP0]], align 4 2748 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 2749 // CHECK17: .omp.final.done: 2750 // CHECK17-NEXT: ret void 2751 // 2752 // 2753 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1 2754 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2755 // CHECK17-NEXT: entry: 2756 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2757 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2758 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2759 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2760 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 2761 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2762 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2763 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2764 // CHECK17-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2765 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2766 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2767 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2768 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2769 // CHECK17-NEXT: [[I2:%.*]] = alloca i32, align 4 2770 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 2771 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2772 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2773 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2774 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2775 // CHECK17-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 2776 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2777 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 2778 // CHECK17-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2779 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0 2780 // CHECK17-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0 2781 // CHECK17-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ] 2782 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 2783 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START]], align 4 2784 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2785 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2786 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2787 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP3]] to i32 2788 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2789 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP4]] to i32 2790 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2791 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2792 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2793 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2794 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2795 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2796 // CHECK17-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]]) 2797 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2798 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2799 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 122 2800 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2801 // CHECK17: cond.true: 2802 // CHECK17-NEXT: br label [[COND_END:%.*]] 2803 // CHECK17: cond.false: 2804 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2805 // CHECK17-NEXT: br label [[COND_END]] 2806 // CHECK17: cond.end: 2807 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2808 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2809 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2810 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 2811 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2812 // CHECK17: omp.inner.for.cond: 2813 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2814 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2815 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2816 // CHECK17-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2817 // CHECK17: omp.inner.for.body: 2818 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2819 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 2820 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2821 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I2]], align 4 2822 // CHECK17-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 0 2823 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[I2]], align 4 2824 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 2825 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A5]], i64 0, i64 [[IDXPROM]] 2826 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2827 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2828 // CHECK17: omp.body.continue: 2829 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2830 // CHECK17: omp.inner.for.inc: 2831 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2832 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 2833 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2834 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2835 // CHECK17: omp.inner.for.end: 2836 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2837 // CHECK17: omp.loop.exit: 2838 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 2839 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2840 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 2841 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2842 // CHECK17: .omp.final.then: 2843 // CHECK17-NEXT: store i32 123, i32* [[TMP0]], align 4 2844 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 2845 // CHECK17: .omp.final.done: 2846 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2847 // CHECK17-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2848 // CHECK17-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2849 // CHECK17: .omp.linear.pu: 2850 // CHECK17-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2851 // CHECK17: .omp.linear.pu.done: 2852 // CHECK17-NEXT: ret void 2853 // 2854 // 2855 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2856 // CHECK17-SAME: () #[[ATTR5:[0-9]+]] { 2857 // CHECK17-NEXT: entry: 2858 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 2859 // CHECK17-NEXT: ret void 2860 // 2861 // 2862 // CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2863 // CHECK19-SAME: () #[[ATTR0:[0-9]+]] { 2864 // CHECK19-NEXT: entry: 2865 // CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2866 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2867 // CHECK19-NEXT: ret i32 [[CALL]] 2868 // 2869 // 2870 // CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2871 // CHECK19-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2872 // CHECK19-NEXT: entry: 2873 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2874 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 2875 // CHECK19-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 2876 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 2877 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 2878 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 2879 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 2880 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2881 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2882 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2883 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[I_CASTED]], align 4 2884 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[I_CASTED]], align 4 2885 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2886 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2887 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS** 2888 // CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP3]], align 4 2889 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2890 // CHECK19-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to [123 x i32]** 2891 // CHECK19-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP5]], align 4 2892 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2893 // CHECK19-NEXT: store i8* null, i8** [[TMP6]], align 4 2894 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2895 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2896 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 2897 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2898 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2899 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4 2900 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2901 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4 2902 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2903 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2904 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 123) 2905 // CHECK19-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2906 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2907 // CHECK19-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2908 // CHECK19: omp_offload.failed: 2909 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(%struct.SS* [[THIS1]], i32 [[TMP1]]) #[[ATTR4:[0-9]+]] 2910 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 2911 // CHECK19: omp_offload.cont: 2912 // CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2913 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 2914 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2915 // CHECK19-NEXT: ret i32 [[TMP16]] 2916 // 2917 // 2918 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112 2919 // CHECK19-SAME: (%struct.SS* noundef [[THIS:%.*]], i32 noundef [[I:%.*]]) #[[ATTR1:[0-9]+]] { 2920 // CHECK19-NEXT: entry: 2921 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2922 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 2923 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2924 // CHECK19-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4 2925 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2926 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], %struct.SS* [[TMP0]]) 2927 // CHECK19-NEXT: ret void 2928 // 2929 // 2930 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 2931 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2932 // CHECK19-NEXT: entry: 2933 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2934 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2935 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 2936 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2937 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2938 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 2939 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2940 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2941 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2942 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2943 // CHECK19-NEXT: [[I1:%.*]] = alloca i32, align 4 2944 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2945 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2946 // CHECK19-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 2947 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2948 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 2949 // CHECK19-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2950 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0 2951 // CHECK19-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0 2952 // CHECK19-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ] 2953 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2954 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2955 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2956 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2957 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2958 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2959 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2960 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2961 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 122 2962 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2963 // CHECK19: cond.true: 2964 // CHECK19-NEXT: br label [[COND_END:%.*]] 2965 // CHECK19: cond.false: 2966 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2967 // CHECK19-NEXT: br label [[COND_END]] 2968 // CHECK19: cond.end: 2969 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2970 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2971 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2972 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2973 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2974 // CHECK19: omp.inner.for.cond: 2975 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2976 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2977 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2978 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2979 // CHECK19: omp.inner.for.body: 2980 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2981 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2982 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP9]], i32 [[TMP10]], i32* [[I1]], %struct.SS* [[TMP1]]) 2983 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2984 // CHECK19: omp.inner.for.inc: 2985 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2986 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2987 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2988 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2989 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2990 // CHECK19: omp.inner.for.end: 2991 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2992 // CHECK19: omp.loop.exit: 2993 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2994 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2995 // CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 2996 // CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2997 // CHECK19: .omp.final.then: 2998 // CHECK19-NEXT: store i32 123, i32* [[TMP0]], align 4 2999 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 3000 // CHECK19: .omp.final.done: 3001 // CHECK19-NEXT: ret void 3002 // 3003 // 3004 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1 3005 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3006 // CHECK19-NEXT: entry: 3007 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3008 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3009 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3010 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3011 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 3012 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3013 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3014 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 3015 // CHECK19-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3016 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3017 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3018 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3019 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3020 // CHECK19-NEXT: [[I1:%.*]] = alloca i32, align 4 3021 // CHECK19-NEXT: [[I2:%.*]] = alloca i32, align 4 3022 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3023 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3024 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3025 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3026 // CHECK19-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 3027 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3028 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 3029 // CHECK19-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3030 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0 3031 // CHECK19-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0 3032 // CHECK19-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ] 3033 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 3034 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START]], align 4 3035 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3036 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3037 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3038 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3039 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4 3040 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 3041 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3042 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3043 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3044 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3045 // CHECK19-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]]) 3046 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3047 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3048 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 122 3049 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3050 // CHECK19: cond.true: 3051 // CHECK19-NEXT: br label [[COND_END:%.*]] 3052 // CHECK19: cond.false: 3053 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3054 // CHECK19-NEXT: br label [[COND_END]] 3055 // CHECK19: cond.end: 3056 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3057 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3058 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3059 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 3060 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3061 // CHECK19: omp.inner.for.cond: 3062 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3063 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3064 // CHECK19-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3065 // CHECK19-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3066 // CHECK19: omp.inner.for.body: 3067 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3068 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 3069 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3070 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I1]], align 4 3071 // CHECK19-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 0 3072 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[I1]], align 4 3073 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i32 0, i32 [[TMP13]] 3074 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3075 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3076 // CHECK19: omp.body.continue: 3077 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3078 // CHECK19: omp.inner.for.inc: 3079 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3080 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 3081 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 3082 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 3083 // CHECK19: omp.inner.for.end: 3084 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3085 // CHECK19: omp.loop.exit: 3086 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 3087 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3088 // CHECK19-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 3089 // CHECK19-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3090 // CHECK19: .omp.final.then: 3091 // CHECK19-NEXT: store i32 123, i32* [[TMP0]], align 4 3092 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 3093 // CHECK19: .omp.final.done: 3094 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3095 // CHECK19-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 3096 // CHECK19-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 3097 // CHECK19: .omp.linear.pu: 3098 // CHECK19-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 3099 // CHECK19: .omp.linear.pu.done: 3100 // CHECK19-NEXT: ret void 3101 // 3102 // 3103 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3104 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] { 3105 // CHECK19-NEXT: entry: 3106 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 3107 // CHECK19-NEXT: ret void 3108 // 3109 // 3110 // CHECK21-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3111 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] { 3112 // CHECK21-NEXT: entry: 3113 // CHECK21-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3114 // CHECK21-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 3115 // CHECK21-NEXT: ret i32 [[CALL]] 3116 // 3117 // 3118 // CHECK21-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3119 // CHECK21-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3120 // CHECK21-NEXT: entry: 3121 // CHECK21-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3122 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4 3123 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4 3124 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3125 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3126 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3127 // CHECK21-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3128 // CHECK21-NEXT: [[I2:%.*]] = alloca i32, align 4 3129 // CHECK21-NEXT: [[I3:%.*]] = alloca i32, align 4 3130 // CHECK21-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3131 // CHECK21-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3132 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3133 // CHECK21-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3134 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3135 // CHECK21-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 3136 // CHECK21-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3137 // CHECK21-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0 3138 // CHECK21-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ] 3139 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3140 // CHECK21-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4 3141 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3142 // CHECK21: omp.inner.for.cond: 3143 // CHECK21-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3144 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3145 // CHECK21-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3146 // CHECK21-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3147 // CHECK21: omp.inner.for.body: 3148 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3149 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3150 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3151 // CHECK21-NEXT: store i32 [[ADD]], i32* [[I2]], align 4 3152 // CHECK21-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3153 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 3154 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 3155 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i64 0, i64 [[IDXPROM]] 3156 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3157 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3158 // CHECK21: omp.body.continue: 3159 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3160 // CHECK21: omp.inner.for.inc: 3161 // CHECK21-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3162 // CHECK21-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1 3163 // CHECK21-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 3164 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3165 // CHECK21: omp.inner.for.end: 3166 // CHECK21-NEXT: store i32 123, i32* [[I]], align 4 3167 // CHECK21-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3168 // CHECK21-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i64 0, i64 0 3169 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4 3170 // CHECK21-NEXT: ret i32 [[TMP7]] 3171 // 3172 // 3173 // CHECK23-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3174 // CHECK23-SAME: () #[[ATTR0:[0-9]+]] { 3175 // CHECK23-NEXT: entry: 3176 // CHECK23-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3177 // CHECK23-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 3178 // CHECK23-NEXT: ret i32 [[CALL]] 3179 // 3180 // 3181 // CHECK23-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3182 // CHECK23-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3183 // CHECK23-NEXT: entry: 3184 // CHECK23-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3185 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4 3186 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4 3187 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3188 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3189 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3190 // CHECK23-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3191 // CHECK23-NEXT: [[I2:%.*]] = alloca i32, align 4 3192 // CHECK23-NEXT: [[I3:%.*]] = alloca i32, align 4 3193 // CHECK23-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3194 // CHECK23-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3195 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3196 // CHECK23-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3197 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3198 // CHECK23-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 3199 // CHECK23-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3200 // CHECK23-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0 3201 // CHECK23-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ] 3202 // CHECK23-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3203 // CHECK23-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4 3204 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3205 // CHECK23: omp.inner.for.cond: 3206 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3207 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3208 // CHECK23-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3209 // CHECK23-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3210 // CHECK23: omp.inner.for.body: 3211 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3212 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3213 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3214 // CHECK23-NEXT: store i32 [[ADD]], i32* [[I2]], align 4 3215 // CHECK23-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3216 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 3217 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i32 0, i32 [[TMP5]] 3218 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3219 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3220 // CHECK23: omp.body.continue: 3221 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3222 // CHECK23: omp.inner.for.inc: 3223 // CHECK23-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3224 // CHECK23-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1 3225 // CHECK23-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 3226 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3227 // CHECK23: omp.inner.for.end: 3228 // CHECK23-NEXT: store i32 123, i32* [[I]], align 4 3229 // CHECK23-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3230 // CHECK23-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i32 0, i32 0 3231 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4 3232 // CHECK23-NEXT: ret i32 [[TMP7]] 3233 // 3234 // 3235 // CHECK25-LABEL: define {{[^@]+}}@main 3236 // CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3237 // CHECK25-NEXT: entry: 3238 // CHECK25-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3239 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3240 // CHECK25-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3241 // CHECK25-NEXT: [[N:%.*]] = alloca i32, align 4 3242 // CHECK25-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3243 // CHECK25-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3244 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3245 // CHECK25-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 3246 // CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3247 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 3248 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 3249 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 3250 // CHECK25-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8 3251 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3252 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3253 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3254 // CHECK25-NEXT: store i32 0, i32* [[RETVAL]], align 4 3255 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3256 // CHECK25-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3257 // CHECK25-NEXT: store i32 100, i32* [[N]], align 4 3258 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3259 // CHECK25-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3260 // CHECK25-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3261 // CHECK25-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3262 // CHECK25-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3263 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3264 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3265 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32* 3266 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 3267 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8 3268 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4 3269 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3270 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 3271 // CHECK25-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 3272 // CHECK25-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4 3273 // CHECK25-NEXT: [[TMP8:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3274 // CHECK25-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP8]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes to i8*), i64 32, i1 false) 3275 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3276 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3277 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 3278 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3279 // CHECK25-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 3280 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8 3281 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3282 // CHECK25-NEXT: store i8* null, i8** [[TMP13]], align 8 3283 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3284 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32** 3285 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 8 3286 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3287 // CHECK25-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32** 3288 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 8 3289 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3290 // CHECK25-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 8 3291 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3292 // CHECK25-NEXT: store i8* null, i8** [[TMP19]], align 8 3293 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3294 // CHECK25-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 3295 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP21]], align 8 3296 // CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3297 // CHECK25-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 3298 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP23]], align 8 3299 // CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3300 // CHECK25-NEXT: store i8* null, i8** [[TMP24]], align 8 3301 // CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3302 // CHECK25-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 3303 // CHECK25-NEXT: store i64 [[TMP6]], i64* [[TMP26]], align 8 3304 // CHECK25-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3305 // CHECK25-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 3306 // CHECK25-NEXT: store i64 [[TMP6]], i64* [[TMP28]], align 8 3307 // CHECK25-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 3308 // CHECK25-NEXT: store i8* null, i8** [[TMP29]], align 8 3309 // CHECK25-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3310 // CHECK25-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3311 // CHECK25-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3312 // CHECK25-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 3313 // CHECK25-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_]], align 4 3314 // CHECK25-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3315 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 3316 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3317 // CHECK25-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3318 // CHECK25-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3319 // CHECK25-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3320 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 3321 // CHECK25-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 3322 // CHECK25-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP36]]) 3323 // CHECK25-NEXT: [[TMP37:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, i32 4, i8** [[TMP30]], i8** [[TMP31]], i64* [[TMP32]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3324 // CHECK25-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 3325 // CHECK25-NEXT: br i1 [[TMP38]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3326 // CHECK25: omp_offload.failed: 3327 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i64 [[TMP1]], i32* [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR5:[0-9]+]] 3328 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 3329 // CHECK25: omp_offload.cont: 3330 // CHECK25-NEXT: [[TMP39:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3331 // CHECK25-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP39]]) 3332 // CHECK25-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3333 // CHECK25-NEXT: [[TMP40:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3334 // CHECK25-NEXT: call void @llvm.stackrestore(i8* [[TMP40]]) 3335 // CHECK25-NEXT: [[TMP41:%.*]] = load i32, i32* [[RETVAL]], align 4 3336 // CHECK25-NEXT: ret i32 [[TMP41]] 3337 // 3338 // 3339 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166 3340 // CHECK25-SAME: (i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 3341 // CHECK25-NEXT: entry: 3342 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3343 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3344 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 3345 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3346 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3347 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3348 // CHECK25-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8 3349 // CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3350 // CHECK25-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3351 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3352 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32* 3353 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3354 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]]) 3355 // CHECK25-NEXT: ret void 3356 // 3357 // 3358 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined. 3359 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3360 // CHECK25-NEXT: entry: 3361 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3362 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3363 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 3364 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3365 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3366 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3367 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3368 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3369 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3370 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3371 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4 3372 // CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3373 // CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3374 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3375 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3376 // CHECK25-NEXT: [[I4:%.*]] = alloca i32, align 4 3377 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3378 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3379 // CHECK25-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 3380 // CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3381 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3382 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3383 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 3384 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3385 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3386 // CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3387 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 3388 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3389 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3390 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3391 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3392 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3393 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3394 // CHECK25-NEXT: store i32 0, i32* [[I3]], align 4 3395 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3396 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3397 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3398 // CHECK25: omp.precond.then: 3399 // CHECK25-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ] 3400 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3401 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3402 // CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 3403 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3404 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3405 // CHECK25-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3406 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 3407 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3408 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3409 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3410 // CHECK25-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 3411 // CHECK25-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3412 // CHECK25: cond.true: 3413 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3414 // CHECK25-NEXT: br label [[COND_END:%.*]] 3415 // CHECK25: cond.false: 3416 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3417 // CHECK25-NEXT: br label [[COND_END]] 3418 // CHECK25: cond.end: 3419 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 3420 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3421 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3422 // CHECK25-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 3423 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3424 // CHECK25: omp.inner.for.cond: 3425 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3426 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3427 // CHECK25-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 3428 // CHECK25-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3429 // CHECK25: omp.inner.for.body: 3430 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3431 // CHECK25-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 3432 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3433 // CHECK25-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 3434 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[I4]], i32* [[TMP1]], i64 [[TMP2]], i32* [[TMP3]]) 3435 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3436 // CHECK25: omp.inner.for.inc: 3437 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3438 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3439 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 3440 // CHECK25-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3441 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 3442 // CHECK25: omp.inner.for.end: 3443 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3444 // CHECK25: omp.loop.exit: 3445 // CHECK25-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3446 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 3447 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 3448 // CHECK25-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3449 // CHECK25-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3450 // CHECK25-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3451 // CHECK25: .omp.final.then: 3452 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3453 // CHECK25-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0 3454 // CHECK25-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 3455 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 3456 // CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 3457 // CHECK25-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 3458 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3459 // CHECK25: .omp.final.done: 3460 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 3461 // CHECK25: omp.precond.end: 3462 // CHECK25-NEXT: ret void 3463 // 3464 // 3465 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1 3466 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3467 // CHECK25-NEXT: entry: 3468 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3469 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3470 // CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3471 // CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3472 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 3473 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3474 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3475 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3476 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3477 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3478 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3479 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3480 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4 3481 // CHECK25-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3482 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3483 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3484 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3485 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3486 // CHECK25-NEXT: [[I5:%.*]] = alloca i32, align 4 3487 // CHECK25-NEXT: [[I6:%.*]] = alloca i32, align 4 3488 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3489 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3490 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3491 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3492 // CHECK25-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 3493 // CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3494 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3495 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3496 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 3497 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3498 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3499 // CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3500 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 3501 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3502 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3503 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3504 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3505 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3506 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3507 // CHECK25-NEXT: store i32 0, i32* [[I3]], align 4 3508 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3509 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3510 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3511 // CHECK25: omp.precond.then: 3512 // CHECK25-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ] 3513 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4 3514 // CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 3515 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3516 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3517 // CHECK25-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3518 // CHECK25-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3519 // CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 3520 // CHECK25-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3521 // CHECK25-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i32 3522 // CHECK25-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3523 // CHECK25-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 3524 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3525 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3526 // CHECK25-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3527 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3528 // CHECK25-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 3529 // CHECK25-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3530 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 3531 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3532 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3533 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3534 // CHECK25-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 3535 // CHECK25-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3536 // CHECK25: cond.true: 3537 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3538 // CHECK25-NEXT: br label [[COND_END:%.*]] 3539 // CHECK25: cond.false: 3540 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3541 // CHECK25-NEXT: br label [[COND_END]] 3542 // CHECK25: cond.end: 3543 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 3544 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3545 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3546 // CHECK25-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 3547 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3548 // CHECK25: omp.inner.for.cond: 3549 // CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3550 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3551 // CHECK25-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 3552 // CHECK25-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3553 // CHECK25: omp.inner.for.body: 3554 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3555 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 3556 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3557 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 3558 // CHECK25-NEXT: [[TMP23:%.*]] = load i32, i32* [[I5]], align 4 3559 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 3560 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 [[IDXPROM]] 3561 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3562 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3563 // CHECK25: omp.body.continue: 3564 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3565 // CHECK25: omp.inner.for.inc: 3566 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3567 // CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 1 3568 // CHECK25-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 3569 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 3570 // CHECK25: omp.inner.for.end: 3571 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3572 // CHECK25: omp.loop.exit: 3573 // CHECK25-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3574 // CHECK25-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 3575 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 3576 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3577 // CHECK25-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 3578 // CHECK25-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3579 // CHECK25: .omp.final.then: 3580 // CHECK25-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3581 // CHECK25-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0 3582 // CHECK25-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 3583 // CHECK25-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 3584 // CHECK25-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 3585 // CHECK25-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4 3586 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3587 // CHECK25: .omp.final.done: 3588 // CHECK25-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3589 // CHECK25-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 3590 // CHECK25-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 3591 // CHECK25: .omp.linear.pu: 3592 // CHECK25-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 3593 // CHECK25: .omp.linear.pu.done: 3594 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 3595 // CHECK25: omp.precond.end: 3596 // CHECK25-NEXT: ret void 3597 // 3598 // 3599 // CHECK25-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3600 // CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR7:[0-9]+]] comdat { 3601 // CHECK25-NEXT: entry: 3602 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3603 // CHECK25-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3604 // CHECK25-NEXT: [[TE:%.*]] = alloca i32, align 4 3605 // CHECK25-NEXT: [[TH:%.*]] = alloca i32, align 4 3606 // CHECK25-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 3607 // CHECK25-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 3608 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3609 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3610 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3611 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3612 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3613 // CHECK25-NEXT: store i32 0, i32* [[TE]], align 4 3614 // CHECK25-NEXT: store i32 128, i32* [[TH]], align 4 3615 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 3616 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 3617 // CHECK25-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 3618 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8 3619 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 3620 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 3621 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 3622 // CHECK25-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8 3623 // CHECK25-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3624 // CHECK25-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 3625 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 3626 // CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3627 // CHECK25-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 3628 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 3629 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3630 // CHECK25-NEXT: store i8* null, i8** [[TMP8]], align 8 3631 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3632 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3633 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 3634 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3635 // CHECK25-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 3636 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 3637 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3638 // CHECK25-NEXT: store i8* null, i8** [[TMP13]], align 8 3639 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3640 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 3641 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8 3642 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3643 // CHECK25-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 3644 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8 3645 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3646 // CHECK25-NEXT: store i8* null, i8** [[TMP18]], align 8 3647 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3648 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3649 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 3650 // CHECK25-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 10) 3651 // CHECK25-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 0) 3652 // CHECK25-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 3653 // CHECK25-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3654 // CHECK25: omp_offload.failed: 3655 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR5]] 3656 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 3657 // CHECK25: omp_offload.cont: 3658 // CHECK25-NEXT: ret i32 0 3659 // 3660 // 3661 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155 3662 // CHECK25-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3663 // CHECK25-NEXT: entry: 3664 // CHECK25-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 3665 // CHECK25-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 3666 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3667 // CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]]) 3668 // CHECK25-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 3669 // CHECK25-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 3670 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3671 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 3672 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 3673 // CHECK25-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3674 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3675 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 3676 // CHECK25-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 3677 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 3678 // CHECK25-NEXT: ret void 3679 // 3680 // 3681 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..2 3682 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3683 // CHECK25-NEXT: entry: 3684 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3685 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3686 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3687 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3688 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3689 // CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3690 // CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3691 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3692 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3693 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3694 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3695 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3696 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3697 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3698 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3699 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 3700 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3701 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3702 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3703 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3704 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3705 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3706 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3707 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3708 // CHECK25: cond.true: 3709 // CHECK25-NEXT: br label [[COND_END:%.*]] 3710 // CHECK25: cond.false: 3711 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3712 // CHECK25-NEXT: br label [[COND_END]] 3713 // CHECK25: cond.end: 3714 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3715 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3716 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3717 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3718 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3719 // CHECK25: omp.inner.for.cond: 3720 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3721 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !11 3722 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3723 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3724 // CHECK25: omp.inner.for.body: 3725 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !11 3726 // CHECK25-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3727 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !11 3728 // CHECK25-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3729 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !11 3730 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3731 // CHECK25: omp.inner.for.inc: 3732 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3733 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !11 3734 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3735 // CHECK25-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3736 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 3737 // CHECK25: omp.inner.for.end: 3738 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3739 // CHECK25: omp.loop.exit: 3740 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3741 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3742 // CHECK25-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3743 // CHECK25-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3744 // CHECK25: .omp.final.then: 3745 // CHECK25-NEXT: store i32 10, i32* [[I]], align 4 3746 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3747 // CHECK25: .omp.final.done: 3748 // CHECK25-NEXT: ret void 3749 // 3750 // 3751 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..3 3752 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3753 // CHECK25-NEXT: entry: 3754 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3755 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3756 // CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3757 // CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3758 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3759 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3760 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3761 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3762 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3763 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3764 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3765 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3766 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3767 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3768 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3769 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3770 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3771 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3772 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3773 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3774 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3775 // CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3776 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3777 // CHECK25-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3778 // CHECK25-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3779 // CHECK25-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3780 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3781 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3782 // CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3783 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3784 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3785 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3786 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 3787 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3788 // CHECK25: cond.true: 3789 // CHECK25-NEXT: br label [[COND_END:%.*]] 3790 // CHECK25: cond.false: 3791 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3792 // CHECK25-NEXT: br label [[COND_END]] 3793 // CHECK25: cond.end: 3794 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3795 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3796 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3797 // CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3798 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3799 // CHECK25: omp.inner.for.cond: 3800 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3801 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 3802 // CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3803 // CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3804 // CHECK25: omp.inner.for.body: 3805 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3806 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3807 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3808 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 3809 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 3810 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3811 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3812 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 3813 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3814 // CHECK25: omp.body.continue: 3815 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3816 // CHECK25: omp.inner.for.inc: 3817 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3818 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3819 // CHECK25-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3820 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 3821 // CHECK25: omp.inner.for.end: 3822 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3823 // CHECK25: omp.loop.exit: 3824 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3825 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3826 // CHECK25-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3827 // CHECK25-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3828 // CHECK25: .omp.final.then: 3829 // CHECK25-NEXT: store i32 10, i32* [[I]], align 4 3830 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3831 // CHECK25: .omp.final.done: 3832 // CHECK25-NEXT: ret void 3833 // 3834 // 3835 // CHECK25-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3836 // CHECK25-SAME: () #[[ATTR8:[0-9]+]] { 3837 // CHECK25-NEXT: entry: 3838 // CHECK25-NEXT: call void @__tgt_register_requires(i64 1) 3839 // CHECK25-NEXT: ret void 3840 // 3841 // 3842 // CHECK27-LABEL: define {{[^@]+}}@main 3843 // CHECK27-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3844 // CHECK27-NEXT: entry: 3845 // CHECK27-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3846 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3847 // CHECK27-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 3848 // CHECK27-NEXT: [[N:%.*]] = alloca i32, align 4 3849 // CHECK27-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3850 // CHECK27-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3851 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 3852 // CHECK27-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 3853 // CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3854 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3855 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3856 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3857 // CHECK27-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4 3858 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 3859 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3860 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3861 // CHECK27-NEXT: store i32 0, i32* [[RETVAL]], align 4 3862 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3863 // CHECK27-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 3864 // CHECK27-NEXT: store i32 100, i32* [[N]], align 4 3865 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3866 // CHECK27-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3867 // CHECK27-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3868 // CHECK27-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3869 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3870 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 3871 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[I_CASTED]], align 4 3872 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_CASTED]], align 4 3873 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 3874 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 3875 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 3876 // CHECK27-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4 3877 // CHECK27-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64 3878 // CHECK27-NEXT: [[TMP8:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3879 // CHECK27-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP8]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes to i8*), i32 32, i1 false) 3880 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3881 // CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3882 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP10]], align 4 3883 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3884 // CHECK27-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 3885 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP12]], align 4 3886 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3887 // CHECK27-NEXT: store i8* null, i8** [[TMP13]], align 4 3888 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3889 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32** 3890 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 4 3891 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3892 // CHECK27-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32** 3893 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 4 3894 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3895 // CHECK27-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 4 3896 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3897 // CHECK27-NEXT: store i8* null, i8** [[TMP19]], align 4 3898 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3899 // CHECK27-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 3900 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP21]], align 4 3901 // CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3902 // CHECK27-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 3903 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP23]], align 4 3904 // CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3905 // CHECK27-NEXT: store i8* null, i8** [[TMP24]], align 4 3906 // CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3907 // CHECK27-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 3908 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[TMP26]], align 4 3909 // CHECK27-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3910 // CHECK27-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 3911 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[TMP28]], align 4 3912 // CHECK27-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3913 // CHECK27-NEXT: store i8* null, i8** [[TMP29]], align 4 3914 // CHECK27-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3915 // CHECK27-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3916 // CHECK27-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3917 // CHECK27-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 3918 // CHECK27-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_]], align 4 3919 // CHECK27-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3920 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 3921 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3922 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3923 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3924 // CHECK27-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3925 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 3926 // CHECK27-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 3927 // CHECK27-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP36]]) 3928 // CHECK27-NEXT: [[TMP37:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, i32 4, i8** [[TMP30]], i8** [[TMP31]], i64* [[TMP32]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3929 // CHECK27-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 3930 // CHECK27-NEXT: br i1 [[TMP38]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3931 // CHECK27: omp_offload.failed: 3932 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i32 [[TMP0]], i32* [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR5:[0-9]+]] 3933 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 3934 // CHECK27: omp_offload.cont: 3935 // CHECK27-NEXT: [[TMP39:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3936 // CHECK27-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP39]]) 3937 // CHECK27-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3938 // CHECK27-NEXT: [[TMP40:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3939 // CHECK27-NEXT: call void @llvm.stackrestore(i8* [[TMP40]]) 3940 // CHECK27-NEXT: [[TMP41:%.*]] = load i32, i32* [[RETVAL]], align 4 3941 // CHECK27-NEXT: ret i32 [[TMP41]] 3942 // 3943 // 3944 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166 3945 // CHECK27-SAME: (i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 3946 // CHECK27-NEXT: entry: 3947 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3948 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3949 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 3950 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3951 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3952 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3953 // CHECK27-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4 3954 // CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3955 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3956 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3957 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 3958 // CHECK27-NEXT: ret void 3959 // 3960 // 3961 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined. 3962 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3963 // CHECK27-NEXT: entry: 3964 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3965 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3966 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 3967 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3968 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3969 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3970 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3971 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 3972 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3973 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3974 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4 3975 // CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3976 // CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3977 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3978 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3979 // CHECK27-NEXT: [[I4:%.*]] = alloca i32, align 4 3980 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3981 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3982 // CHECK27-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 3983 // CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3984 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3985 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3986 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 3987 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3988 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3989 // CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3990 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 3991 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3992 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3993 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3994 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3995 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3996 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3997 // CHECK27-NEXT: store i32 0, i32* [[I3]], align 4 3998 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3999 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4000 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4001 // CHECK27: omp.precond.then: 4002 // CHECK27-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ] 4003 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4004 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4005 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 4006 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4007 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4008 // CHECK27-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4009 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 4010 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4011 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4012 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4013 // CHECK27-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4014 // CHECK27-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4015 // CHECK27: cond.true: 4016 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4017 // CHECK27-NEXT: br label [[COND_END:%.*]] 4018 // CHECK27: cond.false: 4019 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4020 // CHECK27-NEXT: br label [[COND_END]] 4021 // CHECK27: cond.end: 4022 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4023 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4024 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4025 // CHECK27-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 4026 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4027 // CHECK27: omp.inner.for.cond: 4028 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4029 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4030 // CHECK27-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 4031 // CHECK27-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4032 // CHECK27: omp.inner.for.body: 4033 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4034 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4035 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[I4]], i32* [[TMP1]], i32 [[TMP2]], i32* [[TMP3]]) 4036 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4037 // CHECK27: omp.inner.for.inc: 4038 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4039 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4040 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 4041 // CHECK27-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4042 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 4043 // CHECK27: omp.inner.for.end: 4044 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4045 // CHECK27: omp.loop.exit: 4046 // CHECK27-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4047 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 4048 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 4049 // CHECK27-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4050 // CHECK27-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 4051 // CHECK27-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4052 // CHECK27: .omp.final.then: 4053 // CHECK27-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4054 // CHECK27-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0 4055 // CHECK27-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 4056 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 4057 // CHECK27-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 4058 // CHECK27-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 4059 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4060 // CHECK27: .omp.final.done: 4061 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 4062 // CHECK27: omp.precond.end: 4063 // CHECK27-NEXT: ret void 4064 // 4065 // 4066 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1 4067 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4068 // CHECK27-NEXT: entry: 4069 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4070 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4071 // CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4072 // CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4073 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 4074 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4075 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4076 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4077 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4078 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4079 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4080 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4081 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4 4082 // CHECK27-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 4083 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4084 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4085 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4086 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4087 // CHECK27-NEXT: [[I4:%.*]] = alloca i32, align 4 4088 // CHECK27-NEXT: [[I5:%.*]] = alloca i32, align 4 4089 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4090 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4091 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4092 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4093 // CHECK27-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 4094 // CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4095 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4096 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4097 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 4098 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4099 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4100 // CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4101 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 4102 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 4103 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4104 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4105 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4106 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4107 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4108 // CHECK27-NEXT: store i32 0, i32* [[I3]], align 4 4109 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4110 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4111 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4112 // CHECK27: omp.precond.then: 4113 // CHECK27-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ] 4114 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4 4115 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 4116 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4117 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4118 // CHECK27-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 4119 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4120 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4121 // CHECK27-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 4122 // CHECK27-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 4123 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4124 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4125 // CHECK27-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4126 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 4127 // CHECK27-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 4128 // CHECK27-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4129 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 4130 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4131 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4132 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4133 // CHECK27-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 4134 // CHECK27-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4135 // CHECK27: cond.true: 4136 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4137 // CHECK27-NEXT: br label [[COND_END:%.*]] 4138 // CHECK27: cond.false: 4139 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4140 // CHECK27-NEXT: br label [[COND_END]] 4141 // CHECK27: cond.end: 4142 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 4143 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4144 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4145 // CHECK27-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 4146 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4147 // CHECK27: omp.inner.for.cond: 4148 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4149 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4150 // CHECK27-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 4151 // CHECK27-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4152 // CHECK27: omp.inner.for.body: 4153 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4154 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 4155 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4156 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 4157 // CHECK27-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4 4158 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 [[TMP23]] 4159 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4160 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4161 // CHECK27: omp.body.continue: 4162 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4163 // CHECK27: omp.inner.for.inc: 4164 // CHECK27-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4165 // CHECK27-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1 4166 // CHECK27-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 4167 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 4168 // CHECK27: omp.inner.for.end: 4169 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4170 // CHECK27: omp.loop.exit: 4171 // CHECK27-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4172 // CHECK27-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 4173 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 4174 // CHECK27-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4175 // CHECK27-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 4176 // CHECK27-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4177 // CHECK27: .omp.final.then: 4178 // CHECK27-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4179 // CHECK27-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 0 4180 // CHECK27-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 4181 // CHECK27-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 4182 // CHECK27-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 4183 // CHECK27-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4 4184 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4185 // CHECK27: .omp.final.done: 4186 // CHECK27-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4187 // CHECK27-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 4188 // CHECK27-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 4189 // CHECK27: .omp.linear.pu: 4190 // CHECK27-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 4191 // CHECK27: .omp.linear.pu.done: 4192 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 4193 // CHECK27: omp.precond.end: 4194 // CHECK27-NEXT: ret void 4195 // 4196 // 4197 // CHECK27-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4198 // CHECK27-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR7:[0-9]+]] comdat { 4199 // CHECK27-NEXT: entry: 4200 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4201 // CHECK27-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4202 // CHECK27-NEXT: [[TE:%.*]] = alloca i32, align 4 4203 // CHECK27-NEXT: [[TH:%.*]] = alloca i32, align 4 4204 // CHECK27-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 4205 // CHECK27-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 4206 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4207 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4208 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4209 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4210 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4211 // CHECK27-NEXT: store i32 0, i32* [[TE]], align 4 4212 // CHECK27-NEXT: store i32 128, i32* [[TH]], align 4 4213 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 4214 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4 4215 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4 4216 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 4217 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4 4218 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4 4219 // CHECK27-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4220 // CHECK27-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 4221 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 4222 // CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4223 // CHECK27-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 4224 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 4225 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4226 // CHECK27-NEXT: store i8* null, i8** [[TMP8]], align 4 4227 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4228 // CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4229 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4230 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4231 // CHECK27-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 4232 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 4233 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4234 // CHECK27-NEXT: store i8* null, i8** [[TMP13]], align 4 4235 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4236 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 4237 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4 4238 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4239 // CHECK27-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 4240 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4 4241 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4242 // CHECK27-NEXT: store i8* null, i8** [[TMP18]], align 4 4243 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4244 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4245 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 4246 // CHECK27-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 10) 4247 // CHECK27-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 0) 4248 // CHECK27-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 4249 // CHECK27-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4250 // CHECK27: omp_offload.failed: 4251 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR5]] 4252 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 4253 // CHECK27: omp_offload.cont: 4254 // CHECK27-NEXT: ret i32 0 4255 // 4256 // 4257 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155 4258 // CHECK27-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4259 // CHECK27-NEXT: entry: 4260 // CHECK27-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 4261 // CHECK27-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 4262 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4263 // CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]]) 4264 // CHECK27-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 4265 // CHECK27-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 4266 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4267 // CHECK27-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4268 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 4269 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 4270 // CHECK27-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 4271 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 4272 // CHECK27-NEXT: ret void 4273 // 4274 // 4275 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..2 4276 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4277 // CHECK27-NEXT: entry: 4278 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4279 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4280 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4281 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4282 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4283 // CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4284 // CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4285 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4286 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4287 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 4288 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4289 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4290 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4291 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4292 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4293 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 4294 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4295 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4296 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4297 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4298 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4299 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4300 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4301 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4302 // CHECK27: cond.true: 4303 // CHECK27-NEXT: br label [[COND_END:%.*]] 4304 // CHECK27: cond.false: 4305 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4306 // CHECK27-NEXT: br label [[COND_END]] 4307 // CHECK27: cond.end: 4308 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4309 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4310 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4311 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4312 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4313 // CHECK27: omp.inner.for.cond: 4314 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4315 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12 4316 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4317 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4318 // CHECK27: omp.inner.for.body: 4319 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12 4320 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12 4321 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !12 4322 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4323 // CHECK27: omp.inner.for.inc: 4324 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4325 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12 4326 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4327 // CHECK27-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4328 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 4329 // CHECK27: omp.inner.for.end: 4330 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4331 // CHECK27: omp.loop.exit: 4332 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4333 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4334 // CHECK27-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 4335 // CHECK27-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4336 // CHECK27: .omp.final.then: 4337 // CHECK27-NEXT: store i32 10, i32* [[I]], align 4 4338 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4339 // CHECK27: .omp.final.done: 4340 // CHECK27-NEXT: ret void 4341 // 4342 // 4343 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..3 4344 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4345 // CHECK27-NEXT: entry: 4346 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4347 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4348 // CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4349 // CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4350 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4351 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4352 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4353 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4354 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4355 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4356 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4357 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 4358 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4359 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4360 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4361 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4362 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4363 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4364 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4365 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4366 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4367 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4368 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 4369 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 4370 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4371 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4372 // CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4373 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4374 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4375 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4376 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 4377 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4378 // CHECK27: cond.true: 4379 // CHECK27-NEXT: br label [[COND_END:%.*]] 4380 // CHECK27: cond.false: 4381 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4382 // CHECK27-NEXT: br label [[COND_END]] 4383 // CHECK27: cond.end: 4384 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4385 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4386 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4387 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4388 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4389 // CHECK27: omp.inner.for.cond: 4390 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4391 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 4392 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4393 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4394 // CHECK27: omp.inner.for.body: 4395 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4396 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4397 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4398 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16 4399 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 4400 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 4401 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 4402 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4403 // CHECK27: omp.body.continue: 4404 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4405 // CHECK27: omp.inner.for.inc: 4406 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4407 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 4408 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4409 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 4410 // CHECK27: omp.inner.for.end: 4411 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4412 // CHECK27: omp.loop.exit: 4413 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4414 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4415 // CHECK27-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 4416 // CHECK27-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4417 // CHECK27: .omp.final.then: 4418 // CHECK27-NEXT: store i32 10, i32* [[I]], align 4 4419 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4420 // CHECK27: .omp.final.done: 4421 // CHECK27-NEXT: ret void 4422 // 4423 // 4424 // CHECK27-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4425 // CHECK27-SAME: () #[[ATTR8:[0-9]+]] { 4426 // CHECK27-NEXT: entry: 4427 // CHECK27-NEXT: call void @__tgt_register_requires(i64 1) 4428 // CHECK27-NEXT: ret void 4429 // 4430 // 4431 // CHECK29-LABEL: define {{[^@]+}}@main 4432 // CHECK29-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4433 // CHECK29-NEXT: entry: 4434 // CHECK29-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4435 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4436 // CHECK29-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 4437 // CHECK29-NEXT: [[N:%.*]] = alloca i32, align 4 4438 // CHECK29-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 4439 // CHECK29-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4440 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4 4441 // CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 4 4442 // CHECK29-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4443 // CHECK29-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4444 // CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4445 // CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4446 // CHECK29-NEXT: [[I3:%.*]] = alloca i32, align 4 4447 // CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4448 // CHECK29-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 4449 // CHECK29-NEXT: [[I4:%.*]] = alloca i32, align 4 4450 // CHECK29-NEXT: [[I5:%.*]] = alloca i32, align 4 4451 // CHECK29-NEXT: store i32 0, i32* [[RETVAL]], align 4 4452 // CHECK29-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4453 // CHECK29-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 4454 // CHECK29-NEXT: store i32 100, i32* [[N]], align 4 4455 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4456 // CHECK29-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 4457 // CHECK29-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 4458 // CHECK29-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 4459 // CHECK29-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 4460 // CHECK29-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 4461 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 4462 // CHECK29-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4463 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4464 // CHECK29-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4465 // CHECK29-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4466 // CHECK29-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4467 // CHECK29-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4468 // CHECK29-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4469 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4470 // CHECK29-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 4471 // CHECK29-NEXT: store i32 0, i32* [[I3]], align 4 4472 // CHECK29-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4473 // CHECK29-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4474 // CHECK29-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 4475 // CHECK29: simd.if.then: 4476 // CHECK29-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4477 // CHECK29-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4478 // CHECK29-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i64 16) ] 4479 // CHECK29-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4480 // CHECK29-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4 4481 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4482 // CHECK29: omp.inner.for.cond: 4483 // CHECK29-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4484 // CHECK29-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4485 // CHECK29-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4486 // CHECK29-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4487 // CHECK29: omp.inner.for.body: 4488 // CHECK29-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4489 // CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4490 // CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4491 // CHECK29-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 4492 // CHECK29-NEXT: [[TMP12:%.*]] = load i32, i32* [[I4]], align 4 4493 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 4494 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 4495 // CHECK29-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4496 // CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4497 // CHECK29: omp.body.continue: 4498 // CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4499 // CHECK29: omp.inner.for.inc: 4500 // CHECK29-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4501 // CHECK29-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1 4502 // CHECK29-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 4503 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 4504 // CHECK29: omp.inner.for.end: 4505 // CHECK29-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4506 // CHECK29-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 0 4507 // CHECK29-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 4508 // CHECK29-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 4509 // CHECK29-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 4510 // CHECK29-NEXT: store i32 [[ADD11]], i32* [[I]], align 4 4511 // CHECK29-NEXT: br label [[SIMD_IF_END]] 4512 // CHECK29: simd.if.end: 4513 // CHECK29-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4514 // CHECK29-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP15]]) 4515 // CHECK29-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4516 // CHECK29-NEXT: [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 4517 // CHECK29-NEXT: call void @llvm.stackrestore(i8* [[TMP16]]) 4518 // CHECK29-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 4519 // CHECK29-NEXT: ret i32 [[TMP17]] 4520 // 4521 // 4522 // CHECK29-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4523 // CHECK29-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat { 4524 // CHECK29-NEXT: entry: 4525 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4526 // CHECK29-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4527 // CHECK29-NEXT: [[TE:%.*]] = alloca i32, align 4 4528 // CHECK29-NEXT: [[TH:%.*]] = alloca i32, align 4 4529 // CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 4 4530 // CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4531 // CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4532 // CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4533 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4 4534 // CHECK29-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4535 // CHECK29-NEXT: store i32 0, i32* [[TE]], align 4 4536 // CHECK29-NEXT: store i32 128, i32* [[TH]], align 4 4537 // CHECK29-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4538 // CHECK29-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4539 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4540 // CHECK29-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 4541 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4542 // CHECK29: omp.inner.for.cond: 4543 // CHECK29-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 4544 // CHECK29-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 4545 // CHECK29-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 4546 // CHECK29-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4547 // CHECK29: omp.inner.for.body: 4548 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 4549 // CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 4550 // CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4551 // CHECK29-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 4552 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 4553 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 4554 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4555 // CHECK29-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5 4556 // CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4557 // CHECK29: omp.body.continue: 4558 // CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4559 // CHECK29: omp.inner.for.inc: 4560 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 4561 // CHECK29-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 4562 // CHECK29-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 4563 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 4564 // CHECK29: omp.inner.for.end: 4565 // CHECK29-NEXT: store i32 10, i32* [[I]], align 4 4566 // CHECK29-NEXT: ret i32 0 4567 // 4568 // 4569 // CHECK31-LABEL: define {{[^@]+}}@main 4570 // CHECK31-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4571 // CHECK31-NEXT: entry: 4572 // CHECK31-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4573 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4574 // CHECK31-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 4575 // CHECK31-NEXT: [[N:%.*]] = alloca i32, align 4 4576 // CHECK31-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4577 // CHECK31-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4578 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4 4579 // CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 4 4580 // CHECK31-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4581 // CHECK31-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4582 // CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4583 // CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4584 // CHECK31-NEXT: [[I3:%.*]] = alloca i32, align 4 4585 // CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4586 // CHECK31-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 4587 // CHECK31-NEXT: [[I4:%.*]] = alloca i32, align 4 4588 // CHECK31-NEXT: [[I5:%.*]] = alloca i32, align 4 4589 // CHECK31-NEXT: store i32 0, i32* [[RETVAL]], align 4 4590 // CHECK31-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4591 // CHECK31-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 4592 // CHECK31-NEXT: store i32 100, i32* [[N]], align 4 4593 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4594 // CHECK31-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 4595 // CHECK31-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 4596 // CHECK31-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 4597 // CHECK31-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 4598 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 4599 // CHECK31-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 4600 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4601 // CHECK31-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4602 // CHECK31-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4603 // CHECK31-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4604 // CHECK31-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4605 // CHECK31-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4606 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4607 // CHECK31-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 4608 // CHECK31-NEXT: store i32 0, i32* [[I3]], align 4 4609 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4610 // CHECK31-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4611 // CHECK31-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 4612 // CHECK31: simd.if.then: 4613 // CHECK31-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4614 // CHECK31-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4615 // CHECK31-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i32 16) ] 4616 // CHECK31-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 4617 // CHECK31-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 4618 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4619 // CHECK31: omp.inner.for.cond: 4620 // CHECK31-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4621 // CHECK31-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4622 // CHECK31-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4623 // CHECK31-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4624 // CHECK31: omp.inner.for.body: 4625 // CHECK31-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4626 // CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4627 // CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4628 // CHECK31-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 4629 // CHECK31-NEXT: [[TMP11:%.*]] = load i32, i32* [[I4]], align 4 4630 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP11]] 4631 // CHECK31-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4632 // CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4633 // CHECK31: omp.body.continue: 4634 // CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4635 // CHECK31: omp.inner.for.inc: 4636 // CHECK31-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4637 // CHECK31-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 4638 // CHECK31-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 4639 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4640 // CHECK31: omp.inner.for.end: 4641 // CHECK31-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4642 // CHECK31-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 0 4643 // CHECK31-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 4644 // CHECK31-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 4645 // CHECK31-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 4646 // CHECK31-NEXT: store i32 [[ADD11]], i32* [[I]], align 4 4647 // CHECK31-NEXT: br label [[SIMD_IF_END]] 4648 // CHECK31: simd.if.end: 4649 // CHECK31-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4650 // CHECK31-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP14]]) 4651 // CHECK31-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4652 // CHECK31-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4653 // CHECK31-NEXT: call void @llvm.stackrestore(i8* [[TMP15]]) 4654 // CHECK31-NEXT: [[TMP16:%.*]] = load i32, i32* [[RETVAL]], align 4 4655 // CHECK31-NEXT: ret i32 [[TMP16]] 4656 // 4657 // 4658 // CHECK31-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4659 // CHECK31-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat { 4660 // CHECK31-NEXT: entry: 4661 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4662 // CHECK31-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4663 // CHECK31-NEXT: [[TE:%.*]] = alloca i32, align 4 4664 // CHECK31-NEXT: [[TH:%.*]] = alloca i32, align 4 4665 // CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 4 4666 // CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4667 // CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4668 // CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4669 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4 4670 // CHECK31-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4671 // CHECK31-NEXT: store i32 0, i32* [[TE]], align 4 4672 // CHECK31-NEXT: store i32 128, i32* [[TH]], align 4 4673 // CHECK31-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4674 // CHECK31-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4675 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4676 // CHECK31-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 4677 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4678 // CHECK31: omp.inner.for.cond: 4679 // CHECK31-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4680 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 4681 // CHECK31-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 4682 // CHECK31-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4683 // CHECK31: omp.inner.for.body: 4684 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4685 // CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 4686 // CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4687 // CHECK31-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 4688 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 4689 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]] 4690 // CHECK31-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 4691 // CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4692 // CHECK31: omp.body.continue: 4693 // CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4694 // CHECK31: omp.inner.for.inc: 4695 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4696 // CHECK31-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 4697 // CHECK31-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4698 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 4699 // CHECK31: omp.inner.for.end: 4700 // CHECK31-NEXT: store i32 10, i32* [[I]], align 4 4701 // CHECK31-NEXT: ret i32 0 4702 // 4703