1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 // Test host codegen. 6 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 12 13 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 19 #ifdef CK1 20 21 int a[100]; 22 23 int teams_argument_global(int n){ 24 int te = n / 128; 25 int th = 128; 26 // discard n_addr 27 28 29 #pragma omp target 30 #pragma omp teams distribute parallel for simd num_teams(te), thread_limit(th) simdlen(64) 31 for(int i = 0; i < n; i++) { 32 a[i] = 0; 33 } 34 35 int i; 36 #pragma omp target 37 {{{ 38 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 39 for(i = 0; i < n; i++) { 40 a[i] = 0; 41 } 42 }}} 43 // outlined target regions 44 45 46 47 48 return a[0]; 49 } 50 51 52 #endif // CK1 53 54 // Test host codegen. 55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 56 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 57 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 61 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 64 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 67 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 68 #ifdef CK2 69 70 int teams_local_arg(void) { 71 int n = 100; 72 int a[n], i; 73 74 #pragma omp target 75 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 76 for(i = 0; i < n; i++) { 77 a[i] = 0; 78 } 79 80 // outlined target region 81 82 83 return a[0]; 84 } 85 86 87 #endif // CK2 88 89 // Test host codegen. 90 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 91 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 92 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17 93 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 94 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 95 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19 96 97 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21 98 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 99 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK21 100 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23 101 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 102 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK23 103 #ifdef CK3 104 105 106 template <typename T, int X, long long Y> 107 struct SS{ 108 T a[X]; 109 float b; 110 int foo(void) { 111 int i; 112 #pragma omp target 113 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 114 for(i = 0; i < X; i++) { 115 a[i] = (T)0; 116 } 117 118 // outlined target region 119 120 121 return a[0]; 122 } 123 }; 124 125 int teams_template_struct(void) { 126 SS<int, 123, 456> V; 127 return V.foo(); 128 129 } 130 131 #endif // CK3 132 133 // Test host codegen. 134 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK25 135 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 136 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK25 137 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK27 138 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 139 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK27 140 141 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29 142 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 143 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK29 144 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK31 145 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 146 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK31 147 148 #ifdef CK4 149 150 template <typename T, int n> 151 int tmain(T argc) { 152 T a[n]; 153 int te = n/128; 154 int th = 128; 155 #pragma omp target 156 #pragma omp teams distribute parallel for simd num_teams(te) thread_limit(th) simdlen(64) 157 for(int i = 0; i < n; i++) { 158 a[i] = (T)0; 159 } 160 return 0; 161 } 162 163 int main (int argc, char **argv) { 164 int n = 100; 165 int a[n], i; 166 #pragma omp target 167 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 168 for(i = 0; i < n; i++) { 169 a[i] = 0; 170 } 171 return tmain<int, 10>(argc); 172 } 173 174 175 176 177 178 179 180 181 #endif // CK4 182 #endif 183 184 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 185 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 186 // CHECK1-NEXT: entry: 187 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 188 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 191 // CHECK1-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 192 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 193 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 194 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 195 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 196 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 197 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 198 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 199 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 201 // CHECK1-NEXT: [[N_CASTED7:%.*]] = alloca i64, align 8 202 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [3 x i8*], align 8 203 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [3 x i8*], align 8 204 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [3 x i8*], align 8 205 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 206 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 207 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4 208 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 209 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 210 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 211 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 212 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4 213 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 214 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 215 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 216 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8 217 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 218 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 219 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 220 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8 221 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 222 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 223 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 224 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 225 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 226 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 227 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 228 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 229 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 230 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8 231 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 232 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 233 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 234 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 235 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8 236 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 237 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 238 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8 239 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 240 // CHECK1-NEXT: store i8* null, i8** [[TMP16]], align 8 241 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 242 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 243 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8 244 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 245 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 246 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8 247 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 248 // CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8 249 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 250 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 251 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8 252 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 253 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 254 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8 255 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 256 // CHECK1-NEXT: store i8* null, i8** [[TMP26]], align 8 257 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 258 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 259 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 260 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4 261 // CHECK1-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4 262 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 263 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0 264 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1 265 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1 266 // CHECK1-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 267 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 268 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1 269 // CHECK1-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64 270 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 271 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 272 // CHECK1-NEXT: store i32 1, i32* [[TMP34]], align 4 273 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 274 // CHECK1-NEXT: store i32 4, i32* [[TMP35]], align 4 275 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 276 // CHECK1-NEXT: store i8** [[TMP27]], i8*** [[TMP36]], align 8 277 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 278 // CHECK1-NEXT: store i8** [[TMP28]], i8*** [[TMP37]], align 8 279 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 280 // CHECK1-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 8 281 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 282 // CHECK1-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 8 283 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 284 // CHECK1-NEXT: store i8** null, i8*** [[TMP40]], align 8 285 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 286 // CHECK1-NEXT: store i8** null, i8*** [[TMP41]], align 8 287 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 288 // CHECK1-NEXT: store i64 [[TMP33]], i64* [[TMP42]], align 8 289 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP29]], i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 290 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 291 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 292 // CHECK1: omp_offload.failed: 293 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 294 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 295 // CHECK1: omp_offload.cont: 296 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[I]], align 4 297 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[I_CASTED]] to i32* 298 // CHECK1-NEXT: store i32 [[TMP45]], i32* [[CONV6]], align 4 299 // CHECK1-NEXT: [[TMP46:%.*]] = load i64, i64* [[I_CASTED]], align 8 300 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[N_ADDR]], align 4 301 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED7]] to i32* 302 // CHECK1-NEXT: store i32 [[TMP47]], i32* [[CONV8]], align 4 303 // CHECK1-NEXT: [[TMP48:%.*]] = load i64, i64* [[N_CASTED7]], align 8 304 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 305 // CHECK1-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [100 x i32]** 306 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP50]], align 8 307 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 308 // CHECK1-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to [100 x i32]** 309 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP52]], align 8 310 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0 311 // CHECK1-NEXT: store i8* null, i8** [[TMP53]], align 8 312 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 1 313 // CHECK1-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i64* 314 // CHECK1-NEXT: store i64 [[TMP46]], i64* [[TMP55]], align 8 315 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 1 316 // CHECK1-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i64* 317 // CHECK1-NEXT: store i64 [[TMP46]], i64* [[TMP57]], align 8 318 // CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 1 319 // CHECK1-NEXT: store i8* null, i8** [[TMP58]], align 8 320 // CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 2 321 // CHECK1-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i64* 322 // CHECK1-NEXT: store i64 [[TMP48]], i64* [[TMP60]], align 8 323 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 2 324 // CHECK1-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64* 325 // CHECK1-NEXT: store i64 [[TMP48]], i64* [[TMP62]], align 8 326 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 2 327 // CHECK1-NEXT: store i8* null, i8** [[TMP63]], align 8 328 // CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 329 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 330 // CHECK1-NEXT: [[TMP66:%.*]] = load i32, i32* [[N_ADDR]], align 4 331 // CHECK1-NEXT: store i32 [[TMP66]], i32* [[DOTCAPTURE_EXPR_13]], align 4 332 // CHECK1-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 333 // CHECK1-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP67]], 0 334 // CHECK1-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 335 // CHECK1-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1 336 // CHECK1-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4 337 // CHECK1-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4 338 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP68]], 1 339 // CHECK1-NEXT: [[TMP69:%.*]] = zext i32 [[ADD18]] to i64 340 // CHECK1-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 341 // CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0 342 // CHECK1-NEXT: store i32 1, i32* [[TMP70]], align 4 343 // CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1 344 // CHECK1-NEXT: store i32 3, i32* [[TMP71]], align 4 345 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2 346 // CHECK1-NEXT: store i8** [[TMP64]], i8*** [[TMP72]], align 8 347 // CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3 348 // CHECK1-NEXT: store i8** [[TMP65]], i8*** [[TMP73]], align 8 349 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4 350 // CHECK1-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP74]], align 8 351 // CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5 352 // CHECK1-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP75]], align 8 353 // CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6 354 // CHECK1-NEXT: store i8** null, i8*** [[TMP76]], align 8 355 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7 356 // CHECK1-NEXT: store i8** null, i8*** [[TMP77]], align 8 357 // CHECK1-NEXT: [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8 358 // CHECK1-NEXT: store i64 [[TMP69]], i64* [[TMP78]], align 8 359 // CHECK1-NEXT: [[TMP79:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]]) 360 // CHECK1-NEXT: [[TMP80:%.*]] = icmp ne i32 [[TMP79]], 0 361 // CHECK1-NEXT: br i1 [[TMP80]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 362 // CHECK1: omp_offload.failed20: 363 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36([100 x i32]* @a, i64 [[TMP46]], i64 [[TMP48]]) #[[ATTR2]] 364 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT21]] 365 // CHECK1: omp_offload.cont21: 366 // CHECK1-NEXT: [[TMP81:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 367 // CHECK1-NEXT: ret i32 [[TMP81]] 368 // 369 // 370 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 371 // CHECK1-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], i64 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 372 // CHECK1-NEXT: entry: 373 // CHECK1-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 374 // CHECK1-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 375 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 376 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 377 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 378 // CHECK1-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 379 // CHECK1-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 380 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 381 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 382 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 383 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 384 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32* 385 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 386 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 387 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 388 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 389 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]]) 390 // CHECK1-NEXT: ret void 391 // 392 // 393 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 394 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 395 // CHECK1-NEXT: entry: 396 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 397 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 398 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 399 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 400 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 403 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 406 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 407 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 408 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 409 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 410 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 411 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 412 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 413 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 414 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 415 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 416 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 417 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 418 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 419 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 420 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 421 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 422 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 423 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 424 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 425 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 426 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 427 // CHECK1: omp.precond.then: 428 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 429 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 430 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 431 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 432 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 433 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 434 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 435 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 436 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 437 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 438 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 439 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 440 // CHECK1: cond.true: 441 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 442 // CHECK1-NEXT: br label [[COND_END:%.*]] 443 // CHECK1: cond.false: 444 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 445 // CHECK1-NEXT: br label [[COND_END]] 446 // CHECK1: cond.end: 447 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 448 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 449 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 450 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 451 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 452 // CHECK1: omp.inner.for.cond: 453 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 454 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 455 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 456 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 457 // CHECK1: omp.inner.for.body: 458 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5 459 // CHECK1-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 460 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 461 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 462 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i32* [[TMP0]], [100 x i32]* [[TMP1]]), !llvm.access.group !5 463 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 464 // CHECK1: omp.inner.for.inc: 465 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 466 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5 467 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 468 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 469 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 470 // CHECK1: omp.inner.for.end: 471 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 472 // CHECK1: omp.loop.exit: 473 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 474 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 475 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 476 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 477 // CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 478 // CHECK1-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 479 // CHECK1: .omp.final.then: 480 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 481 // CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 482 // CHECK1-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 483 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 484 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 485 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 486 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 487 // CHECK1: .omp.final.done: 488 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 489 // CHECK1: omp.precond.end: 490 // CHECK1-NEXT: ret void 491 // 492 // 493 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 494 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 495 // CHECK1-NEXT: entry: 496 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 497 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 498 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 499 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 500 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 501 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 502 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 503 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 504 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 505 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 506 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 507 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 508 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 509 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 510 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 511 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 512 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 513 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 514 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 515 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 516 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 517 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 518 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 519 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 520 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 521 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 522 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 523 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 524 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 525 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 526 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 527 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 528 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 529 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 530 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 531 // CHECK1: omp.precond.then: 532 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 533 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 534 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 535 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 536 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 537 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 538 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 539 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 540 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 541 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 542 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 543 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 544 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 545 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 546 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 547 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 548 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 549 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 550 // CHECK1: cond.true: 551 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 552 // CHECK1-NEXT: br label [[COND_END:%.*]] 553 // CHECK1: cond.false: 554 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 555 // CHECK1-NEXT: br label [[COND_END]] 556 // CHECK1: cond.end: 557 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 558 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 559 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 560 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 561 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 562 // CHECK1: omp.inner.for.cond: 563 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 564 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 565 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 566 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 567 // CHECK1: omp.inner.for.body: 568 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 569 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 570 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 571 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !10 572 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !10 573 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 574 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 575 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 576 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 577 // CHECK1: omp.body.continue: 578 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 579 // CHECK1: omp.inner.for.inc: 580 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 581 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 582 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 583 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 584 // CHECK1: omp.inner.for.end: 585 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 586 // CHECK1: omp.loop.exit: 587 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 588 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 589 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 590 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 591 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 592 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 593 // CHECK1: .omp.final.then: 594 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 595 // CHECK1-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0 596 // CHECK1-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 597 // CHECK1-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 598 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 599 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4 600 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 601 // CHECK1: .omp.final.done: 602 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 603 // CHECK1: omp.precond.end: 604 // CHECK1-NEXT: ret void 605 // 606 // 607 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36 608 // CHECK1-SAME: ([100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] { 609 // CHECK1-NEXT: entry: 610 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 611 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 612 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 613 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 614 // CHECK1-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8 615 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 616 // CHECK1-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 617 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32* 618 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 619 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], [100 x i32]* [[TMP0]]) 620 // CHECK1-NEXT: ret void 621 // 622 // 623 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 624 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 625 // CHECK1-NEXT: entry: 626 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 627 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 628 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 629 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 630 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 631 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 632 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 633 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 634 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 635 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 636 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 637 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 638 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 639 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 640 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 641 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 642 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 643 // CHECK1-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 644 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 645 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 646 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 647 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 648 // CHECK1-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 649 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 650 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 651 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 652 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 653 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 654 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 655 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 656 // CHECK1-NEXT: store i32 0, i32* [[I3]], align 4 657 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 658 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 659 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 660 // CHECK1: omp.precond.then: 661 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 0 662 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ] 663 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 664 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 665 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 666 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 667 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 668 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 669 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 670 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 671 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 672 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 673 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 674 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 675 // CHECK1: cond.true: 676 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 677 // CHECK1-NEXT: br label [[COND_END:%.*]] 678 // CHECK1: cond.false: 679 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 680 // CHECK1-NEXT: br label [[COND_END]] 681 // CHECK1: cond.end: 682 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 683 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 684 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 685 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 686 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 687 // CHECK1: omp.inner.for.cond: 688 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 689 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 690 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 691 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 692 // CHECK1: omp.inner.for.body: 693 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 694 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 695 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 696 // CHECK1-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 697 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[I4]], i32* [[TMP1]], [100 x i32]* [[TMP2]]) 698 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 699 // CHECK1: omp.inner.for.inc: 700 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 701 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 702 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 703 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 704 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 705 // CHECK1: omp.inner.for.end: 706 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 707 // CHECK1: omp.loop.exit: 708 // CHECK1-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 709 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 710 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 711 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 712 // CHECK1-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 713 // CHECK1-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 714 // CHECK1: .omp.final.then: 715 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 716 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0 717 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 718 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 719 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 720 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 721 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 722 // CHECK1: .omp.final.done: 723 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 724 // CHECK1: omp.precond.end: 725 // CHECK1-NEXT: ret void 726 // 727 // 728 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 729 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 730 // CHECK1-NEXT: entry: 731 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 732 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 733 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 734 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 735 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 736 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 737 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 738 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 739 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 740 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 741 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 742 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 743 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 744 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 745 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 746 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 747 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 748 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 749 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4 750 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 751 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 752 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 753 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 754 // CHECK1-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 755 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 756 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 757 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 758 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 759 // CHECK1-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 760 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 761 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 762 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 763 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 764 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 765 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 766 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 767 // CHECK1-NEXT: store i32 0, i32* [[I3]], align 4 768 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 769 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 770 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 771 // CHECK1: omp.precond.then: 772 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 0 773 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ] 774 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 775 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4 776 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 777 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 778 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 779 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 780 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 781 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 782 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32 783 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 784 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 785 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 786 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 787 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 788 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 789 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP11]]) 790 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 791 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 792 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 793 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 794 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 795 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 796 // CHECK1-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 797 // CHECK1: cond.true: 798 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 799 // CHECK1-NEXT: br label [[COND_END:%.*]] 800 // CHECK1: cond.false: 801 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 802 // CHECK1-NEXT: br label [[COND_END]] 803 // CHECK1: cond.end: 804 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 805 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 806 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 807 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 808 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 809 // CHECK1: omp.inner.for.cond: 810 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 811 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 812 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 813 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 814 // CHECK1: omp.inner.for.body: 815 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 816 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 817 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 818 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 819 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[I5]], align 4 820 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 821 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 [[IDXPROM]] 822 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 823 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 824 // CHECK1: omp.body.continue: 825 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 826 // CHECK1: omp.inner.for.inc: 827 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 828 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP23]], 1 829 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 830 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 831 // CHECK1: omp.inner.for.end: 832 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 833 // CHECK1: omp.loop.exit: 834 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 835 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 836 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 837 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 838 // CHECK1-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 839 // CHECK1-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 840 // CHECK1: .omp.final.then: 841 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 842 // CHECK1-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0 843 // CHECK1-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 844 // CHECK1-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 845 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 846 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4 847 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 848 // CHECK1: .omp.final.done: 849 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 850 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 851 // CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 852 // CHECK1: .omp.linear.pu: 853 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 854 // CHECK1: .omp.linear.pu.done: 855 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 856 // CHECK1: omp.precond.end: 857 // CHECK1-NEXT: ret void 858 // 859 // 860 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 861 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 862 // CHECK1-NEXT: entry: 863 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 864 // CHECK1-NEXT: ret void 865 // 866 // 867 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 868 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 869 // CHECK3-NEXT: entry: 870 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 871 // CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4 872 // CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4 873 // CHECK3-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 874 // CHECK3-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 875 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 876 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 877 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 878 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 879 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 880 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 881 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 882 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 883 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 884 // CHECK3-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4 885 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 4 886 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 4 887 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 4 888 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 889 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 890 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 891 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 892 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 893 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 894 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 895 // CHECK3-NEXT: store i32 128, i32* [[TH]], align 4 896 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 897 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4 898 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4 899 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 900 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4 901 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4 902 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 903 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4 904 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4 905 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 906 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 907 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 908 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 909 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 910 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4 911 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 912 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4 913 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 914 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 915 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4 916 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 917 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 918 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4 919 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 920 // CHECK3-NEXT: store i8* null, i8** [[TMP16]], align 4 921 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 922 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 923 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4 924 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 925 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 926 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4 927 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 928 // CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4 929 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 930 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 931 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4 932 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 933 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 934 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4 935 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 936 // CHECK3-NEXT: store i8* null, i8** [[TMP26]], align 4 937 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 938 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 939 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 940 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4 941 // CHECK3-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4 942 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 943 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0 944 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 945 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 946 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 947 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 948 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1 949 // CHECK3-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64 950 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 951 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 952 // CHECK3-NEXT: store i32 1, i32* [[TMP34]], align 4 953 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 954 // CHECK3-NEXT: store i32 4, i32* [[TMP35]], align 4 955 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 956 // CHECK3-NEXT: store i8** [[TMP27]], i8*** [[TMP36]], align 4 957 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 958 // CHECK3-NEXT: store i8** [[TMP28]], i8*** [[TMP37]], align 4 959 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 960 // CHECK3-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 4 961 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 962 // CHECK3-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 4 963 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 964 // CHECK3-NEXT: store i8** null, i8*** [[TMP40]], align 4 965 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 966 // CHECK3-NEXT: store i8** null, i8*** [[TMP41]], align 4 967 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 968 // CHECK3-NEXT: store i64 [[TMP33]], i64* [[TMP42]], align 8 969 // CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP29]], i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 970 // CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 971 // CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 972 // CHECK3: omp_offload.failed: 973 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 974 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 975 // CHECK3: omp_offload.cont: 976 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[I]], align 4 977 // CHECK3-NEXT: store i32 [[TMP45]], i32* [[I_CASTED]], align 4 978 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[I_CASTED]], align 4 979 // CHECK3-NEXT: [[TMP47:%.*]] = load i32, i32* [[N_ADDR]], align 4 980 // CHECK3-NEXT: store i32 [[TMP47]], i32* [[N_CASTED4]], align 4 981 // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[N_CASTED4]], align 4 982 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 983 // CHECK3-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [100 x i32]** 984 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP50]], align 4 985 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 986 // CHECK3-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to [100 x i32]** 987 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP52]], align 4 988 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 989 // CHECK3-NEXT: store i8* null, i8** [[TMP53]], align 4 990 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 991 // CHECK3-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32* 992 // CHECK3-NEXT: store i32 [[TMP46]], i32* [[TMP55]], align 4 993 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 994 // CHECK3-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32* 995 // CHECK3-NEXT: store i32 [[TMP46]], i32* [[TMP57]], align 4 996 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 997 // CHECK3-NEXT: store i8* null, i8** [[TMP58]], align 4 998 // CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 999 // CHECK3-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32* 1000 // CHECK3-NEXT: store i32 [[TMP48]], i32* [[TMP60]], align 4 1001 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 1002 // CHECK3-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32* 1003 // CHECK3-NEXT: store i32 [[TMP48]], i32* [[TMP62]], align 4 1004 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 2 1005 // CHECK3-NEXT: store i8* null, i8** [[TMP63]], align 4 1006 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1007 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1008 // CHECK3-NEXT: [[TMP66:%.*]] = load i32, i32* [[N_ADDR]], align 4 1009 // CHECK3-NEXT: store i32 [[TMP66]], i32* [[DOTCAPTURE_EXPR_9]], align 4 1010 // CHECK3-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 1011 // CHECK3-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP67]], 0 1012 // CHECK3-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1013 // CHECK3-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1014 // CHECK3-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1015 // CHECK3-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1016 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP68]], 1 1017 // CHECK3-NEXT: [[TMP69:%.*]] = zext i32 [[ADD14]] to i64 1018 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1019 // CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0 1020 // CHECK3-NEXT: store i32 1, i32* [[TMP70]], align 4 1021 // CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1 1022 // CHECK3-NEXT: store i32 3, i32* [[TMP71]], align 4 1023 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2 1024 // CHECK3-NEXT: store i8** [[TMP64]], i8*** [[TMP72]], align 4 1025 // CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3 1026 // CHECK3-NEXT: store i8** [[TMP65]], i8*** [[TMP73]], align 4 1027 // CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4 1028 // CHECK3-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP74]], align 4 1029 // CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5 1030 // CHECK3-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP75]], align 4 1031 // CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6 1032 // CHECK3-NEXT: store i8** null, i8*** [[TMP76]], align 4 1033 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7 1034 // CHECK3-NEXT: store i8** null, i8*** [[TMP77]], align 4 1035 // CHECK3-NEXT: [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8 1036 // CHECK3-NEXT: store i64 [[TMP69]], i64* [[TMP78]], align 8 1037 // CHECK3-NEXT: [[TMP79:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]]) 1038 // CHECK3-NEXT: [[TMP80:%.*]] = icmp ne i32 [[TMP79]], 0 1039 // CHECK3-NEXT: br i1 [[TMP80]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 1040 // CHECK3: omp_offload.failed16: 1041 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36([100 x i32]* @a, i32 [[TMP46]], i32 [[TMP48]]) #[[ATTR2]] 1042 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]] 1043 // CHECK3: omp_offload.cont17: 1044 // CHECK3-NEXT: [[TMP81:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 1045 // CHECK3-NEXT: ret i32 [[TMP81]] 1046 // 1047 // 1048 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 1049 // CHECK3-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], i32 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 1050 // CHECK3-NEXT: entry: 1051 // CHECK3-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 1052 // CHECK3-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 1053 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1054 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1055 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 1056 // CHECK3-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 1057 // CHECK3-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 1058 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1059 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1060 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1061 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 1062 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 1063 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1064 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]]) 1065 // CHECK3-NEXT: ret void 1066 // 1067 // 1068 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1069 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1070 // CHECK3-NEXT: entry: 1071 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1072 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1073 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1074 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1075 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1076 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1077 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1078 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1079 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1080 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1081 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1082 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1083 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1084 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1085 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1086 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1087 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1088 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1089 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1090 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1091 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1092 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1093 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1094 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1095 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1096 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1097 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1098 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1099 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1100 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1101 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1102 // CHECK3: omp.precond.then: 1103 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1104 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1105 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 1106 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1107 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1108 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1109 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1110 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1111 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1112 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1113 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1114 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1115 // CHECK3: cond.true: 1116 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1117 // CHECK3-NEXT: br label [[COND_END:%.*]] 1118 // CHECK3: cond.false: 1119 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1120 // CHECK3-NEXT: br label [[COND_END]] 1121 // CHECK3: cond.end: 1122 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1123 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1124 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1125 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1126 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1127 // CHECK3: omp.inner.for.cond: 1128 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 1129 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 1130 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1131 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1132 // CHECK3: omp.inner.for.body: 1133 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !6 1134 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 1135 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32* [[TMP0]], [100 x i32]* [[TMP1]]), !llvm.access.group !6 1136 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1137 // CHECK3: omp.inner.for.inc: 1138 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 1139 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !6 1140 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1141 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 1142 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 1143 // CHECK3: omp.inner.for.end: 1144 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1145 // CHECK3: omp.loop.exit: 1146 // CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1147 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1148 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1149 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1150 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1151 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1152 // CHECK3: .omp.final.then: 1153 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1154 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP23]], 0 1155 // CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1156 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 1157 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 1158 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 1159 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1160 // CHECK3: .omp.final.done: 1161 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1162 // CHECK3: omp.precond.end: 1163 // CHECK3-NEXT: ret void 1164 // 1165 // 1166 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1167 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1168 // CHECK3-NEXT: entry: 1169 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1170 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1171 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1172 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1173 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1174 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1175 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1176 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1177 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1178 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1179 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1180 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1181 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1182 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1183 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1184 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1185 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1186 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1187 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1188 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1189 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1190 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1191 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1192 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1193 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1194 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1195 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1196 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1197 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1198 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1199 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1200 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1201 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1202 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1203 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1204 // CHECK3: omp.precond.then: 1205 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1206 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1207 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1208 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1209 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1210 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4 1211 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1212 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1213 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1214 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1215 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1216 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1217 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1218 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1219 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1220 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1221 // CHECK3: cond.true: 1222 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1223 // CHECK3-NEXT: br label [[COND_END:%.*]] 1224 // CHECK3: cond.false: 1225 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1226 // CHECK3-NEXT: br label [[COND_END]] 1227 // CHECK3: cond.end: 1228 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1229 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1230 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1231 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1232 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1233 // CHECK3: omp.inner.for.cond: 1234 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1235 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 1236 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1237 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1238 // CHECK3: omp.inner.for.body: 1239 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1240 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 1241 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1242 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !11 1243 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !11 1244 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP18]] 1245 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 1246 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1247 // CHECK3: omp.body.continue: 1248 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1249 // CHECK3: omp.inner.for.inc: 1250 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1251 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 1252 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1253 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1254 // CHECK3: omp.inner.for.end: 1255 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1256 // CHECK3: omp.loop.exit: 1257 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1258 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1259 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1260 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1261 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1262 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1263 // CHECK3: .omp.final.then: 1264 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1265 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 1266 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1267 // CHECK3-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1268 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1269 // CHECK3-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 1270 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1271 // CHECK3: .omp.final.done: 1272 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1273 // CHECK3: omp.precond.end: 1274 // CHECK3-NEXT: ret void 1275 // 1276 // 1277 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36 1278 // CHECK3-SAME: ([100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR1]] { 1279 // CHECK3-NEXT: entry: 1280 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1281 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 1282 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1283 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1284 // CHECK3-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4 1285 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1286 // CHECK3-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1287 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], [100 x i32]* [[TMP0]]) 1288 // CHECK3-NEXT: ret void 1289 // 1290 // 1291 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1292 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1293 // CHECK3-NEXT: entry: 1294 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1295 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1296 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 1297 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1298 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1299 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1300 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1301 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1302 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1303 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1304 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1305 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1306 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1307 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1308 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 1309 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1310 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1311 // CHECK3-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 1312 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1313 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1314 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 1315 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1316 // CHECK3-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1317 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 1318 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1319 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1320 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1321 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1322 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1323 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1324 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4 1325 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1326 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1327 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1328 // CHECK3: omp.precond.then: 1329 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 0 1330 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ] 1331 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1332 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1333 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 1334 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1335 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1336 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1337 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1338 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1339 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1340 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1341 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1342 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1343 // CHECK3: cond.true: 1344 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1345 // CHECK3-NEXT: br label [[COND_END:%.*]] 1346 // CHECK3: cond.false: 1347 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1348 // CHECK3-NEXT: br label [[COND_END]] 1349 // CHECK3: cond.end: 1350 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1351 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1352 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1353 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1354 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1355 // CHECK3: omp.inner.for.cond: 1356 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1357 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1358 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1359 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1360 // CHECK3: omp.inner.for.body: 1361 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1362 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1363 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[I4]], i32* [[TMP1]], [100 x i32]* [[TMP2]]) 1364 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1365 // CHECK3: omp.inner.for.inc: 1366 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1367 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1368 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1369 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1370 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1371 // CHECK3: omp.inner.for.end: 1372 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1373 // CHECK3: omp.loop.exit: 1374 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1375 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1376 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1377 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1378 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1379 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1380 // CHECK3: .omp.final.then: 1381 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1382 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 1383 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1384 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 1385 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 1386 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 1387 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1388 // CHECK3: .omp.final.done: 1389 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1390 // CHECK3: omp.precond.end: 1391 // CHECK3-NEXT: ret void 1392 // 1393 // 1394 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 1395 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1396 // CHECK3-NEXT: entry: 1397 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1398 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1399 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1400 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1401 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 1402 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1403 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1404 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1405 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1406 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1407 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1408 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1409 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1410 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1411 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1412 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1413 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1414 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 1415 // CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 4 1416 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1417 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1418 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1419 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1420 // CHECK3-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 1421 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1422 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1423 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 1424 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1425 // CHECK3-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1426 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 1427 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1428 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1429 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1430 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1431 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1432 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1433 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4 1434 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1435 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1436 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1437 // CHECK3: omp.precond.then: 1438 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 0 1439 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ] 1440 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 1441 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4 1442 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1443 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1444 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1445 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1446 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1447 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 1448 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 1449 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1450 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1451 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1452 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1453 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP11]]) 1454 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1455 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1456 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1457 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1458 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1459 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 1460 // CHECK3-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1461 // CHECK3: cond.true: 1462 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1463 // CHECK3-NEXT: br label [[COND_END:%.*]] 1464 // CHECK3: cond.false: 1465 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1466 // CHECK3-NEXT: br label [[COND_END]] 1467 // CHECK3: cond.end: 1468 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1469 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1470 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1471 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 1472 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1473 // CHECK3: omp.inner.for.cond: 1474 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1475 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1476 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 1477 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1478 // CHECK3: omp.inner.for.body: 1479 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1480 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 1481 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1482 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 1483 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4 1484 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 [[TMP22]] 1485 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1486 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1487 // CHECK3: omp.body.continue: 1488 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1489 // CHECK3: omp.inner.for.inc: 1490 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1491 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], 1 1492 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1493 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 1494 // CHECK3: omp.inner.for.end: 1495 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1496 // CHECK3: omp.loop.exit: 1497 // CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1498 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1499 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1500 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1501 // CHECK3-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 1502 // CHECK3-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1503 // CHECK3: .omp.final.then: 1504 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1505 // CHECK3-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP28]], 0 1506 // CHECK3-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 1507 // CHECK3-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 1508 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1509 // CHECK3-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4 1510 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1511 // CHECK3: .omp.final.done: 1512 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1513 // CHECK3-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1514 // CHECK3-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1515 // CHECK3: .omp.linear.pu: 1516 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1517 // CHECK3: .omp.linear.pu.done: 1518 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1519 // CHECK3: omp.precond.end: 1520 // CHECK3-NEXT: ret void 1521 // 1522 // 1523 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1524 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] { 1525 // CHECK3-NEXT: entry: 1526 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1527 // CHECK3-NEXT: ret void 1528 // 1529 // 1530 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1531 // CHECK5-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1532 // CHECK5-NEXT: entry: 1533 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1534 // CHECK5-NEXT: [[TE:%.*]] = alloca i32, align 4 1535 // CHECK5-NEXT: [[TH:%.*]] = alloca i32, align 4 1536 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1537 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1538 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1539 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1540 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1541 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1542 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1543 // CHECK5-NEXT: [[I4:%.*]] = alloca i32, align 4 1544 // CHECK5-NEXT: [[I11:%.*]] = alloca i32, align 4 1545 // CHECK5-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 1546 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 1547 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4 1548 // CHECK5-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 1549 // CHECK5-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 1550 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4 1551 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1552 // CHECK5-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1553 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4 1554 // CHECK5-NEXT: [[I25:%.*]] = alloca i32, align 4 1555 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1556 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1557 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1558 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1559 // CHECK5-NEXT: store i32 128, i32* [[TH]], align 4 1560 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1561 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1562 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1563 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1564 // CHECK5-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 1565 // CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 1566 // CHECK5-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1567 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1568 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1569 // CHECK5-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4 1570 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 1571 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1572 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1573 // CHECK5-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 1574 // CHECK5: simd.if.then: 1575 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1576 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1577 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1578 // CHECK5: omp.inner.for.cond: 1579 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1580 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 1581 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1582 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1583 // CHECK5: omp.inner.for.body: 1584 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1585 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1586 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1587 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !2 1588 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !2 1589 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1590 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM]] 1591 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 1592 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1593 // CHECK5: omp.body.continue: 1594 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1595 // CHECK5: omp.inner.for.inc: 1596 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1597 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 1598 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1599 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1600 // CHECK5: omp.inner.for.end: 1601 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1602 // CHECK5-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 0 1603 // CHECK5-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1604 // CHECK5-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1605 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1606 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 1607 // CHECK5-NEXT: br label [[SIMD_IF_END]] 1608 // CHECK5: simd.if.end: 1609 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[N_ADDR]], align 4 1610 // CHECK5-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_13]], align 4 1611 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1612 // CHECK5-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 0 1613 // CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1614 // CHECK5-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1 1615 // CHECK5-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4 1616 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4 1617 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4 1618 // CHECK5-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_UB19]], align 4 1619 // CHECK5-NEXT: store i32 0, i32* [[I20]], align 4 1620 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1621 // CHECK5-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]] 1622 // CHECK5-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END41:%.*]] 1623 // CHECK5: simd.if.then22: 1624 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4 1625 // CHECK5-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV23]], align 4 1626 // CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), i64 16) ] 1627 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[I11]], align 4 1628 // CHECK5-NEXT: store i32 [[TMP17]], i32* [[DOTLINEAR_START]], align 4 1629 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]] 1630 // CHECK5: omp.inner.for.cond26: 1631 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1632 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4 1633 // CHECK5-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 1634 // CHECK5-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 1635 // CHECK5: omp.inner.for.body28: 1636 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1637 // CHECK5-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1 1638 // CHECK5-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]] 1639 // CHECK5-NEXT: store i32 [[ADD30]], i32* [[I24]], align 4 1640 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[I24]], align 4 1641 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP21]] to i64 1642 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM31]] 1643 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4 1644 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 1645 // CHECK5: omp.body.continue33: 1646 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 1647 // CHECK5: omp.inner.for.inc34: 1648 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1649 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP22]], 1 1650 // CHECK5-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4 1651 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP7:![0-9]+]] 1652 // CHECK5: omp.inner.for.end36: 1653 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1654 // CHECK5-NEXT: [[SUB37:%.*]] = sub nsw i32 [[TMP23]], 0 1655 // CHECK5-NEXT: [[DIV38:%.*]] = sdiv i32 [[SUB37]], 1 1656 // CHECK5-NEXT: [[MUL39:%.*]] = mul nsw i32 [[DIV38]], 1 1657 // CHECK5-NEXT: [[ADD40:%.*]] = add nsw i32 0, [[MUL39]] 1658 // CHECK5-NEXT: store i32 [[ADD40]], i32* [[I11]], align 4 1659 // CHECK5-NEXT: br label [[SIMD_IF_END41]] 1660 // CHECK5: simd.if.end41: 1661 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 1662 // CHECK5-NEXT: ret i32 [[TMP24]] 1663 // 1664 // 1665 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1666 // CHECK7-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1667 // CHECK7-NEXT: entry: 1668 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1669 // CHECK7-NEXT: [[TE:%.*]] = alloca i32, align 4 1670 // CHECK7-NEXT: [[TH:%.*]] = alloca i32, align 4 1671 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 1672 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1673 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1674 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1675 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1676 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1677 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1678 // CHECK7-NEXT: [[I4:%.*]] = alloca i32, align 4 1679 // CHECK7-NEXT: [[I11:%.*]] = alloca i32, align 4 1680 // CHECK7-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 1681 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 1682 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4 1683 // CHECK7-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 1684 // CHECK7-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 1685 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4 1686 // CHECK7-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1687 // CHECK7-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1688 // CHECK7-NEXT: [[I24:%.*]] = alloca i32, align 4 1689 // CHECK7-NEXT: [[I25:%.*]] = alloca i32, align 4 1690 // CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1691 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1692 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1693 // CHECK7-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1694 // CHECK7-NEXT: store i32 128, i32* [[TH]], align 4 1695 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1696 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1697 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1698 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1699 // CHECK7-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 1700 // CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 1701 // CHECK7-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1702 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1703 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1704 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4 1705 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 1706 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1707 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1708 // CHECK7-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 1709 // CHECK7: simd.if.then: 1710 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1711 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1712 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1713 // CHECK7: omp.inner.for.cond: 1714 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1715 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 1716 // CHECK7-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1717 // CHECK7-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1718 // CHECK7: omp.inner.for.body: 1719 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1720 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1721 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1722 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !3 1723 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !3 1724 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP9]] 1725 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 1726 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1727 // CHECK7: omp.body.continue: 1728 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1729 // CHECK7: omp.inner.for.inc: 1730 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1731 // CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 1732 // CHECK7-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1733 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1734 // CHECK7: omp.inner.for.end: 1735 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1736 // CHECK7-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 0 1737 // CHECK7-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1738 // CHECK7-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1739 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1740 // CHECK7-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 1741 // CHECK7-NEXT: br label [[SIMD_IF_END]] 1742 // CHECK7: simd.if.end: 1743 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[N_ADDR]], align 4 1744 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_13]], align 4 1745 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1746 // CHECK7-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 0 1747 // CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1748 // CHECK7-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1 1749 // CHECK7-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4 1750 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4 1751 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4 1752 // CHECK7-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_UB19]], align 4 1753 // CHECK7-NEXT: store i32 0, i32* [[I20]], align 4 1754 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1755 // CHECK7-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]] 1756 // CHECK7-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END40:%.*]] 1757 // CHECK7: simd.if.then22: 1758 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4 1759 // CHECK7-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV23]], align 4 1760 // CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32 16) ] 1761 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[I11]], align 4 1762 // CHECK7-NEXT: store i32 [[TMP17]], i32* [[DOTLINEAR_START]], align 4 1763 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]] 1764 // CHECK7: omp.inner.for.cond26: 1765 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1766 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4 1767 // CHECK7-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 1768 // CHECK7-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END35:%.*]] 1769 // CHECK7: omp.inner.for.body28: 1770 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1771 // CHECK7-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1 1772 // CHECK7-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]] 1773 // CHECK7-NEXT: store i32 [[ADD30]], i32* [[I24]], align 4 1774 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[I24]], align 4 1775 // CHECK7-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP21]] 1776 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX31]], align 4 1777 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE32:%.*]] 1778 // CHECK7: omp.body.continue32: 1779 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC33:%.*]] 1780 // CHECK7: omp.inner.for.inc33: 1781 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4 1782 // CHECK7-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP22]], 1 1783 // CHECK7-NEXT: store i32 [[ADD34]], i32* [[DOTOMP_IV23]], align 4 1784 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP8:![0-9]+]] 1785 // CHECK7: omp.inner.for.end35: 1786 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1787 // CHECK7-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP23]], 0 1788 // CHECK7-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1 1789 // CHECK7-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1 1790 // CHECK7-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]] 1791 // CHECK7-NEXT: store i32 [[ADD39]], i32* [[I11]], align 4 1792 // CHECK7-NEXT: br label [[SIMD_IF_END40]] 1793 // CHECK7: simd.if.end40: 1794 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 1795 // CHECK7-NEXT: ret i32 [[TMP24]] 1796 // 1797 // 1798 // CHECK9-LABEL: define {{[^@]+}}@_Z15teams_local_argv 1799 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1800 // CHECK9-NEXT: entry: 1801 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1802 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1803 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1804 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1805 // CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 1806 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1807 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1808 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1809 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1810 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8 1811 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1812 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1813 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1814 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 1815 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1816 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1817 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1818 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 1819 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1820 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1821 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1822 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32* 1823 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1824 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8 1825 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4 1826 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1827 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1828 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 1829 // CHECK9-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4 1830 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1831 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP8]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes to i8*), i64 32, i1 false) 1832 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1833 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1834 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 1835 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1836 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 1837 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8 1838 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1839 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 1840 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1841 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32** 1842 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 8 1843 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1844 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32** 1845 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 8 1846 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 1847 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 8 1848 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1849 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8 1850 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1851 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 1852 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP21]], align 8 1853 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1854 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 1855 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP23]], align 8 1856 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1857 // CHECK9-NEXT: store i8* null, i8** [[TMP24]], align 8 1858 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1859 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 1860 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP26]], align 8 1861 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1862 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 1863 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP28]], align 8 1864 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1865 // CHECK9-NEXT: store i8* null, i8** [[TMP29]], align 8 1866 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1867 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1868 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1869 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 1870 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_]], align 4 1871 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1872 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 1873 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1874 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1875 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1876 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1877 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 1878 // CHECK9-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 1879 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1880 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1881 // CHECK9-NEXT: store i32 1, i32* [[TMP37]], align 4 1882 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1883 // CHECK9-NEXT: store i32 4, i32* [[TMP38]], align 4 1884 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1885 // CHECK9-NEXT: store i8** [[TMP30]], i8*** [[TMP39]], align 8 1886 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1887 // CHECK9-NEXT: store i8** [[TMP31]], i8*** [[TMP40]], align 8 1888 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1889 // CHECK9-NEXT: store i64* [[TMP32]], i64** [[TMP41]], align 8 1890 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1891 // CHECK9-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP42]], align 8 1892 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1893 // CHECK9-NEXT: store i8** null, i8*** [[TMP43]], align 8 1894 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1895 // CHECK9-NEXT: store i8** null, i8*** [[TMP44]], align 8 1896 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1897 // CHECK9-NEXT: store i64 [[TMP36]], i64* [[TMP45]], align 8 1898 // CHECK9-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1899 // CHECK9-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 1900 // CHECK9-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1901 // CHECK9: omp_offload.failed: 1902 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i64 [[TMP1]], i32* [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR5:[0-9]+]] 1903 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1904 // CHECK9: omp_offload.cont: 1905 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 1906 // CHECK9-NEXT: [[TMP48:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1907 // CHECK9-NEXT: [[TMP49:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1908 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP49]]) 1909 // CHECK9-NEXT: ret i32 [[TMP48]] 1910 // 1911 // 1912 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74 1913 // CHECK9-SAME: (i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 1914 // CHECK9-NEXT: entry: 1915 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1916 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1917 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 1918 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1919 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1920 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1921 // CHECK9-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8 1922 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1923 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1924 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1925 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32* 1926 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1927 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]]) 1928 // CHECK9-NEXT: ret void 1929 // 1930 // 1931 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1932 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1933 // CHECK9-NEXT: entry: 1934 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1935 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1936 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 1937 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1938 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1939 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1940 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1941 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1942 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1943 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1944 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1945 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1946 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1947 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1948 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1949 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 1950 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1951 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1952 // CHECK9-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 1953 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1954 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1955 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1956 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 1957 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1958 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1959 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1960 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 1961 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1962 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1963 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1964 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1965 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1966 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1967 // CHECK9-NEXT: store i32 0, i32* [[I3]], align 4 1968 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1969 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1970 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1971 // CHECK9: omp.precond.then: 1972 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ] 1973 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1974 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1975 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 1976 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1977 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1978 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1979 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1980 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1981 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1982 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1983 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1984 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1985 // CHECK9: cond.true: 1986 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1987 // CHECK9-NEXT: br label [[COND_END:%.*]] 1988 // CHECK9: cond.false: 1989 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1990 // CHECK9-NEXT: br label [[COND_END]] 1991 // CHECK9: cond.end: 1992 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1993 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1994 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1995 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1996 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1997 // CHECK9: omp.inner.for.cond: 1998 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1999 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2000 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2001 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2002 // CHECK9: omp.inner.for.body: 2003 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2004 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 2005 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2006 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 2007 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[I4]], i32* [[TMP1]], i64 [[TMP2]], i32* [[TMP3]]) 2008 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2009 // CHECK9: omp.inner.for.inc: 2010 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2011 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2012 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2013 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2014 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2015 // CHECK9: omp.inner.for.end: 2016 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2017 // CHECK9: omp.loop.exit: 2018 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2019 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2020 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2021 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2022 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2023 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2024 // CHECK9: .omp.final.then: 2025 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2026 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0 2027 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2028 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 2029 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 2030 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 2031 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2032 // CHECK9: .omp.final.done: 2033 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2034 // CHECK9: omp.precond.end: 2035 // CHECK9-NEXT: ret void 2036 // 2037 // 2038 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 2039 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2040 // CHECK9-NEXT: entry: 2041 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2042 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2043 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2044 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2045 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 2046 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2047 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2048 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2049 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2050 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2051 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2052 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2053 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 2054 // CHECK9-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2055 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2056 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2057 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2058 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2059 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 2060 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 2061 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2062 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2063 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2064 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2065 // CHECK9-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 2066 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2067 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2068 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2069 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 2070 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2071 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2072 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2073 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 2074 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2075 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2076 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2077 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2078 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2079 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2080 // CHECK9-NEXT: store i32 0, i32* [[I3]], align 4 2081 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2082 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2083 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2084 // CHECK9: omp.precond.then: 2085 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ] 2086 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4 2087 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 2088 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2089 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2090 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 2091 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2092 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 2093 // CHECK9-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2094 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i32 2095 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2096 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 2097 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2098 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2099 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2100 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2101 // CHECK9-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 2102 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2103 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2104 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2105 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2106 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2107 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 2108 // CHECK9-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2109 // CHECK9: cond.true: 2110 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2111 // CHECK9-NEXT: br label [[COND_END:%.*]] 2112 // CHECK9: cond.false: 2113 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2114 // CHECK9-NEXT: br label [[COND_END]] 2115 // CHECK9: cond.end: 2116 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2117 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2118 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2119 // CHECK9-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 2120 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2121 // CHECK9: omp.inner.for.cond: 2122 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2123 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2124 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2125 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2126 // CHECK9: omp.inner.for.body: 2127 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2128 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2129 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2130 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 2131 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I5]], align 4 2132 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 2133 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 [[IDXPROM]] 2134 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2135 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2136 // CHECK9: omp.body.continue: 2137 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2138 // CHECK9: omp.inner.for.inc: 2139 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2140 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 1 2141 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 2142 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2143 // CHECK9: omp.inner.for.end: 2144 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2145 // CHECK9: omp.loop.exit: 2146 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2147 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2148 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2149 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2150 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2151 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2152 // CHECK9: .omp.final.then: 2153 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2154 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0 2155 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 2156 // CHECK9-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 2157 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 2158 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4 2159 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2160 // CHECK9: .omp.final.done: 2161 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2162 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2163 // CHECK9-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2164 // CHECK9: .omp.linear.pu: 2165 // CHECK9-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2166 // CHECK9: .omp.linear.pu.done: 2167 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2168 // CHECK9: omp.precond.end: 2169 // CHECK9-NEXT: ret void 2170 // 2171 // 2172 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2173 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] { 2174 // CHECK9-NEXT: entry: 2175 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2176 // CHECK9-NEXT: ret void 2177 // 2178 // 2179 // CHECK11-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2180 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2181 // CHECK11-NEXT: entry: 2182 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2183 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2184 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2185 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2186 // CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 2187 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2188 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 2189 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 2190 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 2191 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4 2192 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2193 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2194 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2195 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 2196 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2197 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2198 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2199 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2200 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2201 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 2202 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[I_CASTED]], align 4 2203 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_CASTED]], align 4 2204 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 2205 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 2206 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 2207 // CHECK11-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4 2208 // CHECK11-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64 2209 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2210 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP8]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes to i8*), i32 32, i1 false) 2211 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2212 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2213 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP10]], align 4 2214 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2215 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 2216 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP12]], align 4 2217 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2218 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 2219 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2220 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32** 2221 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 4 2222 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2223 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32** 2224 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 4 2225 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 2226 // CHECK11-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 4 2227 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2228 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 4 2229 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2230 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 2231 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP21]], align 4 2232 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2233 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 2234 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP23]], align 4 2235 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2236 // CHECK11-NEXT: store i8* null, i8** [[TMP24]], align 4 2237 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2238 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 2239 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP26]], align 4 2240 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2241 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 2242 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP28]], align 4 2243 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2244 // CHECK11-NEXT: store i8* null, i8** [[TMP29]], align 4 2245 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2246 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2247 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2248 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 2249 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_]], align 4 2250 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2251 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 2252 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2253 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2254 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2255 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2256 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 2257 // CHECK11-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 2258 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2259 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 2260 // CHECK11-NEXT: store i32 1, i32* [[TMP37]], align 4 2261 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 2262 // CHECK11-NEXT: store i32 4, i32* [[TMP38]], align 4 2263 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 2264 // CHECK11-NEXT: store i8** [[TMP30]], i8*** [[TMP39]], align 4 2265 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 2266 // CHECK11-NEXT: store i8** [[TMP31]], i8*** [[TMP40]], align 4 2267 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 2268 // CHECK11-NEXT: store i64* [[TMP32]], i64** [[TMP41]], align 4 2269 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 2270 // CHECK11-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP42]], align 4 2271 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 2272 // CHECK11-NEXT: store i8** null, i8*** [[TMP43]], align 4 2273 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 2274 // CHECK11-NEXT: store i8** null, i8*** [[TMP44]], align 4 2275 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 2276 // CHECK11-NEXT: store i64 [[TMP36]], i64* [[TMP45]], align 8 2277 // CHECK11-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 2278 // CHECK11-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 2279 // CHECK11-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2280 // CHECK11: omp_offload.failed: 2281 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i32 [[TMP0]], i32* [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR5:[0-9]+]] 2282 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2283 // CHECK11: omp_offload.cont: 2284 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 2285 // CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2286 // CHECK11-NEXT: [[TMP49:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2287 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP49]]) 2288 // CHECK11-NEXT: ret i32 [[TMP48]] 2289 // 2290 // 2291 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74 2292 // CHECK11-SAME: (i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 2293 // CHECK11-NEXT: entry: 2294 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2295 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2296 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 2297 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2298 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2299 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2300 // CHECK11-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4 2301 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2302 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2303 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2304 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2305 // CHECK11-NEXT: ret void 2306 // 2307 // 2308 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2309 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2310 // CHECK11-NEXT: entry: 2311 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2312 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2313 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 2314 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2315 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2316 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2317 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2318 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2319 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2320 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2321 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2322 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2323 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2324 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2325 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2326 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2327 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2328 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2329 // CHECK11-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 2330 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2331 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2332 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2333 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 2334 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2335 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2336 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2337 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 2338 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2339 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2340 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2341 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2342 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2343 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2344 // CHECK11-NEXT: store i32 0, i32* [[I3]], align 4 2345 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2346 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2347 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2348 // CHECK11: omp.precond.then: 2349 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ] 2350 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2351 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2352 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 2353 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2354 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2355 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2356 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2357 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2358 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2359 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2360 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2361 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2362 // CHECK11: cond.true: 2363 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2364 // CHECK11-NEXT: br label [[COND_END:%.*]] 2365 // CHECK11: cond.false: 2366 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2367 // CHECK11-NEXT: br label [[COND_END]] 2368 // CHECK11: cond.end: 2369 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2370 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2371 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2372 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2373 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2374 // CHECK11: omp.inner.for.cond: 2375 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2376 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2377 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2378 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2379 // CHECK11: omp.inner.for.body: 2380 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2381 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2382 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[I4]], i32* [[TMP1]], i32 [[TMP2]], i32* [[TMP3]]) 2383 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2384 // CHECK11: omp.inner.for.inc: 2385 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2386 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2387 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2388 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2389 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2390 // CHECK11: omp.inner.for.end: 2391 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2392 // CHECK11: omp.loop.exit: 2393 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2394 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2395 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2396 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2397 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2398 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2399 // CHECK11: .omp.final.then: 2400 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2401 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0 2402 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2403 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 2404 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 2405 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 2406 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2407 // CHECK11: .omp.final.done: 2408 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2409 // CHECK11: omp.precond.end: 2410 // CHECK11-NEXT: ret void 2411 // 2412 // 2413 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2414 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2415 // CHECK11-NEXT: entry: 2416 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2417 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2418 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2419 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2420 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 2421 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2422 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2423 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2424 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2425 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2426 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2427 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2428 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2429 // CHECK11-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2430 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2431 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2432 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2433 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2434 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2435 // CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4 2436 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2437 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2438 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2439 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2440 // CHECK11-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 2441 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2442 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2443 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2444 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 2445 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2446 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2447 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2448 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 2449 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2450 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2451 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2452 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2453 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2454 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2455 // CHECK11-NEXT: store i32 0, i32* [[I3]], align 4 2456 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2457 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2458 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2459 // CHECK11: omp.precond.then: 2460 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ] 2461 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4 2462 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 2463 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2464 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2465 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 2466 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2467 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2468 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 2469 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 2470 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2471 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2472 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2473 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2474 // CHECK11-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 2475 // CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2476 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2477 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2478 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2479 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2480 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 2481 // CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2482 // CHECK11: cond.true: 2483 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2484 // CHECK11-NEXT: br label [[COND_END:%.*]] 2485 // CHECK11: cond.false: 2486 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2487 // CHECK11-NEXT: br label [[COND_END]] 2488 // CHECK11: cond.end: 2489 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2490 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2491 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2492 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 2493 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2494 // CHECK11: omp.inner.for.cond: 2495 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2496 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2497 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2498 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2499 // CHECK11: omp.inner.for.body: 2500 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2501 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2502 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2503 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 2504 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4 2505 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 [[TMP23]] 2506 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2507 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2508 // CHECK11: omp.body.continue: 2509 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2510 // CHECK11: omp.inner.for.inc: 2511 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2512 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1 2513 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2514 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 2515 // CHECK11: omp.inner.for.end: 2516 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2517 // CHECK11: omp.loop.exit: 2518 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2519 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2520 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2521 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2522 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2523 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2524 // CHECK11: .omp.final.then: 2525 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2526 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 0 2527 // CHECK11-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 2528 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 2529 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 2530 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4 2531 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2532 // CHECK11: .omp.final.done: 2533 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2534 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2535 // CHECK11-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2536 // CHECK11: .omp.linear.pu: 2537 // CHECK11-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2538 // CHECK11: .omp.linear.pu.done: 2539 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2540 // CHECK11: omp.precond.end: 2541 // CHECK11-NEXT: ret void 2542 // 2543 // 2544 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2545 // CHECK11-SAME: () #[[ATTR7:[0-9]+]] { 2546 // CHECK11-NEXT: entry: 2547 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2548 // CHECK11-NEXT: ret void 2549 // 2550 // 2551 // CHECK13-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2552 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 2553 // CHECK13-NEXT: entry: 2554 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 2555 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2556 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2557 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2558 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 2559 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2560 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2561 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2562 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2563 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 2564 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2565 // CHECK13-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2566 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 2567 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4 2568 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 2569 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2570 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2571 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2572 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2573 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2574 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2575 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2576 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2577 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2578 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2579 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2580 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2581 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2582 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2583 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2584 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2585 // CHECK13-NEXT: store i32 0, i32* [[I3]], align 4 2586 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2587 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2588 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 2589 // CHECK13: simd.if.then: 2590 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2591 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2592 // CHECK13-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i64 16) ] 2593 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 2594 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4 2595 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2596 // CHECK13: omp.inner.for.cond: 2597 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2598 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2599 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2600 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2601 // CHECK13: omp.inner.for.body: 2602 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2603 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2604 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2605 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 2606 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I4]], align 4 2607 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 2608 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 2609 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2610 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2611 // CHECK13: omp.body.continue: 2612 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2613 // CHECK13: omp.inner.for.inc: 2614 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2615 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1 2616 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2617 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2618 // CHECK13: omp.inner.for.end: 2619 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2620 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 0 2621 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 2622 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 2623 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 2624 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I]], align 4 2625 // CHECK13-NEXT: br label [[SIMD_IF_END]] 2626 // CHECK13: simd.if.end: 2627 // CHECK13-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 2628 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4 2629 // CHECK13-NEXT: [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2630 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP16]]) 2631 // CHECK13-NEXT: ret i32 [[TMP15]] 2632 // 2633 // 2634 // CHECK15-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2635 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 2636 // CHECK15-NEXT: entry: 2637 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 2638 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2639 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2640 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2641 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2642 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2643 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2644 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2645 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2646 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 2647 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2648 // CHECK15-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2649 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 2650 // CHECK15-NEXT: [[I5:%.*]] = alloca i32, align 4 2651 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 2652 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2653 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2654 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2655 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2656 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2657 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 2658 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2659 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2660 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2661 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2662 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2663 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2664 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2665 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2666 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 2667 // CHECK15-NEXT: store i32 0, i32* [[I3]], align 4 2668 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2669 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2670 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 2671 // CHECK15: simd.if.then: 2672 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2673 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2674 // CHECK15-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i32 16) ] 2675 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 2676 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 2677 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2678 // CHECK15: omp.inner.for.cond: 2679 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2680 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2681 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2682 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2683 // CHECK15: omp.inner.for.body: 2684 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2685 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2686 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2687 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 2688 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I4]], align 4 2689 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP11]] 2690 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2691 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2692 // CHECK15: omp.body.continue: 2693 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2694 // CHECK15: omp.inner.for.inc: 2695 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2696 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 2697 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2698 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2699 // CHECK15: omp.inner.for.end: 2700 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2701 // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 0 2702 // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 2703 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 2704 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 2705 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I]], align 4 2706 // CHECK15-NEXT: br label [[SIMD_IF_END]] 2707 // CHECK15: simd.if.end: 2708 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 2709 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4 2710 // CHECK15-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2711 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP15]]) 2712 // CHECK15-NEXT: ret i32 [[TMP14]] 2713 // 2714 // 2715 // CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2716 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] { 2717 // CHECK17-NEXT: entry: 2718 // CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2719 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2720 // CHECK17-NEXT: ret i32 [[CALL]] 2721 // 2722 // 2723 // CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2724 // CHECK17-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2725 // CHECK17-NEXT: entry: 2726 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2727 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 2728 // CHECK17-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 2729 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 2730 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 2731 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 2732 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2733 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2734 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2735 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2736 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32* 2737 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 2738 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[I_CASTED]], align 8 2739 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2740 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2741 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS** 2742 // CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP3]], align 8 2743 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2744 // CHECK17-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to [123 x i32]** 2745 // CHECK17-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP5]], align 8 2746 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2747 // CHECK17-NEXT: store i8* null, i8** [[TMP6]], align 8 2748 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2749 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2750 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 2751 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2752 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2753 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 2754 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2755 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8 2756 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2757 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2758 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2759 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 2760 // CHECK17-NEXT: store i32 1, i32* [[TMP14]], align 4 2761 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 2762 // CHECK17-NEXT: store i32 2, i32* [[TMP15]], align 4 2763 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 2764 // CHECK17-NEXT: store i8** [[TMP12]], i8*** [[TMP16]], align 8 2765 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 2766 // CHECK17-NEXT: store i8** [[TMP13]], i8*** [[TMP17]], align 8 2767 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 2768 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP18]], align 8 2769 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 2770 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP19]], align 8 2771 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 2772 // CHECK17-NEXT: store i8** null, i8*** [[TMP20]], align 8 2773 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 2774 // CHECK17-NEXT: store i8** null, i8*** [[TMP21]], align 8 2775 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 2776 // CHECK17-NEXT: store i64 123, i64* [[TMP22]], align 8 2777 // CHECK17-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 2778 // CHECK17-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2779 // CHECK17-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2780 // CHECK17: omp_offload.failed: 2781 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(%struct.SS* [[THIS1]], i64 [[TMP1]]) #[[ATTR4:[0-9]+]] 2782 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 2783 // CHECK17: omp_offload.cont: 2784 // CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2785 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 2786 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2787 // CHECK17-NEXT: ret i32 [[TMP25]] 2788 // 2789 // 2790 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112 2791 // CHECK17-SAME: (%struct.SS* noundef [[THIS:%.*]], i64 noundef [[I:%.*]]) #[[ATTR1:[0-9]+]] { 2792 // CHECK17-NEXT: entry: 2793 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2794 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 2795 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2796 // CHECK17-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8 2797 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2798 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32* 2799 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], %struct.SS* [[TMP0]]) 2800 // CHECK17-NEXT: ret void 2801 // 2802 // 2803 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 2804 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2805 // CHECK17-NEXT: entry: 2806 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2807 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2808 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 2809 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2810 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2811 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2812 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2813 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2814 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2815 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2816 // CHECK17-NEXT: [[I1:%.*]] = alloca i32, align 4 2817 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2818 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2819 // CHECK17-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 2820 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2821 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 2822 // CHECK17-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2823 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0 2824 // CHECK17-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0 2825 // CHECK17-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ] 2826 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2827 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2828 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2829 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2830 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2831 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2832 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2833 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2834 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 122 2835 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2836 // CHECK17: cond.true: 2837 // CHECK17-NEXT: br label [[COND_END:%.*]] 2838 // CHECK17: cond.false: 2839 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2840 // CHECK17-NEXT: br label [[COND_END]] 2841 // CHECK17: cond.end: 2842 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2843 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2844 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2845 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2846 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2847 // CHECK17: omp.inner.for.cond: 2848 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2849 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2850 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2851 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2852 // CHECK17: omp.inner.for.body: 2853 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2854 // CHECK17-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2855 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2856 // CHECK17-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 2857 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], i32* [[I1]], %struct.SS* [[TMP1]]) 2858 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2859 // CHECK17: omp.inner.for.inc: 2860 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2861 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2862 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2863 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2864 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2865 // CHECK17: omp.inner.for.end: 2866 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2867 // CHECK17: omp.loop.exit: 2868 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2869 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2870 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 2871 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2872 // CHECK17: .omp.final.then: 2873 // CHECK17-NEXT: store i32 123, i32* [[TMP0]], align 4 2874 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 2875 // CHECK17: .omp.final.done: 2876 // CHECK17-NEXT: ret void 2877 // 2878 // 2879 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1 2880 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2881 // CHECK17-NEXT: entry: 2882 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2883 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2884 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2885 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2886 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 2887 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2888 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2889 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2890 // CHECK17-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2891 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2892 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2893 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2894 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2895 // CHECK17-NEXT: [[I2:%.*]] = alloca i32, align 4 2896 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 2897 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2898 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2899 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2900 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2901 // CHECK17-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 2902 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2903 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 2904 // CHECK17-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2905 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0 2906 // CHECK17-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0 2907 // CHECK17-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ] 2908 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 2909 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START]], align 4 2910 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2911 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2912 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2913 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP3]] to i32 2914 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2915 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP4]] to i32 2916 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2917 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2918 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2919 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2920 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2921 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2922 // CHECK17-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]]) 2923 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2924 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2925 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 122 2926 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2927 // CHECK17: cond.true: 2928 // CHECK17-NEXT: br label [[COND_END:%.*]] 2929 // CHECK17: cond.false: 2930 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2931 // CHECK17-NEXT: br label [[COND_END]] 2932 // CHECK17: cond.end: 2933 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2934 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2935 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2936 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 2937 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2938 // CHECK17: omp.inner.for.cond: 2939 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2940 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2941 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2942 // CHECK17-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2943 // CHECK17: omp.inner.for.body: 2944 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2945 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 2946 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2947 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I2]], align 4 2948 // CHECK17-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 0 2949 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[I2]], align 4 2950 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 2951 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A5]], i64 0, i64 [[IDXPROM]] 2952 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2953 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2954 // CHECK17: omp.body.continue: 2955 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2956 // CHECK17: omp.inner.for.inc: 2957 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2958 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 2959 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2960 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2961 // CHECK17: omp.inner.for.end: 2962 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2963 // CHECK17: omp.loop.exit: 2964 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 2965 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2966 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 2967 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2968 // CHECK17: .omp.final.then: 2969 // CHECK17-NEXT: store i32 123, i32* [[TMP0]], align 4 2970 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 2971 // CHECK17: .omp.final.done: 2972 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2973 // CHECK17-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2974 // CHECK17-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2975 // CHECK17: .omp.linear.pu: 2976 // CHECK17-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2977 // CHECK17: .omp.linear.pu.done: 2978 // CHECK17-NEXT: ret void 2979 // 2980 // 2981 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2982 // CHECK17-SAME: () #[[ATTR5:[0-9]+]] { 2983 // CHECK17-NEXT: entry: 2984 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 2985 // CHECK17-NEXT: ret void 2986 // 2987 // 2988 // CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2989 // CHECK19-SAME: () #[[ATTR0:[0-9]+]] { 2990 // CHECK19-NEXT: entry: 2991 // CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2992 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2993 // CHECK19-NEXT: ret i32 [[CALL]] 2994 // 2995 // 2996 // CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2997 // CHECK19-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2998 // CHECK19-NEXT: entry: 2999 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3000 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 3001 // CHECK19-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 3002 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 3003 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 3004 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 3005 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 3006 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3007 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3008 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 3009 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[I_CASTED]], align 4 3010 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[I_CASTED]], align 4 3011 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3012 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3013 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS** 3014 // CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP3]], align 4 3015 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3016 // CHECK19-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to [123 x i32]** 3017 // CHECK19-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP5]], align 4 3018 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3019 // CHECK19-NEXT: store i8* null, i8** [[TMP6]], align 4 3020 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3021 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3022 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 3023 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3024 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3025 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4 3026 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3027 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4 3028 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3029 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3030 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 3031 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 3032 // CHECK19-NEXT: store i32 1, i32* [[TMP14]], align 4 3033 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 3034 // CHECK19-NEXT: store i32 2, i32* [[TMP15]], align 4 3035 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 3036 // CHECK19-NEXT: store i8** [[TMP12]], i8*** [[TMP16]], align 4 3037 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 3038 // CHECK19-NEXT: store i8** [[TMP13]], i8*** [[TMP17]], align 4 3039 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 3040 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP18]], align 4 3041 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 3042 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP19]], align 4 3043 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 3044 // CHECK19-NEXT: store i8** null, i8*** [[TMP20]], align 4 3045 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 3046 // CHECK19-NEXT: store i8** null, i8*** [[TMP21]], align 4 3047 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 3048 // CHECK19-NEXT: store i64 123, i64* [[TMP22]], align 8 3049 // CHECK19-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 3050 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3051 // CHECK19-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3052 // CHECK19: omp_offload.failed: 3053 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(%struct.SS* [[THIS1]], i32 [[TMP1]]) #[[ATTR4:[0-9]+]] 3054 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 3055 // CHECK19: omp_offload.cont: 3056 // CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3057 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 3058 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3059 // CHECK19-NEXT: ret i32 [[TMP25]] 3060 // 3061 // 3062 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112 3063 // CHECK19-SAME: (%struct.SS* noundef [[THIS:%.*]], i32 noundef [[I:%.*]]) #[[ATTR1:[0-9]+]] { 3064 // CHECK19-NEXT: entry: 3065 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3066 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 3067 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3068 // CHECK19-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4 3069 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3070 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], %struct.SS* [[TMP0]]) 3071 // CHECK19-NEXT: ret void 3072 // 3073 // 3074 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 3075 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3076 // CHECK19-NEXT: entry: 3077 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3078 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3079 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 3080 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3081 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3082 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 3083 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3084 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3085 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3086 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3087 // CHECK19-NEXT: [[I1:%.*]] = alloca i32, align 4 3088 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3089 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3090 // CHECK19-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 3091 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3092 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 3093 // CHECK19-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3094 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0 3095 // CHECK19-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0 3096 // CHECK19-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ] 3097 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3098 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3099 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3100 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3101 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3102 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3103 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3104 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3105 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 122 3106 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3107 // CHECK19: cond.true: 3108 // CHECK19-NEXT: br label [[COND_END:%.*]] 3109 // CHECK19: cond.false: 3110 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3111 // CHECK19-NEXT: br label [[COND_END]] 3112 // CHECK19: cond.end: 3113 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3114 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3115 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3116 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3117 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3118 // CHECK19: omp.inner.for.cond: 3119 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3120 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3121 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3122 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3123 // CHECK19: omp.inner.for.body: 3124 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3125 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3126 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP9]], i32 [[TMP10]], i32* [[I1]], %struct.SS* [[TMP1]]) 3127 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3128 // CHECK19: omp.inner.for.inc: 3129 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3130 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3131 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3132 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3133 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 3134 // CHECK19: omp.inner.for.end: 3135 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3136 // CHECK19: omp.loop.exit: 3137 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3138 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3139 // CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3140 // CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3141 // CHECK19: .omp.final.then: 3142 // CHECK19-NEXT: store i32 123, i32* [[TMP0]], align 4 3143 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 3144 // CHECK19: .omp.final.done: 3145 // CHECK19-NEXT: ret void 3146 // 3147 // 3148 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1 3149 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3150 // CHECK19-NEXT: entry: 3151 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3152 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3153 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3154 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3155 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 3156 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3157 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3158 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 3159 // CHECK19-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3160 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3161 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3162 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3163 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3164 // CHECK19-NEXT: [[I1:%.*]] = alloca i32, align 4 3165 // CHECK19-NEXT: [[I2:%.*]] = alloca i32, align 4 3166 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3167 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3168 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3169 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3170 // CHECK19-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 3171 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3172 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 3173 // CHECK19-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3174 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0 3175 // CHECK19-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0 3176 // CHECK19-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ] 3177 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 3178 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START]], align 4 3179 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3180 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3181 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3182 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3183 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4 3184 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 3185 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3186 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3187 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3188 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3189 // CHECK19-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]]) 3190 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3191 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3192 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 122 3193 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3194 // CHECK19: cond.true: 3195 // CHECK19-NEXT: br label [[COND_END:%.*]] 3196 // CHECK19: cond.false: 3197 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3198 // CHECK19-NEXT: br label [[COND_END]] 3199 // CHECK19: cond.end: 3200 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3201 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3202 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3203 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 3204 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3205 // CHECK19: omp.inner.for.cond: 3206 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3207 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3208 // CHECK19-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3209 // CHECK19-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3210 // CHECK19: omp.inner.for.body: 3211 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3212 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 3213 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3214 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I1]], align 4 3215 // CHECK19-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 0 3216 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[I1]], align 4 3217 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i32 0, i32 [[TMP13]] 3218 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3219 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3220 // CHECK19: omp.body.continue: 3221 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3222 // CHECK19: omp.inner.for.inc: 3223 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3224 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 3225 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 3226 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 3227 // CHECK19: omp.inner.for.end: 3228 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3229 // CHECK19: omp.loop.exit: 3230 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 3231 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3232 // CHECK19-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 3233 // CHECK19-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3234 // CHECK19: .omp.final.then: 3235 // CHECK19-NEXT: store i32 123, i32* [[TMP0]], align 4 3236 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 3237 // CHECK19: .omp.final.done: 3238 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3239 // CHECK19-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 3240 // CHECK19-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 3241 // CHECK19: .omp.linear.pu: 3242 // CHECK19-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 3243 // CHECK19: .omp.linear.pu.done: 3244 // CHECK19-NEXT: ret void 3245 // 3246 // 3247 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3248 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] { 3249 // CHECK19-NEXT: entry: 3250 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 3251 // CHECK19-NEXT: ret void 3252 // 3253 // 3254 // CHECK21-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3255 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] { 3256 // CHECK21-NEXT: entry: 3257 // CHECK21-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3258 // CHECK21-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 3259 // CHECK21-NEXT: ret i32 [[CALL]] 3260 // 3261 // 3262 // CHECK21-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3263 // CHECK21-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3264 // CHECK21-NEXT: entry: 3265 // CHECK21-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3266 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4 3267 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4 3268 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3269 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3270 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3271 // CHECK21-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3272 // CHECK21-NEXT: [[I2:%.*]] = alloca i32, align 4 3273 // CHECK21-NEXT: [[I3:%.*]] = alloca i32, align 4 3274 // CHECK21-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3275 // CHECK21-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3276 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3277 // CHECK21-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3278 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3279 // CHECK21-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 3280 // CHECK21-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3281 // CHECK21-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0 3282 // CHECK21-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ] 3283 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3284 // CHECK21-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4 3285 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3286 // CHECK21: omp.inner.for.cond: 3287 // CHECK21-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3288 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3289 // CHECK21-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3290 // CHECK21-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3291 // CHECK21: omp.inner.for.body: 3292 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3293 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3294 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3295 // CHECK21-NEXT: store i32 [[ADD]], i32* [[I2]], align 4 3296 // CHECK21-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3297 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 3298 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 3299 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i64 0, i64 [[IDXPROM]] 3300 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3301 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3302 // CHECK21: omp.body.continue: 3303 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3304 // CHECK21: omp.inner.for.inc: 3305 // CHECK21-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3306 // CHECK21-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1 3307 // CHECK21-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 3308 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3309 // CHECK21: omp.inner.for.end: 3310 // CHECK21-NEXT: store i32 123, i32* [[I]], align 4 3311 // CHECK21-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3312 // CHECK21-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i64 0, i64 0 3313 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4 3314 // CHECK21-NEXT: ret i32 [[TMP7]] 3315 // 3316 // 3317 // CHECK23-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3318 // CHECK23-SAME: () #[[ATTR0:[0-9]+]] { 3319 // CHECK23-NEXT: entry: 3320 // CHECK23-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3321 // CHECK23-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 3322 // CHECK23-NEXT: ret i32 [[CALL]] 3323 // 3324 // 3325 // CHECK23-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3326 // CHECK23-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3327 // CHECK23-NEXT: entry: 3328 // CHECK23-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3329 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4 3330 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4 3331 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3332 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3333 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3334 // CHECK23-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3335 // CHECK23-NEXT: [[I2:%.*]] = alloca i32, align 4 3336 // CHECK23-NEXT: [[I3:%.*]] = alloca i32, align 4 3337 // CHECK23-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3338 // CHECK23-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3339 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3340 // CHECK23-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3341 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3342 // CHECK23-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 3343 // CHECK23-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3344 // CHECK23-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0 3345 // CHECK23-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ] 3346 // CHECK23-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3347 // CHECK23-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4 3348 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3349 // CHECK23: omp.inner.for.cond: 3350 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3351 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3352 // CHECK23-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3353 // CHECK23-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3354 // CHECK23: omp.inner.for.body: 3355 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3356 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3357 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3358 // CHECK23-NEXT: store i32 [[ADD]], i32* [[I2]], align 4 3359 // CHECK23-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3360 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 3361 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i32 0, i32 [[TMP5]] 3362 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3363 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3364 // CHECK23: omp.body.continue: 3365 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3366 // CHECK23: omp.inner.for.inc: 3367 // CHECK23-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3368 // CHECK23-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1 3369 // CHECK23-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 3370 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3371 // CHECK23: omp.inner.for.end: 3372 // CHECK23-NEXT: store i32 123, i32* [[I]], align 4 3373 // CHECK23-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3374 // CHECK23-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i32 0, i32 0 3375 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4 3376 // CHECK23-NEXT: ret i32 [[TMP7]] 3377 // 3378 // 3379 // CHECK25-LABEL: define {{[^@]+}}@main 3380 // CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3381 // CHECK25-NEXT: entry: 3382 // CHECK25-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3383 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3384 // CHECK25-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3385 // CHECK25-NEXT: [[N:%.*]] = alloca i32, align 4 3386 // CHECK25-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3387 // CHECK25-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3388 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3389 // CHECK25-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 3390 // CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3391 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 3392 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 3393 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 3394 // CHECK25-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8 3395 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3396 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3397 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3398 // CHECK25-NEXT: store i32 0, i32* [[RETVAL]], align 4 3399 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3400 // CHECK25-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3401 // CHECK25-NEXT: store i32 100, i32* [[N]], align 4 3402 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3403 // CHECK25-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3404 // CHECK25-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3405 // CHECK25-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3406 // CHECK25-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3407 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3408 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3409 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32* 3410 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 3411 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8 3412 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4 3413 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3414 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 3415 // CHECK25-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 3416 // CHECK25-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4 3417 // CHECK25-NEXT: [[TMP8:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3418 // CHECK25-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP8]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes to i8*), i64 32, i1 false) 3419 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3420 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3421 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 3422 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3423 // CHECK25-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 3424 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8 3425 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3426 // CHECK25-NEXT: store i8* null, i8** [[TMP13]], align 8 3427 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3428 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32** 3429 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 8 3430 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3431 // CHECK25-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32** 3432 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 8 3433 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3434 // CHECK25-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 8 3435 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3436 // CHECK25-NEXT: store i8* null, i8** [[TMP19]], align 8 3437 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3438 // CHECK25-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 3439 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP21]], align 8 3440 // CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3441 // CHECK25-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 3442 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP23]], align 8 3443 // CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3444 // CHECK25-NEXT: store i8* null, i8** [[TMP24]], align 8 3445 // CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3446 // CHECK25-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 3447 // CHECK25-NEXT: store i64 [[TMP6]], i64* [[TMP26]], align 8 3448 // CHECK25-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3449 // CHECK25-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 3450 // CHECK25-NEXT: store i64 [[TMP6]], i64* [[TMP28]], align 8 3451 // CHECK25-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 3452 // CHECK25-NEXT: store i8* null, i8** [[TMP29]], align 8 3453 // CHECK25-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3454 // CHECK25-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3455 // CHECK25-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3456 // CHECK25-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 3457 // CHECK25-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_]], align 4 3458 // CHECK25-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3459 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 3460 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3461 // CHECK25-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3462 // CHECK25-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3463 // CHECK25-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3464 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 3465 // CHECK25-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 3466 // CHECK25-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 3467 // CHECK25-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 3468 // CHECK25-NEXT: store i32 1, i32* [[TMP37]], align 4 3469 // CHECK25-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 3470 // CHECK25-NEXT: store i32 4, i32* [[TMP38]], align 4 3471 // CHECK25-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 3472 // CHECK25-NEXT: store i8** [[TMP30]], i8*** [[TMP39]], align 8 3473 // CHECK25-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 3474 // CHECK25-NEXT: store i8** [[TMP31]], i8*** [[TMP40]], align 8 3475 // CHECK25-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 3476 // CHECK25-NEXT: store i64* [[TMP32]], i64** [[TMP41]], align 8 3477 // CHECK25-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 3478 // CHECK25-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP42]], align 8 3479 // CHECK25-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 3480 // CHECK25-NEXT: store i8** null, i8*** [[TMP43]], align 8 3481 // CHECK25-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 3482 // CHECK25-NEXT: store i8** null, i8*** [[TMP44]], align 8 3483 // CHECK25-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 3484 // CHECK25-NEXT: store i64 [[TMP36]], i64* [[TMP45]], align 8 3485 // CHECK25-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 3486 // CHECK25-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 3487 // CHECK25-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3488 // CHECK25: omp_offload.failed: 3489 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i64 [[TMP1]], i32* [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR5:[0-9]+]] 3490 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 3491 // CHECK25: omp_offload.cont: 3492 // CHECK25-NEXT: [[TMP48:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3493 // CHECK25-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP48]]) 3494 // CHECK25-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3495 // CHECK25-NEXT: [[TMP49:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3496 // CHECK25-NEXT: call void @llvm.stackrestore(i8* [[TMP49]]) 3497 // CHECK25-NEXT: [[TMP50:%.*]] = load i32, i32* [[RETVAL]], align 4 3498 // CHECK25-NEXT: ret i32 [[TMP50]] 3499 // 3500 // 3501 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166 3502 // CHECK25-SAME: (i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 3503 // CHECK25-NEXT: entry: 3504 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3505 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3506 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 3507 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3508 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3509 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3510 // CHECK25-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8 3511 // CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3512 // CHECK25-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3513 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3514 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32* 3515 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3516 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]]) 3517 // CHECK25-NEXT: ret void 3518 // 3519 // 3520 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined. 3521 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3522 // CHECK25-NEXT: entry: 3523 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3524 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3525 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 3526 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3527 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3528 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3529 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3530 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3531 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3532 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3533 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4 3534 // CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3535 // CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3536 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3537 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3538 // CHECK25-NEXT: [[I4:%.*]] = alloca i32, align 4 3539 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3540 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3541 // CHECK25-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 3542 // CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3543 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3544 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3545 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 3546 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3547 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3548 // CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3549 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 3550 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3551 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3552 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3553 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3554 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3555 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3556 // CHECK25-NEXT: store i32 0, i32* [[I3]], align 4 3557 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3558 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3559 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3560 // CHECK25: omp.precond.then: 3561 // CHECK25-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ] 3562 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3563 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3564 // CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 3565 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3566 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3567 // CHECK25-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3568 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 3569 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3570 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3571 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3572 // CHECK25-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 3573 // CHECK25-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3574 // CHECK25: cond.true: 3575 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3576 // CHECK25-NEXT: br label [[COND_END:%.*]] 3577 // CHECK25: cond.false: 3578 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3579 // CHECK25-NEXT: br label [[COND_END]] 3580 // CHECK25: cond.end: 3581 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 3582 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3583 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3584 // CHECK25-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 3585 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3586 // CHECK25: omp.inner.for.cond: 3587 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3588 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3589 // CHECK25-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 3590 // CHECK25-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3591 // CHECK25: omp.inner.for.body: 3592 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3593 // CHECK25-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 3594 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3595 // CHECK25-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 3596 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[I4]], i32* [[TMP1]], i64 [[TMP2]], i32* [[TMP3]]) 3597 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3598 // CHECK25: omp.inner.for.inc: 3599 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3600 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3601 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 3602 // CHECK25-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3603 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 3604 // CHECK25: omp.inner.for.end: 3605 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3606 // CHECK25: omp.loop.exit: 3607 // CHECK25-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3608 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 3609 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 3610 // CHECK25-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3611 // CHECK25-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3612 // CHECK25-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3613 // CHECK25: .omp.final.then: 3614 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3615 // CHECK25-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0 3616 // CHECK25-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 3617 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 3618 // CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 3619 // CHECK25-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 3620 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3621 // CHECK25: .omp.final.done: 3622 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 3623 // CHECK25: omp.precond.end: 3624 // CHECK25-NEXT: ret void 3625 // 3626 // 3627 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1 3628 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3629 // CHECK25-NEXT: entry: 3630 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3631 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3632 // CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3633 // CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3634 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 3635 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3636 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3637 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3638 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3639 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3640 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3641 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3642 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4 3643 // CHECK25-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3644 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3645 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3646 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3647 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3648 // CHECK25-NEXT: [[I5:%.*]] = alloca i32, align 4 3649 // CHECK25-NEXT: [[I6:%.*]] = alloca i32, align 4 3650 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3651 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3652 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3653 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3654 // CHECK25-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 3655 // CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3656 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3657 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3658 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 3659 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3660 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3661 // CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3662 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 3663 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3664 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3665 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3666 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3667 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3668 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3669 // CHECK25-NEXT: store i32 0, i32* [[I3]], align 4 3670 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3671 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3672 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3673 // CHECK25: omp.precond.then: 3674 // CHECK25-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ] 3675 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4 3676 // CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 3677 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3678 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3679 // CHECK25-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3680 // CHECK25-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3681 // CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 3682 // CHECK25-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3683 // CHECK25-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i32 3684 // CHECK25-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3685 // CHECK25-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 3686 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3687 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3688 // CHECK25-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3689 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3690 // CHECK25-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 3691 // CHECK25-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3692 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 3693 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3694 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3695 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3696 // CHECK25-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 3697 // CHECK25-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3698 // CHECK25: cond.true: 3699 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3700 // CHECK25-NEXT: br label [[COND_END:%.*]] 3701 // CHECK25: cond.false: 3702 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3703 // CHECK25-NEXT: br label [[COND_END]] 3704 // CHECK25: cond.end: 3705 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 3706 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3707 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3708 // CHECK25-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 3709 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3710 // CHECK25: omp.inner.for.cond: 3711 // CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3712 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3713 // CHECK25-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 3714 // CHECK25-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3715 // CHECK25: omp.inner.for.body: 3716 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3717 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 3718 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3719 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 3720 // CHECK25-NEXT: [[TMP23:%.*]] = load i32, i32* [[I5]], align 4 3721 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 3722 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 [[IDXPROM]] 3723 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3724 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3725 // CHECK25: omp.body.continue: 3726 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3727 // CHECK25: omp.inner.for.inc: 3728 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3729 // CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 1 3730 // CHECK25-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 3731 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 3732 // CHECK25: omp.inner.for.end: 3733 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3734 // CHECK25: omp.loop.exit: 3735 // CHECK25-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3736 // CHECK25-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 3737 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 3738 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3739 // CHECK25-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 3740 // CHECK25-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3741 // CHECK25: .omp.final.then: 3742 // CHECK25-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3743 // CHECK25-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0 3744 // CHECK25-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 3745 // CHECK25-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 3746 // CHECK25-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 3747 // CHECK25-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4 3748 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3749 // CHECK25: .omp.final.done: 3750 // CHECK25-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3751 // CHECK25-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 3752 // CHECK25-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 3753 // CHECK25: .omp.linear.pu: 3754 // CHECK25-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 3755 // CHECK25: .omp.linear.pu.done: 3756 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 3757 // CHECK25: omp.precond.end: 3758 // CHECK25-NEXT: ret void 3759 // 3760 // 3761 // CHECK25-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3762 // CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR7:[0-9]+]] comdat { 3763 // CHECK25-NEXT: entry: 3764 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3765 // CHECK25-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3766 // CHECK25-NEXT: [[TE:%.*]] = alloca i32, align 4 3767 // CHECK25-NEXT: [[TH:%.*]] = alloca i32, align 4 3768 // CHECK25-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 3769 // CHECK25-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 3770 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3771 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3772 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3773 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3774 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3775 // CHECK25-NEXT: store i32 0, i32* [[TE]], align 4 3776 // CHECK25-NEXT: store i32 128, i32* [[TH]], align 4 3777 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 3778 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 3779 // CHECK25-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 3780 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8 3781 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 3782 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 3783 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 3784 // CHECK25-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8 3785 // CHECK25-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3786 // CHECK25-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 3787 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 3788 // CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3789 // CHECK25-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 3790 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 3791 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3792 // CHECK25-NEXT: store i8* null, i8** [[TMP8]], align 8 3793 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3794 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3795 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 3796 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3797 // CHECK25-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 3798 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 3799 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3800 // CHECK25-NEXT: store i8* null, i8** [[TMP13]], align 8 3801 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3802 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 3803 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8 3804 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3805 // CHECK25-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 3806 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8 3807 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3808 // CHECK25-NEXT: store i8* null, i8** [[TMP18]], align 8 3809 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3810 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3811 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 3812 // CHECK25-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 3813 // CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 3814 // CHECK25-NEXT: store i32 1, i32* [[TMP22]], align 4 3815 // CHECK25-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 3816 // CHECK25-NEXT: store i32 3, i32* [[TMP23]], align 4 3817 // CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 3818 // CHECK25-NEXT: store i8** [[TMP19]], i8*** [[TMP24]], align 8 3819 // CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 3820 // CHECK25-NEXT: store i8** [[TMP20]], i8*** [[TMP25]], align 8 3821 // CHECK25-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 3822 // CHECK25-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP26]], align 8 3823 // CHECK25-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 3824 // CHECK25-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP27]], align 8 3825 // CHECK25-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 3826 // CHECK25-NEXT: store i8** null, i8*** [[TMP28]], align 8 3827 // CHECK25-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 3828 // CHECK25-NEXT: store i8** null, i8*** [[TMP29]], align 8 3829 // CHECK25-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 3830 // CHECK25-NEXT: store i64 10, i64* [[TMP30]], align 8 3831 // CHECK25-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4]], i64 -1, i32 [[TMP21]], i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 3832 // CHECK25-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 3833 // CHECK25-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3834 // CHECK25: omp_offload.failed: 3835 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR5]] 3836 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 3837 // CHECK25: omp_offload.cont: 3838 // CHECK25-NEXT: ret i32 0 3839 // 3840 // 3841 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155 3842 // CHECK25-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3843 // CHECK25-NEXT: entry: 3844 // CHECK25-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 3845 // CHECK25-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 3846 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3847 // CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]]) 3848 // CHECK25-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 3849 // CHECK25-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 3850 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3851 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 3852 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 3853 // CHECK25-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3854 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3855 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 3856 // CHECK25-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 3857 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 3858 // CHECK25-NEXT: ret void 3859 // 3860 // 3861 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..2 3862 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3863 // CHECK25-NEXT: entry: 3864 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3865 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3866 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3867 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3868 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3869 // CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3870 // CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3871 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3872 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3873 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3874 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3875 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3876 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3877 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3878 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3879 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 3880 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3881 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3882 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3883 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3884 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3885 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3886 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3887 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3888 // CHECK25: cond.true: 3889 // CHECK25-NEXT: br label [[COND_END:%.*]] 3890 // CHECK25: cond.false: 3891 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3892 // CHECK25-NEXT: br label [[COND_END]] 3893 // CHECK25: cond.end: 3894 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3895 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3896 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3897 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3898 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3899 // CHECK25: omp.inner.for.cond: 3900 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3901 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !11 3902 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3903 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3904 // CHECK25: omp.inner.for.body: 3905 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !11 3906 // CHECK25-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3907 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !11 3908 // CHECK25-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3909 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !11 3910 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3911 // CHECK25: omp.inner.for.inc: 3912 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3913 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !11 3914 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3915 // CHECK25-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3916 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 3917 // CHECK25: omp.inner.for.end: 3918 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3919 // CHECK25: omp.loop.exit: 3920 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3921 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3922 // CHECK25-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3923 // CHECK25-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3924 // CHECK25: .omp.final.then: 3925 // CHECK25-NEXT: store i32 10, i32* [[I]], align 4 3926 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3927 // CHECK25: .omp.final.done: 3928 // CHECK25-NEXT: ret void 3929 // 3930 // 3931 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..3 3932 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3933 // CHECK25-NEXT: entry: 3934 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3935 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3936 // CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3937 // CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3938 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3939 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3940 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3941 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3942 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3943 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3944 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3945 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3946 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3947 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3948 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3949 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3950 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3951 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3952 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3953 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3954 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3955 // CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3956 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3957 // CHECK25-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3958 // CHECK25-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3959 // CHECK25-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3960 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3961 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3962 // CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3963 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3964 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3965 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3966 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 3967 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3968 // CHECK25: cond.true: 3969 // CHECK25-NEXT: br label [[COND_END:%.*]] 3970 // CHECK25: cond.false: 3971 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3972 // CHECK25-NEXT: br label [[COND_END]] 3973 // CHECK25: cond.end: 3974 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3975 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3976 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3977 // CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3978 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3979 // CHECK25: omp.inner.for.cond: 3980 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3981 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 3982 // CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3983 // CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3984 // CHECK25: omp.inner.for.body: 3985 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3986 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3987 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3988 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 3989 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 3990 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3991 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3992 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 3993 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3994 // CHECK25: omp.body.continue: 3995 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3996 // CHECK25: omp.inner.for.inc: 3997 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3998 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3999 // CHECK25-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4000 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 4001 // CHECK25: omp.inner.for.end: 4002 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4003 // CHECK25: omp.loop.exit: 4004 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4005 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4006 // CHECK25-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 4007 // CHECK25-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4008 // CHECK25: .omp.final.then: 4009 // CHECK25-NEXT: store i32 10, i32* [[I]], align 4 4010 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 4011 // CHECK25: .omp.final.done: 4012 // CHECK25-NEXT: ret void 4013 // 4014 // 4015 // CHECK25-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4016 // CHECK25-SAME: () #[[ATTR8:[0-9]+]] { 4017 // CHECK25-NEXT: entry: 4018 // CHECK25-NEXT: call void @__tgt_register_requires(i64 1) 4019 // CHECK25-NEXT: ret void 4020 // 4021 // 4022 // CHECK27-LABEL: define {{[^@]+}}@main 4023 // CHECK27-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4024 // CHECK27-NEXT: entry: 4025 // CHECK27-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4026 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4027 // CHECK27-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 4028 // CHECK27-NEXT: [[N:%.*]] = alloca i32, align 4 4029 // CHECK27-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4030 // CHECK27-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4031 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 4032 // CHECK27-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 4033 // CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4034 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 4035 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 4036 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 4037 // CHECK27-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4 4038 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4039 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4040 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4041 // CHECK27-NEXT: store i32 0, i32* [[RETVAL]], align 4 4042 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4043 // CHECK27-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 4044 // CHECK27-NEXT: store i32 100, i32* [[N]], align 4 4045 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4046 // CHECK27-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 4047 // CHECK27-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 4048 // CHECK27-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 4049 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 4050 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 4051 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[I_CASTED]], align 4 4052 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_CASTED]], align 4 4053 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 4054 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 4055 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 4056 // CHECK27-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4 4057 // CHECK27-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64 4058 // CHECK27-NEXT: [[TMP8:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 4059 // CHECK27-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP8]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes to i8*), i32 32, i1 false) 4060 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4061 // CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4062 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP10]], align 4 4063 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4064 // CHECK27-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 4065 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP12]], align 4 4066 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4067 // CHECK27-NEXT: store i8* null, i8** [[TMP13]], align 4 4068 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4069 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32** 4070 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 4 4071 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4072 // CHECK27-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32** 4073 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 4 4074 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 4075 // CHECK27-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 4 4076 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4077 // CHECK27-NEXT: store i8* null, i8** [[TMP19]], align 4 4078 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4079 // CHECK27-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 4080 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP21]], align 4 4081 // CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4082 // CHECK27-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 4083 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP23]], align 4 4084 // CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4085 // CHECK27-NEXT: store i8* null, i8** [[TMP24]], align 4 4086 // CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4087 // CHECK27-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 4088 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[TMP26]], align 4 4089 // CHECK27-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4090 // CHECK27-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 4091 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[TMP28]], align 4 4092 // CHECK27-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4093 // CHECK27-NEXT: store i8* null, i8** [[TMP29]], align 4 4094 // CHECK27-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4095 // CHECK27-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4096 // CHECK27-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4097 // CHECK27-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 4098 // CHECK27-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_]], align 4 4099 // CHECK27-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4100 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 4101 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4102 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4103 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4104 // CHECK27-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4105 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 4106 // CHECK27-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 4107 // CHECK27-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 4108 // CHECK27-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 4109 // CHECK27-NEXT: store i32 1, i32* [[TMP37]], align 4 4110 // CHECK27-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 4111 // CHECK27-NEXT: store i32 4, i32* [[TMP38]], align 4 4112 // CHECK27-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 4113 // CHECK27-NEXT: store i8** [[TMP30]], i8*** [[TMP39]], align 4 4114 // CHECK27-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 4115 // CHECK27-NEXT: store i8** [[TMP31]], i8*** [[TMP40]], align 4 4116 // CHECK27-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 4117 // CHECK27-NEXT: store i64* [[TMP32]], i64** [[TMP41]], align 4 4118 // CHECK27-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 4119 // CHECK27-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP42]], align 4 4120 // CHECK27-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 4121 // CHECK27-NEXT: store i8** null, i8*** [[TMP43]], align 4 4122 // CHECK27-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 4123 // CHECK27-NEXT: store i8** null, i8*** [[TMP44]], align 4 4124 // CHECK27-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 4125 // CHECK27-NEXT: store i64 [[TMP36]], i64* [[TMP45]], align 8 4126 // CHECK27-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 4127 // CHECK27-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 4128 // CHECK27-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4129 // CHECK27: omp_offload.failed: 4130 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i32 [[TMP0]], i32* [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR5:[0-9]+]] 4131 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 4132 // CHECK27: omp_offload.cont: 4133 // CHECK27-NEXT: [[TMP48:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4134 // CHECK27-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP48]]) 4135 // CHECK27-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4136 // CHECK27-NEXT: [[TMP49:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4137 // CHECK27-NEXT: call void @llvm.stackrestore(i8* [[TMP49]]) 4138 // CHECK27-NEXT: [[TMP50:%.*]] = load i32, i32* [[RETVAL]], align 4 4139 // CHECK27-NEXT: ret i32 [[TMP50]] 4140 // 4141 // 4142 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166 4143 // CHECK27-SAME: (i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 4144 // CHECK27-NEXT: entry: 4145 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4146 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4147 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 4148 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4149 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4150 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4151 // CHECK27-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4 4152 // CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4153 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4154 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4155 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 4156 // CHECK27-NEXT: ret void 4157 // 4158 // 4159 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined. 4160 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4161 // CHECK27-NEXT: entry: 4162 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4163 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4164 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 4165 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4166 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4167 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4168 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4169 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4170 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4171 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4172 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4 4173 // CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4174 // CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4175 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4176 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4177 // CHECK27-NEXT: [[I4:%.*]] = alloca i32, align 4 4178 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4179 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4180 // CHECK27-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 4181 // CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4182 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4183 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4184 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 4185 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4186 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4187 // CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4188 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 4189 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 4190 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4191 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4192 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4193 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4194 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4195 // CHECK27-NEXT: store i32 0, i32* [[I3]], align 4 4196 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4197 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4198 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4199 // CHECK27: omp.precond.then: 4200 // CHECK27-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ] 4201 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4202 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4203 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 4204 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4205 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4206 // CHECK27-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4207 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 4208 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4209 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4210 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4211 // CHECK27-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4212 // CHECK27-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4213 // CHECK27: cond.true: 4214 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4215 // CHECK27-NEXT: br label [[COND_END:%.*]] 4216 // CHECK27: cond.false: 4217 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4218 // CHECK27-NEXT: br label [[COND_END]] 4219 // CHECK27: cond.end: 4220 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4221 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4222 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4223 // CHECK27-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 4224 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4225 // CHECK27: omp.inner.for.cond: 4226 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4227 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4228 // CHECK27-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 4229 // CHECK27-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4230 // CHECK27: omp.inner.for.body: 4231 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4232 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4233 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[I4]], i32* [[TMP1]], i32 [[TMP2]], i32* [[TMP3]]) 4234 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4235 // CHECK27: omp.inner.for.inc: 4236 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4237 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4238 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 4239 // CHECK27-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4240 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 4241 // CHECK27: omp.inner.for.end: 4242 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4243 // CHECK27: omp.loop.exit: 4244 // CHECK27-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4245 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 4246 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 4247 // CHECK27-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4248 // CHECK27-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 4249 // CHECK27-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4250 // CHECK27: .omp.final.then: 4251 // CHECK27-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4252 // CHECK27-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0 4253 // CHECK27-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 4254 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 4255 // CHECK27-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 4256 // CHECK27-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4 4257 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4258 // CHECK27: .omp.final.done: 4259 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 4260 // CHECK27: omp.precond.end: 4261 // CHECK27-NEXT: ret void 4262 // 4263 // 4264 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1 4265 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4266 // CHECK27-NEXT: entry: 4267 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4268 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4269 // CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4270 // CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4271 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 4272 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4273 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4274 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4275 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4276 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4277 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4278 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4279 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4 4280 // CHECK27-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 4281 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4282 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4283 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4284 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4285 // CHECK27-NEXT: [[I4:%.*]] = alloca i32, align 4 4286 // CHECK27-NEXT: [[I5:%.*]] = alloca i32, align 4 4287 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4288 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4289 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4290 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4291 // CHECK27-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 4292 // CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4293 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4294 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4295 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 4296 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4297 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4298 // CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4299 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 4300 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 4301 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4302 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4303 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4304 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4305 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4306 // CHECK27-NEXT: store i32 0, i32* [[I3]], align 4 4307 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4308 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4309 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4310 // CHECK27: omp.precond.then: 4311 // CHECK27-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ] 4312 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4 4313 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 4314 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4315 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4316 // CHECK27-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 4317 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4318 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4319 // CHECK27-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 4320 // CHECK27-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 4321 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4322 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4323 // CHECK27-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4324 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 4325 // CHECK27-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 4326 // CHECK27-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4327 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 4328 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4329 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4330 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4331 // CHECK27-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 4332 // CHECK27-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4333 // CHECK27: cond.true: 4334 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4335 // CHECK27-NEXT: br label [[COND_END:%.*]] 4336 // CHECK27: cond.false: 4337 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4338 // CHECK27-NEXT: br label [[COND_END]] 4339 // CHECK27: cond.end: 4340 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 4341 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4342 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4343 // CHECK27-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 4344 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4345 // CHECK27: omp.inner.for.cond: 4346 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4347 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4348 // CHECK27-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 4349 // CHECK27-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4350 // CHECK27: omp.inner.for.body: 4351 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4352 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 4353 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4354 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 4355 // CHECK27-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4 4356 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 [[TMP23]] 4357 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4358 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4359 // CHECK27: omp.body.continue: 4360 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4361 // CHECK27: omp.inner.for.inc: 4362 // CHECK27-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4363 // CHECK27-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1 4364 // CHECK27-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 4365 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 4366 // CHECK27: omp.inner.for.end: 4367 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4368 // CHECK27: omp.loop.exit: 4369 // CHECK27-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4370 // CHECK27-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 4371 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 4372 // CHECK27-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4373 // CHECK27-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 4374 // CHECK27-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4375 // CHECK27: .omp.final.then: 4376 // CHECK27-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4377 // CHECK27-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 0 4378 // CHECK27-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 4379 // CHECK27-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 4380 // CHECK27-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 4381 // CHECK27-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4 4382 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4383 // CHECK27: .omp.final.done: 4384 // CHECK27-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4385 // CHECK27-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 4386 // CHECK27-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 4387 // CHECK27: .omp.linear.pu: 4388 // CHECK27-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 4389 // CHECK27: .omp.linear.pu.done: 4390 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 4391 // CHECK27: omp.precond.end: 4392 // CHECK27-NEXT: ret void 4393 // 4394 // 4395 // CHECK27-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4396 // CHECK27-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR7:[0-9]+]] comdat { 4397 // CHECK27-NEXT: entry: 4398 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4399 // CHECK27-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4400 // CHECK27-NEXT: [[TE:%.*]] = alloca i32, align 4 4401 // CHECK27-NEXT: [[TH:%.*]] = alloca i32, align 4 4402 // CHECK27-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 4403 // CHECK27-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 4404 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4405 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4406 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4407 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4408 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4409 // CHECK27-NEXT: store i32 0, i32* [[TE]], align 4 4410 // CHECK27-NEXT: store i32 128, i32* [[TH]], align 4 4411 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 4412 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4 4413 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4 4414 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 4415 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4 4416 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4 4417 // CHECK27-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4418 // CHECK27-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 4419 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 4420 // CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4421 // CHECK27-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 4422 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 4423 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4424 // CHECK27-NEXT: store i8* null, i8** [[TMP8]], align 4 4425 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4426 // CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4427 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4428 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4429 // CHECK27-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 4430 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 4431 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4432 // CHECK27-NEXT: store i8* null, i8** [[TMP13]], align 4 4433 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4434 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 4435 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4 4436 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4437 // CHECK27-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 4438 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4 4439 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4440 // CHECK27-NEXT: store i8* null, i8** [[TMP18]], align 4 4441 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4442 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4443 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 4444 // CHECK27-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 4445 // CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 4446 // CHECK27-NEXT: store i32 1, i32* [[TMP22]], align 4 4447 // CHECK27-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 4448 // CHECK27-NEXT: store i32 3, i32* [[TMP23]], align 4 4449 // CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 4450 // CHECK27-NEXT: store i8** [[TMP19]], i8*** [[TMP24]], align 4 4451 // CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 4452 // CHECK27-NEXT: store i8** [[TMP20]], i8*** [[TMP25]], align 4 4453 // CHECK27-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 4454 // CHECK27-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP26]], align 4 4455 // CHECK27-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 4456 // CHECK27-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP27]], align 4 4457 // CHECK27-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 4458 // CHECK27-NEXT: store i8** null, i8*** [[TMP28]], align 4 4459 // CHECK27-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 4460 // CHECK27-NEXT: store i8** null, i8*** [[TMP29]], align 4 4461 // CHECK27-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 4462 // CHECK27-NEXT: store i64 10, i64* [[TMP30]], align 8 4463 // CHECK27-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4]], i64 -1, i32 [[TMP21]], i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 4464 // CHECK27-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 4465 // CHECK27-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4466 // CHECK27: omp_offload.failed: 4467 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR5]] 4468 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 4469 // CHECK27: omp_offload.cont: 4470 // CHECK27-NEXT: ret i32 0 4471 // 4472 // 4473 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155 4474 // CHECK27-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4475 // CHECK27-NEXT: entry: 4476 // CHECK27-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 4477 // CHECK27-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 4478 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4479 // CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]]) 4480 // CHECK27-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 4481 // CHECK27-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 4482 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4483 // CHECK27-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4484 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 4485 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 4486 // CHECK27-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 4487 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 4488 // CHECK27-NEXT: ret void 4489 // 4490 // 4491 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..2 4492 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4493 // CHECK27-NEXT: entry: 4494 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4495 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4496 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4497 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4498 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4499 // CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4500 // CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4501 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4502 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4503 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 4504 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4505 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4506 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4507 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4508 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4509 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 4510 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4511 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4512 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4513 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4514 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4515 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4516 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4517 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4518 // CHECK27: cond.true: 4519 // CHECK27-NEXT: br label [[COND_END:%.*]] 4520 // CHECK27: cond.false: 4521 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4522 // CHECK27-NEXT: br label [[COND_END]] 4523 // CHECK27: cond.end: 4524 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4525 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4526 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4527 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4528 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4529 // CHECK27: omp.inner.for.cond: 4530 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4531 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12 4532 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4533 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4534 // CHECK27: omp.inner.for.body: 4535 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12 4536 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12 4537 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !12 4538 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4539 // CHECK27: omp.inner.for.inc: 4540 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4541 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12 4542 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4543 // CHECK27-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4544 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 4545 // CHECK27: omp.inner.for.end: 4546 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4547 // CHECK27: omp.loop.exit: 4548 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4549 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4550 // CHECK27-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 4551 // CHECK27-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4552 // CHECK27: .omp.final.then: 4553 // CHECK27-NEXT: store i32 10, i32* [[I]], align 4 4554 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4555 // CHECK27: .omp.final.done: 4556 // CHECK27-NEXT: ret void 4557 // 4558 // 4559 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..3 4560 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4561 // CHECK27-NEXT: entry: 4562 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4563 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4564 // CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4565 // CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4566 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4567 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4568 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4569 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4570 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4571 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4572 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4573 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 4574 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4575 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4576 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4577 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4578 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4579 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4580 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4581 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4582 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4583 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4584 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 4585 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 4586 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4587 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4588 // CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4589 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4590 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4591 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4592 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 4593 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4594 // CHECK27: cond.true: 4595 // CHECK27-NEXT: br label [[COND_END:%.*]] 4596 // CHECK27: cond.false: 4597 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4598 // CHECK27-NEXT: br label [[COND_END]] 4599 // CHECK27: cond.end: 4600 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4601 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4602 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4603 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4604 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4605 // CHECK27: omp.inner.for.cond: 4606 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4607 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 4608 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4609 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4610 // CHECK27: omp.inner.for.body: 4611 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4612 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4613 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4614 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16 4615 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 4616 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 4617 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 4618 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4619 // CHECK27: omp.body.continue: 4620 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4621 // CHECK27: omp.inner.for.inc: 4622 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4623 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 4624 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4625 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 4626 // CHECK27: omp.inner.for.end: 4627 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4628 // CHECK27: omp.loop.exit: 4629 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4630 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4631 // CHECK27-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 4632 // CHECK27-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4633 // CHECK27: .omp.final.then: 4634 // CHECK27-NEXT: store i32 10, i32* [[I]], align 4 4635 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4636 // CHECK27: .omp.final.done: 4637 // CHECK27-NEXT: ret void 4638 // 4639 // 4640 // CHECK27-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4641 // CHECK27-SAME: () #[[ATTR8:[0-9]+]] { 4642 // CHECK27-NEXT: entry: 4643 // CHECK27-NEXT: call void @__tgt_register_requires(i64 1) 4644 // CHECK27-NEXT: ret void 4645 // 4646 // 4647 // CHECK29-LABEL: define {{[^@]+}}@main 4648 // CHECK29-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4649 // CHECK29-NEXT: entry: 4650 // CHECK29-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4651 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4652 // CHECK29-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 4653 // CHECK29-NEXT: [[N:%.*]] = alloca i32, align 4 4654 // CHECK29-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 4655 // CHECK29-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4656 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4 4657 // CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 4 4658 // CHECK29-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4659 // CHECK29-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4660 // CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4661 // CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4662 // CHECK29-NEXT: [[I3:%.*]] = alloca i32, align 4 4663 // CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4664 // CHECK29-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 4665 // CHECK29-NEXT: [[I4:%.*]] = alloca i32, align 4 4666 // CHECK29-NEXT: [[I5:%.*]] = alloca i32, align 4 4667 // CHECK29-NEXT: store i32 0, i32* [[RETVAL]], align 4 4668 // CHECK29-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4669 // CHECK29-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 4670 // CHECK29-NEXT: store i32 100, i32* [[N]], align 4 4671 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4672 // CHECK29-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 4673 // CHECK29-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 4674 // CHECK29-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 4675 // CHECK29-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 4676 // CHECK29-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 4677 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 4678 // CHECK29-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4679 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4680 // CHECK29-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4681 // CHECK29-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4682 // CHECK29-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4683 // CHECK29-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4684 // CHECK29-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4685 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4686 // CHECK29-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 4687 // CHECK29-NEXT: store i32 0, i32* [[I3]], align 4 4688 // CHECK29-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4689 // CHECK29-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4690 // CHECK29-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 4691 // CHECK29: simd.if.then: 4692 // CHECK29-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4693 // CHECK29-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4694 // CHECK29-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i64 16) ] 4695 // CHECK29-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4696 // CHECK29-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4 4697 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4698 // CHECK29: omp.inner.for.cond: 4699 // CHECK29-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4700 // CHECK29-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4701 // CHECK29-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4702 // CHECK29-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4703 // CHECK29: omp.inner.for.body: 4704 // CHECK29-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4705 // CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4706 // CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4707 // CHECK29-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 4708 // CHECK29-NEXT: [[TMP12:%.*]] = load i32, i32* [[I4]], align 4 4709 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 4710 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 4711 // CHECK29-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4712 // CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4713 // CHECK29: omp.body.continue: 4714 // CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4715 // CHECK29: omp.inner.for.inc: 4716 // CHECK29-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4717 // CHECK29-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1 4718 // CHECK29-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 4719 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 4720 // CHECK29: omp.inner.for.end: 4721 // CHECK29-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4722 // CHECK29-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 0 4723 // CHECK29-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 4724 // CHECK29-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 4725 // CHECK29-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 4726 // CHECK29-NEXT: store i32 [[ADD11]], i32* [[I]], align 4 4727 // CHECK29-NEXT: br label [[SIMD_IF_END]] 4728 // CHECK29: simd.if.end: 4729 // CHECK29-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4730 // CHECK29-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP15]]) 4731 // CHECK29-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4732 // CHECK29-NEXT: [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 4733 // CHECK29-NEXT: call void @llvm.stackrestore(i8* [[TMP16]]) 4734 // CHECK29-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 4735 // CHECK29-NEXT: ret i32 [[TMP17]] 4736 // 4737 // 4738 // CHECK29-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4739 // CHECK29-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat { 4740 // CHECK29-NEXT: entry: 4741 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4742 // CHECK29-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4743 // CHECK29-NEXT: [[TE:%.*]] = alloca i32, align 4 4744 // CHECK29-NEXT: [[TH:%.*]] = alloca i32, align 4 4745 // CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 4 4746 // CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4747 // CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4748 // CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4749 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4 4750 // CHECK29-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4751 // CHECK29-NEXT: store i32 0, i32* [[TE]], align 4 4752 // CHECK29-NEXT: store i32 128, i32* [[TH]], align 4 4753 // CHECK29-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4754 // CHECK29-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4755 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4756 // CHECK29-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 4757 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4758 // CHECK29: omp.inner.for.cond: 4759 // CHECK29-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 4760 // CHECK29-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 4761 // CHECK29-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 4762 // CHECK29-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4763 // CHECK29: omp.inner.for.body: 4764 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 4765 // CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 4766 // CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4767 // CHECK29-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 4768 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 4769 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 4770 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4771 // CHECK29-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5 4772 // CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4773 // CHECK29: omp.body.continue: 4774 // CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4775 // CHECK29: omp.inner.for.inc: 4776 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 4777 // CHECK29-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 4778 // CHECK29-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 4779 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 4780 // CHECK29: omp.inner.for.end: 4781 // CHECK29-NEXT: store i32 10, i32* [[I]], align 4 4782 // CHECK29-NEXT: ret i32 0 4783 // 4784 // 4785 // CHECK31-LABEL: define {{[^@]+}}@main 4786 // CHECK31-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4787 // CHECK31-NEXT: entry: 4788 // CHECK31-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4789 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4790 // CHECK31-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 4791 // CHECK31-NEXT: [[N:%.*]] = alloca i32, align 4 4792 // CHECK31-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4793 // CHECK31-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4794 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4 4795 // CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 4 4796 // CHECK31-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4797 // CHECK31-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4798 // CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4799 // CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4800 // CHECK31-NEXT: [[I3:%.*]] = alloca i32, align 4 4801 // CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4802 // CHECK31-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 4803 // CHECK31-NEXT: [[I4:%.*]] = alloca i32, align 4 4804 // CHECK31-NEXT: [[I5:%.*]] = alloca i32, align 4 4805 // CHECK31-NEXT: store i32 0, i32* [[RETVAL]], align 4 4806 // CHECK31-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4807 // CHECK31-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 4808 // CHECK31-NEXT: store i32 100, i32* [[N]], align 4 4809 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4810 // CHECK31-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 4811 // CHECK31-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 4812 // CHECK31-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 4813 // CHECK31-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 4814 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 4815 // CHECK31-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 4816 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4817 // CHECK31-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4818 // CHECK31-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4819 // CHECK31-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4820 // CHECK31-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4821 // CHECK31-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4822 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4823 // CHECK31-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 4824 // CHECK31-NEXT: store i32 0, i32* [[I3]], align 4 4825 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4826 // CHECK31-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4827 // CHECK31-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 4828 // CHECK31: simd.if.then: 4829 // CHECK31-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4830 // CHECK31-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4831 // CHECK31-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i32 16) ] 4832 // CHECK31-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 4833 // CHECK31-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 4834 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4835 // CHECK31: omp.inner.for.cond: 4836 // CHECK31-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4837 // CHECK31-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4838 // CHECK31-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4839 // CHECK31-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4840 // CHECK31: omp.inner.for.body: 4841 // CHECK31-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4842 // CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4843 // CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4844 // CHECK31-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 4845 // CHECK31-NEXT: [[TMP11:%.*]] = load i32, i32* [[I4]], align 4 4846 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP11]] 4847 // CHECK31-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4848 // CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4849 // CHECK31: omp.body.continue: 4850 // CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4851 // CHECK31: omp.inner.for.inc: 4852 // CHECK31-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4853 // CHECK31-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 4854 // CHECK31-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 4855 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4856 // CHECK31: omp.inner.for.end: 4857 // CHECK31-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4858 // CHECK31-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 0 4859 // CHECK31-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 4860 // CHECK31-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 4861 // CHECK31-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 4862 // CHECK31-NEXT: store i32 [[ADD11]], i32* [[I]], align 4 4863 // CHECK31-NEXT: br label [[SIMD_IF_END]] 4864 // CHECK31: simd.if.end: 4865 // CHECK31-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4866 // CHECK31-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP14]]) 4867 // CHECK31-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4868 // CHECK31-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4869 // CHECK31-NEXT: call void @llvm.stackrestore(i8* [[TMP15]]) 4870 // CHECK31-NEXT: [[TMP16:%.*]] = load i32, i32* [[RETVAL]], align 4 4871 // CHECK31-NEXT: ret i32 [[TMP16]] 4872 // 4873 // 4874 // CHECK31-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4875 // CHECK31-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat { 4876 // CHECK31-NEXT: entry: 4877 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4878 // CHECK31-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4879 // CHECK31-NEXT: [[TE:%.*]] = alloca i32, align 4 4880 // CHECK31-NEXT: [[TH:%.*]] = alloca i32, align 4 4881 // CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 4 4882 // CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4883 // CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4884 // CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4885 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4 4886 // CHECK31-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4887 // CHECK31-NEXT: store i32 0, i32* [[TE]], align 4 4888 // CHECK31-NEXT: store i32 128, i32* [[TH]], align 4 4889 // CHECK31-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4890 // CHECK31-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4891 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4892 // CHECK31-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 4893 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4894 // CHECK31: omp.inner.for.cond: 4895 // CHECK31-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4896 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 4897 // CHECK31-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 4898 // CHECK31-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4899 // CHECK31: omp.inner.for.body: 4900 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4901 // CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 4902 // CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4903 // CHECK31-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 4904 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 4905 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]] 4906 // CHECK31-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 4907 // CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4908 // CHECK31: omp.body.continue: 4909 // CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4910 // CHECK31: omp.inner.for.inc: 4911 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4912 // CHECK31-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 4913 // CHECK31-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4914 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 4915 // CHECK31: omp.inner.for.end: 4916 // CHECK31-NEXT: store i32 10, i32* [[I]], align 4 4917 // CHECK31-NEXT: ret i32 0 4918 // 4919