1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK9 19 20 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 struct St { 29 int a, b; 30 St() : a(0), b(0) {} 31 St(const St &st) : a(st.a + st.b), b(0) {} 32 ~St() {} 33 }; 34 35 volatile int g = 1212; 36 volatile int &g1 = g; 37 38 template <class T> 39 struct S { 40 T f; 41 S(T a) : f(a + g) {} 42 S() : f(g) {} 43 S(const S &s, St t = St()) : f(s.f + t.a) {} 44 operator T() { return T(); } 45 ~S() {} 46 }; 47 48 49 template <typename T> 50 T tmain() { 51 S<T> test; 52 T t_var = T(); 53 T vec[] = {1, 2}; 54 S<T> s_arr[] = {1, 2}; 55 S<T> &var = test; 56 #pragma omp target 57 #pragma omp teams distribute parallel for private(t_var, vec, s_arr, var) 58 for (int i = 0; i < 2; ++i) { 59 vec[i] = t_var; 60 s_arr[i] = var; 61 } 62 return T(); 63 } 64 65 S<float> test; 66 int t_var = 333; 67 int vec[] = {1, 2}; 68 S<float> s_arr[] = {1, 2}; 69 S<float> var(3); 70 71 int main() { 72 static int sivar; 73 #ifdef LAMBDA 74 [&]() { 75 #pragma omp target 76 #pragma omp teams distribute parallel for private(g, g1, sivar) 77 for (int i = 0; i < 2; ++i) { 78 79 // Skip global, bound tid and loop vars 80 81 g = 1; 82 g1 = 1; 83 sivar = 2; 84 85 // Skip global, bound tid and loop vars 86 [&]() { 87 g = 2; 88 g1 = 2; 89 sivar = 4; 90 91 }(); 92 } 93 }(); 94 return 0; 95 #else 96 #pragma omp target 97 #pragma omp teams distribute parallel for private(t_var, vec, s_arr, var, sivar) 98 for (int i = 0; i < 2; ++i) { 99 vec[i] = t_var; 100 s_arr[i] = var; 101 sivar += i; 102 } 103 return tmain<int>(); 104 #endif 105 } 106 107 108 109 // Skip global, bound tid and loop vars 110 111 // private(s_arr) 112 113 // private(var) 114 115 116 // Skip global, bound tid and loop vars 117 118 // private(s_arr) 119 120 // private(var) 121 122 123 124 125 // Skip global, bound tid and loop vars 126 127 // private(s_arr) 128 129 130 // private(var) 131 132 133 // Skip global, bound tid and loop vars 134 // prev lb and ub 135 // iter variables 136 137 // private(s_arr) 138 139 140 // private(var) 141 142 143 144 #endif 145 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init 146 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 147 // CHECK1-NEXT: entry: 148 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) @test) 149 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]] 150 // CHECK1-NEXT: ret void 151 // 152 // 153 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 154 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 155 // CHECK1-NEXT: entry: 156 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 157 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 158 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 159 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 160 // CHECK1-NEXT: ret void 161 // 162 // 163 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 164 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 165 // CHECK1-NEXT: entry: 166 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 167 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 168 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 169 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 170 // CHECK1-NEXT: ret void 171 // 172 // 173 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 174 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 175 // CHECK1-NEXT: entry: 176 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 177 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 178 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 179 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 180 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 4 181 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 182 // CHECK1-NEXT: store float [[CONV]], float* [[F]], align 4 183 // CHECK1-NEXT: ret void 184 // 185 // 186 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 187 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 188 // CHECK1-NEXT: entry: 189 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 190 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 191 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 192 // CHECK1-NEXT: ret void 193 // 194 // 195 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 196 // CHECK1-SAME: () #[[ATTR0]] { 197 // CHECK1-NEXT: entry: 198 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float noundef 1.000000e+00) 199 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float noundef 2.000000e+00) 200 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]] 201 // CHECK1-NEXT: ret void 202 // 203 // 204 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 205 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 206 // CHECK1-NEXT: entry: 207 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 208 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 209 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 210 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 211 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 212 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 213 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 214 // CHECK1-NEXT: ret void 215 // 216 // 217 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 218 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]]) #[[ATTR0]] { 219 // CHECK1-NEXT: entry: 220 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 221 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 222 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 223 // CHECK1: arraydestroy.body: 224 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 1, i64 0), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 225 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 226 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 227 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0) 228 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 229 // CHECK1: arraydestroy.done1: 230 // CHECK1-NEXT: ret void 231 // 232 // 233 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 234 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 235 // CHECK1-NEXT: entry: 236 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 237 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 238 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 239 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 240 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 241 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 242 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 243 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 4 244 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 245 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 246 // CHECK1-NEXT: store float [[ADD]], float* [[F]], align 4 247 // CHECK1-NEXT: ret void 248 // 249 // 250 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 251 // CHECK1-SAME: () #[[ATTR0]] { 252 // CHECK1-NEXT: entry: 253 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00) 254 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]] 255 // CHECK1-NEXT: ret void 256 // 257 // 258 // CHECK1-LABEL: define {{[^@]+}}@main 259 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 260 // CHECK1-NEXT: entry: 261 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 262 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 263 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 264 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 265 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 266 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4 267 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 268 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4 269 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 270 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8 271 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 272 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8 273 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 274 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8 275 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 276 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8 277 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 278 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8 279 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 280 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8 281 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 282 // CHECK1-NEXT: store i64 2, i64* [[TMP8]], align 8 283 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 284 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 285 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 286 // CHECK1: omp_offload.failed: 287 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96() #[[ATTR2]] 288 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 289 // CHECK1: omp_offload.cont: 290 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 291 // CHECK1-NEXT: ret i32 [[CALL]] 292 // 293 // 294 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 295 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 296 // CHECK1-NEXT: entry: 297 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 298 // CHECK1-NEXT: ret void 299 // 300 // 301 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 302 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] { 303 // CHECK1-NEXT: entry: 304 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 305 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 306 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 307 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 308 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 309 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 310 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 311 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 312 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 313 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 314 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 315 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 316 // CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 317 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 318 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 319 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 320 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 321 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 322 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 323 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 324 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 325 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 326 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 327 // CHECK1: arrayctor.loop: 328 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 329 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 330 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 331 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 332 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 333 // CHECK1: arrayctor.cont: 334 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 335 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 336 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 337 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 338 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 339 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 340 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 341 // CHECK1: cond.true: 342 // CHECK1-NEXT: br label [[COND_END:%.*]] 343 // CHECK1: cond.false: 344 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 345 // CHECK1-NEXT: br label [[COND_END]] 346 // CHECK1: cond.end: 347 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 348 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 349 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 350 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 351 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 352 // CHECK1: omp.inner.for.cond: 353 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 354 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 355 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 356 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 357 // CHECK1: omp.inner.for.cond.cleanup: 358 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 359 // CHECK1: omp.inner.for.body: 360 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 361 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 362 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 363 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 364 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 365 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 366 // CHECK1: omp.inner.for.inc: 367 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 368 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 369 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 370 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 371 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 372 // CHECK1: omp.inner.for.end: 373 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 374 // CHECK1: omp.loop.exit: 375 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 376 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 377 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]]) 378 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 379 // CHECK1-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 380 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2 381 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 382 // CHECK1: arraydestroy.body: 383 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 384 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 385 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 386 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 387 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 388 // CHECK1: arraydestroy.done3: 389 // CHECK1-NEXT: ret void 390 // 391 // 392 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 393 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] { 394 // CHECK1-NEXT: entry: 395 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 396 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 397 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 398 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 399 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 400 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 403 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 406 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 407 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 408 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 409 // CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 410 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 411 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 412 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 413 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 414 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 415 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 416 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 417 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 418 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 419 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 420 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 421 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 422 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 423 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 424 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 425 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 426 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 427 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 428 // CHECK1: arrayctor.loop: 429 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 430 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 431 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 432 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 433 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 434 // CHECK1: arrayctor.cont: 435 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 436 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 437 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 438 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 439 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 440 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 441 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 442 // CHECK1: cond.true: 443 // CHECK1-NEXT: br label [[COND_END:%.*]] 444 // CHECK1: cond.false: 445 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 446 // CHECK1-NEXT: br label [[COND_END]] 447 // CHECK1: cond.end: 448 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 449 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 450 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 451 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 452 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 453 // CHECK1: omp.inner.for.cond: 454 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 455 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 456 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 457 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 458 // CHECK1: omp.inner.for.cond.cleanup: 459 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 460 // CHECK1: omp.inner.for.body: 461 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 462 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 463 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 464 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 465 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 466 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 467 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 468 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 469 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 470 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 471 // CHECK1-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP12]] to i64 472 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM3]] 473 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 474 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR]] to i8* 475 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false) 476 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 477 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[SIVAR]], align 4 478 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP15]] 479 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[SIVAR]], align 4 480 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 481 // CHECK1: omp.body.continue: 482 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 483 // CHECK1: omp.inner.for.inc: 484 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 485 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 486 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 487 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 488 // CHECK1: omp.inner.for.end: 489 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 490 // CHECK1: omp.loop.exit: 491 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 492 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 493 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 494 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 495 // CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 496 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 497 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 498 // CHECK1: arraydestroy.body: 499 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP20]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 500 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 501 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 502 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 503 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 504 // CHECK1: arraydestroy.done8: 505 // CHECK1-NEXT: ret void 506 // 507 // 508 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 509 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat { 510 // CHECK1-NEXT: entry: 511 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 512 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 513 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 514 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 515 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 516 // CHECK1-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 517 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 518 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 519 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 520 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 521 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 522 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 523 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 524 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 525 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 526 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 527 // CHECK1-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 528 // CHECK1-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 529 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 530 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 531 // CHECK1-NEXT: store i32 1, i32* [[TMP1]], align 4 532 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 533 // CHECK1-NEXT: store i32 0, i32* [[TMP2]], align 4 534 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 535 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8 536 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 537 // CHECK1-NEXT: store i8** null, i8*** [[TMP4]], align 8 538 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 539 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8 540 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 541 // CHECK1-NEXT: store i64* null, i64** [[TMP6]], align 8 542 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 543 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8 544 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 545 // CHECK1-NEXT: store i8** null, i8*** [[TMP8]], align 8 546 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 547 // CHECK1-NEXT: store i64 2, i64* [[TMP9]], align 8 548 // CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 549 // CHECK1-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 550 // CHECK1-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 551 // CHECK1: omp_offload.failed: 552 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56() #[[ATTR2]] 553 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 554 // CHECK1: omp_offload.cont: 555 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 556 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 557 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 558 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 559 // CHECK1: arraydestroy.body: 560 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 561 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 562 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 563 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 564 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 565 // CHECK1: arraydestroy.done2: 566 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]] 567 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 568 // CHECK1-NEXT: ret i32 [[TMP13]] 569 // 570 // 571 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 572 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 573 // CHECK1-NEXT: entry: 574 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 575 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 576 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 577 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 578 // CHECK1-NEXT: ret void 579 // 580 // 581 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 582 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 583 // CHECK1-NEXT: entry: 584 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 585 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 586 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 587 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 588 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 589 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 590 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 591 // CHECK1-NEXT: ret void 592 // 593 // 594 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56 595 // CHECK1-SAME: () #[[ATTR4]] { 596 // CHECK1-NEXT: entry: 597 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 598 // CHECK1-NEXT: ret void 599 // 600 // 601 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 602 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] { 603 // CHECK1-NEXT: entry: 604 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 605 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 606 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 607 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 608 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 609 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 610 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 611 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 612 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 613 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 614 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 615 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 616 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 617 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 618 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 619 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 620 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 621 // CHECK1-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 622 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 623 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 624 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 625 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 626 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 627 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 628 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 629 // CHECK1: arrayctor.loop: 630 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 631 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 632 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 633 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 634 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 635 // CHECK1: arrayctor.cont: 636 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 637 // CHECK1-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 638 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 639 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 640 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 641 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 642 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 643 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 644 // CHECK1: cond.true: 645 // CHECK1-NEXT: br label [[COND_END:%.*]] 646 // CHECK1: cond.false: 647 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 648 // CHECK1-NEXT: br label [[COND_END]] 649 // CHECK1: cond.end: 650 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 651 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 652 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 653 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 654 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 655 // CHECK1: omp.inner.for.cond: 656 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 657 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 658 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 659 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 660 // CHECK1: omp.inner.for.cond.cleanup: 661 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 662 // CHECK1: omp.inner.for.body: 663 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 664 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 665 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 666 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 667 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 668 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 669 // CHECK1: omp.inner.for.inc: 670 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 671 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 672 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 673 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 674 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 675 // CHECK1: omp.inner.for.end: 676 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 677 // CHECK1: omp.loop.exit: 678 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 679 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 680 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]]) 681 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 682 // CHECK1-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 683 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2 684 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 685 // CHECK1: arraydestroy.body: 686 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 687 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 688 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 689 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 690 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 691 // CHECK1: arraydestroy.done5: 692 // CHECK1-NEXT: ret void 693 // 694 // 695 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 696 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] { 697 // CHECK1-NEXT: entry: 698 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 699 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 700 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 701 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 702 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 703 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 704 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 705 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 706 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 707 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 708 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 709 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 710 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 711 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 712 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 713 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca %struct.S.0*, align 8 714 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 715 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 716 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 717 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 718 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 719 // CHECK1-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 720 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 721 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 722 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 723 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 724 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 725 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 726 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 727 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 728 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 729 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 730 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 731 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 732 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 733 // CHECK1: arrayctor.loop: 734 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 735 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 736 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 737 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 738 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 739 // CHECK1: arrayctor.cont: 740 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 741 // CHECK1-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8 742 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 743 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 744 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 745 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 746 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 747 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 748 // CHECK1: cond.true: 749 // CHECK1-NEXT: br label [[COND_END:%.*]] 750 // CHECK1: cond.false: 751 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 752 // CHECK1-NEXT: br label [[COND_END]] 753 // CHECK1: cond.end: 754 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 755 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 756 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 757 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 758 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 759 // CHECK1: omp.inner.for.cond: 760 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 761 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 762 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 763 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 764 // CHECK1: omp.inner.for.cond.cleanup: 765 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 766 // CHECK1: omp.inner.for.body: 767 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 768 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 769 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 770 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 771 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 772 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 773 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 774 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 775 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 776 // CHECK1-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8 777 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 778 // CHECK1-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 779 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] 780 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 781 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 782 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 783 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 784 // CHECK1: omp.body.continue: 785 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 786 // CHECK1: omp.inner.for.inc: 787 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 788 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 789 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 790 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 791 // CHECK1: omp.inner.for.end: 792 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 793 // CHECK1: omp.loop.exit: 794 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 795 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 796 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 797 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 798 // CHECK1-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 799 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 800 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 801 // CHECK1: arraydestroy.body: 802 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 803 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 804 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 805 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 806 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 807 // CHECK1: arraydestroy.done9: 808 // CHECK1-NEXT: ret void 809 // 810 // 811 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 812 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 813 // CHECK1-NEXT: entry: 814 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 815 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 816 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 817 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 818 // CHECK1-NEXT: ret void 819 // 820 // 821 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 822 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 823 // CHECK1-NEXT: entry: 824 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 825 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 826 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 827 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 828 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 4 829 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 830 // CHECK1-NEXT: ret void 831 // 832 // 833 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 834 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 835 // CHECK1-NEXT: entry: 836 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 837 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 838 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 839 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 840 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 841 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 842 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 843 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 4 844 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 845 // CHECK1-NEXT: store i32 [[ADD]], i32* [[F]], align 4 846 // CHECK1-NEXT: ret void 847 // 848 // 849 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 850 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 851 // CHECK1-NEXT: entry: 852 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 853 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 854 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 855 // CHECK1-NEXT: ret void 856 // 857 // 858 // CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_teams_distribute_parallel_for_private_codegen.cpp 859 // CHECK1-SAME: () #[[ATTR0]] { 860 // CHECK1-NEXT: entry: 861 // CHECK1-NEXT: call void @__cxx_global_var_init() 862 // CHECK1-NEXT: call void @__cxx_global_var_init.1() 863 // CHECK1-NEXT: call void @__cxx_global_var_init.2() 864 // CHECK1-NEXT: ret void 865 // 866 // 867 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 868 // CHECK1-SAME: () #[[ATTR0]] { 869 // CHECK1-NEXT: entry: 870 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 871 // CHECK1-NEXT: ret void 872 // 873 // 874 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init 875 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 876 // CHECK3-NEXT: entry: 877 // CHECK3-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) @test) 878 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]] 879 // CHECK3-NEXT: ret void 880 // 881 // 882 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 883 // CHECK3-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 884 // CHECK3-NEXT: entry: 885 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 886 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 887 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 888 // CHECK3-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 889 // CHECK3-NEXT: ret void 890 // 891 // 892 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 893 // CHECK3-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 894 // CHECK3-NEXT: entry: 895 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 896 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 897 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 898 // CHECK3-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 899 // CHECK3-NEXT: ret void 900 // 901 // 902 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 903 // CHECK3-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 904 // CHECK3-NEXT: entry: 905 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 906 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 907 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 908 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 909 // CHECK3-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 4 910 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 911 // CHECK3-NEXT: store float [[CONV]], float* [[F]], align 4 912 // CHECK3-NEXT: ret void 913 // 914 // 915 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 916 // CHECK3-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 917 // CHECK3-NEXT: entry: 918 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 919 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 920 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 921 // CHECK3-NEXT: ret void 922 // 923 // 924 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 925 // CHECK3-SAME: () #[[ATTR0]] { 926 // CHECK3-NEXT: entry: 927 // CHECK3-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), float noundef 1.000000e+00) 928 // CHECK3-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 1), float noundef 2.000000e+00) 929 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]] 930 // CHECK3-NEXT: ret void 931 // 932 // 933 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 934 // CHECK3-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 935 // CHECK3-NEXT: entry: 936 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 937 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 938 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 939 // CHECK3-NEXT: store float [[A]], float* [[A_ADDR]], align 4 940 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 941 // CHECK3-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 942 // CHECK3-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 943 // CHECK3-NEXT: ret void 944 // 945 // 946 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 947 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]]) #[[ATTR0]] { 948 // CHECK3-NEXT: entry: 949 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 950 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 951 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 952 // CHECK3: arraydestroy.body: 953 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 1, i32 0), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 954 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 955 // CHECK3-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 956 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0) 957 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 958 // CHECK3: arraydestroy.done1: 959 // CHECK3-NEXT: ret void 960 // 961 // 962 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 963 // CHECK3-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 964 // CHECK3-NEXT: entry: 965 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 966 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 967 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 968 // CHECK3-NEXT: store float [[A]], float* [[A_ADDR]], align 4 969 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 970 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 971 // CHECK3-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 972 // CHECK3-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 4 973 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 974 // CHECK3-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 975 // CHECK3-NEXT: store float [[ADD]], float* [[F]], align 4 976 // CHECK3-NEXT: ret void 977 // 978 // 979 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 980 // CHECK3-SAME: () #[[ATTR0]] { 981 // CHECK3-NEXT: entry: 982 // CHECK3-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00) 983 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]] 984 // CHECK3-NEXT: ret void 985 // 986 // 987 // CHECK3-LABEL: define {{[^@]+}}@main 988 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 989 // CHECK3-NEXT: entry: 990 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 991 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 992 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 993 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 994 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 995 // CHECK3-NEXT: store i32 1, i32* [[TMP0]], align 4 996 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 997 // CHECK3-NEXT: store i32 0, i32* [[TMP1]], align 4 998 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 999 // CHECK3-NEXT: store i8** null, i8*** [[TMP2]], align 4 1000 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1001 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 4 1002 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1003 // CHECK3-NEXT: store i64* null, i64** [[TMP4]], align 4 1004 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1005 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 4 1006 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1007 // CHECK3-NEXT: store i8** null, i8*** [[TMP6]], align 4 1008 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1009 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 4 1010 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1011 // CHECK3-NEXT: store i64 2, i64* [[TMP8]], align 8 1012 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1013 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 1014 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1015 // CHECK3: omp_offload.failed: 1016 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96() #[[ATTR2]] 1017 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1018 // CHECK3: omp_offload.cont: 1019 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1020 // CHECK3-NEXT: ret i32 [[CALL]] 1021 // 1022 // 1023 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 1024 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 1025 // CHECK3-NEXT: entry: 1026 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1027 // CHECK3-NEXT: ret void 1028 // 1029 // 1030 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1031 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] { 1032 // CHECK3-NEXT: entry: 1033 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1034 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1035 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1036 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1037 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1038 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1039 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1040 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1041 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1042 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1043 // CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1044 // CHECK3-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1045 // CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1046 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1047 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1048 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1049 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1050 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1051 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1052 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1053 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1054 // CHECK3-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1055 // CHECK3-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1056 // CHECK3: arrayctor.loop: 1057 // CHECK3-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1058 // CHECK3-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1059 // CHECK3-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 1060 // CHECK3-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1061 // CHECK3-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1062 // CHECK3: arrayctor.cont: 1063 // CHECK3-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1064 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1065 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1066 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1067 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1068 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1069 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1070 // CHECK3: cond.true: 1071 // CHECK3-NEXT: br label [[COND_END:%.*]] 1072 // CHECK3: cond.false: 1073 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1074 // CHECK3-NEXT: br label [[COND_END]] 1075 // CHECK3: cond.end: 1076 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1077 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1078 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1079 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1080 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1081 // CHECK3: omp.inner.for.cond: 1082 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1083 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1084 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1085 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1086 // CHECK3: omp.inner.for.cond.cleanup: 1087 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1088 // CHECK3: omp.inner.for.body: 1089 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1090 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1091 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]) 1092 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1093 // CHECK3: omp.inner.for.inc: 1094 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1095 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1096 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 1097 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1098 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1099 // CHECK3: omp.inner.for.end: 1100 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1101 // CHECK3: omp.loop.exit: 1102 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1103 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1104 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1105 // CHECK3-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 1106 // CHECK3-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1107 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i32 2 1108 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1109 // CHECK3: arraydestroy.body: 1110 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1111 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1112 // CHECK3-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1113 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 1114 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1115 // CHECK3: arraydestroy.done3: 1116 // CHECK3-NEXT: ret void 1117 // 1118 // 1119 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 1120 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] { 1121 // CHECK3-NEXT: entry: 1122 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1123 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1124 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1125 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1126 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1127 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1128 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1129 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1130 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1131 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1132 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1133 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1134 // CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1135 // CHECK3-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1136 // CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1137 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1138 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1139 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1140 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1141 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1142 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1143 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1144 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1145 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1146 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 1147 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 1148 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1149 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1150 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1151 // CHECK3-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1152 // CHECK3-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1153 // CHECK3: arrayctor.loop: 1154 // CHECK3-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1155 // CHECK3-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1156 // CHECK3-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 1157 // CHECK3-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1158 // CHECK3-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1159 // CHECK3: arrayctor.cont: 1160 // CHECK3-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1161 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1162 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1163 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1164 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1165 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1166 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1167 // CHECK3: cond.true: 1168 // CHECK3-NEXT: br label [[COND_END:%.*]] 1169 // CHECK3: cond.false: 1170 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1171 // CHECK3-NEXT: br label [[COND_END]] 1172 // CHECK3: cond.end: 1173 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1174 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1175 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1176 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1177 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1178 // CHECK3: omp.inner.for.cond: 1179 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1180 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1181 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1182 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1183 // CHECK3: omp.inner.for.cond.cleanup: 1184 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1185 // CHECK3: omp.inner.for.body: 1186 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1187 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1188 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1189 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1190 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 1191 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1192 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]] 1193 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 1194 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 1195 // CHECK3-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP12]] 1196 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8* 1197 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR]] to i8* 1198 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false) 1199 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1200 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[SIVAR]], align 4 1201 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP15]] 1202 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR]], align 4 1203 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1204 // CHECK3: omp.body.continue: 1205 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1206 // CHECK3: omp.inner.for.inc: 1207 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1208 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], 1 1209 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 1210 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1211 // CHECK3: omp.inner.for.end: 1212 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1213 // CHECK3: omp.loop.exit: 1214 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1215 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1216 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1217 // CHECK3-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 1218 // CHECK3-NEXT: [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1219 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i32 2 1220 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1221 // CHECK3: arraydestroy.body: 1222 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP20]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1223 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1224 // CHECK3-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1225 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]] 1226 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 1227 // CHECK3: arraydestroy.done6: 1228 // CHECK3-NEXT: ret void 1229 // 1230 // 1231 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1232 // CHECK3-SAME: () #[[ATTR6:[0-9]+]] comdat { 1233 // CHECK3-NEXT: entry: 1234 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1235 // CHECK3-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1236 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1237 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1238 // CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1239 // CHECK3-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 1240 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1241 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 1242 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1243 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4 1244 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1245 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 1246 // CHECK3-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1247 // CHECK3-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 1248 // CHECK3-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 1249 // CHECK3-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1250 // CHECK3-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 1251 // CHECK3-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 1252 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1253 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1254 // CHECK3-NEXT: store i32 1, i32* [[TMP1]], align 4 1255 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1256 // CHECK3-NEXT: store i32 0, i32* [[TMP2]], align 4 1257 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1258 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 4 1259 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1260 // CHECK3-NEXT: store i8** null, i8*** [[TMP4]], align 4 1261 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1262 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 4 1263 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1264 // CHECK3-NEXT: store i64* null, i64** [[TMP6]], align 4 1265 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1266 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 4 1267 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1268 // CHECK3-NEXT: store i8** null, i8*** [[TMP8]], align 4 1269 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1270 // CHECK3-NEXT: store i64 2, i64* [[TMP9]], align 8 1271 // CHECK3-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1272 // CHECK3-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 1273 // CHECK3-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1274 // CHECK3: omp_offload.failed: 1275 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56() #[[ATTR2]] 1276 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1277 // CHECK3: omp_offload.cont: 1278 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 1279 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1280 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 1281 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1282 // CHECK3: arraydestroy.body: 1283 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1284 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1285 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1286 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1287 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1288 // CHECK3: arraydestroy.done2: 1289 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]] 1290 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 1291 // CHECK3-NEXT: ret i32 [[TMP13]] 1292 // 1293 // 1294 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1295 // CHECK3-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1296 // CHECK3-NEXT: entry: 1297 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1298 // CHECK3-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1299 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1300 // CHECK3-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1301 // CHECK3-NEXT: ret void 1302 // 1303 // 1304 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1305 // CHECK3-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1306 // CHECK3-NEXT: entry: 1307 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1308 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1309 // CHECK3-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1310 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1311 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1312 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1313 // CHECK3-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1314 // CHECK3-NEXT: ret void 1315 // 1316 // 1317 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56 1318 // CHECK3-SAME: () #[[ATTR4]] { 1319 // CHECK3-NEXT: entry: 1320 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 1321 // CHECK3-NEXT: ret void 1322 // 1323 // 1324 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 1325 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] { 1326 // CHECK3-NEXT: entry: 1327 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1328 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1329 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1330 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1331 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 1332 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1333 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1334 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1335 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1336 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1337 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1338 // CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1339 // CHECK3-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1340 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 1341 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1342 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1343 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1344 // CHECK3-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 1345 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1346 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1347 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1348 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1349 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1350 // CHECK3-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 1351 // CHECK3-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1352 // CHECK3: arrayctor.loop: 1353 // CHECK3-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1354 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1355 // CHECK3-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 1356 // CHECK3-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1357 // CHECK3-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1358 // CHECK3: arrayctor.cont: 1359 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1360 // CHECK3-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 1361 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1362 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1363 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1364 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1365 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1366 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1367 // CHECK3: cond.true: 1368 // CHECK3-NEXT: br label [[COND_END:%.*]] 1369 // CHECK3: cond.false: 1370 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1371 // CHECK3-NEXT: br label [[COND_END]] 1372 // CHECK3: cond.end: 1373 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1374 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1375 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1376 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1377 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1378 // CHECK3: omp.inner.for.cond: 1379 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1380 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1381 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1382 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1383 // CHECK3: omp.inner.for.cond.cleanup: 1384 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1385 // CHECK3: omp.inner.for.body: 1386 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1387 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1388 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]) 1389 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1390 // CHECK3: omp.inner.for.inc: 1391 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1392 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1393 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 1394 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1395 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1396 // CHECK3: omp.inner.for.end: 1397 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1398 // CHECK3: omp.loop.exit: 1399 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1400 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1401 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1402 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 1403 // CHECK3-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1404 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2 1405 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1406 // CHECK3: arraydestroy.body: 1407 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1408 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1409 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1410 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1411 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1412 // CHECK3: arraydestroy.done5: 1413 // CHECK3-NEXT: ret void 1414 // 1415 // 1416 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5 1417 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] { 1418 // CHECK3-NEXT: entry: 1419 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1420 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1421 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1422 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1423 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1424 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1425 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 1426 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1427 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1428 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1429 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1430 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1431 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1432 // CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1433 // CHECK3-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1434 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 1435 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1436 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1437 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1438 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1439 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1440 // CHECK3-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 1441 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1442 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1443 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1444 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1445 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 1446 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 1447 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1448 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1449 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1450 // CHECK3-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 1451 // CHECK3-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1452 // CHECK3: arrayctor.loop: 1453 // CHECK3-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1454 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1455 // CHECK3-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 1456 // CHECK3-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1457 // CHECK3-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1458 // CHECK3: arrayctor.cont: 1459 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1460 // CHECK3-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 1461 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1462 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1463 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1464 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1465 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1466 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1467 // CHECK3: cond.true: 1468 // CHECK3-NEXT: br label [[COND_END:%.*]] 1469 // CHECK3: cond.false: 1470 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1471 // CHECK3-NEXT: br label [[COND_END]] 1472 // CHECK3: cond.end: 1473 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1474 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1475 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1476 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1477 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1478 // CHECK3: omp.inner.for.cond: 1479 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1480 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1481 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1482 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1483 // CHECK3: omp.inner.for.cond.cleanup: 1484 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1485 // CHECK3: omp.inner.for.body: 1486 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1487 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1488 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1489 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1490 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 1491 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1492 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]] 1493 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 1494 // CHECK3-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 1495 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1496 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]] 1497 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 1498 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 1499 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 1500 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1501 // CHECK3: omp.body.continue: 1502 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1503 // CHECK3: omp.inner.for.inc: 1504 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1505 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 1506 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 1507 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1508 // CHECK3: omp.inner.for.end: 1509 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1510 // CHECK3: omp.loop.exit: 1511 // CHECK3-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1512 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1513 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 1514 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 1515 // CHECK3-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1516 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 1517 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1518 // CHECK3: arraydestroy.body: 1519 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1520 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1521 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1522 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1523 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1524 // CHECK3: arraydestroy.done7: 1525 // CHECK3-NEXT: ret void 1526 // 1527 // 1528 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1529 // CHECK3-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1530 // CHECK3-NEXT: entry: 1531 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1532 // CHECK3-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1533 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1534 // CHECK3-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 1535 // CHECK3-NEXT: ret void 1536 // 1537 // 1538 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1539 // CHECK3-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1540 // CHECK3-NEXT: entry: 1541 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1542 // CHECK3-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1543 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1544 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1545 // CHECK3-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 4 1546 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1547 // CHECK3-NEXT: ret void 1548 // 1549 // 1550 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1551 // CHECK3-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1552 // CHECK3-NEXT: entry: 1553 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1554 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1555 // CHECK3-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1556 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1557 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1558 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1559 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1560 // CHECK3-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 4 1561 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 1562 // CHECK3-NEXT: store i32 [[ADD]], i32* [[F]], align 4 1563 // CHECK3-NEXT: ret void 1564 // 1565 // 1566 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1567 // CHECK3-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1568 // CHECK3-NEXT: entry: 1569 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1570 // CHECK3-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1571 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1572 // CHECK3-NEXT: ret void 1573 // 1574 // 1575 // CHECK3-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_teams_distribute_parallel_for_private_codegen.cpp 1576 // CHECK3-SAME: () #[[ATTR0]] { 1577 // CHECK3-NEXT: entry: 1578 // CHECK3-NEXT: call void @__cxx_global_var_init() 1579 // CHECK3-NEXT: call void @__cxx_global_var_init.1() 1580 // CHECK3-NEXT: call void @__cxx_global_var_init.2() 1581 // CHECK3-NEXT: ret void 1582 // 1583 // 1584 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1585 // CHECK3-SAME: () #[[ATTR0]] { 1586 // CHECK3-NEXT: entry: 1587 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1588 // CHECK3-NEXT: ret void 1589 // 1590 // 1591 // CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init 1592 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1593 // CHECK9-NEXT: entry: 1594 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) @test) 1595 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]] 1596 // CHECK9-NEXT: ret void 1597 // 1598 // 1599 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1600 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1601 // CHECK9-NEXT: entry: 1602 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1603 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1604 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1605 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1606 // CHECK9-NEXT: ret void 1607 // 1608 // 1609 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1610 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1611 // CHECK9-NEXT: entry: 1612 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1613 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1614 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1615 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 1616 // CHECK9-NEXT: ret void 1617 // 1618 // 1619 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1620 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1621 // CHECK9-NEXT: entry: 1622 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1623 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1624 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1625 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1626 // CHECK9-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 4 1627 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 1628 // CHECK9-NEXT: store float [[CONV]], float* [[F]], align 4 1629 // CHECK9-NEXT: ret void 1630 // 1631 // 1632 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1633 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1634 // CHECK9-NEXT: entry: 1635 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1636 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1637 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1638 // CHECK9-NEXT: ret void 1639 // 1640 // 1641 // CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 1642 // CHECK9-SAME: () #[[ATTR0]] { 1643 // CHECK9-NEXT: entry: 1644 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float noundef 1.000000e+00) 1645 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float noundef 2.000000e+00) 1646 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]] 1647 // CHECK9-NEXT: ret void 1648 // 1649 // 1650 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1651 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1652 // CHECK9-NEXT: entry: 1653 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1654 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1655 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1656 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1657 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1658 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1659 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1660 // CHECK9-NEXT: ret void 1661 // 1662 // 1663 // CHECK9-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 1664 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]]) #[[ATTR0]] { 1665 // CHECK9-NEXT: entry: 1666 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1667 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1668 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1669 // CHECK9: arraydestroy.body: 1670 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 1, i64 0), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1671 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1672 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1673 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0) 1674 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1675 // CHECK9: arraydestroy.done1: 1676 // CHECK9-NEXT: ret void 1677 // 1678 // 1679 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1680 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1681 // CHECK9-NEXT: entry: 1682 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1683 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1684 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1685 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1686 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1687 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1688 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1689 // CHECK9-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 4 1690 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 1691 // CHECK9-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 1692 // CHECK9-NEXT: store float [[ADD]], float* [[F]], align 4 1693 // CHECK9-NEXT: ret void 1694 // 1695 // 1696 // CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 1697 // CHECK9-SAME: () #[[ATTR0]] { 1698 // CHECK9-NEXT: entry: 1699 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00) 1700 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]] 1701 // CHECK9-NEXT: ret void 1702 // 1703 // 1704 // CHECK9-LABEL: define {{[^@]+}}@main 1705 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 1706 // CHECK9-NEXT: entry: 1707 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1708 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1709 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1710 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 1711 // CHECK9-NEXT: ret i32 0 1712 // 1713 // 1714 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75 1715 // CHECK9-SAME: (i64 noundef [[G1:%.*]]) #[[ATTR5:[0-9]+]] { 1716 // CHECK9-NEXT: entry: 1717 // CHECK9-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 1718 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1719 // CHECK9-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 1720 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[G1_ADDR]] to i32* 1721 // CHECK9-NEXT: store i32* [[CONV]], i32** [[TMP]], align 8 1722 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1723 // CHECK9-NEXT: ret void 1724 // 1725 // 1726 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1727 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR5]] { 1728 // CHECK9-NEXT: entry: 1729 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1730 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1731 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1732 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1733 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1734 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1735 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1736 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1737 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1738 // CHECK9-NEXT: [[G:%.*]] = alloca i32, align 4 1739 // CHECK9-NEXT: [[G1:%.*]] = alloca i32, align 4 1740 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 1741 // CHECK9-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1742 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1743 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1744 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1745 // CHECK9-NEXT: store i32* undef, i32** [[_TMP1]], align 8 1746 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1747 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1748 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1749 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1750 // CHECK9-NEXT: store i32* [[G1]], i32** [[_TMP2]], align 8 1751 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1752 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1753 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1754 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1755 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1756 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1757 // CHECK9: cond.true: 1758 // CHECK9-NEXT: br label [[COND_END:%.*]] 1759 // CHECK9: cond.false: 1760 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1761 // CHECK9-NEXT: br label [[COND_END]] 1762 // CHECK9: cond.end: 1763 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1764 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1765 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1766 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1767 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1768 // CHECK9: omp.inner.for.cond: 1769 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1770 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1771 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1772 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1773 // CHECK9: omp.inner.for.body: 1774 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1775 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1776 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1777 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1778 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1779 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1780 // CHECK9: omp.inner.for.inc: 1781 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1782 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1783 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1784 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1785 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1786 // CHECK9: omp.inner.for.end: 1787 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1788 // CHECK9: omp.loop.exit: 1789 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1790 // CHECK9-NEXT: ret void 1791 // 1792 // 1793 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 1794 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR5]] { 1795 // CHECK9-NEXT: entry: 1796 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1797 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1798 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1799 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1800 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1801 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1802 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1803 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1804 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1805 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1806 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1807 // CHECK9-NEXT: [[G:%.*]] = alloca i32, align 4 1808 // CHECK9-NEXT: [[G1:%.*]] = alloca i32, align 4 1809 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1810 // CHECK9-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1811 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1812 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1813 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1814 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1815 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1816 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1817 // CHECK9-NEXT: store i32* undef, i32** [[_TMP1]], align 8 1818 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1819 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1820 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1821 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1822 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1823 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 1824 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1825 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1826 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1827 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1828 // CHECK9-NEXT: store i32* [[G1]], i32** [[_TMP3]], align 8 1829 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1830 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1831 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1832 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1833 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1834 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1835 // CHECK9: cond.true: 1836 // CHECK9-NEXT: br label [[COND_END:%.*]] 1837 // CHECK9: cond.false: 1838 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1839 // CHECK9-NEXT: br label [[COND_END]] 1840 // CHECK9: cond.end: 1841 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1842 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1843 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1844 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1845 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1846 // CHECK9: omp.inner.for.cond: 1847 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1848 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1849 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1850 // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1851 // CHECK9: omp.inner.for.body: 1852 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1853 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1854 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1855 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1856 // CHECK9-NEXT: store i32 1, i32* [[G]], align 4 1857 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP3]], align 8 1858 // CHECK9-NEXT: store volatile i32 1, i32* [[TMP10]], align 4 1859 // CHECK9-NEXT: store i32 2, i32* [[SIVAR]], align 4 1860 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1861 // CHECK9-NEXT: store i32* [[G]], i32** [[TMP11]], align 8 1862 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1863 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP3]], align 8 1864 // CHECK9-NEXT: store i32* [[TMP13]], i32** [[TMP12]], align 8 1865 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1866 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[TMP14]], align 8 1867 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) 1868 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1869 // CHECK9: omp.body.continue: 1870 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1871 // CHECK9: omp.inner.for.inc: 1872 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1873 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 1874 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 1875 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1876 // CHECK9: omp.inner.for.end: 1877 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1878 // CHECK9: omp.loop.exit: 1879 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1880 // CHECK9-NEXT: ret void 1881 // 1882 // 1883 // CHECK9-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_teams_distribute_parallel_for_private_codegen.cpp 1884 // CHECK9-SAME: () #[[ATTR0]] { 1885 // CHECK9-NEXT: entry: 1886 // CHECK9-NEXT: call void @__cxx_global_var_init() 1887 // CHECK9-NEXT: call void @__cxx_global_var_init.1() 1888 // CHECK9-NEXT: call void @__cxx_global_var_init.2() 1889 // CHECK9-NEXT: ret void 1890 // 1891 // 1892 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1893 // CHECK9-SAME: () #[[ATTR0]] { 1894 // CHECK9-NEXT: entry: 1895 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1896 // CHECK9-NEXT: ret void 1897 // 1898