1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK16 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams distribute parallel for lastprivate(t_var, vec, s_arr, s_arr, var, var) 51 for (int i = 0; i < 2; ++i) { 52 vec[i] = t_var; 53 s_arr[i] = var; 54 } 55 return T(); 56 } 57 58 int main() { 59 static int svar; 60 volatile double g; 61 volatile double &g1 = g; 62 63 #ifdef LAMBDA 64 [&]() { 65 static float sfvar; 66 67 #pragma omp target 68 #pragma omp teams distribute parallel for lastprivate(g, g1, svar, sfvar) 69 for (int i = 0; i < 2; ++i) { 70 // loop variables 71 72 // init private variables 73 g = 1; 74 g1 = 1; 75 svar = 3; 76 sfvar = 4.0; 77 78 79 80 81 // loop variables 82 83 // init private variables 84 85 86 87 88 89 [&]() { 90 g = 2; 91 g1 = 2; 92 svar = 4; 93 sfvar = 8.0; 94 95 }(); 96 } 97 }(); 98 return 0; 99 #else 100 S<float> test; 101 int t_var = 0; 102 int vec[] = {1, 2}; 103 S<float> s_arr[] = {1, 2}; 104 S<float> &var = test; 105 106 #pragma omp target 107 #pragma omp teams distribute parallel for lastprivate(t_var, vec, s_arr, s_arr, var, var, svar) 108 for (int i = 0; i < 2; ++i) { 109 vec[i] = t_var; 110 s_arr[i] = var; 111 } 112 int i; 113 114 return tmain<int>(); 115 #endif 116 } 117 118 119 // skip loop variables 120 121 // copy from parameters to local address variables 122 123 // load content of local address variables 124 // the distribute loop 125 126 // lastprivates 127 128 129 // gbl and bound tid vars, prev lb and ub vars 130 // skip loop variables 131 132 // copy from parameters to local address variables 133 134 // load content of local address variables 135 // the distribute loop 136 137 // assignment: vec[i] = t_var; 138 139 // assignment: s_arr[i] = var; 140 141 142 // lastprivates 143 144 145 // template tmain 146 147 148 // skip alloca of global_tid and bound_tid 149 // skip loop variables 150 151 // skip init of bound and global tid 152 // copy from parameters to local address variables 153 154 // load content of local address variables 155 156 157 // lastprivates 158 159 160 // skip alloca of global_tid and bound_tid, and prev lb and ub vars 161 // skip loop variables 162 163 // skip init of bound and global tid 164 // copy from parameters to local address variables 165 166 // load content of local address variables 167 168 169 // assignment: vec[i] = t_var; 170 171 // assignment: s_arr[i] = var; 172 173 174 // lastprivates 175 176 177 #endif 178 // CHECK1-LABEL: define {{[^@]+}}@main 179 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 180 // CHECK1-NEXT: entry: 181 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 182 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 183 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 184 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 185 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 186 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 187 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 188 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8 189 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 190 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 191 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 192 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 193 // CHECK1-NEXT: ret i32 0 194 // 195 // 196 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 197 // CHECK1-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 198 // CHECK1-NEXT: entry: 199 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 200 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 201 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 202 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 203 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 204 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 205 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 206 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 207 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 208 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 209 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 210 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 211 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 212 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 213 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 214 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 215 // CHECK1-NEXT: ret void 216 // 217 // 218 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 219 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 220 // CHECK1-NEXT: entry: 221 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 222 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 223 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 224 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 225 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 226 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 227 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 228 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 229 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 230 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 231 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 232 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 233 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[G2:%.*]] = alloca double, align 8 235 // CHECK1-NEXT: [[G13:%.*]] = alloca double, align 8 236 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca double*, align 8 237 // CHECK1-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 238 // CHECK1-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 239 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 241 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 242 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 243 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 244 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 245 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 246 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 247 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 248 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 249 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 250 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 251 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 252 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 253 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 254 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 255 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 256 // CHECK1-NEXT: store double* [[G13]], double** [[_TMP4]], align 8 257 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 258 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 259 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 260 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 261 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 262 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 263 // CHECK1: cond.true: 264 // CHECK1-NEXT: br label [[COND_END:%.*]] 265 // CHECK1: cond.false: 266 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 267 // CHECK1-NEXT: br label [[COND_END]] 268 // CHECK1: cond.end: 269 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 270 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 271 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 272 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 273 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 274 // CHECK1: omp.inner.for.cond: 275 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 276 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 277 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 278 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 279 // CHECK1: omp.inner.for.body: 280 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 281 // CHECK1-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 282 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 283 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 284 // CHECK1-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 8 285 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, double*, double*, i32*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP13]], i64 [[TMP15]], double* [[G2]], double* [[TMP16]], i32* [[SVAR5]], float* [[SFVAR6]]) 286 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 287 // CHECK1: omp.inner.for.inc: 288 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 289 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 290 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 291 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 292 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 293 // CHECK1: omp.inner.for.end: 294 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 295 // CHECK1: omp.loop.exit: 296 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 297 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 298 // CHECK1-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 299 // CHECK1-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 300 // CHECK1: .omp.lastprivate.then: 301 // CHECK1-NEXT: [[TMP21:%.*]] = load double, double* [[G2]], align 8 302 // CHECK1-NEXT: store volatile double [[TMP21]], double* [[TMP0]], align 8 303 // CHECK1-NEXT: [[TMP22:%.*]] = load double*, double** [[_TMP4]], align 8 304 // CHECK1-NEXT: [[TMP23:%.*]] = load double, double* [[TMP22]], align 8 305 // CHECK1-NEXT: store volatile double [[TMP23]], double* [[TMP4]], align 8 306 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[SVAR5]], align 4 307 // CHECK1-NEXT: store i32 [[TMP24]], i32* [[TMP2]], align 4 308 // CHECK1-NEXT: [[TMP25:%.*]] = load float, float* [[SFVAR6]], align 4 309 // CHECK1-NEXT: store float [[TMP25]], float* [[TMP3]], align 4 310 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 311 // CHECK1: .omp.lastprivate.done: 312 // CHECK1-NEXT: ret void 313 // 314 // 315 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 316 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 317 // CHECK1-NEXT: entry: 318 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 319 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 320 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 321 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 322 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 323 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 324 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 325 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 326 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 327 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 328 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 329 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 330 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 331 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 332 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 333 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8 334 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8 335 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8 336 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 337 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 338 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 339 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 340 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 341 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 342 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 343 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 344 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 345 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 346 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 347 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 348 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 349 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 350 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 351 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 352 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 353 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 354 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 355 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 356 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP4]] to i32 357 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 358 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32 359 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 360 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 361 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 362 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 363 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[TMP]], align 8 364 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8 365 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 366 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 367 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 368 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 369 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 370 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 371 // CHECK1: cond.true: 372 // CHECK1-NEXT: br label [[COND_END:%.*]] 373 // CHECK1: cond.false: 374 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 375 // CHECK1-NEXT: br label [[COND_END]] 376 // CHECK1: cond.end: 377 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 378 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 379 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 380 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 381 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 382 // CHECK1: omp.inner.for.cond: 383 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 384 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 385 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 386 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 387 // CHECK1: omp.inner.for.body: 388 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 389 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 390 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 391 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 392 // CHECK1-NEXT: store double 1.000000e+00, double* [[G3]], align 8 393 // CHECK1-NEXT: [[TMP15:%.*]] = load double*, double** [[_TMP5]], align 8 394 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP15]], align 8 395 // CHECK1-NEXT: store i32 3, i32* [[SVAR6]], align 4 396 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR7]], align 4 397 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 398 // CHECK1-NEXT: store double* [[G3]], double** [[TMP16]], align 8 399 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 400 // CHECK1-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP5]], align 8 401 // CHECK1-NEXT: store double* [[TMP18]], double** [[TMP17]], align 8 402 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 403 // CHECK1-NEXT: store i32* [[SVAR6]], i32** [[TMP19]], align 8 404 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 405 // CHECK1-NEXT: store float* [[SFVAR7]], float** [[TMP20]], align 8 406 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 407 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 408 // CHECK1: omp.body.continue: 409 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 410 // CHECK1: omp.inner.for.inc: 411 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 412 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1 413 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 414 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 415 // CHECK1: omp.inner.for.end: 416 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 417 // CHECK1: omp.loop.exit: 418 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 419 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 420 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 421 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 422 // CHECK1: .omp.lastprivate.then: 423 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[G3]], align 8 424 // CHECK1-NEXT: store volatile double [[TMP24]], double* [[TMP0]], align 8 425 // CHECK1-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8 426 // CHECK1-NEXT: [[TMP26:%.*]] = load double, double* [[TMP25]], align 8 427 // CHECK1-NEXT: store volatile double [[TMP26]], double* [[TMP6]], align 8 428 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR6]], align 4 429 // CHECK1-NEXT: store i32 [[TMP27]], i32* [[TMP2]], align 4 430 // CHECK1-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4 431 // CHECK1-NEXT: store float [[TMP28]], float* [[TMP3]], align 4 432 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 433 // CHECK1: .omp.lastprivate.done: 434 // CHECK1-NEXT: ret void 435 // 436 // 437 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 438 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 439 // CHECK1-NEXT: entry: 440 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 441 // CHECK1-NEXT: ret void 442 // 443 // 444 // CHECK2-LABEL: define {{[^@]+}}@main 445 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 446 // CHECK2-NEXT: entry: 447 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 448 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 449 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 450 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 451 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 452 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 453 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 454 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8 455 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 456 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 457 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 458 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 459 // CHECK2-NEXT: ret i32 0 460 // 461 // 462 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 463 // CHECK2-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 464 // CHECK2-NEXT: entry: 465 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 466 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 467 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 468 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 469 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 470 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 471 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 472 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 473 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 474 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 475 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 476 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 477 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 478 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 479 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 480 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 481 // CHECK2-NEXT: ret void 482 // 483 // 484 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 485 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 486 // CHECK2-NEXT: entry: 487 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 488 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 489 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 490 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 491 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 492 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 493 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 494 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 495 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 496 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 497 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 498 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 499 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 500 // CHECK2-NEXT: [[G2:%.*]] = alloca double, align 8 501 // CHECK2-NEXT: [[G13:%.*]] = alloca double, align 8 502 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca double*, align 8 503 // CHECK2-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 504 // CHECK2-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 505 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 506 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 507 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 508 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 509 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 510 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 511 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 512 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 513 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 514 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 515 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 516 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 517 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 518 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 519 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 520 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 521 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 522 // CHECK2-NEXT: store double* [[G13]], double** [[_TMP4]], align 8 523 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 524 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 525 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 526 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 527 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 528 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 529 // CHECK2: cond.true: 530 // CHECK2-NEXT: br label [[COND_END:%.*]] 531 // CHECK2: cond.false: 532 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 533 // CHECK2-NEXT: br label [[COND_END]] 534 // CHECK2: cond.end: 535 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 536 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 537 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 538 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 539 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 540 // CHECK2: omp.inner.for.cond: 541 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 542 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 543 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 544 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 545 // CHECK2: omp.inner.for.body: 546 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 547 // CHECK2-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 548 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 549 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 550 // CHECK2-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 8 551 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, double*, double*, i32*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP13]], i64 [[TMP15]], double* [[G2]], double* [[TMP16]], i32* [[SVAR5]], float* [[SFVAR6]]) 552 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 553 // CHECK2: omp.inner.for.inc: 554 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 555 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 556 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 557 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 558 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 559 // CHECK2: omp.inner.for.end: 560 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 561 // CHECK2: omp.loop.exit: 562 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 563 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 564 // CHECK2-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 565 // CHECK2-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 566 // CHECK2: .omp.lastprivate.then: 567 // CHECK2-NEXT: [[TMP21:%.*]] = load double, double* [[G2]], align 8 568 // CHECK2-NEXT: store volatile double [[TMP21]], double* [[TMP0]], align 8 569 // CHECK2-NEXT: [[TMP22:%.*]] = load double*, double** [[_TMP4]], align 8 570 // CHECK2-NEXT: [[TMP23:%.*]] = load double, double* [[TMP22]], align 8 571 // CHECK2-NEXT: store volatile double [[TMP23]], double* [[TMP4]], align 8 572 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[SVAR5]], align 4 573 // CHECK2-NEXT: store i32 [[TMP24]], i32* [[TMP2]], align 4 574 // CHECK2-NEXT: [[TMP25:%.*]] = load float, float* [[SFVAR6]], align 4 575 // CHECK2-NEXT: store float [[TMP25]], float* [[TMP3]], align 4 576 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 577 // CHECK2: .omp.lastprivate.done: 578 // CHECK2-NEXT: ret void 579 // 580 // 581 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 582 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 583 // CHECK2-NEXT: entry: 584 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 585 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 586 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 587 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 588 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 589 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 590 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 591 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 592 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 593 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 594 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 595 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 596 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 597 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 598 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 599 // CHECK2-NEXT: [[G3:%.*]] = alloca double, align 8 600 // CHECK2-NEXT: [[G14:%.*]] = alloca double, align 8 601 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca double*, align 8 602 // CHECK2-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 603 // CHECK2-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 604 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 605 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 606 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 607 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 608 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 609 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 610 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 611 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 612 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 613 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 614 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 615 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 616 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 617 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 618 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 619 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 620 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 621 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 622 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP4]] to i32 623 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 624 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32 625 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 626 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 627 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 628 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 629 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[TMP]], align 8 630 // CHECK2-NEXT: store double* [[G14]], double** [[_TMP5]], align 8 631 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 632 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 633 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 634 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 635 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 636 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 637 // CHECK2: cond.true: 638 // CHECK2-NEXT: br label [[COND_END:%.*]] 639 // CHECK2: cond.false: 640 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 641 // CHECK2-NEXT: br label [[COND_END]] 642 // CHECK2: cond.end: 643 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 644 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 645 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 646 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 647 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 648 // CHECK2: omp.inner.for.cond: 649 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 650 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 651 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 652 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 653 // CHECK2: omp.inner.for.body: 654 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 655 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 656 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 657 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 658 // CHECK2-NEXT: store double 1.000000e+00, double* [[G3]], align 8 659 // CHECK2-NEXT: [[TMP15:%.*]] = load double*, double** [[_TMP5]], align 8 660 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP15]], align 8 661 // CHECK2-NEXT: store i32 3, i32* [[SVAR6]], align 4 662 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR7]], align 4 663 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 664 // CHECK2-NEXT: store double* [[G3]], double** [[TMP16]], align 8 665 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 666 // CHECK2-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP5]], align 8 667 // CHECK2-NEXT: store double* [[TMP18]], double** [[TMP17]], align 8 668 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 669 // CHECK2-NEXT: store i32* [[SVAR6]], i32** [[TMP19]], align 8 670 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 671 // CHECK2-NEXT: store float* [[SFVAR7]], float** [[TMP20]], align 8 672 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 673 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 674 // CHECK2: omp.body.continue: 675 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 676 // CHECK2: omp.inner.for.inc: 677 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 678 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1 679 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 680 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 681 // CHECK2: omp.inner.for.end: 682 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 683 // CHECK2: omp.loop.exit: 684 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 685 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 686 // CHECK2-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 687 // CHECK2-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 688 // CHECK2: .omp.lastprivate.then: 689 // CHECK2-NEXT: [[TMP24:%.*]] = load double, double* [[G3]], align 8 690 // CHECK2-NEXT: store volatile double [[TMP24]], double* [[TMP0]], align 8 691 // CHECK2-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8 692 // CHECK2-NEXT: [[TMP26:%.*]] = load double, double* [[TMP25]], align 8 693 // CHECK2-NEXT: store volatile double [[TMP26]], double* [[TMP6]], align 8 694 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR6]], align 4 695 // CHECK2-NEXT: store i32 [[TMP27]], i32* [[TMP2]], align 4 696 // CHECK2-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4 697 // CHECK2-NEXT: store float [[TMP28]], float* [[TMP3]], align 4 698 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 699 // CHECK2: .omp.lastprivate.done: 700 // CHECK2-NEXT: ret void 701 // 702 // 703 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 704 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 705 // CHECK2-NEXT: entry: 706 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 707 // CHECK2-NEXT: ret void 708 // 709 // 710 // CHECK3-LABEL: define {{[^@]+}}@main 711 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 712 // CHECK3-NEXT: entry: 713 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 714 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 715 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 716 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 717 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 718 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 719 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 720 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4 721 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 722 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 723 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 724 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 725 // CHECK3-NEXT: ret i32 0 726 // 727 // 728 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 729 // CHECK3-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 730 // CHECK3-NEXT: entry: 731 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 732 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 733 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 734 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 735 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 736 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 737 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 738 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 739 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 740 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 741 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 742 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 743 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 744 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 745 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 746 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 747 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 748 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8 749 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 750 // CHECK3-NEXT: [[TMP4:%.*]] = load double, double* [[TMP3]], align 4 751 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8 752 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 753 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 754 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 755 // CHECK3-NEXT: ret void 756 // 757 // 758 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 759 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 760 // CHECK3-NEXT: entry: 761 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 762 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 763 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 764 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 765 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 766 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 767 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 768 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 769 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 770 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 771 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 772 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 773 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 774 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 775 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 776 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 777 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 778 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 779 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 780 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 781 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 782 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 783 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 784 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 785 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 786 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 787 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 788 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 789 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 790 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 791 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 792 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 793 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 794 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 795 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 796 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 797 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 798 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 799 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 800 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 801 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 802 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 803 // CHECK3: cond.true: 804 // CHECK3-NEXT: br label [[COND_END:%.*]] 805 // CHECK3: cond.false: 806 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 807 // CHECK3-NEXT: br label [[COND_END]] 808 // CHECK3: cond.end: 809 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 810 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 811 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 812 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 813 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 814 // CHECK3: omp.inner.for.cond: 815 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 816 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 817 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 818 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 819 // CHECK3: omp.inner.for.body: 820 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 821 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 822 // CHECK3-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP4]], align 4 823 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, double*, i32*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP12]], i32 [[TMP13]], double* [[G2]], double* [[TMP14]], i32* [[SVAR5]], float* [[SFVAR6]]) 824 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 825 // CHECK3: omp.inner.for.inc: 826 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 827 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 828 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 829 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 830 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 831 // CHECK3: omp.inner.for.end: 832 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 833 // CHECK3: omp.loop.exit: 834 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 835 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 836 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 837 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 838 // CHECK3: .omp.lastprivate.then: 839 // CHECK3-NEXT: [[TMP19:%.*]] = load double, double* [[G2]], align 8 840 // CHECK3-NEXT: store volatile double [[TMP19]], double* [[TMP0]], align 8 841 // CHECK3-NEXT: [[TMP20:%.*]] = load double*, double** [[_TMP4]], align 4 842 // CHECK3-NEXT: [[TMP21:%.*]] = load double, double* [[TMP20]], align 4 843 // CHECK3-NEXT: store volatile double [[TMP21]], double* [[TMP4]], align 4 844 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[SVAR5]], align 4 845 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[TMP2]], align 4 846 // CHECK3-NEXT: [[TMP23:%.*]] = load float, float* [[SFVAR6]], align 4 847 // CHECK3-NEXT: store float [[TMP23]], float* [[TMP3]], align 4 848 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 849 // CHECK3: .omp.lastprivate.done: 850 // CHECK3-NEXT: ret void 851 // 852 // 853 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 854 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 855 // CHECK3-NEXT: entry: 856 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 857 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 858 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 859 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 860 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 861 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 862 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 863 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 864 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 865 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 866 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 867 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 868 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 869 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 870 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 871 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 872 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 873 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 874 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 875 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 876 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 877 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 878 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 879 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 880 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 881 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 882 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 883 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 884 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 885 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 886 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 887 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 888 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 889 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 890 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 891 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 892 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 893 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 894 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 895 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_LB]], align 4 896 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 897 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 898 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 899 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[TMP]], align 4 900 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 901 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 902 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 903 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 904 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 905 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 906 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 907 // CHECK3: cond.true: 908 // CHECK3-NEXT: br label [[COND_END:%.*]] 909 // CHECK3: cond.false: 910 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 911 // CHECK3-NEXT: br label [[COND_END]] 912 // CHECK3: cond.end: 913 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 914 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 915 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 916 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 917 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 918 // CHECK3: omp.inner.for.cond: 919 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 920 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 921 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 922 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 923 // CHECK3: omp.inner.for.body: 924 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 925 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 926 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 927 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 928 // CHECK3-NEXT: store double 1.000000e+00, double* [[G2]], align 8 929 // CHECK3-NEXT: [[TMP15:%.*]] = load double*, double** [[_TMP4]], align 4 930 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP15]], align 4 931 // CHECK3-NEXT: store i32 3, i32* [[SVAR5]], align 4 932 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 933 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 934 // CHECK3-NEXT: store double* [[G2]], double** [[TMP16]], align 4 935 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 936 // CHECK3-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP4]], align 4 937 // CHECK3-NEXT: store double* [[TMP18]], double** [[TMP17]], align 4 938 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 939 // CHECK3-NEXT: store i32* [[SVAR5]], i32** [[TMP19]], align 4 940 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 941 // CHECK3-NEXT: store float* [[SFVAR6]], float** [[TMP20]], align 4 942 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 943 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 944 // CHECK3: omp.body.continue: 945 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 946 // CHECK3: omp.inner.for.inc: 947 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 948 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 949 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 950 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 951 // CHECK3: omp.inner.for.end: 952 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 953 // CHECK3: omp.loop.exit: 954 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 955 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 956 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 957 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 958 // CHECK3: .omp.lastprivate.then: 959 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[G2]], align 8 960 // CHECK3-NEXT: store volatile double [[TMP24]], double* [[TMP0]], align 8 961 // CHECK3-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP4]], align 4 962 // CHECK3-NEXT: [[TMP26:%.*]] = load double, double* [[TMP25]], align 4 963 // CHECK3-NEXT: store volatile double [[TMP26]], double* [[TMP6]], align 4 964 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR5]], align 4 965 // CHECK3-NEXT: store i32 [[TMP27]], i32* [[TMP2]], align 4 966 // CHECK3-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR6]], align 4 967 // CHECK3-NEXT: store float [[TMP28]], float* [[TMP3]], align 4 968 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 969 // CHECK3: .omp.lastprivate.done: 970 // CHECK3-NEXT: ret void 971 // 972 // 973 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 974 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 975 // CHECK3-NEXT: entry: 976 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 977 // CHECK3-NEXT: ret void 978 // 979 // 980 // CHECK4-LABEL: define {{[^@]+}}@main 981 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 982 // CHECK4-NEXT: entry: 983 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 984 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 985 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 986 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 987 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 988 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 989 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 990 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4 991 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 992 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 993 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 994 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 995 // CHECK4-NEXT: ret i32 0 996 // 997 // 998 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 999 // CHECK4-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 1000 // CHECK4-NEXT: entry: 1001 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 1002 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 1003 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1004 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 1005 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 1006 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 1007 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 1008 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 1009 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 1010 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 1011 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 1012 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 1013 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 1014 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 1015 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 1016 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 1017 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 1018 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8 1019 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 1020 // CHECK4-NEXT: [[TMP4:%.*]] = load double, double* [[TMP3]], align 4 1021 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8 1022 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 1023 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 1024 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 1025 // CHECK4-NEXT: ret void 1026 // 1027 // 1028 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1029 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 1030 // CHECK4-NEXT: entry: 1031 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1032 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1033 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 1034 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 1035 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 1036 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 1037 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 1038 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1039 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1040 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1041 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1042 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1043 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1044 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 1045 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 1046 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 1047 // CHECK4-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 1048 // CHECK4-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 1049 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1050 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1051 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1052 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 1053 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 1054 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 1055 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 1056 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 1057 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 1058 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 1059 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 1060 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 1061 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1062 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1063 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1064 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1065 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 1066 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 1067 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1068 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1069 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1070 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1071 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 1072 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1073 // CHECK4: cond.true: 1074 // CHECK4-NEXT: br label [[COND_END:%.*]] 1075 // CHECK4: cond.false: 1076 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1077 // CHECK4-NEXT: br label [[COND_END]] 1078 // CHECK4: cond.end: 1079 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 1080 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1081 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1082 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 1083 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1084 // CHECK4: omp.inner.for.cond: 1085 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1086 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1087 // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 1088 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1089 // CHECK4: omp.inner.for.body: 1090 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1091 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1092 // CHECK4-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP4]], align 4 1093 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, double*, i32*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP12]], i32 [[TMP13]], double* [[G2]], double* [[TMP14]], i32* [[SVAR5]], float* [[SFVAR6]]) 1094 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1095 // CHECK4: omp.inner.for.inc: 1096 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1097 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1098 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 1099 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1100 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1101 // CHECK4: omp.inner.for.end: 1102 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1103 // CHECK4: omp.loop.exit: 1104 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 1105 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1106 // CHECK4-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1107 // CHECK4-NEXT: br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1108 // CHECK4: .omp.lastprivate.then: 1109 // CHECK4-NEXT: [[TMP19:%.*]] = load double, double* [[G2]], align 8 1110 // CHECK4-NEXT: store volatile double [[TMP19]], double* [[TMP0]], align 8 1111 // CHECK4-NEXT: [[TMP20:%.*]] = load double*, double** [[_TMP4]], align 4 1112 // CHECK4-NEXT: [[TMP21:%.*]] = load double, double* [[TMP20]], align 4 1113 // CHECK4-NEXT: store volatile double [[TMP21]], double* [[TMP4]], align 4 1114 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[SVAR5]], align 4 1115 // CHECK4-NEXT: store i32 [[TMP22]], i32* [[TMP2]], align 4 1116 // CHECK4-NEXT: [[TMP23:%.*]] = load float, float* [[SFVAR6]], align 4 1117 // CHECK4-NEXT: store float [[TMP23]], float* [[TMP3]], align 4 1118 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1119 // CHECK4: .omp.lastprivate.done: 1120 // CHECK4-NEXT: ret void 1121 // 1122 // 1123 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1124 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 1125 // CHECK4-NEXT: entry: 1126 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1127 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1128 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1129 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1130 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 1131 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 1132 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 1133 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 1134 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 1135 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1136 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1137 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1138 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1139 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1140 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1141 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 1142 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 1143 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 1144 // CHECK4-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 1145 // CHECK4-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 1146 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1147 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 1148 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1149 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1150 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1151 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1152 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 1153 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 1154 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 1155 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 1156 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 1157 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 1158 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 1159 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 1160 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 1161 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1162 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1163 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1164 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1165 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_LB]], align 4 1166 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1167 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1168 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1169 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[TMP]], align 4 1170 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 1171 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1172 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1173 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1174 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1175 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 1176 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1177 // CHECK4: cond.true: 1178 // CHECK4-NEXT: br label [[COND_END:%.*]] 1179 // CHECK4: cond.false: 1180 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1181 // CHECK4-NEXT: br label [[COND_END]] 1182 // CHECK4: cond.end: 1183 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1184 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1185 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1186 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 1187 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1188 // CHECK4: omp.inner.for.cond: 1189 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1190 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1191 // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1192 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1193 // CHECK4: omp.inner.for.body: 1194 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1195 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 1196 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1197 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1198 // CHECK4-NEXT: store double 1.000000e+00, double* [[G2]], align 8 1199 // CHECK4-NEXT: [[TMP15:%.*]] = load double*, double** [[_TMP4]], align 4 1200 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP15]], align 4 1201 // CHECK4-NEXT: store i32 3, i32* [[SVAR5]], align 4 1202 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 1203 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1204 // CHECK4-NEXT: store double* [[G2]], double** [[TMP16]], align 4 1205 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1206 // CHECK4-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP4]], align 4 1207 // CHECK4-NEXT: store double* [[TMP18]], double** [[TMP17]], align 4 1208 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1209 // CHECK4-NEXT: store i32* [[SVAR5]], i32** [[TMP19]], align 4 1210 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1211 // CHECK4-NEXT: store float* [[SFVAR6]], float** [[TMP20]], align 4 1212 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 1213 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1214 // CHECK4: omp.body.continue: 1215 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1216 // CHECK4: omp.inner.for.inc: 1217 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1218 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 1219 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1220 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1221 // CHECK4: omp.inner.for.end: 1222 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1223 // CHECK4: omp.loop.exit: 1224 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 1225 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1226 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1227 // CHECK4-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1228 // CHECK4: .omp.lastprivate.then: 1229 // CHECK4-NEXT: [[TMP24:%.*]] = load double, double* [[G2]], align 8 1230 // CHECK4-NEXT: store volatile double [[TMP24]], double* [[TMP0]], align 8 1231 // CHECK4-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP4]], align 4 1232 // CHECK4-NEXT: [[TMP26:%.*]] = load double, double* [[TMP25]], align 4 1233 // CHECK4-NEXT: store volatile double [[TMP26]], double* [[TMP6]], align 4 1234 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR5]], align 4 1235 // CHECK4-NEXT: store i32 [[TMP27]], i32* [[TMP2]], align 4 1236 // CHECK4-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR6]], align 4 1237 // CHECK4-NEXT: store float [[TMP28]], float* [[TMP3]], align 4 1238 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1239 // CHECK4: .omp.lastprivate.done: 1240 // CHECK4-NEXT: ret void 1241 // 1242 // 1243 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1244 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 1245 // CHECK4-NEXT: entry: 1246 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1247 // CHECK4-NEXT: ret void 1248 // 1249 // 1250 // CHECK5-LABEL: define {{[^@]+}}@main 1251 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1252 // CHECK5-NEXT: entry: 1253 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1254 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 1255 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 1256 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 1257 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 1258 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 1259 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1260 // CHECK5-NEXT: store double* [[G]], double** [[TMP0]], align 8 1261 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1262 // CHECK5-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 1263 // CHECK5-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 1264 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 1265 // CHECK5-NEXT: ret i32 0 1266 // 1267 // 1268 // CHECK6-LABEL: define {{[^@]+}}@main 1269 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 1270 // CHECK6-NEXT: entry: 1271 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1272 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 1273 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 8 1274 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 1275 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 1276 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 8 1277 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1278 // CHECK6-NEXT: store double* [[G]], double** [[TMP0]], align 8 1279 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1280 // CHECK6-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 1281 // CHECK6-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 1282 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 1283 // CHECK6-NEXT: ret i32 0 1284 // 1285 // 1286 // CHECK7-LABEL: define {{[^@]+}}@main 1287 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1288 // CHECK7-NEXT: entry: 1289 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1290 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 1291 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 1292 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 1293 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 1294 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 1295 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1296 // CHECK7-NEXT: store double* [[G]], double** [[TMP0]], align 4 1297 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1298 // CHECK7-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 1299 // CHECK7-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 1300 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 1301 // CHECK7-NEXT: ret i32 0 1302 // 1303 // 1304 // CHECK8-LABEL: define {{[^@]+}}@main 1305 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 1306 // CHECK8-NEXT: entry: 1307 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1308 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 1309 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 4 1310 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 1311 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 1312 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 4 1313 // CHECK8-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1314 // CHECK8-NEXT: store double* [[G]], double** [[TMP0]], align 4 1315 // CHECK8-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1316 // CHECK8-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 1317 // CHECK8-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 1318 // CHECK8-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 1319 // CHECK8-NEXT: ret i32 0 1320 // 1321 // 1322 // CHECK9-LABEL: define {{[^@]+}}@main 1323 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1324 // CHECK9-NEXT: entry: 1325 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1326 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 1327 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 1328 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1329 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1330 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1331 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1332 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1333 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1334 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1335 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1336 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1337 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1338 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1339 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1340 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1341 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1342 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 1343 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1344 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1345 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1346 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1347 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1348 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1349 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1350 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1351 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1352 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 1353 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 1354 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1355 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1356 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1357 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1358 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1359 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 1360 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1361 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1362 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1363 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1364 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1365 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1366 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1367 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1368 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1369 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 1370 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 1371 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1372 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 1373 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1374 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1375 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1376 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1377 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 1378 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 1379 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1380 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8 1381 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1382 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 1383 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 1384 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1385 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 1386 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 1387 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1388 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8 1389 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1390 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 1391 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 1392 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1393 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 1394 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 1395 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1396 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8 1397 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1398 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1399 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1400 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1401 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 1402 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 1403 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1404 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8 1405 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1406 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1407 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 1408 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1409 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1410 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1411 // CHECK9: omp_offload.failed: 1412 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 1413 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1414 // CHECK9: omp_offload.cont: 1415 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 1416 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1417 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1418 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1419 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1420 // CHECK9: arraydestroy.body: 1421 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1422 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1423 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1424 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1425 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1426 // CHECK9: arraydestroy.done3: 1427 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1428 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 1429 // CHECK9-NEXT: ret i32 [[TMP39]] 1430 // 1431 // 1432 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1433 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1434 // CHECK9-NEXT: entry: 1435 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1436 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1437 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1438 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1439 // CHECK9-NEXT: ret void 1440 // 1441 // 1442 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1443 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1444 // CHECK9-NEXT: entry: 1445 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1446 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1447 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1448 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1449 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1450 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1451 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1452 // CHECK9-NEXT: ret void 1453 // 1454 // 1455 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106 1456 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1457 // CHECK9-NEXT: entry: 1458 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1459 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1460 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1461 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1462 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1463 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1464 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1465 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1466 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1467 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1468 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1469 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1470 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1471 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1472 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1473 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1474 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1475 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1476 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 1477 // CHECK9-NEXT: ret void 1478 // 1479 // 1480 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1481 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1482 // CHECK9-NEXT: entry: 1483 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1484 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1485 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1486 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1487 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1488 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1489 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1490 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1491 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1492 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1493 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1494 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1495 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1496 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1497 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1498 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1499 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 1500 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1501 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 1502 // CHECK9-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 1503 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1504 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1505 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1506 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1507 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1508 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1509 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1510 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1511 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1512 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1513 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1514 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1515 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1516 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1517 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1518 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1519 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1520 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1521 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 1522 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1523 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1524 // CHECK9: arrayctor.loop: 1525 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1526 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1527 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1528 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1529 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1530 // CHECK9: arrayctor.cont: 1531 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1532 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) 1533 // CHECK9-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 1534 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1535 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1536 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1537 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1538 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 1539 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1540 // CHECK9: cond.true: 1541 // CHECK9-NEXT: br label [[COND_END:%.*]] 1542 // CHECK9: cond.false: 1543 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1544 // CHECK9-NEXT: br label [[COND_END]] 1545 // CHECK9: cond.end: 1546 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 1547 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1548 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1549 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 1550 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1551 // CHECK9: omp.inner.for.cond: 1552 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1553 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1554 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 1555 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1556 // CHECK9: omp.inner.for.cond.cleanup: 1557 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1558 // CHECK9: omp.inner.for.body: 1559 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1560 // CHECK9-NEXT: [[TMP14:%.*]] = zext i32 [[TMP13]] to i64 1561 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1562 // CHECK9-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 1563 // CHECK9-NEXT: [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 1564 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP14]], i64 [[TMP16]], [2 x i32]* [[VEC3]], i32* [[T_VAR2]], [2 x %struct.S]* [[S_ARR4]], %struct.S* [[TMP17]], i32* [[SVAR7]]) 1565 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1566 // CHECK9: omp.inner.for.inc: 1567 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1568 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1569 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1570 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1571 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1572 // CHECK9: omp.inner.for.end: 1573 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1574 // CHECK9: omp.loop.exit: 1575 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1576 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1577 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1578 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1579 // CHECK9-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1580 // CHECK9-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1581 // CHECK9: .omp.lastprivate.then: 1582 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4 1583 // CHECK9-NEXT: store i32 [[TMP24]], i32* [[TMP1]], align 4 1584 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1585 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 1586 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 8, i1 false) 1587 // CHECK9-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 1588 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 1589 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i64 2 1590 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN9]], [[TMP28]] 1591 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1592 // CHECK9: omp.arraycpy.body: 1593 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1594 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1595 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1596 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1597 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false) 1598 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1599 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1600 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]] 1601 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]] 1602 // CHECK9: omp.arraycpy.done10: 1603 // CHECK9-NEXT: [[TMP31:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 1604 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 1605 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP31]] to i8* 1606 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 1607 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[SVAR7]], align 4 1608 // CHECK9-NEXT: store i32 [[TMP34]], i32* [[TMP4]], align 4 1609 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1610 // CHECK9: .omp.lastprivate.done: 1611 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1612 // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 1613 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2 1614 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1615 // CHECK9: arraydestroy.body: 1616 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1617 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1618 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1619 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 1620 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 1621 // CHECK9: arraydestroy.done12: 1622 // CHECK9-NEXT: ret void 1623 // 1624 // 1625 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1626 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1627 // CHECK9-NEXT: entry: 1628 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1629 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1630 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1631 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1632 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1633 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1634 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1635 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1636 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1637 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1638 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1639 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1640 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1641 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1642 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1643 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1644 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1645 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1646 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1647 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1648 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8 1649 // CHECK9-NEXT: [[SVAR8:%.*]] = alloca i32, align 4 1650 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1651 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1652 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1653 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1654 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1655 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1656 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1657 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1658 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1659 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1660 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1661 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1662 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1663 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1664 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1665 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1666 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1667 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1668 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1669 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32 1670 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1671 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 1672 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1673 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1674 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1675 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1676 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1677 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1678 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1679 // CHECK9: arrayctor.loop: 1680 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1681 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1682 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1683 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1684 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1685 // CHECK9: arrayctor.cont: 1686 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1687 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) 1688 // CHECK9-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8 1689 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1690 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1691 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1692 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1693 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1 1694 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1695 // CHECK9: cond.true: 1696 // CHECK9-NEXT: br label [[COND_END:%.*]] 1697 // CHECK9: cond.false: 1698 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1699 // CHECK9-NEXT: br label [[COND_END]] 1700 // CHECK9: cond.end: 1701 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1702 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1703 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1704 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1705 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1706 // CHECK9: omp.inner.for.cond: 1707 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1708 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1709 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1710 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1711 // CHECK9: omp.inner.for.cond.cleanup: 1712 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1713 // CHECK9: omp.inner.for.body: 1714 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1715 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1716 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1717 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1718 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4 1719 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 1720 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1721 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1722 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[ARRAYIDX]], align 4 1723 // CHECK9-NEXT: [[TMP18:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 1724 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4 1725 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP19]] to i64 1726 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 1727 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* 1728 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[TMP18]] to i8* 1729 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i64 4, i1 false) 1730 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1731 // CHECK9: omp.body.continue: 1732 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1733 // CHECK9: omp.inner.for.inc: 1734 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1735 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP22]], 1 1736 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1737 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1738 // CHECK9: omp.inner.for.end: 1739 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1740 // CHECK9: omp.loop.exit: 1741 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1742 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1743 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1744 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1745 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1746 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1747 // CHECK9: .omp.lastprivate.then: 1748 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR3]], align 4 1749 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[TMP1]], align 4 1750 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1751 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1752 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 8, i1 false) 1753 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 1754 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S* 1755 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2 1756 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP31]] 1757 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1758 // CHECK9: omp.arraycpy.body: 1759 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1760 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1761 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1762 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1763 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 1764 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1765 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1766 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]] 1767 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] 1768 // CHECK9: omp.arraycpy.done14: 1769 // CHECK9-NEXT: [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 1770 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 1771 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8* 1772 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false) 1773 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[SVAR8]], align 4 1774 // CHECK9-NEXT: store i32 [[TMP37]], i32* [[TMP4]], align 4 1775 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1776 // CHECK9: .omp.lastprivate.done: 1777 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]] 1778 // CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1779 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 1780 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1781 // CHECK9: arraydestroy.body: 1782 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1783 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1784 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1785 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]] 1786 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]] 1787 // CHECK9: arraydestroy.done16: 1788 // CHECK9-NEXT: ret void 1789 // 1790 // 1791 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1792 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1793 // CHECK9-NEXT: entry: 1794 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1795 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1796 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1797 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1798 // CHECK9-NEXT: ret void 1799 // 1800 // 1801 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1802 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 1803 // CHECK9-NEXT: entry: 1804 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1805 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1806 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1807 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1808 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1809 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1810 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1811 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1812 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1813 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1814 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1815 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1816 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1817 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1818 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1819 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1820 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1821 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1822 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1823 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1824 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1825 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1826 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1827 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1828 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1829 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1830 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1831 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1832 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1833 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1834 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1835 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1836 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1837 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1838 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1839 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1840 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1841 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1842 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1843 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1844 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1845 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1846 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1847 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1848 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1849 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1850 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1851 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1852 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1853 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1854 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1855 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1856 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1857 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8 1858 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1859 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1860 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1861 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1862 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1863 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1864 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1865 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8 1866 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1867 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1868 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 1869 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1870 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1871 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1872 // CHECK9: omp_offload.failed: 1873 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1874 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1875 // CHECK9: omp_offload.cont: 1876 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1877 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1878 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1879 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1880 // CHECK9: arraydestroy.body: 1881 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1882 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1883 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1884 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1885 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1886 // CHECK9: arraydestroy.done2: 1887 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1888 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 1889 // CHECK9-NEXT: ret i32 [[TMP32]] 1890 // 1891 // 1892 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1893 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1894 // CHECK9-NEXT: entry: 1895 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1896 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1897 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1898 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1899 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1900 // CHECK9-NEXT: ret void 1901 // 1902 // 1903 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1904 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1905 // CHECK9-NEXT: entry: 1906 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1907 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1908 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1909 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1910 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1911 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1912 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1913 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1914 // CHECK9-NEXT: ret void 1915 // 1916 // 1917 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1918 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1919 // CHECK9-NEXT: entry: 1920 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1921 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1922 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1923 // CHECK9-NEXT: ret void 1924 // 1925 // 1926 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1927 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1928 // CHECK9-NEXT: entry: 1929 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1930 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1931 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1932 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1933 // CHECK9-NEXT: ret void 1934 // 1935 // 1936 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1937 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1938 // CHECK9-NEXT: entry: 1939 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1940 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1941 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1942 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1943 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1944 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1945 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 1946 // CHECK9-NEXT: ret void 1947 // 1948 // 1949 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1950 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1951 // CHECK9-NEXT: entry: 1952 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1953 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1954 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1955 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1956 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1957 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1958 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1959 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1960 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1961 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1962 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1963 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1964 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1965 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1966 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1967 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 1968 // CHECK9-NEXT: ret void 1969 // 1970 // 1971 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 1972 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1973 // CHECK9-NEXT: entry: 1974 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1975 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1976 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1977 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1978 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1979 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1980 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1981 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1982 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1983 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1984 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1985 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1986 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1987 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1988 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1989 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1990 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1991 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 1992 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1993 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1994 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1995 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1996 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1997 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1998 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1999 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2000 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2001 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2002 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2003 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 2004 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2005 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2006 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2007 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2008 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2009 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2010 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2011 // CHECK9: arrayctor.loop: 2012 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2013 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2014 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2015 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2016 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2017 // CHECK9: arrayctor.cont: 2018 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2019 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) 2020 // CHECK9-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 2021 // CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2022 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2023 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2024 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2025 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 2026 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2027 // CHECK9: cond.true: 2028 // CHECK9-NEXT: br label [[COND_END:%.*]] 2029 // CHECK9: cond.false: 2030 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2031 // CHECK9-NEXT: br label [[COND_END]] 2032 // CHECK9: cond.end: 2033 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2034 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2035 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2036 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 2037 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2038 // CHECK9: omp.inner.for.cond: 2039 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2040 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2041 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2042 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2043 // CHECK9: omp.inner.for.cond.cleanup: 2044 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2045 // CHECK9: omp.inner.for.body: 2046 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2047 // CHECK9-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 2048 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2049 // CHECK9-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 2050 // CHECK9-NEXT: [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 2051 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP13]], i64 [[TMP15]], [2 x i32]* [[VEC3]], i32* [[T_VAR2]], [2 x %struct.S.0]* [[S_ARR4]], %struct.S.0* [[TMP16]]) 2052 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2053 // CHECK9: omp.inner.for.inc: 2054 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2055 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2056 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 2057 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2058 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2059 // CHECK9: omp.inner.for.end: 2060 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2061 // CHECK9: omp.loop.exit: 2062 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2063 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2064 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2065 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2066 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2067 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2068 // CHECK9: .omp.lastprivate.then: 2069 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4 2070 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[TMP1]], align 4 2071 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2072 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2073 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false) 2074 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 2075 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 2076 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 2077 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN8]], [[TMP27]] 2078 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2079 // CHECK9: omp.arraycpy.body: 2080 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2081 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN8]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2082 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2083 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2084 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 4, i1 false) 2085 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2086 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2087 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 2088 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]] 2089 // CHECK9: omp.arraycpy.done9: 2090 // CHECK9-NEXT: [[TMP30:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 2091 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 2092 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP30]] to i8* 2093 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false) 2094 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2095 // CHECK9: .omp.lastprivate.done: 2096 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 2097 // CHECK9-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2098 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 2099 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2100 // CHECK9: arraydestroy.body: 2101 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2102 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2103 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2104 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 2105 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 2106 // CHECK9: arraydestroy.done11: 2107 // CHECK9-NEXT: ret void 2108 // 2109 // 2110 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 2111 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2112 // CHECK9-NEXT: entry: 2113 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2114 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2115 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2116 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2117 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2118 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2119 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2120 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2121 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2122 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2123 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2124 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2125 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2126 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2127 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2128 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2129 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2130 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2131 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2132 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 8 2133 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2134 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2135 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2136 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2137 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2138 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2139 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2140 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2141 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2142 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2143 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2144 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2145 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2146 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 2147 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2148 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2149 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2150 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP4]] to i32 2151 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2152 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32 2153 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2154 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 2155 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2156 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2157 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2158 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2159 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2160 // CHECK9: arrayctor.loop: 2161 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2162 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2163 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2164 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2165 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2166 // CHECK9: arrayctor.cont: 2167 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2168 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) 2169 // CHECK9-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8 2170 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2171 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2172 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2173 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2174 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 2175 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2176 // CHECK9: cond.true: 2177 // CHECK9-NEXT: br label [[COND_END:%.*]] 2178 // CHECK9: cond.false: 2179 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2180 // CHECK9-NEXT: br label [[COND_END]] 2181 // CHECK9: cond.end: 2182 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 2183 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2184 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2185 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 2186 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2187 // CHECK9: omp.inner.for.cond: 2188 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2189 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2190 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2191 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2192 // CHECK9: omp.inner.for.cond.cleanup: 2193 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2194 // CHECK9: omp.inner.for.body: 2195 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2196 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 2197 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2198 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2199 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4 2200 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 2201 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 2202 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 2203 // CHECK9-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4 2204 // CHECK9-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8 2205 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4 2206 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP18]] to i64 2207 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]] 2208 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8* 2209 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8* 2210 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i64 4, i1 false) 2211 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2212 // CHECK9: omp.body.continue: 2213 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2214 // CHECK9: omp.inner.for.inc: 2215 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2216 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1 2217 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 2218 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2219 // CHECK9: omp.inner.for.end: 2220 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2221 // CHECK9: omp.loop.exit: 2222 // CHECK9-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2223 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 2224 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 2225 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2226 // CHECK9-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 2227 // CHECK9-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2228 // CHECK9: .omp.lastprivate.then: 2229 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4 2230 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[TMP1]], align 4 2231 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2232 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2233 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 8, i1 false) 2234 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 2235 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0* 2236 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2 2237 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP30]] 2238 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2239 // CHECK9: omp.arraycpy.body: 2240 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2241 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2242 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2243 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2244 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false) 2245 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2246 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2247 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]] 2248 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 2249 // CHECK9: omp.arraycpy.done13: 2250 // CHECK9-NEXT: [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8 2251 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8* 2252 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8* 2253 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false) 2254 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2255 // CHECK9: .omp.lastprivate.done: 2256 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]] 2257 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2258 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2 2259 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2260 // CHECK9: arraydestroy.body: 2261 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2262 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2263 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2264 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 2265 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 2266 // CHECK9: arraydestroy.done15: 2267 // CHECK9-NEXT: ret void 2268 // 2269 // 2270 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2271 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2272 // CHECK9-NEXT: entry: 2273 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2274 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2275 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2276 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2277 // CHECK9-NEXT: ret void 2278 // 2279 // 2280 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2281 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2282 // CHECK9-NEXT: entry: 2283 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2284 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2285 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2286 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2287 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 2288 // CHECK9-NEXT: ret void 2289 // 2290 // 2291 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2292 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2293 // CHECK9-NEXT: entry: 2294 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2295 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2296 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2297 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2298 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2299 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2300 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2301 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2302 // CHECK9-NEXT: ret void 2303 // 2304 // 2305 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2306 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2307 // CHECK9-NEXT: entry: 2308 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2309 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2310 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2311 // CHECK9-NEXT: ret void 2312 // 2313 // 2314 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2315 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 2316 // CHECK9-NEXT: entry: 2317 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2318 // CHECK9-NEXT: ret void 2319 // 2320 // 2321 // CHECK10-LABEL: define {{[^@]+}}@main 2322 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 2323 // CHECK10-NEXT: entry: 2324 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2325 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 2326 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 2327 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2328 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2329 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2330 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2331 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 2332 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2333 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2334 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 2335 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 2336 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 2337 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 2338 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2339 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2340 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 2341 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 2342 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2343 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 2344 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2345 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 2346 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 2347 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2348 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 2349 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2350 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 2351 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 2352 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 2353 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2354 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2355 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 2356 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2357 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2358 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2359 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 2360 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 2361 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 2362 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2363 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2364 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2365 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2366 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 2367 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2368 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 2369 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 2370 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2371 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8 2372 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2373 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2374 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 2375 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2376 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 2377 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 2378 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2379 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 8 2380 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2381 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2382 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 2383 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2384 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 2385 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 2386 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2387 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8 2388 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2389 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2390 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 2391 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2392 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 2393 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 2394 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 2395 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 8 2396 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2397 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 2398 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 2399 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2400 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 2401 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 2402 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 2403 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 8 2404 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2405 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2406 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 2407 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2408 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2409 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2410 // CHECK10: omp_offload.failed: 2411 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 2412 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 2413 // CHECK10: omp_offload.cont: 2414 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 2415 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2416 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2417 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2418 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2419 // CHECK10: arraydestroy.body: 2420 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2421 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2422 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2423 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2424 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 2425 // CHECK10: arraydestroy.done3: 2426 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2427 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 2428 // CHECK10-NEXT: ret i32 [[TMP39]] 2429 // 2430 // 2431 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2432 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2433 // CHECK10-NEXT: entry: 2434 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2435 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2436 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2437 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2438 // CHECK10-NEXT: ret void 2439 // 2440 // 2441 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2442 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2443 // CHECK10-NEXT: entry: 2444 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2445 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2446 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2447 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2448 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2449 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2450 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 2451 // CHECK10-NEXT: ret void 2452 // 2453 // 2454 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106 2455 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 2456 // CHECK10-NEXT: entry: 2457 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2458 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2459 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 2460 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 2461 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 2462 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2463 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2464 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2465 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2466 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 2467 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 2468 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2469 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2470 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2471 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2472 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 2473 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 2474 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2475 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 2476 // CHECK10-NEXT: ret void 2477 // 2478 // 2479 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 2480 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 2481 // CHECK10-NEXT: entry: 2482 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2483 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2484 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2485 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2486 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 2487 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 2488 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 2489 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2490 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2491 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2492 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2493 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2494 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2495 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2496 // CHECK10-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2497 // CHECK10-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2498 // CHECK10-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 2499 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2500 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 2501 // CHECK10-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 2502 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2503 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2504 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2505 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2506 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2507 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2508 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 2509 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 2510 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2511 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2512 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2513 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2514 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 2515 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 2516 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2517 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2518 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2519 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2520 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 2521 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2522 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2523 // CHECK10: arrayctor.loop: 2524 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2525 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2526 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 2527 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2528 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2529 // CHECK10: arrayctor.cont: 2530 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2531 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) 2532 // CHECK10-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 2533 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2534 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2535 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2536 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2537 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 2538 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2539 // CHECK10: cond.true: 2540 // CHECK10-NEXT: br label [[COND_END:%.*]] 2541 // CHECK10: cond.false: 2542 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2543 // CHECK10-NEXT: br label [[COND_END]] 2544 // CHECK10: cond.end: 2545 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 2546 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2547 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2548 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 2549 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2550 // CHECK10: omp.inner.for.cond: 2551 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2552 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2553 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 2554 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2555 // CHECK10: omp.inner.for.cond.cleanup: 2556 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2557 // CHECK10: omp.inner.for.body: 2558 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2559 // CHECK10-NEXT: [[TMP14:%.*]] = zext i32 [[TMP13]] to i64 2560 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2561 // CHECK10-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 2562 // CHECK10-NEXT: [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 2563 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP14]], i64 [[TMP16]], [2 x i32]* [[VEC3]], i32* [[T_VAR2]], [2 x %struct.S]* [[S_ARR4]], %struct.S* [[TMP17]], i32* [[SVAR7]]) 2564 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2565 // CHECK10: omp.inner.for.inc: 2566 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2567 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2568 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 2569 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2570 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2571 // CHECK10: omp.inner.for.end: 2572 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2573 // CHECK10: omp.loop.exit: 2574 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2575 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 2576 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 2577 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2578 // CHECK10-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 2579 // CHECK10-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2580 // CHECK10: .omp.lastprivate.then: 2581 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4 2582 // CHECK10-NEXT: store i32 [[TMP24]], i32* [[TMP1]], align 4 2583 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2584 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2585 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 8, i1 false) 2586 // CHECK10-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 2587 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 2588 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i64 2 2589 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN9]], [[TMP28]] 2590 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2591 // CHECK10: omp.arraycpy.body: 2592 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2593 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2594 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2595 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2596 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false) 2597 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2598 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2599 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]] 2600 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]] 2601 // CHECK10: omp.arraycpy.done10: 2602 // CHECK10-NEXT: [[TMP31:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 2603 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 2604 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP31]] to i8* 2605 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 2606 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[SVAR7]], align 4 2607 // CHECK10-NEXT: store i32 [[TMP34]], i32* [[TMP4]], align 4 2608 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2609 // CHECK10: .omp.lastprivate.done: 2610 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 2611 // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 2612 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2 2613 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2614 // CHECK10: arraydestroy.body: 2615 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2616 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2617 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2618 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 2619 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 2620 // CHECK10: arraydestroy.done12: 2621 // CHECK10-NEXT: ret void 2622 // 2623 // 2624 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2625 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 2626 // CHECK10-NEXT: entry: 2627 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2628 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2629 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2630 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2631 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2632 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2633 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 2634 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 2635 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 2636 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2637 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2638 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2639 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2640 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2641 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2642 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2643 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2644 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2645 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 2646 // CHECK10-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2647 // CHECK10-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8 2648 // CHECK10-NEXT: [[SVAR8:%.*]] = alloca i32, align 4 2649 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2650 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2651 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2652 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2653 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2654 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2655 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2656 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2657 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 2658 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 2659 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2660 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2661 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2662 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2663 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 2664 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 2665 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2666 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2667 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2668 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32 2669 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2670 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 2671 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2672 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 2673 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2674 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2675 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 2676 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2677 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2678 // CHECK10: arrayctor.loop: 2679 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2680 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2681 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 2682 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2683 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2684 // CHECK10: arrayctor.cont: 2685 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2686 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) 2687 // CHECK10-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8 2688 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2689 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2690 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2691 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2692 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1 2693 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2694 // CHECK10: cond.true: 2695 // CHECK10-NEXT: br label [[COND_END:%.*]] 2696 // CHECK10: cond.false: 2697 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2698 // CHECK10-NEXT: br label [[COND_END]] 2699 // CHECK10: cond.end: 2700 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2701 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2702 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2703 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2704 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2705 // CHECK10: omp.inner.for.cond: 2706 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2707 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2708 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2709 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2710 // CHECK10: omp.inner.for.cond.cleanup: 2711 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2712 // CHECK10: omp.inner.for.body: 2713 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2714 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2715 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2716 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2717 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4 2718 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 2719 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 2720 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 2721 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[ARRAYIDX]], align 4 2722 // CHECK10-NEXT: [[TMP18:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 2723 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4 2724 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP19]] to i64 2725 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 2726 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* 2727 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[TMP18]] to i8* 2728 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i64 4, i1 false) 2729 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2730 // CHECK10: omp.body.continue: 2731 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2732 // CHECK10: omp.inner.for.inc: 2733 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2734 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP22]], 1 2735 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 2736 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2737 // CHECK10: omp.inner.for.end: 2738 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2739 // CHECK10: omp.loop.exit: 2740 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2741 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2742 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2743 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2744 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2745 // CHECK10-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2746 // CHECK10: .omp.lastprivate.then: 2747 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR3]], align 4 2748 // CHECK10-NEXT: store i32 [[TMP27]], i32* [[TMP1]], align 4 2749 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2750 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2751 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 8, i1 false) 2752 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 2753 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S* 2754 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2 2755 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP31]] 2756 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2757 // CHECK10: omp.arraycpy.body: 2758 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2759 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2760 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2761 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2762 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 2763 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2764 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2765 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]] 2766 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] 2767 // CHECK10: omp.arraycpy.done14: 2768 // CHECK10-NEXT: [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 2769 // CHECK10-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 2770 // CHECK10-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8* 2771 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false) 2772 // CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[SVAR8]], align 4 2773 // CHECK10-NEXT: store i32 [[TMP37]], i32* [[TMP4]], align 4 2774 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2775 // CHECK10: .omp.lastprivate.done: 2776 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]] 2777 // CHECK10-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 2778 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 2779 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2780 // CHECK10: arraydestroy.body: 2781 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2782 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2783 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2784 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]] 2785 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]] 2786 // CHECK10: arraydestroy.done16: 2787 // CHECK10-NEXT: ret void 2788 // 2789 // 2790 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2791 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2792 // CHECK10-NEXT: entry: 2793 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2794 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2795 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2796 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2797 // CHECK10-NEXT: ret void 2798 // 2799 // 2800 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2801 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 2802 // CHECK10-NEXT: entry: 2803 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2804 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2805 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2806 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2807 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2808 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 2809 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2810 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2811 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 2812 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 2813 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 2814 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2815 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 2816 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 2817 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2818 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2819 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 2820 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 2821 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 2822 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 2823 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 2824 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 2825 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 2826 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2827 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2828 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 2829 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2830 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2831 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2832 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2833 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2834 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2835 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 2836 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2837 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2838 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 2839 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2840 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 2841 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2842 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 2843 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 2844 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2845 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2846 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 2847 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2848 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 2849 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2850 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 2851 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 2852 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2853 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 2854 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 2855 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2856 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 8 2857 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2858 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 2859 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 2860 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2861 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 2862 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 2863 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 2864 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 8 2865 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2866 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2867 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 2868 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2869 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 2870 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2871 // CHECK10: omp_offload.failed: 2872 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 2873 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 2874 // CHECK10: omp_offload.cont: 2875 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 2876 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2877 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2878 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2879 // CHECK10: arraydestroy.body: 2880 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2881 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2882 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2883 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2884 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2885 // CHECK10: arraydestroy.done2: 2886 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2887 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 2888 // CHECK10-NEXT: ret i32 [[TMP32]] 2889 // 2890 // 2891 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2892 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2893 // CHECK10-NEXT: entry: 2894 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2895 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2896 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2897 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2898 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 2899 // CHECK10-NEXT: ret void 2900 // 2901 // 2902 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2903 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2904 // CHECK10-NEXT: entry: 2905 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2906 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2907 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2908 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2909 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2910 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2911 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2912 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 2913 // CHECK10-NEXT: ret void 2914 // 2915 // 2916 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2917 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2918 // CHECK10-NEXT: entry: 2919 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2920 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2921 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2922 // CHECK10-NEXT: ret void 2923 // 2924 // 2925 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2926 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2927 // CHECK10-NEXT: entry: 2928 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2929 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2930 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2931 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2932 // CHECK10-NEXT: ret void 2933 // 2934 // 2935 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2936 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2937 // CHECK10-NEXT: entry: 2938 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2939 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2940 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2941 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2942 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2943 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2944 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 2945 // CHECK10-NEXT: ret void 2946 // 2947 // 2948 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2949 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2950 // CHECK10-NEXT: entry: 2951 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2952 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2953 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2954 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2955 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2956 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2957 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2958 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2959 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2960 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2961 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2962 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2963 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2964 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2965 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2966 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 2967 // CHECK10-NEXT: ret void 2968 // 2969 // 2970 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 2971 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2972 // CHECK10-NEXT: entry: 2973 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2974 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2975 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2976 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2977 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2978 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2979 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2980 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2981 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2982 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2983 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2984 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2985 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2986 // CHECK10-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2987 // CHECK10-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2988 // CHECK10-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2989 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2990 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 2991 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2992 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2993 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2994 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2995 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2996 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2997 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2998 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2999 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 3000 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3001 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 3002 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 3003 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3004 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3005 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3006 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3007 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3008 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3009 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3010 // CHECK10: arrayctor.loop: 3011 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3012 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3013 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3014 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3015 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3016 // CHECK10: arrayctor.cont: 3017 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3018 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) 3019 // CHECK10-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 3020 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3021 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3022 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3023 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3024 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 3025 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3026 // CHECK10: cond.true: 3027 // CHECK10-NEXT: br label [[COND_END:%.*]] 3028 // CHECK10: cond.false: 3029 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3030 // CHECK10-NEXT: br label [[COND_END]] 3031 // CHECK10: cond.end: 3032 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3033 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3034 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3035 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 3036 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3037 // CHECK10: omp.inner.for.cond: 3038 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3039 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3040 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3041 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3042 // CHECK10: omp.inner.for.cond.cleanup: 3043 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3044 // CHECK10: omp.inner.for.body: 3045 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3046 // CHECK10-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 3047 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3048 // CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 3049 // CHECK10-NEXT: [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 3050 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP13]], i64 [[TMP15]], [2 x i32]* [[VEC3]], i32* [[T_VAR2]], [2 x %struct.S.0]* [[S_ARR4]], %struct.S.0* [[TMP16]]) 3051 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3052 // CHECK10: omp.inner.for.inc: 3053 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3054 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3055 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 3056 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3057 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3058 // CHECK10: omp.inner.for.end: 3059 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3060 // CHECK10: omp.loop.exit: 3061 // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3062 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3063 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3064 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3065 // CHECK10-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 3066 // CHECK10-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3067 // CHECK10: .omp.lastprivate.then: 3068 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4 3069 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[TMP1]], align 4 3070 // CHECK10-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3071 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3072 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false) 3073 // CHECK10-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 3074 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 3075 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 3076 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN8]], [[TMP27]] 3077 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3078 // CHECK10: omp.arraycpy.body: 3079 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3080 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN8]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3081 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3082 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3083 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 4, i1 false) 3084 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3085 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3086 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 3087 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]] 3088 // CHECK10: omp.arraycpy.done9: 3089 // CHECK10-NEXT: [[TMP30:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 3090 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 3091 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP30]] to i8* 3092 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false) 3093 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3094 // CHECK10: .omp.lastprivate.done: 3095 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3096 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3097 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 3098 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3099 // CHECK10: arraydestroy.body: 3100 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3101 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3102 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3103 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3104 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3105 // CHECK10: arraydestroy.done11: 3106 // CHECK10-NEXT: ret void 3107 // 3108 // 3109 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 3110 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3111 // CHECK10-NEXT: entry: 3112 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3113 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3114 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3115 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3116 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 3117 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 3118 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 3119 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 3120 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3121 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3122 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3123 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3124 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3125 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3126 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3127 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 3128 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3129 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 3130 // CHECK10-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3131 // CHECK10-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 8 3132 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3133 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3134 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3135 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3136 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3137 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 3138 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 3139 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3140 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 3141 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 3142 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 3143 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3144 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 3145 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 3146 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3147 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3148 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3149 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP4]] to i32 3150 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3151 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32 3152 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3153 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 3154 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3155 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3156 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3157 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3158 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3159 // CHECK10: arrayctor.loop: 3160 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3161 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3162 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3163 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3164 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3165 // CHECK10: arrayctor.cont: 3166 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3167 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) 3168 // CHECK10-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8 3169 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3170 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3171 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3172 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3173 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 3174 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3175 // CHECK10: cond.true: 3176 // CHECK10-NEXT: br label [[COND_END:%.*]] 3177 // CHECK10: cond.false: 3178 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3179 // CHECK10-NEXT: br label [[COND_END]] 3180 // CHECK10: cond.end: 3181 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 3182 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3183 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3184 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 3185 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3186 // CHECK10: omp.inner.for.cond: 3187 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3188 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3189 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 3190 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3191 // CHECK10: omp.inner.for.cond.cleanup: 3192 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3193 // CHECK10: omp.inner.for.body: 3194 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3195 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 3196 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3197 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3198 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4 3199 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 3200 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 3201 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 3202 // CHECK10-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4 3203 // CHECK10-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8 3204 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4 3205 // CHECK10-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP18]] to i64 3206 // CHECK10-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]] 3207 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8* 3208 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8* 3209 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i64 4, i1 false) 3210 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3211 // CHECK10: omp.body.continue: 3212 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3213 // CHECK10: omp.inner.for.inc: 3214 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3215 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1 3216 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 3217 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3218 // CHECK10: omp.inner.for.end: 3219 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3220 // CHECK10: omp.loop.exit: 3221 // CHECK10-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3222 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 3223 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 3224 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3225 // CHECK10-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 3226 // CHECK10-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3227 // CHECK10: .omp.lastprivate.then: 3228 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4 3229 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[TMP1]], align 4 3230 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3231 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3232 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 8, i1 false) 3233 // CHECK10-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 3234 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0* 3235 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2 3236 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP30]] 3237 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3238 // CHECK10: omp.arraycpy.body: 3239 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3240 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3241 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3242 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3243 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false) 3244 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3245 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3246 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]] 3247 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 3248 // CHECK10: omp.arraycpy.done13: 3249 // CHECK10-NEXT: [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8 3250 // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8* 3251 // CHECK10-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8* 3252 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false) 3253 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3254 // CHECK10: .omp.lastprivate.done: 3255 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]] 3256 // CHECK10-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3257 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2 3258 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3259 // CHECK10: arraydestroy.body: 3260 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3261 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3262 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3263 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 3264 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 3265 // CHECK10: arraydestroy.done15: 3266 // CHECK10-NEXT: ret void 3267 // 3268 // 3269 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3270 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3271 // CHECK10-NEXT: entry: 3272 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3273 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3274 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3275 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3276 // CHECK10-NEXT: ret void 3277 // 3278 // 3279 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3280 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3281 // CHECK10-NEXT: entry: 3282 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3283 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3284 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3285 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3286 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 3287 // CHECK10-NEXT: ret void 3288 // 3289 // 3290 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3291 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3292 // CHECK10-NEXT: entry: 3293 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3294 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3295 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3296 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3297 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3298 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3299 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3300 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3301 // CHECK10-NEXT: ret void 3302 // 3303 // 3304 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3305 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3306 // CHECK10-NEXT: entry: 3307 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3308 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3309 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3310 // CHECK10-NEXT: ret void 3311 // 3312 // 3313 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3314 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 3315 // CHECK10-NEXT: entry: 3316 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 3317 // CHECK10-NEXT: ret void 3318 // 3319 // 3320 // CHECK11-LABEL: define {{[^@]+}}@main 3321 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 3322 // CHECK11-NEXT: entry: 3323 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3324 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 3325 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 3326 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3327 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3328 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3329 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3330 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 3331 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3332 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3333 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 3334 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 3335 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 3336 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 3337 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3338 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3339 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 3340 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 3341 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3342 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 3343 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3344 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 3345 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3346 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3347 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 3348 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3349 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 3350 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 3351 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 3352 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3353 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3354 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3355 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3356 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 3357 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 3358 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 3359 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3360 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3361 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3362 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3363 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3364 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3365 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 3366 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 3367 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3368 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 3369 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3370 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3371 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3372 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3373 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 3374 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 3375 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3376 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4 3377 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3378 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 3379 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 3380 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3381 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 3382 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 3383 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3384 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4 3385 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3386 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 3387 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 3388 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3389 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 3390 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 3391 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3392 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4 3393 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3394 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 3395 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 3396 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3397 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 3398 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 3399 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 3400 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4 3401 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3402 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3403 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 3404 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3405 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 3406 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3407 // CHECK11: omp_offload.failed: 3408 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 3409 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 3410 // CHECK11: omp_offload.cont: 3411 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 3412 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3413 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3414 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3415 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3416 // CHECK11: arraydestroy.body: 3417 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3418 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3419 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3420 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3421 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3422 // CHECK11: arraydestroy.done2: 3423 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3424 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 3425 // CHECK11-NEXT: ret i32 [[TMP39]] 3426 // 3427 // 3428 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3429 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3430 // CHECK11-NEXT: entry: 3431 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3432 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3433 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3434 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3435 // CHECK11-NEXT: ret void 3436 // 3437 // 3438 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3439 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3440 // CHECK11-NEXT: entry: 3441 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3442 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3443 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3444 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3445 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3446 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3447 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3448 // CHECK11-NEXT: ret void 3449 // 3450 // 3451 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106 3452 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 3453 // CHECK11-NEXT: entry: 3454 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3455 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3456 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3457 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3458 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3459 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3460 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3461 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3462 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3463 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3464 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3465 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3466 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3467 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3468 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3469 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3470 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 3471 // CHECK11-NEXT: ret void 3472 // 3473 // 3474 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 3475 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 3476 // CHECK11-NEXT: entry: 3477 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3478 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3479 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3480 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3481 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3482 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3483 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 3484 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3485 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3486 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3487 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3488 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3489 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3490 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3491 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3492 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3493 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 3494 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3495 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 3496 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 3497 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3498 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3499 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3500 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3501 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3502 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3503 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3504 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 3505 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3506 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3507 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3508 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3509 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 3510 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 3511 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3512 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3513 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3514 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3515 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3516 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3517 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3518 // CHECK11: arrayctor.loop: 3519 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3520 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3521 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3522 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3523 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3524 // CHECK11: arrayctor.cont: 3525 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3526 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) 3527 // CHECK11-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 3528 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3529 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3530 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3531 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3532 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 3533 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3534 // CHECK11: cond.true: 3535 // CHECK11-NEXT: br label [[COND_END:%.*]] 3536 // CHECK11: cond.false: 3537 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3538 // CHECK11-NEXT: br label [[COND_END]] 3539 // CHECK11: cond.end: 3540 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 3541 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3542 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3543 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 3544 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3545 // CHECK11: omp.inner.for.cond: 3546 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3547 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3548 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 3549 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3550 // CHECK11: omp.inner.for.cond.cleanup: 3551 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3552 // CHECK11: omp.inner.for.body: 3553 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3554 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3555 // CHECK11-NEXT: [[TMP15:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3556 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP13]], i32 [[TMP14]], [2 x i32]* [[VEC3]], i32* [[T_VAR2]], [2 x %struct.S]* [[S_ARR4]], %struct.S* [[TMP15]], i32* [[SVAR7]]) 3557 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3558 // CHECK11: omp.inner.for.inc: 3559 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3560 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3561 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 3562 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3563 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3564 // CHECK11: omp.inner.for.end: 3565 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3566 // CHECK11: omp.loop.exit: 3567 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3568 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 3569 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 3570 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3571 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 3572 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3573 // CHECK11: .omp.lastprivate.then: 3574 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR2]], align 4 3575 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[TMP1]], align 4 3576 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3577 // CHECK11-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3578 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP23]], i8* align 4 [[TMP24]], i32 8, i1 false) 3579 // CHECK11-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 3580 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 3581 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i32 2 3582 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN9]], [[TMP26]] 3583 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3584 // CHECK11: omp.arraycpy.body: 3585 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP25]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3586 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3587 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3588 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3589 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false) 3590 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3591 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3592 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]] 3593 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]] 3594 // CHECK11: omp.arraycpy.done10: 3595 // CHECK11-NEXT: [[TMP29:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3596 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 3597 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[TMP29]] to i8* 3598 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false) 3599 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[SVAR7]], align 4 3600 // CHECK11-NEXT: store i32 [[TMP32]], i32* [[TMP4]], align 4 3601 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3602 // CHECK11: .omp.lastprivate.done: 3603 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3604 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3605 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 3606 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3607 // CHECK11: arraydestroy.body: 3608 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP33]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3609 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3610 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3611 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 3612 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 3613 // CHECK11: arraydestroy.done12: 3614 // CHECK11-NEXT: ret void 3615 // 3616 // 3617 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 3618 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 3619 // CHECK11-NEXT: entry: 3620 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3621 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3622 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3623 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3624 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3625 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3626 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3627 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3628 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 3629 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3630 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3631 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3632 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3633 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3634 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3635 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3636 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3637 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3638 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 3639 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3640 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 3641 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 3642 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3643 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3644 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3645 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3646 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3647 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3648 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3649 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3650 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3651 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 3652 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3653 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3654 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3655 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3656 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 3657 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 3658 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3659 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3660 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3661 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3662 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4 3663 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3664 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3665 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3666 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3667 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3668 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3669 // CHECK11: arrayctor.loop: 3670 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3671 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3672 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3673 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3674 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3675 // CHECK11: arrayctor.cont: 3676 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3677 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) 3678 // CHECK11-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 3679 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3680 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 3681 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3682 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3683 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1 3684 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3685 // CHECK11: cond.true: 3686 // CHECK11-NEXT: br label [[COND_END:%.*]] 3687 // CHECK11: cond.false: 3688 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3689 // CHECK11-NEXT: br label [[COND_END]] 3690 // CHECK11: cond.end: 3691 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 3692 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3693 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3694 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 3695 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3696 // CHECK11: omp.inner.for.cond: 3697 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3698 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3699 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3700 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3701 // CHECK11: omp.inner.for.cond.cleanup: 3702 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3703 // CHECK11: omp.inner.for.body: 3704 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3705 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 3706 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3707 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3708 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4 3709 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 3710 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP17]] 3711 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[ARRAYIDX]], align 4 3712 // CHECK11-NEXT: [[TMP18:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3713 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4 3714 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP19]] 3715 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* 3716 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[TMP18]] to i8* 3717 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i32 4, i1 false) 3718 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3719 // CHECK11: omp.body.continue: 3720 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3721 // CHECK11: omp.inner.for.inc: 3722 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3723 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP22]], 1 3724 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 3725 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3726 // CHECK11: omp.inner.for.end: 3727 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3728 // CHECK11: omp.loop.exit: 3729 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3730 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 3731 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 3732 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3733 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3734 // CHECK11-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3735 // CHECK11: .omp.lastprivate.then: 3736 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR2]], align 4 3737 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[TMP1]], align 4 3738 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3739 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3740 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 8, i1 false) 3741 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 3742 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 3743 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 3744 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP31]] 3745 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3746 // CHECK11: omp.arraycpy.body: 3747 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3748 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3749 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3750 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3751 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false) 3752 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3753 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3754 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]] 3755 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 3756 // CHECK11: omp.arraycpy.done12: 3757 // CHECK11-NEXT: [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3758 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 3759 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8* 3760 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i32 4, i1 false) 3761 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[SVAR7]], align 4 3762 // CHECK11-NEXT: store i32 [[TMP37]], i32* [[TMP4]], align 4 3763 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3764 // CHECK11: .omp.lastprivate.done: 3765 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3766 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3767 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 3768 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3769 // CHECK11: arraydestroy.body: 3770 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3771 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3772 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3773 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 3774 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 3775 // CHECK11: arraydestroy.done14: 3776 // CHECK11-NEXT: ret void 3777 // 3778 // 3779 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3780 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3781 // CHECK11-NEXT: entry: 3782 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3783 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3784 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3785 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3786 // CHECK11-NEXT: ret void 3787 // 3788 // 3789 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3790 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 3791 // CHECK11-NEXT: entry: 3792 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3793 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3794 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3795 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3796 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3797 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3798 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3799 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3800 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3801 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3802 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3803 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3804 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3805 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 3806 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3807 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3808 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3809 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 3810 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3811 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 3812 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3813 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 3814 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 3815 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3816 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3817 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3818 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3819 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3820 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3821 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3822 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3823 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 3824 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3825 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3826 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3827 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3828 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 3829 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3830 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 3831 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 3832 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3833 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3834 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3835 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3836 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 3837 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3838 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 3839 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 3840 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3841 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 3842 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 3843 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3844 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 3845 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3846 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 3847 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 3848 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3849 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 3850 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 3851 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3852 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 3853 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3854 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3855 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 3856 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3857 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 3858 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3859 // CHECK11: omp_offload.failed: 3860 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 3861 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 3862 // CHECK11: omp_offload.cont: 3863 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 3864 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3865 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3866 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3867 // CHECK11: arraydestroy.body: 3868 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3869 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3870 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3871 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3872 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3873 // CHECK11: arraydestroy.done2: 3874 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3875 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 3876 // CHECK11-NEXT: ret i32 [[TMP32]] 3877 // 3878 // 3879 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3880 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3881 // CHECK11-NEXT: entry: 3882 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3883 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3884 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3885 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3886 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 3887 // CHECK11-NEXT: ret void 3888 // 3889 // 3890 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3891 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3892 // CHECK11-NEXT: entry: 3893 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3894 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3895 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3896 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3897 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3898 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3899 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3900 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 3901 // CHECK11-NEXT: ret void 3902 // 3903 // 3904 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3905 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3906 // CHECK11-NEXT: entry: 3907 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3908 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3909 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3910 // CHECK11-NEXT: ret void 3911 // 3912 // 3913 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3914 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3915 // CHECK11-NEXT: entry: 3916 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3917 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3918 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3919 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3920 // CHECK11-NEXT: ret void 3921 // 3922 // 3923 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3924 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3925 // CHECK11-NEXT: entry: 3926 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3927 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3928 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3929 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3930 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3931 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3932 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3933 // CHECK11-NEXT: ret void 3934 // 3935 // 3936 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 3937 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3938 // CHECK11-NEXT: entry: 3939 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3940 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3941 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3942 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3943 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3944 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3945 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3946 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3947 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3948 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3949 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3950 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3951 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3952 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3953 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 3954 // CHECK11-NEXT: ret void 3955 // 3956 // 3957 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 3958 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3959 // CHECK11-NEXT: entry: 3960 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3961 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3962 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3963 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3964 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3965 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3966 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3967 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3968 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3969 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3970 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3971 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3972 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3973 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3974 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3975 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 3976 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3977 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 3978 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3979 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3980 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3981 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3982 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3983 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3984 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3985 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3986 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3987 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3988 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3989 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 3990 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3991 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3992 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3993 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3994 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3995 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3996 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3997 // CHECK11: arrayctor.loop: 3998 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3999 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4000 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 4001 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4002 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4003 // CHECK11: arrayctor.cont: 4004 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4005 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) 4006 // CHECK11-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 4007 // CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4008 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 4009 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4010 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4011 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 4012 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4013 // CHECK11: cond.true: 4014 // CHECK11-NEXT: br label [[COND_END:%.*]] 4015 // CHECK11: cond.false: 4016 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4017 // CHECK11-NEXT: br label [[COND_END]] 4018 // CHECK11: cond.end: 4019 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 4020 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4021 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4022 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 4023 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4024 // CHECK11: omp.inner.for.cond: 4025 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4026 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4027 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 4028 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4029 // CHECK11: omp.inner.for.cond.cleanup: 4030 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4031 // CHECK11: omp.inner.for.body: 4032 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4033 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4034 // CHECK11-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 4035 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP12]], i32 [[TMP13]], [2 x i32]* [[VEC3]], i32* [[T_VAR2]], [2 x %struct.S.0]* [[S_ARR4]], %struct.S.0* [[TMP14]]) 4036 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4037 // CHECK11: omp.inner.for.inc: 4038 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4039 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4040 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 4041 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4042 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 4043 // CHECK11: omp.inner.for.end: 4044 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4045 // CHECK11: omp.loop.exit: 4046 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4047 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 4048 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 4049 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4050 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 4051 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 4052 // CHECK11: .omp.lastprivate.then: 4053 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR2]], align 4 4054 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[TMP1]], align 4 4055 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 4056 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 4057 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i32 8, i1 false) 4058 // CHECK11-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 4059 // CHECK11-NEXT: [[TMP24:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 4060 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i32 2 4061 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN8]], [[TMP25]] 4062 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4063 // CHECK11: omp.arraycpy.body: 4064 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP24]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4065 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN8]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4066 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4067 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4068 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false) 4069 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4070 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4071 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]] 4072 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]] 4073 // CHECK11: omp.arraycpy.done9: 4074 // CHECK11-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 4075 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 4076 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[TMP28]] to i8* 4077 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false) 4078 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 4079 // CHECK11: .omp.lastprivate.done: 4080 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4081 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4082 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 4083 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4084 // CHECK11: arraydestroy.body: 4085 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4086 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4087 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4088 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 4089 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 4090 // CHECK11: arraydestroy.done11: 4091 // CHECK11-NEXT: ret void 4092 // 4093 // 4094 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 4095 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 4096 // CHECK11-NEXT: entry: 4097 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4098 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4099 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4100 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4101 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4102 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 4103 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 4104 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 4105 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4106 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4107 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4108 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4109 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4110 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4111 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4112 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4113 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4114 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 4115 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4116 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 4117 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4118 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4119 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4120 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4121 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4122 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4123 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 4124 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4125 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 4126 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4127 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 4128 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4129 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 4130 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 4131 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4132 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4133 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4134 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4135 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_LB]], align 4 4136 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 4137 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4138 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4139 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4140 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4141 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4142 // CHECK11: arrayctor.loop: 4143 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4144 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4145 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 4146 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4147 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4148 // CHECK11: arrayctor.cont: 4149 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4150 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) 4151 // CHECK11-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 4152 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4153 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4154 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4155 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4156 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 4157 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4158 // CHECK11: cond.true: 4159 // CHECK11-NEXT: br label [[COND_END:%.*]] 4160 // CHECK11: cond.false: 4161 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4162 // CHECK11-NEXT: br label [[COND_END]] 4163 // CHECK11: cond.end: 4164 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 4165 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4166 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4167 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 4168 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4169 // CHECK11: omp.inner.for.cond: 4170 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4171 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4172 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 4173 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4174 // CHECK11: omp.inner.for.cond.cleanup: 4175 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4176 // CHECK11: omp.inner.for.body: 4177 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4178 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 4179 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4180 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4181 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR2]], align 4 4182 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 4183 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP16]] 4184 // CHECK11-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4 4185 // CHECK11-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 4186 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4 4187 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP18]] 4188 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 4189 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8* 4190 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i32 4, i1 false) 4191 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4192 // CHECK11: omp.body.continue: 4193 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4194 // CHECK11: omp.inner.for.inc: 4195 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4196 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1 4197 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 4198 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 4199 // CHECK11: omp.inner.for.end: 4200 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4201 // CHECK11: omp.loop.exit: 4202 // CHECK11-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4203 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 4204 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 4205 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4206 // CHECK11-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 4207 // CHECK11-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 4208 // CHECK11: .omp.lastprivate.then: 4209 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR2]], align 4 4210 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[TMP1]], align 4 4211 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 4212 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 4213 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 8, i1 false) 4214 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 4215 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 4216 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 4217 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP30]] 4218 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4219 // CHECK11: omp.arraycpy.body: 4220 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4221 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4222 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4223 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4224 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false) 4225 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4226 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4227 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]] 4228 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 4229 // CHECK11: omp.arraycpy.done11: 4230 // CHECK11-NEXT: [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 4231 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8* 4232 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8* 4233 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i32 4, i1 false) 4234 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 4235 // CHECK11: .omp.lastprivate.done: 4236 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4237 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4238 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 4239 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4240 // CHECK11: arraydestroy.body: 4241 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4242 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4243 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4244 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 4245 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 4246 // CHECK11: arraydestroy.done13: 4247 // CHECK11-NEXT: ret void 4248 // 4249 // 4250 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4251 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4252 // CHECK11-NEXT: entry: 4253 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4254 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4255 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4256 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4257 // CHECK11-NEXT: ret void 4258 // 4259 // 4260 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4261 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4262 // CHECK11-NEXT: entry: 4263 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4264 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4265 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4266 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4267 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 4268 // CHECK11-NEXT: ret void 4269 // 4270 // 4271 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4272 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4273 // CHECK11-NEXT: entry: 4274 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4275 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4276 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4277 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4278 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4279 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4280 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4281 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4282 // CHECK11-NEXT: ret void 4283 // 4284 // 4285 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4286 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4287 // CHECK11-NEXT: entry: 4288 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4289 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4290 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4291 // CHECK11-NEXT: ret void 4292 // 4293 // 4294 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4295 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 4296 // CHECK11-NEXT: entry: 4297 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 4298 // CHECK11-NEXT: ret void 4299 // 4300 // 4301 // CHECK12-LABEL: define {{[^@]+}}@main 4302 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 4303 // CHECK12-NEXT: entry: 4304 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4305 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 4306 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 4307 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4308 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4309 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4310 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4311 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4312 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4313 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 4314 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 4315 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 4316 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 4317 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 4318 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4319 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4320 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 4321 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 4322 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 4323 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 4324 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4325 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4326 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4327 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 4328 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4329 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 4330 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4331 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4332 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 4333 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 4334 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 4335 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 4336 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4337 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 4338 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 4339 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 4340 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4341 // CHECK12-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4342 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4343 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4344 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4345 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4346 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 4347 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 4348 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4349 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4 4350 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4351 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 4352 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 4353 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4354 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 4355 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 4356 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4357 // CHECK12-NEXT: store i8* null, i8** [[TMP18]], align 4 4358 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4359 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 4360 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 4361 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4362 // CHECK12-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 4363 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 4364 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4365 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4 4366 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4367 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 4368 // CHECK12-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 4369 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4370 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 4371 // CHECK12-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 4372 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4373 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4 4374 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 4375 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 4376 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 4377 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 4378 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 4379 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 4380 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 4381 // CHECK12-NEXT: store i8* null, i8** [[TMP33]], align 4 4382 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4383 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4384 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 4385 // CHECK12-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4386 // CHECK12-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 4387 // CHECK12-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4388 // CHECK12: omp_offload.failed: 4389 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 4390 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 4391 // CHECK12: omp_offload.cont: 4392 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 4393 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4394 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4395 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4396 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4397 // CHECK12: arraydestroy.body: 4398 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4399 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4400 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4401 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4402 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 4403 // CHECK12: arraydestroy.done2: 4404 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4405 // CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 4406 // CHECK12-NEXT: ret i32 [[TMP39]] 4407 // 4408 // 4409 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4410 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4411 // CHECK12-NEXT: entry: 4412 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4413 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4414 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4415 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 4416 // CHECK12-NEXT: ret void 4417 // 4418 // 4419 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4420 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4421 // CHECK12-NEXT: entry: 4422 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4423 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4424 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4425 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4426 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4427 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4428 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 4429 // CHECK12-NEXT: ret void 4430 // 4431 // 4432 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106 4433 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 4434 // CHECK12-NEXT: entry: 4435 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 4436 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4437 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 4438 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 4439 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 4440 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4441 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 4442 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4443 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4444 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 4445 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 4446 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4447 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4448 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 4449 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 4450 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4451 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 4452 // CHECK12-NEXT: ret void 4453 // 4454 // 4455 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 4456 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 4457 // CHECK12-NEXT: entry: 4458 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4459 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4460 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4461 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 4462 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 4463 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 4464 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 4465 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4466 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4467 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4468 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4469 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4470 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4471 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4472 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4473 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4474 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 4475 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4476 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 4477 // CHECK12-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 4478 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4479 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4480 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4481 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4482 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 4483 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4484 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 4485 // CHECK12-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 4486 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4487 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 4488 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4489 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 4490 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 4491 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 4492 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4493 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 4494 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4495 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4496 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4497 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4498 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4499 // CHECK12: arrayctor.loop: 4500 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4501 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4502 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 4503 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4504 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4505 // CHECK12: arrayctor.cont: 4506 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4507 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) 4508 // CHECK12-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 4509 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4510 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 4511 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4512 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4513 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 4514 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4515 // CHECK12: cond.true: 4516 // CHECK12-NEXT: br label [[COND_END:%.*]] 4517 // CHECK12: cond.false: 4518 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4519 // CHECK12-NEXT: br label [[COND_END]] 4520 // CHECK12: cond.end: 4521 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 4522 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4523 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4524 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 4525 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4526 // CHECK12: omp.inner.for.cond: 4527 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4528 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4529 // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 4530 // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4531 // CHECK12: omp.inner.for.cond.cleanup: 4532 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4533 // CHECK12: omp.inner.for.body: 4534 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4535 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4536 // CHECK12-NEXT: [[TMP15:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 4537 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP13]], i32 [[TMP14]], [2 x i32]* [[VEC3]], i32* [[T_VAR2]], [2 x %struct.S]* [[S_ARR4]], %struct.S* [[TMP15]], i32* [[SVAR7]]) 4538 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4539 // CHECK12: omp.inner.for.inc: 4540 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4541 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4542 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 4543 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4544 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 4545 // CHECK12: omp.inner.for.end: 4546 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4547 // CHECK12: omp.loop.exit: 4548 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4549 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 4550 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 4551 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4552 // CHECK12-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 4553 // CHECK12-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 4554 // CHECK12: .omp.lastprivate.then: 4555 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR2]], align 4 4556 // CHECK12-NEXT: store i32 [[TMP22]], i32* [[TMP1]], align 4 4557 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 4558 // CHECK12-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 4559 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP23]], i8* align 4 [[TMP24]], i32 8, i1 false) 4560 // CHECK12-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 4561 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 4562 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i32 2 4563 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN9]], [[TMP26]] 4564 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4565 // CHECK12: omp.arraycpy.body: 4566 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP25]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4567 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4568 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4569 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4570 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false) 4571 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4572 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4573 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]] 4574 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]] 4575 // CHECK12: omp.arraycpy.done10: 4576 // CHECK12-NEXT: [[TMP29:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 4577 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 4578 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[TMP29]] to i8* 4579 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false) 4580 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[SVAR7]], align 4 4581 // CHECK12-NEXT: store i32 [[TMP32]], i32* [[TMP4]], align 4 4582 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 4583 // CHECK12: .omp.lastprivate.done: 4584 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4585 // CHECK12-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4586 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 4587 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4588 // CHECK12: arraydestroy.body: 4589 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP33]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4590 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4591 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4592 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 4593 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 4594 // CHECK12: arraydestroy.done12: 4595 // CHECK12-NEXT: ret void 4596 // 4597 // 4598 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 4599 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 4600 // CHECK12-NEXT: entry: 4601 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4602 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4603 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4604 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4605 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4606 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 4607 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 4608 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 4609 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 4610 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4611 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4612 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4613 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4614 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4615 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4616 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4617 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4618 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4619 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 4620 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4621 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 4622 // CHECK12-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 4623 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4624 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4625 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4626 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4627 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4628 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4629 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 4630 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4631 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 4632 // CHECK12-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 4633 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4634 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 4635 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4636 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 4637 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 4638 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 4639 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4640 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4641 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4642 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4643 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4 4644 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 4645 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4646 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4647 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4648 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4649 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4650 // CHECK12: arrayctor.loop: 4651 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4652 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4653 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 4654 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4655 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4656 // CHECK12: arrayctor.cont: 4657 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4658 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) 4659 // CHECK12-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 4660 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4661 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 4662 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4663 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4664 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1 4665 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4666 // CHECK12: cond.true: 4667 // CHECK12-NEXT: br label [[COND_END:%.*]] 4668 // CHECK12: cond.false: 4669 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4670 // CHECK12-NEXT: br label [[COND_END]] 4671 // CHECK12: cond.end: 4672 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 4673 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4674 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4675 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 4676 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4677 // CHECK12: omp.inner.for.cond: 4678 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4679 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4680 // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 4681 // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4682 // CHECK12: omp.inner.for.cond.cleanup: 4683 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4684 // CHECK12: omp.inner.for.body: 4685 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4686 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 4687 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4688 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4689 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4 4690 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 4691 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP17]] 4692 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[ARRAYIDX]], align 4 4693 // CHECK12-NEXT: [[TMP18:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 4694 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4 4695 // CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP19]] 4696 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* 4697 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[TMP18]] to i8* 4698 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i32 4, i1 false) 4699 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4700 // CHECK12: omp.body.continue: 4701 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4702 // CHECK12: omp.inner.for.inc: 4703 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4704 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP22]], 1 4705 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 4706 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 4707 // CHECK12: omp.inner.for.end: 4708 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4709 // CHECK12: omp.loop.exit: 4710 // CHECK12-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4711 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 4712 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 4713 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4714 // CHECK12-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 4715 // CHECK12-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 4716 // CHECK12: .omp.lastprivate.then: 4717 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR2]], align 4 4718 // CHECK12-NEXT: store i32 [[TMP27]], i32* [[TMP1]], align 4 4719 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 4720 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 4721 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 8, i1 false) 4722 // CHECK12-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 4723 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 4724 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 4725 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP31]] 4726 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4727 // CHECK12: omp.arraycpy.body: 4728 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4729 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4730 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4731 // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4732 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false) 4733 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4734 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4735 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]] 4736 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 4737 // CHECK12: omp.arraycpy.done12: 4738 // CHECK12-NEXT: [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 4739 // CHECK12-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 4740 // CHECK12-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8* 4741 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i32 4, i1 false) 4742 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[SVAR7]], align 4 4743 // CHECK12-NEXT: store i32 [[TMP37]], i32* [[TMP4]], align 4 4744 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 4745 // CHECK12: .omp.lastprivate.done: 4746 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4747 // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4748 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 4749 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4750 // CHECK12: arraydestroy.body: 4751 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4752 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4753 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4754 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 4755 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 4756 // CHECK12: arraydestroy.done14: 4757 // CHECK12-NEXT: ret void 4758 // 4759 // 4760 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4761 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4762 // CHECK12-NEXT: entry: 4763 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4764 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4765 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4766 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4767 // CHECK12-NEXT: ret void 4768 // 4769 // 4770 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4771 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 4772 // CHECK12-NEXT: entry: 4773 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4774 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4775 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4776 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4777 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4778 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4779 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4780 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 4781 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 4782 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 4783 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 4784 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4785 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4786 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 4787 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4788 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4789 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4790 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 4791 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4792 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 4793 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4794 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4795 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 4796 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 4797 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 4798 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 4799 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4800 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4801 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4802 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4803 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 4804 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 4805 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4806 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4807 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4808 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4809 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 4810 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4811 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 4812 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 4813 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4814 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 4815 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 4816 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4817 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 4818 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4819 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 4820 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 4821 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4822 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 4823 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 4824 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4825 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4 4826 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4827 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 4828 // CHECK12-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 4829 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4830 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 4831 // CHECK12-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 4832 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4833 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4 4834 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4835 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4836 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 4837 // CHECK12-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4838 // CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 4839 // CHECK12-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4840 // CHECK12: omp_offload.failed: 4841 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 4842 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 4843 // CHECK12: omp_offload.cont: 4844 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 4845 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4846 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4847 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4848 // CHECK12: arraydestroy.body: 4849 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4850 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4851 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4852 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4853 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 4854 // CHECK12: arraydestroy.done2: 4855 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4856 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 4857 // CHECK12-NEXT: ret i32 [[TMP32]] 4858 // 4859 // 4860 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4861 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4862 // CHECK12-NEXT: entry: 4863 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4864 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4865 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4866 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4867 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 4868 // CHECK12-NEXT: ret void 4869 // 4870 // 4871 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4872 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4873 // CHECK12-NEXT: entry: 4874 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4875 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4876 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4877 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4878 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4879 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4880 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4881 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 4882 // CHECK12-NEXT: ret void 4883 // 4884 // 4885 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4886 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4887 // CHECK12-NEXT: entry: 4888 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4889 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4890 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4891 // CHECK12-NEXT: ret void 4892 // 4893 // 4894 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4895 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4896 // CHECK12-NEXT: entry: 4897 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4898 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4899 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4900 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4901 // CHECK12-NEXT: ret void 4902 // 4903 // 4904 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4905 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4906 // CHECK12-NEXT: entry: 4907 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4908 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4909 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4910 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4911 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4912 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4913 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4914 // CHECK12-NEXT: ret void 4915 // 4916 // 4917 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 4918 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 4919 // CHECK12-NEXT: entry: 4920 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 4921 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4922 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 4923 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 4924 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4925 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 4926 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4927 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4928 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 4929 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4930 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4931 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 4932 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 4933 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4934 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 4935 // CHECK12-NEXT: ret void 4936 // 4937 // 4938 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 4939 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 4940 // CHECK12-NEXT: entry: 4941 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4942 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4943 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4944 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 4945 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 4946 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 4947 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4948 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4949 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4950 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4951 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4952 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4953 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4954 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4955 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4956 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 4957 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4958 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 4959 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4960 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4961 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4962 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4963 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 4964 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4965 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 4966 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4967 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 4968 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4969 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 4970 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 4971 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4972 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 4973 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4974 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4975 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4976 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4977 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4978 // CHECK12: arrayctor.loop: 4979 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4980 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4981 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 4982 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4983 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4984 // CHECK12: arrayctor.cont: 4985 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4986 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) 4987 // CHECK12-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 4988 // CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4989 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 4990 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4991 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4992 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 4993 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4994 // CHECK12: cond.true: 4995 // CHECK12-NEXT: br label [[COND_END:%.*]] 4996 // CHECK12: cond.false: 4997 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4998 // CHECK12-NEXT: br label [[COND_END]] 4999 // CHECK12: cond.end: 5000 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 5001 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5002 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5003 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 5004 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5005 // CHECK12: omp.inner.for.cond: 5006 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5007 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5008 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 5009 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 5010 // CHECK12: omp.inner.for.cond.cleanup: 5011 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 5012 // CHECK12: omp.inner.for.body: 5013 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5014 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5015 // CHECK12-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 5016 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP12]], i32 [[TMP13]], [2 x i32]* [[VEC3]], i32* [[T_VAR2]], [2 x %struct.S.0]* [[S_ARR4]], %struct.S.0* [[TMP14]]) 5017 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5018 // CHECK12: omp.inner.for.inc: 5019 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5020 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5021 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 5022 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5023 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 5024 // CHECK12: omp.inner.for.end: 5025 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5026 // CHECK12: omp.loop.exit: 5027 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5028 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 5029 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 5030 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 5031 // CHECK12-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 5032 // CHECK12-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 5033 // CHECK12: .omp.lastprivate.then: 5034 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR2]], align 4 5035 // CHECK12-NEXT: store i32 [[TMP21]], i32* [[TMP1]], align 4 5036 // CHECK12-NEXT: [[TMP22:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 5037 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 5038 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i32 8, i1 false) 5039 // CHECK12-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 5040 // CHECK12-NEXT: [[TMP24:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 5041 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i32 2 5042 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN8]], [[TMP25]] 5043 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 5044 // CHECK12: omp.arraycpy.body: 5045 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP24]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 5046 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN8]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 5047 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 5048 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 5049 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false) 5050 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 5051 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 5052 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]] 5053 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]] 5054 // CHECK12: omp.arraycpy.done9: 5055 // CHECK12-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 5056 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 5057 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[TMP28]] to i8* 5058 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false) 5059 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 5060 // CHECK12: .omp.lastprivate.done: 5061 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 5062 // CHECK12-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 5063 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 5064 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5065 // CHECK12: arraydestroy.body: 5066 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5067 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5068 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5069 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 5070 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 5071 // CHECK12: arraydestroy.done11: 5072 // CHECK12-NEXT: ret void 5073 // 5074 // 5075 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 5076 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 5077 // CHECK12-NEXT: entry: 5078 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5079 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5080 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 5081 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 5082 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 5083 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 5084 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 5085 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 5086 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 5087 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5088 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5089 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5090 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5091 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5092 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5093 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 5094 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 5095 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 5096 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5097 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 5098 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5099 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5100 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5101 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5102 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5103 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 5104 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 5105 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 5106 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 5107 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 5108 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 5109 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 5110 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 5111 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 5112 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5113 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 5114 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5115 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5116 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_LB]], align 4 5117 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 5118 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5119 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5120 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 5121 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 5122 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 5123 // CHECK12: arrayctor.loop: 5124 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 5125 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 5126 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 5127 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 5128 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 5129 // CHECK12: arrayctor.cont: 5130 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 5131 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) 5132 // CHECK12-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 5133 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5134 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 5135 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5136 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5137 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 5138 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5139 // CHECK12: cond.true: 5140 // CHECK12-NEXT: br label [[COND_END:%.*]] 5141 // CHECK12: cond.false: 5142 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5143 // CHECK12-NEXT: br label [[COND_END]] 5144 // CHECK12: cond.end: 5145 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 5146 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5147 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5148 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 5149 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5150 // CHECK12: omp.inner.for.cond: 5151 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5152 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5153 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 5154 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 5155 // CHECK12: omp.inner.for.cond.cleanup: 5156 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 5157 // CHECK12: omp.inner.for.body: 5158 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5159 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 5160 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5161 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5162 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR2]], align 4 5163 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 5164 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP16]] 5165 // CHECK12-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4 5166 // CHECK12-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 5167 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4 5168 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP18]] 5169 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 5170 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8* 5171 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i32 4, i1 false) 5172 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5173 // CHECK12: omp.body.continue: 5174 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5175 // CHECK12: omp.inner.for.inc: 5176 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5177 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1 5178 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 5179 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 5180 // CHECK12: omp.inner.for.end: 5181 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5182 // CHECK12: omp.loop.exit: 5183 // CHECK12-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5184 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 5185 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 5186 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 5187 // CHECK12-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 5188 // CHECK12-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 5189 // CHECK12: .omp.lastprivate.then: 5190 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR2]], align 4 5191 // CHECK12-NEXT: store i32 [[TMP26]], i32* [[TMP1]], align 4 5192 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 5193 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 5194 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 8, i1 false) 5195 // CHECK12-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 5196 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 5197 // CHECK12-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 5198 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP30]] 5199 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 5200 // CHECK12: omp.arraycpy.body: 5201 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 5202 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 5203 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 5204 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 5205 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false) 5206 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 5207 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 5208 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]] 5209 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 5210 // CHECK12: omp.arraycpy.done11: 5211 // CHECK12-NEXT: [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 5212 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8* 5213 // CHECK12-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8* 5214 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i32 4, i1 false) 5215 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 5216 // CHECK12: .omp.lastprivate.done: 5217 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 5218 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 5219 // CHECK12-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 5220 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5221 // CHECK12: arraydestroy.body: 5222 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5223 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5224 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5225 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 5226 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 5227 // CHECK12: arraydestroy.done13: 5228 // CHECK12-NEXT: ret void 5229 // 5230 // 5231 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5232 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5233 // CHECK12-NEXT: entry: 5234 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5235 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5236 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5237 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5238 // CHECK12-NEXT: ret void 5239 // 5240 // 5241 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5242 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5243 // CHECK12-NEXT: entry: 5244 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5245 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5246 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5247 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5248 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 5249 // CHECK12-NEXT: ret void 5250 // 5251 // 5252 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5253 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5254 // CHECK12-NEXT: entry: 5255 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5256 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5257 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5258 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5259 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5260 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5261 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5262 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5263 // CHECK12-NEXT: ret void 5264 // 5265 // 5266 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5267 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5268 // CHECK12-NEXT: entry: 5269 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5270 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5271 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5272 // CHECK12-NEXT: ret void 5273 // 5274 // 5275 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5276 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 5277 // CHECK12-NEXT: entry: 5278 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 5279 // CHECK12-NEXT: ret void 5280 // 5281 // 5282 // CHECK13-LABEL: define {{[^@]+}}@main 5283 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 5284 // CHECK13-NEXT: entry: 5285 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5286 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 5287 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 5288 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5289 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5290 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5291 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5292 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 5293 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 5294 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 5295 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5296 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 5297 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 5298 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 5299 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 5300 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 5301 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5302 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 5303 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 5304 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 5305 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 5306 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 5307 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 5308 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5309 // CHECK13-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 5310 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5311 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 5312 // CHECK13-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 5313 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 5314 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 5315 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 5316 // CHECK13: for.cond: 5317 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5318 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5319 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5320 // CHECK13: for.body: 5321 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5322 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5323 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 5324 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5325 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5326 // CHECK13-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 5327 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5328 // CHECK13-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP9]] to i64 5329 // CHECK13-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM2]] 5330 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 5331 // CHECK13-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 5332 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 5333 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 5334 // CHECK13: for.inc: 5335 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5336 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5337 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 5338 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 5339 // CHECK13: for.end: 5340 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 5341 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5342 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5343 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 5344 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5345 // CHECK13: arraydestroy.body: 5346 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5347 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5348 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 5349 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5350 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 5351 // CHECK13: arraydestroy.done5: 5352 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5353 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5354 // CHECK13-NEXT: ret i32 [[TMP14]] 5355 // 5356 // 5357 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5358 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5359 // CHECK13-NEXT: entry: 5360 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5361 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5362 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5363 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 5364 // CHECK13-NEXT: ret void 5365 // 5366 // 5367 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5368 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5369 // CHECK13-NEXT: entry: 5370 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5371 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5372 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5373 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5374 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5375 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5376 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 5377 // CHECK13-NEXT: ret void 5378 // 5379 // 5380 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5381 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 5382 // CHECK13-NEXT: entry: 5383 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5384 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5385 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5386 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5387 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 5388 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 5389 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 5390 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 5391 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5392 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 5393 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 5394 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5395 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 5396 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 5397 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 5398 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 5399 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 5400 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 5401 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5402 // CHECK13-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 5403 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5404 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 5405 // CHECK13-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 5406 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 5407 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 5408 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 5409 // CHECK13: for.cond: 5410 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5411 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5412 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5413 // CHECK13: for.body: 5414 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5415 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5416 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 5417 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5418 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5419 // CHECK13-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 5420 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5421 // CHECK13-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP9]] to i64 5422 // CHECK13-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM2]] 5423 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX3]] to i8* 5424 // CHECK13-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 5425 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 5426 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 5427 // CHECK13: for.inc: 5428 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5429 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5430 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 5431 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 5432 // CHECK13: for.end: 5433 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 5434 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5435 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 5436 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5437 // CHECK13: arraydestroy.body: 5438 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5439 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5440 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5441 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5442 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 5443 // CHECK13: arraydestroy.done4: 5444 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5445 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5446 // CHECK13-NEXT: ret i32 [[TMP14]] 5447 // 5448 // 5449 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 5450 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5451 // CHECK13-NEXT: entry: 5452 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5453 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5454 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5455 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5456 // CHECK13-NEXT: ret void 5457 // 5458 // 5459 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 5460 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5461 // CHECK13-NEXT: entry: 5462 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5463 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5464 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5465 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5466 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 5467 // CHECK13-NEXT: ret void 5468 // 5469 // 5470 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 5471 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5472 // CHECK13-NEXT: entry: 5473 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5474 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5475 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5476 // CHECK13-NEXT: ret void 5477 // 5478 // 5479 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 5480 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5481 // CHECK13-NEXT: entry: 5482 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5483 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5484 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5485 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5486 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5487 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5488 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5489 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 5490 // CHECK13-NEXT: ret void 5491 // 5492 // 5493 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 5494 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5495 // CHECK13-NEXT: entry: 5496 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5497 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5498 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5499 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 5500 // CHECK13-NEXT: ret void 5501 // 5502 // 5503 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 5504 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5505 // CHECK13-NEXT: entry: 5506 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5507 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5508 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5509 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5510 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5511 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5512 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 5513 // CHECK13-NEXT: ret void 5514 // 5515 // 5516 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5517 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5518 // CHECK13-NEXT: entry: 5519 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5520 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5521 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5522 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5523 // CHECK13-NEXT: ret void 5524 // 5525 // 5526 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5527 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5528 // CHECK13-NEXT: entry: 5529 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5530 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5531 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5532 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5533 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 5534 // CHECK13-NEXT: ret void 5535 // 5536 // 5537 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5538 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5539 // CHECK13-NEXT: entry: 5540 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5541 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5542 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5543 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5544 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5545 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5546 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5547 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5548 // CHECK13-NEXT: ret void 5549 // 5550 // 5551 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5552 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5553 // CHECK13-NEXT: entry: 5554 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5555 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5556 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5557 // CHECK13-NEXT: ret void 5558 // 5559 // 5560 // CHECK14-LABEL: define {{[^@]+}}@main 5561 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 5562 // CHECK14-NEXT: entry: 5563 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5564 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 5565 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 8 5566 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5567 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5568 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5569 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5570 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 5571 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 5572 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 5573 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 5574 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 5575 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 5576 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 8 5577 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 5578 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 5579 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5580 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 5581 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 5582 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 5583 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 5584 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 5585 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 5586 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5587 // CHECK14-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 5588 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5589 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 5590 // CHECK14-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 5591 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 5592 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 5593 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 5594 // CHECK14: for.cond: 5595 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5596 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5597 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5598 // CHECK14: for.body: 5599 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5600 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5601 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 5602 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5603 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5604 // CHECK14-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 5605 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5606 // CHECK14-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP9]] to i64 5607 // CHECK14-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM2]] 5608 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 5609 // CHECK14-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 5610 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 5611 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 5612 // CHECK14: for.inc: 5613 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5614 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5615 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 5616 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 5617 // CHECK14: for.end: 5618 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 5619 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5620 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5621 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 5622 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5623 // CHECK14: arraydestroy.body: 5624 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5625 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5626 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 5627 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5628 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 5629 // CHECK14: arraydestroy.done5: 5630 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5631 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5632 // CHECK14-NEXT: ret i32 [[TMP14]] 5633 // 5634 // 5635 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5636 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5637 // CHECK14-NEXT: entry: 5638 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5639 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5640 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5641 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 5642 // CHECK14-NEXT: ret void 5643 // 5644 // 5645 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5646 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5647 // CHECK14-NEXT: entry: 5648 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5649 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5650 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5651 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5652 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5653 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5654 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 5655 // CHECK14-NEXT: ret void 5656 // 5657 // 5658 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5659 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 5660 // CHECK14-NEXT: entry: 5661 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5662 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5663 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5664 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5665 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 5666 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 5667 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 5668 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 5669 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 5670 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 5671 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 5672 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5673 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 5674 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 5675 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 5676 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 5677 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 5678 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 5679 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5680 // CHECK14-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 5681 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5682 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 5683 // CHECK14-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 5684 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 5685 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 5686 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 5687 // CHECK14: for.cond: 5688 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5689 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5690 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5691 // CHECK14: for.body: 5692 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5693 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5694 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 5695 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5696 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5697 // CHECK14-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 5698 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5699 // CHECK14-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP9]] to i64 5700 // CHECK14-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM2]] 5701 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX3]] to i8* 5702 // CHECK14-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 5703 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 5704 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 5705 // CHECK14: for.inc: 5706 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5707 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5708 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 5709 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 5710 // CHECK14: for.end: 5711 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 5712 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5713 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 5714 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5715 // CHECK14: arraydestroy.body: 5716 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5717 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5718 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5719 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5720 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 5721 // CHECK14: arraydestroy.done4: 5722 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5723 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5724 // CHECK14-NEXT: ret i32 [[TMP14]] 5725 // 5726 // 5727 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 5728 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5729 // CHECK14-NEXT: entry: 5730 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5731 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5732 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5733 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5734 // CHECK14-NEXT: ret void 5735 // 5736 // 5737 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 5738 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5739 // CHECK14-NEXT: entry: 5740 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5741 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5742 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5743 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5744 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 5745 // CHECK14-NEXT: ret void 5746 // 5747 // 5748 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 5749 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5750 // CHECK14-NEXT: entry: 5751 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5752 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5753 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5754 // CHECK14-NEXT: ret void 5755 // 5756 // 5757 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 5758 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5759 // CHECK14-NEXT: entry: 5760 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5761 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5762 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5763 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5764 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5765 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5766 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5767 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 5768 // CHECK14-NEXT: ret void 5769 // 5770 // 5771 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 5772 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5773 // CHECK14-NEXT: entry: 5774 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5775 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5776 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5777 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 5778 // CHECK14-NEXT: ret void 5779 // 5780 // 5781 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 5782 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5783 // CHECK14-NEXT: entry: 5784 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5785 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5786 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5787 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5788 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5789 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5790 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 5791 // CHECK14-NEXT: ret void 5792 // 5793 // 5794 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5795 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5796 // CHECK14-NEXT: entry: 5797 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5798 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5799 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5800 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5801 // CHECK14-NEXT: ret void 5802 // 5803 // 5804 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5805 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5806 // CHECK14-NEXT: entry: 5807 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5808 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5809 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5810 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5811 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 5812 // CHECK14-NEXT: ret void 5813 // 5814 // 5815 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5816 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5817 // CHECK14-NEXT: entry: 5818 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5819 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5820 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5821 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5822 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5823 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5824 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5825 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5826 // CHECK14-NEXT: ret void 5827 // 5828 // 5829 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5830 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5831 // CHECK14-NEXT: entry: 5832 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5833 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5834 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5835 // CHECK14-NEXT: ret void 5836 // 5837 // 5838 // CHECK15-LABEL: define {{[^@]+}}@main 5839 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 5840 // CHECK15-NEXT: entry: 5841 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5842 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 5843 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 5844 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5845 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5846 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5847 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5848 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 5849 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 5850 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 5851 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 5852 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 5853 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 5854 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 5855 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 5856 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 5857 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5858 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 5859 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5860 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 5861 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 5862 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 5863 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 5864 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5865 // CHECK15-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 5866 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5867 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 5868 // CHECK15-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 5869 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 5870 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 5871 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 5872 // CHECK15: for.cond: 5873 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5874 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5875 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5876 // CHECK15: for.body: 5877 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5878 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5879 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 5880 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5881 // CHECK15-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 5882 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5883 // CHECK15-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP9]] 5884 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8* 5885 // CHECK15-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 5886 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 5887 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 5888 // CHECK15: for.inc: 5889 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5890 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5891 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 5892 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 5893 // CHECK15: for.end: 5894 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 5895 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5896 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5897 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 5898 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5899 // CHECK15: arraydestroy.body: 5900 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5901 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5902 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 5903 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5904 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 5905 // CHECK15: arraydestroy.done4: 5906 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5907 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5908 // CHECK15-NEXT: ret i32 [[TMP14]] 5909 // 5910 // 5911 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5912 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5913 // CHECK15-NEXT: entry: 5914 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5915 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5916 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5917 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 5918 // CHECK15-NEXT: ret void 5919 // 5920 // 5921 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5922 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5923 // CHECK15-NEXT: entry: 5924 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5925 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5926 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5927 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5928 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5929 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5930 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 5931 // CHECK15-NEXT: ret void 5932 // 5933 // 5934 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5935 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 5936 // CHECK15-NEXT: entry: 5937 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5938 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5939 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5940 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5941 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 5942 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 5943 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 5944 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 5945 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 5946 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 5947 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 5948 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5949 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 5950 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5951 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 5952 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 5953 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 5954 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 5955 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 5956 // CHECK15-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 5957 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 5958 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 5959 // CHECK15-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 5960 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 5961 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 5962 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 5963 // CHECK15: for.cond: 5964 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5965 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5966 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5967 // CHECK15: for.body: 5968 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5969 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5970 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 5971 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5972 // CHECK15-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 5973 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5974 // CHECK15-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP9]] 5975 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX2]] to i8* 5976 // CHECK15-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 5977 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 5978 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 5979 // CHECK15: for.inc: 5980 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5981 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5982 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 5983 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 5984 // CHECK15: for.end: 5985 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 5986 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5987 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 5988 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5989 // CHECK15: arraydestroy.body: 5990 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5991 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5992 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5993 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5994 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 5995 // CHECK15: arraydestroy.done3: 5996 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5997 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5998 // CHECK15-NEXT: ret i32 [[TMP14]] 5999 // 6000 // 6001 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 6002 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6003 // CHECK15-NEXT: entry: 6004 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6005 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6006 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6007 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 6008 // CHECK15-NEXT: ret void 6009 // 6010 // 6011 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 6012 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6013 // CHECK15-NEXT: entry: 6014 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6015 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6016 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6017 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6018 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 6019 // CHECK15-NEXT: ret void 6020 // 6021 // 6022 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 6023 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6024 // CHECK15-NEXT: entry: 6025 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6026 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6027 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6028 // CHECK15-NEXT: ret void 6029 // 6030 // 6031 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 6032 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6033 // CHECK15-NEXT: entry: 6034 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6035 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 6036 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6037 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 6038 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6039 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6040 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 6041 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 6042 // CHECK15-NEXT: ret void 6043 // 6044 // 6045 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 6046 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6047 // CHECK15-NEXT: entry: 6048 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6049 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6050 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6051 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 6052 // CHECK15-NEXT: ret void 6053 // 6054 // 6055 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 6056 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6057 // CHECK15-NEXT: entry: 6058 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6059 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6060 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6061 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6062 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6063 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6064 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 6065 // CHECK15-NEXT: ret void 6066 // 6067 // 6068 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 6069 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6070 // CHECK15-NEXT: entry: 6071 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6072 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6073 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6074 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 6075 // CHECK15-NEXT: ret void 6076 // 6077 // 6078 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 6079 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6080 // CHECK15-NEXT: entry: 6081 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6082 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6083 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6084 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 6085 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 6086 // CHECK15-NEXT: ret void 6087 // 6088 // 6089 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 6090 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6091 // CHECK15-NEXT: entry: 6092 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6093 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6094 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6095 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6096 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6097 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 6098 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6099 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 6100 // CHECK15-NEXT: ret void 6101 // 6102 // 6103 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 6104 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6105 // CHECK15-NEXT: entry: 6106 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6107 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6108 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6109 // CHECK15-NEXT: ret void 6110 // 6111 // 6112 // CHECK16-LABEL: define {{[^@]+}}@main 6113 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 6114 // CHECK16-NEXT: entry: 6115 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6116 // CHECK16-NEXT: [[G:%.*]] = alloca double, align 8 6117 // CHECK16-NEXT: [[G1:%.*]] = alloca double*, align 4 6118 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 6119 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 6120 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 6121 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 6122 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 6123 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 6124 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 6125 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 6126 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 6127 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 6128 // CHECK16-NEXT: store double* [[G]], double** [[G1]], align 4 6129 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 6130 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 6131 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 6132 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 6133 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 6134 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 6135 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 6136 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 6137 // CHECK16-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 6138 // CHECK16-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 6139 // CHECK16-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 6140 // CHECK16-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 6141 // CHECK16-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 6142 // CHECK16-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 6143 // CHECK16-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 6144 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 6145 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 6146 // CHECK16: for.cond: 6147 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 6148 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 6149 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 6150 // CHECK16: for.body: 6151 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 6152 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 6153 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 6154 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 6155 // CHECK16-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 6156 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 6157 // CHECK16-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP9]] 6158 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8* 6159 // CHECK16-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 6160 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 6161 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 6162 // CHECK16: for.inc: 6163 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 6164 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 6165 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 6166 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 6167 // CHECK16: for.end: 6168 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 6169 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 6170 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 6171 // CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 6172 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 6173 // CHECK16: arraydestroy.body: 6174 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 6175 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 6176 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 6177 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 6178 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 6179 // CHECK16: arraydestroy.done4: 6180 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 6181 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 6182 // CHECK16-NEXT: ret i32 [[TMP14]] 6183 // 6184 // 6185 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 6186 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 6187 // CHECK16-NEXT: entry: 6188 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6189 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6190 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6191 // CHECK16-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 6192 // CHECK16-NEXT: ret void 6193 // 6194 // 6195 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 6196 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6197 // CHECK16-NEXT: entry: 6198 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6199 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 6200 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6201 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 6202 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6203 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 6204 // CHECK16-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 6205 // CHECK16-NEXT: ret void 6206 // 6207 // 6208 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 6209 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat { 6210 // CHECK16-NEXT: entry: 6211 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6212 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 6213 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 6214 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 6215 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 6216 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 6217 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 6218 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 6219 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 6220 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 6221 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 6222 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 6223 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 6224 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 6225 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 6226 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 6227 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 6228 // CHECK16-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 6229 // CHECK16-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 6230 // CHECK16-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 6231 // CHECK16-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 6232 // CHECK16-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 6233 // CHECK16-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 6234 // CHECK16-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 6235 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 6236 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 6237 // CHECK16: for.cond: 6238 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 6239 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 6240 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 6241 // CHECK16: for.body: 6242 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 6243 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 6244 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 6245 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 6246 // CHECK16-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 6247 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 6248 // CHECK16-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP9]] 6249 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX2]] to i8* 6250 // CHECK16-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 6251 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 6252 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 6253 // CHECK16: for.inc: 6254 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 6255 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 6256 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 6257 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 6258 // CHECK16: for.end: 6259 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 6260 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 6261 // CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 6262 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 6263 // CHECK16: arraydestroy.body: 6264 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 6265 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 6266 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 6267 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 6268 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 6269 // CHECK16: arraydestroy.done3: 6270 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 6271 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 6272 // CHECK16-NEXT: ret i32 [[TMP14]] 6273 // 6274 // 6275 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 6276 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6277 // CHECK16-NEXT: entry: 6278 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6279 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6280 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6281 // CHECK16-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 6282 // CHECK16-NEXT: ret void 6283 // 6284 // 6285 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 6286 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6287 // CHECK16-NEXT: entry: 6288 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6289 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6290 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6291 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6292 // CHECK16-NEXT: store float 0.000000e+00, float* [[F]], align 4 6293 // CHECK16-NEXT: ret void 6294 // 6295 // 6296 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 6297 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6298 // CHECK16-NEXT: entry: 6299 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6300 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6301 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6302 // CHECK16-NEXT: ret void 6303 // 6304 // 6305 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 6306 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6307 // CHECK16-NEXT: entry: 6308 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6309 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 6310 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6311 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 6312 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6313 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6314 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 6315 // CHECK16-NEXT: store float [[TMP0]], float* [[F]], align 4 6316 // CHECK16-NEXT: ret void 6317 // 6318 // 6319 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 6320 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6321 // CHECK16-NEXT: entry: 6322 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6323 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6324 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6325 // CHECK16-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 6326 // CHECK16-NEXT: ret void 6327 // 6328 // 6329 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 6330 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6331 // CHECK16-NEXT: entry: 6332 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6333 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6334 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6335 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6336 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6337 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6338 // CHECK16-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 6339 // CHECK16-NEXT: ret void 6340 // 6341 // 6342 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 6343 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6344 // CHECK16-NEXT: entry: 6345 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6346 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6347 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6348 // CHECK16-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 6349 // CHECK16-NEXT: ret void 6350 // 6351 // 6352 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 6353 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6354 // CHECK16-NEXT: entry: 6355 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6356 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6357 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6358 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 6359 // CHECK16-NEXT: store i32 0, i32* [[F]], align 4 6360 // CHECK16-NEXT: ret void 6361 // 6362 // 6363 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 6364 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6365 // CHECK16-NEXT: entry: 6366 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6367 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6368 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6369 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6370 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6371 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 6372 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6373 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 6374 // CHECK16-NEXT: ret void 6375 // 6376 // 6377 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 6378 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6379 // CHECK16-NEXT: entry: 6380 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6381 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6382 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6383 // CHECK16-NEXT: ret void 6384 // 6385