1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
5 
6 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
7 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
8 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
9 
10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
11 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
12 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
13 
14 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
17 
18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
21 
22 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
23 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
25 
26 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
27 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
28 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
29 
30 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
31 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
32 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
33 
34 // expected-no-diagnostics
35 #ifndef HEADER
36 #define HEADER
37 
38 void fn1();
39 void fn2();
40 void fn3();
41 void fn4();
42 void fn5();
43 void fn6();
44 
45 int Arg;
46 
47 void gtid_test() {
48 #pragma omp target
49 #pragma omp teams distribute parallel for
50   for(int i = 0 ; i < 100; i++) {}
51 
52 #pragma omp target
53 #pragma omp teams distribute parallel for if (parallel: false)
54   for(int i = 0 ; i < 100; i++) {
55     gtid_test();
56   }
57 }
58 
59 
60 template <typename T>
61 int tmain(T Arg) {
62 #pragma omp target
63 #pragma omp teams distribute parallel for if (true)
64   for(int i = 0 ; i < 100; i++) {
65     fn1();
66   }
67 #pragma omp target
68 #pragma omp teams distribute parallel for if (false)
69   for(int i = 0 ; i < 100; i++) {
70     fn2();
71   }
72 #pragma omp target
73 #pragma omp teams distribute parallel for if (parallel: Arg)
74   for(int i = 0 ; i < 100; i++) {
75     fn3();
76   }
77   return 0;
78 }
79 
80 int main() {
81 #pragma omp target
82 #pragma omp teams distribute parallel for if (true)
83   for(int i = 0 ; i < 100; i++) {
84 
85 
86     fn4();
87   }
88 
89 #pragma omp target
90 #pragma omp teams distribute parallel for if (false)
91   for(int i = 0 ; i < 100; i++) {
92 
93 
94     fn5();
95   }
96 
97 #pragma omp target
98 #pragma omp teams distribute parallel for if (Arg)
99   for(int i = 0 ; i < 100; i++) {
100 
101 
102     fn6();
103   }
104 
105   return tmain(Arg);
106 }
107 
108 
109 
110 
111 
112 
113 // call void [[T_OUTLINE_FUN_3:@.+]](
114 
115 #endif
116 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv
117 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
118 // CHECK1-NEXT:  entry:
119 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
120 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
121 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
122 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
123 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
124 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
125 // CHECK1:       omp_offload.failed:
126 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
127 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
128 // CHECK1:       omp_offload.cont:
129 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
130 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
131 // CHECK1-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
132 // CHECK1-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
133 // CHECK1:       omp_offload.failed2:
134 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
135 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
136 // CHECK1:       omp_offload.cont3:
137 // CHECK1-NEXT:    ret void
138 //
139 //
140 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
141 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
142 // CHECK1-NEXT:  entry:
143 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
144 // CHECK1-NEXT:    ret void
145 //
146 //
147 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
148 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
149 // CHECK1-NEXT:  entry:
150 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
151 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
152 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
153 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
154 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
155 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
156 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
157 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
158 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
159 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
160 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
161 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
162 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
163 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
164 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
165 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
166 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
167 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
168 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
169 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
170 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
171 // CHECK1:       cond.true:
172 // CHECK1-NEXT:    br label [[COND_END:%.*]]
173 // CHECK1:       cond.false:
174 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
175 // CHECK1-NEXT:    br label [[COND_END]]
176 // CHECK1:       cond.end:
177 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
178 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
179 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
180 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
181 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
182 // CHECK1:       omp.inner.for.cond:
183 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
184 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
185 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
186 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
187 // CHECK1:       omp.inner.for.body:
188 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
189 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
190 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
191 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
192 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
193 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
194 // CHECK1:       omp.inner.for.inc:
195 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
196 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
197 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
198 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
199 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
200 // CHECK1:       omp.inner.for.end:
201 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
202 // CHECK1:       omp.loop.exit:
203 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
204 // CHECK1-NEXT:    ret void
205 //
206 //
207 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
208 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
209 // CHECK1-NEXT:  entry:
210 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
211 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
212 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
213 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
214 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
215 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
216 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
217 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
218 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
219 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
220 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
221 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
222 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
223 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
224 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
225 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
226 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
227 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
228 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
229 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
230 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
231 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
232 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
233 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
234 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
235 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
236 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
237 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
238 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
239 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
240 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
241 // CHECK1:       cond.true:
242 // CHECK1-NEXT:    br label [[COND_END:%.*]]
243 // CHECK1:       cond.false:
244 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
245 // CHECK1-NEXT:    br label [[COND_END]]
246 // CHECK1:       cond.end:
247 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
248 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
249 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
250 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
251 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
252 // CHECK1:       omp.inner.for.cond:
253 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
254 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
255 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
256 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
257 // CHECK1:       omp.inner.for.body:
258 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
259 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
260 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
261 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
262 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
263 // CHECK1:       omp.body.continue:
264 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
265 // CHECK1:       omp.inner.for.inc:
266 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
267 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
268 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
269 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
270 // CHECK1:       omp.inner.for.end:
271 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
272 // CHECK1:       omp.loop.exit:
273 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
274 // CHECK1-NEXT:    ret void
275 //
276 //
277 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
278 // CHECK1-SAME: () #[[ATTR1]] {
279 // CHECK1-NEXT:  entry:
280 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
281 // CHECK1-NEXT:    ret void
282 //
283 //
284 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
285 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
286 // CHECK1-NEXT:  entry:
287 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
288 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
289 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
290 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
291 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
292 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
293 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
294 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
295 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
296 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
297 // CHECK1-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
298 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
299 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
300 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
301 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
302 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
303 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
304 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
305 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
306 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
307 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
308 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
309 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
310 // CHECK1:       cond.true:
311 // CHECK1-NEXT:    br label [[COND_END:%.*]]
312 // CHECK1:       cond.false:
313 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
314 // CHECK1-NEXT:    br label [[COND_END]]
315 // CHECK1:       cond.end:
316 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
317 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
318 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
319 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
320 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
321 // CHECK1:       omp.inner.for.cond:
322 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
323 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
324 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
325 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
326 // CHECK1:       omp.inner.for.body:
327 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
328 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
329 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
330 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
331 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
332 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
333 // CHECK1-NEXT:    call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
334 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
335 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
336 // CHECK1:       omp.inner.for.inc:
337 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
338 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
339 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
340 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
341 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
342 // CHECK1:       omp.inner.for.end:
343 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
344 // CHECK1:       omp.loop.exit:
345 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
346 // CHECK1-NEXT:    ret void
347 //
348 //
349 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
350 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
351 // CHECK1-NEXT:  entry:
352 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
353 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
354 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
355 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
356 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
357 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
358 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
359 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
360 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
361 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
362 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
363 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
364 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
365 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
366 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
367 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
368 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
369 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
370 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
371 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
372 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
373 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
374 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
375 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
376 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
377 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
378 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
379 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
380 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
381 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
382 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
383 // CHECK1:       cond.true:
384 // CHECK1-NEXT:    br label [[COND_END:%.*]]
385 // CHECK1:       cond.false:
386 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
387 // CHECK1-NEXT:    br label [[COND_END]]
388 // CHECK1:       cond.end:
389 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
390 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
391 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
392 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
393 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
394 // CHECK1:       omp.inner.for.cond:
395 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
396 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
397 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
398 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
399 // CHECK1:       omp.inner.for.body:
400 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
401 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
402 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
403 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
404 // CHECK1-NEXT:    call void @_Z9gtid_testv()
405 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
406 // CHECK1:       omp.body.continue:
407 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
408 // CHECK1:       omp.inner.for.inc:
409 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
410 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
411 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
412 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
413 // CHECK1:       omp.inner.for.end:
414 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
415 // CHECK1:       omp.loop.exit:
416 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
417 // CHECK1-NEXT:    ret void
418 //
419 //
420 // CHECK1-LABEL: define {{[^@]+}}@main
421 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
422 // CHECK1-NEXT:  entry:
423 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
424 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
425 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
426 // CHECK1-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
427 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
428 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
429 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
430 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
431 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
432 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
433 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
434 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
435 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
436 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
437 // CHECK1:       omp_offload.failed:
438 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
439 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
440 // CHECK1:       omp_offload.cont:
441 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
442 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
443 // CHECK1-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
444 // CHECK1-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
445 // CHECK1:       omp_offload.failed2:
446 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
447 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
448 // CHECK1:       omp_offload.cont3:
449 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
450 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
451 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
452 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
453 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
454 // CHECK1-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
455 // CHECK1-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
456 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
457 // CHECK1-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
458 // CHECK1-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
459 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
460 // CHECK1-NEXT:    store i8* null, i8** [[TMP10]], align 8
461 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
462 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
463 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* @Arg, align 4
464 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
465 // CHECK1-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
466 // CHECK1-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
467 // CHECK1-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
468 // CHECK1-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
469 // CHECK1-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
470 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
471 // CHECK1-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
472 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
473 // CHECK1-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
474 // CHECK1:       omp_offload.failed6:
475 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
476 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
477 // CHECK1:       omp_offload.cont7:
478 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* @Arg, align 4
479 // CHECK1-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
480 // CHECK1-NEXT:    ret i32 [[CALL]]
481 //
482 //
483 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
484 // CHECK1-SAME: () #[[ATTR1]] {
485 // CHECK1-NEXT:  entry:
486 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
487 // CHECK1-NEXT:    ret void
488 //
489 //
490 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
491 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
492 // CHECK1-NEXT:  entry:
493 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
494 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
495 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
496 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
497 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
498 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
499 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
500 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
501 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
502 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
503 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
504 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
505 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
506 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
507 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
508 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
509 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
510 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
511 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
512 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
513 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
514 // CHECK1:       cond.true:
515 // CHECK1-NEXT:    br label [[COND_END:%.*]]
516 // CHECK1:       cond.false:
517 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
518 // CHECK1-NEXT:    br label [[COND_END]]
519 // CHECK1:       cond.end:
520 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
521 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
522 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
523 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
524 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
525 // CHECK1:       omp.inner.for.cond:
526 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
527 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
528 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
529 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
530 // CHECK1:       omp.inner.for.body:
531 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
532 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
533 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
534 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
535 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
536 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
537 // CHECK1:       omp.inner.for.inc:
538 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
539 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
540 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
541 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
542 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
543 // CHECK1:       omp.inner.for.end:
544 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
545 // CHECK1:       omp.loop.exit:
546 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
547 // CHECK1-NEXT:    ret void
548 //
549 //
550 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
551 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
552 // CHECK1-NEXT:  entry:
553 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
554 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
555 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
556 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
557 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
558 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
559 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
560 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
561 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
562 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
563 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
564 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
565 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
566 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
567 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
568 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
569 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
570 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
571 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
572 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
573 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
574 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
575 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
576 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
577 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
578 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
579 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
580 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
581 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
582 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
583 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
584 // CHECK1:       cond.true:
585 // CHECK1-NEXT:    br label [[COND_END:%.*]]
586 // CHECK1:       cond.false:
587 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
588 // CHECK1-NEXT:    br label [[COND_END]]
589 // CHECK1:       cond.end:
590 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
591 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
592 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
593 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
594 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
595 // CHECK1:       omp.inner.for.cond:
596 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
597 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
598 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
599 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
600 // CHECK1:       omp.inner.for.body:
601 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
602 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
603 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
604 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
605 // CHECK1-NEXT:    call void @_Z3fn4v()
606 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
607 // CHECK1:       omp.body.continue:
608 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
609 // CHECK1:       omp.inner.for.inc:
610 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
611 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
612 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
613 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
614 // CHECK1:       omp.inner.for.end:
615 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
616 // CHECK1:       omp.loop.exit:
617 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
618 // CHECK1-NEXT:    ret void
619 //
620 //
621 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
622 // CHECK1-SAME: () #[[ATTR1]] {
623 // CHECK1-NEXT:  entry:
624 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
625 // CHECK1-NEXT:    ret void
626 //
627 //
628 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
629 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
630 // CHECK1-NEXT:  entry:
631 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
632 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
633 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
634 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
635 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
636 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
637 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
638 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
639 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
640 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
641 // CHECK1-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
642 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
643 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
644 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
645 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
646 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
647 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
648 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
649 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
650 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
651 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
652 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
653 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
654 // CHECK1:       cond.true:
655 // CHECK1-NEXT:    br label [[COND_END:%.*]]
656 // CHECK1:       cond.false:
657 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
658 // CHECK1-NEXT:    br label [[COND_END]]
659 // CHECK1:       cond.end:
660 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
661 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
662 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
663 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
664 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
665 // CHECK1:       omp.inner.for.cond:
666 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
667 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
668 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
669 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
670 // CHECK1:       omp.inner.for.body:
671 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
672 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
673 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
674 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
675 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
676 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
677 // CHECK1-NEXT:    call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
678 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
679 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
680 // CHECK1:       omp.inner.for.inc:
681 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
682 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
683 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
684 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
685 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
686 // CHECK1:       omp.inner.for.end:
687 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
688 // CHECK1:       omp.loop.exit:
689 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
690 // CHECK1-NEXT:    ret void
691 //
692 //
693 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
694 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
695 // CHECK1-NEXT:  entry:
696 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
697 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
698 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
699 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
700 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
701 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
702 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
703 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
704 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
705 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
706 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
707 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
708 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
709 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
710 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
711 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
712 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
713 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
714 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
715 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
716 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
717 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
718 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
719 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
720 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
721 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
722 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
723 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
724 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
725 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
726 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
727 // CHECK1:       cond.true:
728 // CHECK1-NEXT:    br label [[COND_END:%.*]]
729 // CHECK1:       cond.false:
730 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
731 // CHECK1-NEXT:    br label [[COND_END]]
732 // CHECK1:       cond.end:
733 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
734 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
735 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
736 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
737 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
738 // CHECK1:       omp.inner.for.cond:
739 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
740 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
741 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
742 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
743 // CHECK1:       omp.inner.for.body:
744 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
745 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
746 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
747 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
748 // CHECK1-NEXT:    call void @_Z3fn5v()
749 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
750 // CHECK1:       omp.body.continue:
751 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
752 // CHECK1:       omp.inner.for.inc:
753 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
754 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
755 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
756 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
757 // CHECK1:       omp.inner.for.end:
758 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
759 // CHECK1:       omp.loop.exit:
760 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
761 // CHECK1-NEXT:    ret void
762 //
763 //
764 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
765 // CHECK1-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
766 // CHECK1-NEXT:  entry:
767 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
768 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
769 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
770 // CHECK1-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
771 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
772 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
773 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
774 // CHECK1-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
775 // CHECK1-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
776 // CHECK1-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
777 // CHECK1-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
778 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
779 // CHECK1-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
780 // CHECK1-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
781 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
782 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
783 // CHECK1-NEXT:    ret void
784 //
785 //
786 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
787 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
788 // CHECK1-NEXT:  entry:
789 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
790 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
791 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
792 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
793 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
794 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
795 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
796 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
797 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
798 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
799 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
800 // CHECK1-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
801 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
802 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
803 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
804 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
805 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
806 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
807 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
808 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
809 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
810 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
811 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
812 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
813 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
814 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
815 // CHECK1:       cond.true:
816 // CHECK1-NEXT:    br label [[COND_END:%.*]]
817 // CHECK1:       cond.false:
818 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
819 // CHECK1-NEXT:    br label [[COND_END]]
820 // CHECK1:       cond.end:
821 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
822 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
823 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
824 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
825 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
826 // CHECK1:       omp.inner.for.cond:
827 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
828 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
829 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
830 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
831 // CHECK1:       omp.inner.for.body:
832 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
833 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
834 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
835 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
836 // CHECK1-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
837 // CHECK1-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
838 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
839 // CHECK1:       omp_if.then:
840 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
841 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
842 // CHECK1:       omp_if.else:
843 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
844 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
845 // CHECK1-NEXT:    call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
846 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
847 // CHECK1-NEXT:    br label [[OMP_IF_END]]
848 // CHECK1:       omp_if.end:
849 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
850 // CHECK1:       omp.inner.for.inc:
851 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
852 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
853 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
854 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
855 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
856 // CHECK1:       omp.inner.for.end:
857 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
858 // CHECK1:       omp.loop.exit:
859 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
860 // CHECK1-NEXT:    ret void
861 //
862 //
863 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
864 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
865 // CHECK1-NEXT:  entry:
866 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
867 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
868 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
869 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
870 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
871 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
872 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
873 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
874 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
875 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
876 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
877 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
878 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
879 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
880 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
881 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
882 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
883 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
884 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
885 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
886 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
887 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
888 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
889 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
890 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
891 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
892 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
893 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
894 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
895 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
896 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
897 // CHECK1:       cond.true:
898 // CHECK1-NEXT:    br label [[COND_END:%.*]]
899 // CHECK1:       cond.false:
900 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
901 // CHECK1-NEXT:    br label [[COND_END]]
902 // CHECK1:       cond.end:
903 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
904 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
905 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
906 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
907 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
908 // CHECK1:       omp.inner.for.cond:
909 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
910 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
911 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
912 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
913 // CHECK1:       omp.inner.for.body:
914 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
915 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
916 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
917 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
918 // CHECK1-NEXT:    call void @_Z3fn6v()
919 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
920 // CHECK1:       omp.body.continue:
921 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
922 // CHECK1:       omp.inner.for.inc:
923 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
924 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
925 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
926 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
927 // CHECK1:       omp.inner.for.end:
928 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
929 // CHECK1:       omp.loop.exit:
930 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
931 // CHECK1-NEXT:    ret void
932 //
933 //
934 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
935 // CHECK1-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
936 // CHECK1-NEXT:  entry:
937 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
938 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
939 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
940 // CHECK1-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
941 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
942 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
943 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
944 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
945 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
946 // CHECK1-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
947 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
948 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
949 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
950 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
951 // CHECK1:       omp_offload.failed:
952 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
953 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
954 // CHECK1:       omp_offload.cont:
955 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
956 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
957 // CHECK1-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
958 // CHECK1-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
959 // CHECK1:       omp_offload.failed2:
960 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
961 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
962 // CHECK1:       omp_offload.cont3:
963 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
964 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
965 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
966 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
967 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
968 // CHECK1-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
969 // CHECK1-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
970 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
971 // CHECK1-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
972 // CHECK1-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
973 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
974 // CHECK1-NEXT:    store i8* null, i8** [[TMP10]], align 8
975 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
976 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
977 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
978 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
979 // CHECK1-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
980 // CHECK1-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
981 // CHECK1-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
982 // CHECK1-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
983 // CHECK1-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
984 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
985 // CHECK1-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
986 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
987 // CHECK1-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
988 // CHECK1:       omp_offload.failed6:
989 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
990 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
991 // CHECK1:       omp_offload.cont7:
992 // CHECK1-NEXT:    ret i32 0
993 //
994 //
995 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
996 // CHECK1-SAME: () #[[ATTR1]] {
997 // CHECK1-NEXT:  entry:
998 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
999 // CHECK1-NEXT:    ret void
1000 //
1001 //
1002 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
1003 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1004 // CHECK1-NEXT:  entry:
1005 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1006 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1007 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1008 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1009 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1010 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1011 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1012 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1013 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1014 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1015 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1016 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1017 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1018 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1019 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1020 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1021 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1022 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1023 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1024 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1025 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1026 // CHECK1:       cond.true:
1027 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1028 // CHECK1:       cond.false:
1029 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1030 // CHECK1-NEXT:    br label [[COND_END]]
1031 // CHECK1:       cond.end:
1032 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1033 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1034 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1035 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1036 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1037 // CHECK1:       omp.inner.for.cond:
1038 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1039 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1040 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1041 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1042 // CHECK1:       omp.inner.for.body:
1043 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1044 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1045 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1046 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1047 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1048 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1049 // CHECK1:       omp.inner.for.inc:
1050 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1051 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1052 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1053 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1054 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1055 // CHECK1:       omp.inner.for.end:
1056 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1057 // CHECK1:       omp.loop.exit:
1058 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1059 // CHECK1-NEXT:    ret void
1060 //
1061 //
1062 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1063 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1064 // CHECK1-NEXT:  entry:
1065 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1066 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1067 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1068 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1069 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1070 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1071 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1072 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1073 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1074 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1075 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1076 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1077 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1078 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1079 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1080 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1081 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1082 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1083 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1084 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1085 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1086 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1087 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1088 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1089 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1090 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1091 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1092 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1093 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1094 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1095 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1096 // CHECK1:       cond.true:
1097 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1098 // CHECK1:       cond.false:
1099 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1100 // CHECK1-NEXT:    br label [[COND_END]]
1101 // CHECK1:       cond.end:
1102 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1103 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1104 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1105 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1106 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1107 // CHECK1:       omp.inner.for.cond:
1108 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1109 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1110 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1111 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1112 // CHECK1:       omp.inner.for.body:
1113 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1114 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1115 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1116 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1117 // CHECK1-NEXT:    call void @_Z3fn1v()
1118 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1119 // CHECK1:       omp.body.continue:
1120 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1121 // CHECK1:       omp.inner.for.inc:
1122 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1123 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1124 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1125 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1126 // CHECK1:       omp.inner.for.end:
1127 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1128 // CHECK1:       omp.loop.exit:
1129 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1130 // CHECK1-NEXT:    ret void
1131 //
1132 //
1133 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
1134 // CHECK1-SAME: () #[[ATTR1]] {
1135 // CHECK1-NEXT:  entry:
1136 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
1137 // CHECK1-NEXT:    ret void
1138 //
1139 //
1140 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12
1141 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1142 // CHECK1-NEXT:  entry:
1143 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1144 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1145 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1146 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1147 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1148 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1149 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1150 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1151 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1152 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1153 // CHECK1-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1154 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1155 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1156 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1157 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1158 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1159 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1160 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1161 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1162 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1163 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1164 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1165 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1166 // CHECK1:       cond.true:
1167 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1168 // CHECK1:       cond.false:
1169 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1170 // CHECK1-NEXT:    br label [[COND_END]]
1171 // CHECK1:       cond.end:
1172 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1173 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1174 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1175 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1176 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1177 // CHECK1:       omp.inner.for.cond:
1178 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1179 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1180 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1181 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1182 // CHECK1:       omp.inner.for.body:
1183 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1184 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1185 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1186 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1187 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1188 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1189 // CHECK1-NEXT:    call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
1190 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1191 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1192 // CHECK1:       omp.inner.for.inc:
1193 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1194 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1195 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1196 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1197 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1198 // CHECK1:       omp.inner.for.end:
1199 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1200 // CHECK1:       omp.loop.exit:
1201 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1202 // CHECK1-NEXT:    ret void
1203 //
1204 //
1205 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13
1206 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1207 // CHECK1-NEXT:  entry:
1208 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1209 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1210 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1211 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1212 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1213 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1214 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1215 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1216 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1217 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1218 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1219 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1220 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1221 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1222 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1223 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1224 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1225 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1226 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1227 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1228 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1229 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1230 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1231 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1232 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1233 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1234 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1235 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1236 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1237 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1238 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1239 // CHECK1:       cond.true:
1240 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1241 // CHECK1:       cond.false:
1242 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1243 // CHECK1-NEXT:    br label [[COND_END]]
1244 // CHECK1:       cond.end:
1245 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1246 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1247 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1248 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1249 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1250 // CHECK1:       omp.inner.for.cond:
1251 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1252 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1253 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1254 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1255 // CHECK1:       omp.inner.for.body:
1256 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1257 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1258 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1259 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1260 // CHECK1-NEXT:    call void @_Z3fn2v()
1261 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1262 // CHECK1:       omp.body.continue:
1263 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1264 // CHECK1:       omp.inner.for.inc:
1265 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1266 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1267 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1268 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1269 // CHECK1:       omp.inner.for.end:
1270 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1271 // CHECK1:       omp.loop.exit:
1272 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1273 // CHECK1-NEXT:    ret void
1274 //
1275 //
1276 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
1277 // CHECK1-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
1278 // CHECK1-NEXT:  entry:
1279 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
1280 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1281 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1282 // CHECK1-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
1283 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
1284 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
1285 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
1286 // CHECK1-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1287 // CHECK1-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1288 // CHECK1-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1289 // CHECK1-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
1290 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1291 // CHECK1-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
1292 // CHECK1-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
1293 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1294 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
1295 // CHECK1-NEXT:    ret void
1296 //
1297 //
1298 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1299 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1300 // CHECK1-NEXT:  entry:
1301 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1302 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1303 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1304 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1305 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1306 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1307 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1308 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1309 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1310 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1311 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1312 // CHECK1-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1313 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1314 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1315 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1316 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1317 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1318 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1319 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1320 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1321 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1322 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1323 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1324 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1325 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1326 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1327 // CHECK1:       cond.true:
1328 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1329 // CHECK1:       cond.false:
1330 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1331 // CHECK1-NEXT:    br label [[COND_END]]
1332 // CHECK1:       cond.end:
1333 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1334 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1335 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1336 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1337 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1338 // CHECK1:       omp.inner.for.cond:
1339 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1340 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1341 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1342 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1343 // CHECK1:       omp.inner.for.body:
1344 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1345 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1346 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1347 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1348 // CHECK1-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
1349 // CHECK1-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
1350 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1351 // CHECK1:       omp_if.then:
1352 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1353 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
1354 // CHECK1:       omp_if.else:
1355 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1356 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1357 // CHECK1-NEXT:    call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
1358 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1359 // CHECK1-NEXT:    br label [[OMP_IF_END]]
1360 // CHECK1:       omp_if.end:
1361 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1362 // CHECK1:       omp.inner.for.inc:
1363 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1364 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1365 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1366 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1367 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1368 // CHECK1:       omp.inner.for.end:
1369 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1370 // CHECK1:       omp.loop.exit:
1371 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1372 // CHECK1-NEXT:    ret void
1373 //
1374 //
1375 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1376 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1377 // CHECK1-NEXT:  entry:
1378 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1379 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1380 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1381 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1382 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1383 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1384 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1385 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1386 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1387 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1388 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1389 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1390 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1391 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1392 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1393 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1394 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1395 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1396 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1397 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1398 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1399 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1400 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1401 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1402 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1403 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1404 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1405 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1406 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1407 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1408 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1409 // CHECK1:       cond.true:
1410 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1411 // CHECK1:       cond.false:
1412 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1413 // CHECK1-NEXT:    br label [[COND_END]]
1414 // CHECK1:       cond.end:
1415 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1416 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1417 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1418 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1419 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1420 // CHECK1:       omp.inner.for.cond:
1421 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1422 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1423 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1424 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1425 // CHECK1:       omp.inner.for.body:
1426 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1427 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1428 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1429 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1430 // CHECK1-NEXT:    call void @_Z3fn3v()
1431 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1432 // CHECK1:       omp.body.continue:
1433 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1434 // CHECK1:       omp.inner.for.inc:
1435 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1436 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1437 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1438 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1439 // CHECK1:       omp.inner.for.end:
1440 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1441 // CHECK1:       omp.loop.exit:
1442 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1443 // CHECK1-NEXT:    ret void
1444 //
1445 //
1446 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1447 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
1448 // CHECK1-NEXT:  entry:
1449 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
1450 // CHECK1-NEXT:    ret void
1451 //
1452 //
1453 // CHECK2-LABEL: define {{[^@]+}}@_Z9gtid_testv
1454 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
1455 // CHECK2-NEXT:  entry:
1456 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1457 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1458 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
1459 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1460 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1461 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1462 // CHECK2:       omp_offload.failed:
1463 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
1464 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1465 // CHECK2:       omp_offload.cont:
1466 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1467 // CHECK2-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1468 // CHECK2-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
1469 // CHECK2-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1470 // CHECK2:       omp_offload.failed2:
1471 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
1472 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
1473 // CHECK2:       omp_offload.cont3:
1474 // CHECK2-NEXT:    ret void
1475 //
1476 //
1477 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
1478 // CHECK2-SAME: () #[[ATTR1:[0-9]+]] {
1479 // CHECK2-NEXT:  entry:
1480 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1481 // CHECK2-NEXT:    ret void
1482 //
1483 //
1484 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1485 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1486 // CHECK2-NEXT:  entry:
1487 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1488 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1489 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1490 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1491 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1492 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1493 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1494 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1495 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1496 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1497 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1498 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1499 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1500 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1501 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1502 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1503 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1504 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1505 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1506 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1507 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1508 // CHECK2:       cond.true:
1509 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1510 // CHECK2:       cond.false:
1511 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1512 // CHECK2-NEXT:    br label [[COND_END]]
1513 // CHECK2:       cond.end:
1514 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1515 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1516 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1517 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1518 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1519 // CHECK2:       omp.inner.for.cond:
1520 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1521 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1522 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1523 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1524 // CHECK2:       omp.inner.for.body:
1525 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1526 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1527 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1528 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1529 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1530 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1531 // CHECK2:       omp.inner.for.inc:
1532 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1533 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1534 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1535 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1536 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1537 // CHECK2:       omp.inner.for.end:
1538 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1539 // CHECK2:       omp.loop.exit:
1540 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1541 // CHECK2-NEXT:    ret void
1542 //
1543 //
1544 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1545 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1546 // CHECK2-NEXT:  entry:
1547 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1548 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1549 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1550 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1551 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1552 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1553 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1554 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1555 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1556 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1557 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1558 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1559 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1560 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1561 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1562 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1563 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1564 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1565 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1566 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1567 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1568 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1569 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1570 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1571 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1572 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1573 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1574 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1575 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1576 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1577 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1578 // CHECK2:       cond.true:
1579 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1580 // CHECK2:       cond.false:
1581 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1582 // CHECK2-NEXT:    br label [[COND_END]]
1583 // CHECK2:       cond.end:
1584 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1585 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1586 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1587 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1588 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1589 // CHECK2:       omp.inner.for.cond:
1590 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1591 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1592 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1593 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1594 // CHECK2:       omp.inner.for.body:
1595 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1596 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1597 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1598 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1599 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1600 // CHECK2:       omp.body.continue:
1601 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1602 // CHECK2:       omp.inner.for.inc:
1603 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1604 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1605 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1606 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1607 // CHECK2:       omp.inner.for.end:
1608 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1609 // CHECK2:       omp.loop.exit:
1610 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1611 // CHECK2-NEXT:    ret void
1612 //
1613 //
1614 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
1615 // CHECK2-SAME: () #[[ATTR1]] {
1616 // CHECK2-NEXT:  entry:
1617 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
1618 // CHECK2-NEXT:    ret void
1619 //
1620 //
1621 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1622 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1623 // CHECK2-NEXT:  entry:
1624 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1625 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1626 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1627 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1628 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1629 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1630 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1631 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1632 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1633 // CHECK2-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1634 // CHECK2-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1635 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1636 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1637 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1638 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1639 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1640 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1641 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1642 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1643 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1644 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1645 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1646 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1647 // CHECK2:       cond.true:
1648 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1649 // CHECK2:       cond.false:
1650 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1651 // CHECK2-NEXT:    br label [[COND_END]]
1652 // CHECK2:       cond.end:
1653 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1654 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1655 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1656 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1657 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1658 // CHECK2:       omp.inner.for.cond:
1659 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1660 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1661 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1662 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1663 // CHECK2:       omp.inner.for.body:
1664 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1665 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1666 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1667 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1668 // CHECK2-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1669 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1670 // CHECK2-NEXT:    call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
1671 // CHECK2-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1672 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1673 // CHECK2:       omp.inner.for.inc:
1674 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1675 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1676 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1677 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1678 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1679 // CHECK2:       omp.inner.for.end:
1680 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1681 // CHECK2:       omp.loop.exit:
1682 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1683 // CHECK2-NEXT:    ret void
1684 //
1685 //
1686 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1687 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1688 // CHECK2-NEXT:  entry:
1689 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1690 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1691 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1692 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1693 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1694 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1695 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1696 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1697 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1698 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1699 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1700 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1701 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1702 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1703 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1704 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1705 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1706 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1707 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1708 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1709 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1710 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1711 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1712 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1713 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1714 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1715 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1716 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1717 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1718 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1719 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1720 // CHECK2:       cond.true:
1721 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1722 // CHECK2:       cond.false:
1723 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1724 // CHECK2-NEXT:    br label [[COND_END]]
1725 // CHECK2:       cond.end:
1726 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1727 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1728 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1729 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1730 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1731 // CHECK2:       omp.inner.for.cond:
1732 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1733 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1734 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1735 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1736 // CHECK2:       omp.inner.for.body:
1737 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1738 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1739 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1740 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1741 // CHECK2-NEXT:    call void @_Z9gtid_testv()
1742 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1743 // CHECK2:       omp.body.continue:
1744 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1745 // CHECK2:       omp.inner.for.inc:
1746 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1747 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1748 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1749 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1750 // CHECK2:       omp.inner.for.end:
1751 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1752 // CHECK2:       omp.loop.exit:
1753 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1754 // CHECK2-NEXT:    ret void
1755 //
1756 //
1757 // CHECK2-LABEL: define {{[^@]+}}@main
1758 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
1759 // CHECK2-NEXT:  entry:
1760 // CHECK2-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1761 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1762 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1763 // CHECK2-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
1764 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1765 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1766 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1767 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1768 // CHECK2-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
1769 // CHECK2-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1770 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1771 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1772 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1773 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1774 // CHECK2:       omp_offload.failed:
1775 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
1776 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1777 // CHECK2:       omp_offload.cont:
1778 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1779 // CHECK2-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1780 // CHECK2-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
1781 // CHECK2-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1782 // CHECK2:       omp_offload.failed2:
1783 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
1784 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
1785 // CHECK2:       omp_offload.cont3:
1786 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
1787 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
1788 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
1789 // CHECK2-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
1790 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1791 // CHECK2-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
1792 // CHECK2-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
1793 // CHECK2-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1794 // CHECK2-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
1795 // CHECK2-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
1796 // CHECK2-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1797 // CHECK2-NEXT:    store i8* null, i8** [[TMP10]], align 8
1798 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1799 // CHECK2-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1800 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* @Arg, align 4
1801 // CHECK2-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
1802 // CHECK2-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1803 // CHECK2-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1804 // CHECK2-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1805 // CHECK2-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
1806 // CHECK2-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
1807 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1808 // CHECK2-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
1809 // CHECK2-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1810 // CHECK2-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1811 // CHECK2:       omp_offload.failed6:
1812 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
1813 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
1814 // CHECK2:       omp_offload.cont7:
1815 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* @Arg, align 4
1816 // CHECK2-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
1817 // CHECK2-NEXT:    ret i32 [[CALL]]
1818 //
1819 //
1820 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
1821 // CHECK2-SAME: () #[[ATTR1]] {
1822 // CHECK2-NEXT:  entry:
1823 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
1824 // CHECK2-NEXT:    ret void
1825 //
1826 //
1827 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
1828 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1829 // CHECK2-NEXT:  entry:
1830 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1831 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1832 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1833 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1834 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1835 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1836 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1837 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1838 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1839 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1840 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1841 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1842 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1843 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1844 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1845 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1846 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1847 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1848 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1849 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1850 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1851 // CHECK2:       cond.true:
1852 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1853 // CHECK2:       cond.false:
1854 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1855 // CHECK2-NEXT:    br label [[COND_END]]
1856 // CHECK2:       cond.end:
1857 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1858 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1859 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1860 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1861 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1862 // CHECK2:       omp.inner.for.cond:
1863 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1864 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1865 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1866 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1867 // CHECK2:       omp.inner.for.body:
1868 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1869 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1870 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1871 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1872 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1873 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1874 // CHECK2:       omp.inner.for.inc:
1875 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1876 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1877 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1878 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1879 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1880 // CHECK2:       omp.inner.for.end:
1881 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1882 // CHECK2:       omp.loop.exit:
1883 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1884 // CHECK2-NEXT:    ret void
1885 //
1886 //
1887 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5
1888 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1889 // CHECK2-NEXT:  entry:
1890 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1891 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1892 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1893 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1894 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1895 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1896 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1897 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1898 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1899 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1900 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1901 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1902 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1903 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1904 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1905 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1906 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1907 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1908 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1909 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1910 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1911 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1912 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1913 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1914 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1915 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1916 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1917 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1918 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1919 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1920 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1921 // CHECK2:       cond.true:
1922 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1923 // CHECK2:       cond.false:
1924 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1925 // CHECK2-NEXT:    br label [[COND_END]]
1926 // CHECK2:       cond.end:
1927 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1928 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1929 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1930 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1931 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1932 // CHECK2:       omp.inner.for.cond:
1933 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1934 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1935 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1936 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1937 // CHECK2:       omp.inner.for.body:
1938 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1939 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1940 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1941 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1942 // CHECK2-NEXT:    call void @_Z3fn4v()
1943 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1944 // CHECK2:       omp.body.continue:
1945 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1946 // CHECK2:       omp.inner.for.inc:
1947 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1948 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1949 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1950 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1951 // CHECK2:       omp.inner.for.end:
1952 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1953 // CHECK2:       omp.loop.exit:
1954 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1955 // CHECK2-NEXT:    ret void
1956 //
1957 //
1958 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
1959 // CHECK2-SAME: () #[[ATTR1]] {
1960 // CHECK2-NEXT:  entry:
1961 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
1962 // CHECK2-NEXT:    ret void
1963 //
1964 //
1965 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
1966 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1967 // CHECK2-NEXT:  entry:
1968 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1969 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1970 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1971 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1972 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1973 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1974 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1975 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1976 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1977 // CHECK2-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1978 // CHECK2-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1979 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1980 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1981 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1982 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1983 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1984 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1985 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1986 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1987 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1988 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1989 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1990 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1991 // CHECK2:       cond.true:
1992 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1993 // CHECK2:       cond.false:
1994 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1995 // CHECK2-NEXT:    br label [[COND_END]]
1996 // CHECK2:       cond.end:
1997 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1998 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1999 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2000 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2001 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2002 // CHECK2:       omp.inner.for.cond:
2003 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2004 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2005 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2006 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2007 // CHECK2:       omp.inner.for.body:
2008 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2009 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2010 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2011 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2012 // CHECK2-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2013 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2014 // CHECK2-NEXT:    call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2015 // CHECK2-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2016 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2017 // CHECK2:       omp.inner.for.inc:
2018 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2019 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2020 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2021 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2022 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2023 // CHECK2:       omp.inner.for.end:
2024 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2025 // CHECK2:       omp.loop.exit:
2026 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2027 // CHECK2-NEXT:    ret void
2028 //
2029 //
2030 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
2031 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2032 // CHECK2-NEXT:  entry:
2033 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2034 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2035 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2036 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2037 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2038 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2039 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2040 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2041 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2042 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2043 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2044 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2045 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2046 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2047 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2048 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2049 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2050 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2051 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2052 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2053 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2054 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2055 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2056 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2057 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2058 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2059 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2060 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2061 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2062 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2063 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2064 // CHECK2:       cond.true:
2065 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2066 // CHECK2:       cond.false:
2067 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2068 // CHECK2-NEXT:    br label [[COND_END]]
2069 // CHECK2:       cond.end:
2070 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2071 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2072 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2073 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2074 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2075 // CHECK2:       omp.inner.for.cond:
2076 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2077 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2078 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2079 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2080 // CHECK2:       omp.inner.for.body:
2081 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2082 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2083 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2084 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2085 // CHECK2-NEXT:    call void @_Z3fn5v()
2086 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2087 // CHECK2:       omp.body.continue:
2088 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2089 // CHECK2:       omp.inner.for.inc:
2090 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2091 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2092 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2093 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2094 // CHECK2:       omp.inner.for.end:
2095 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2096 // CHECK2:       omp.loop.exit:
2097 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2098 // CHECK2-NEXT:    ret void
2099 //
2100 //
2101 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
2102 // CHECK2-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
2103 // CHECK2-NEXT:  entry:
2104 // CHECK2-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
2105 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2106 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2107 // CHECK2-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
2108 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
2109 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
2110 // CHECK2-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
2111 // CHECK2-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2112 // CHECK2-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2113 // CHECK2-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2114 // CHECK2-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
2115 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2116 // CHECK2-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
2117 // CHECK2-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
2118 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2119 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
2120 // CHECK2-NEXT:    ret void
2121 //
2122 //
2123 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8
2124 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2125 // CHECK2-NEXT:  entry:
2126 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2127 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2128 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2129 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2130 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2131 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2132 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2133 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2134 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2135 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2136 // CHECK2-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2137 // CHECK2-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2138 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2139 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2140 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2141 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2142 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2143 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2144 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2145 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2146 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2147 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2148 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2149 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2150 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2151 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2152 // CHECK2:       cond.true:
2153 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2154 // CHECK2:       cond.false:
2155 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2156 // CHECK2-NEXT:    br label [[COND_END]]
2157 // CHECK2:       cond.end:
2158 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2159 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2160 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2161 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2162 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2163 // CHECK2:       omp.inner.for.cond:
2164 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2165 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2166 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2167 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2168 // CHECK2:       omp.inner.for.body:
2169 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2170 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2171 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2172 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2173 // CHECK2-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
2174 // CHECK2-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
2175 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2176 // CHECK2:       omp_if.then:
2177 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2178 // CHECK2-NEXT:    br label [[OMP_IF_END:%.*]]
2179 // CHECK2:       omp_if.else:
2180 // CHECK2-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2181 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2182 // CHECK2-NEXT:    call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2183 // CHECK2-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2184 // CHECK2-NEXT:    br label [[OMP_IF_END]]
2185 // CHECK2:       omp_if.end:
2186 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2187 // CHECK2:       omp.inner.for.inc:
2188 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2189 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2190 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2191 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2192 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2193 // CHECK2:       omp.inner.for.end:
2194 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2195 // CHECK2:       omp.loop.exit:
2196 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2197 // CHECK2-NEXT:    ret void
2198 //
2199 //
2200 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9
2201 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2202 // CHECK2-NEXT:  entry:
2203 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2204 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2205 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2206 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2207 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2208 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2209 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2210 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2211 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2212 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2213 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2214 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2215 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2216 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2217 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2218 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2219 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2220 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2221 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2222 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2223 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2224 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2225 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2226 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2227 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2228 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2229 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2230 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2231 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2232 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2233 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2234 // CHECK2:       cond.true:
2235 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2236 // CHECK2:       cond.false:
2237 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2238 // CHECK2-NEXT:    br label [[COND_END]]
2239 // CHECK2:       cond.end:
2240 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2241 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2242 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2243 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2244 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2245 // CHECK2:       omp.inner.for.cond:
2246 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2247 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2248 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2249 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2250 // CHECK2:       omp.inner.for.body:
2251 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2252 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2253 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2254 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2255 // CHECK2-NEXT:    call void @_Z3fn6v()
2256 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2257 // CHECK2:       omp.body.continue:
2258 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2259 // CHECK2:       omp.inner.for.inc:
2260 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2261 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2262 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2263 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2264 // CHECK2:       omp.inner.for.end:
2265 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2266 // CHECK2:       omp.loop.exit:
2267 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2268 // CHECK2-NEXT:    ret void
2269 //
2270 //
2271 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
2272 // CHECK2-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
2273 // CHECK2-NEXT:  entry:
2274 // CHECK2-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
2275 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2276 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2277 // CHECK2-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
2278 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2279 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2280 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2281 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2282 // CHECK2-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
2283 // CHECK2-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
2284 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2285 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
2286 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
2287 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2288 // CHECK2:       omp_offload.failed:
2289 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
2290 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2291 // CHECK2:       omp_offload.cont:
2292 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2293 // CHECK2-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
2294 // CHECK2-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
2295 // CHECK2-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
2296 // CHECK2:       omp_offload.failed2:
2297 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
2298 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
2299 // CHECK2:       omp_offload.cont3:
2300 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
2301 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
2302 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
2303 // CHECK2-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
2304 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2305 // CHECK2-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
2306 // CHECK2-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
2307 // CHECK2-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2308 // CHECK2-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
2309 // CHECK2-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
2310 // CHECK2-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2311 // CHECK2-NEXT:    store i8* null, i8** [[TMP10]], align 8
2312 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2313 // CHECK2-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2314 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
2315 // CHECK2-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
2316 // CHECK2-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2317 // CHECK2-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2318 // CHECK2-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2319 // CHECK2-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
2320 // CHECK2-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
2321 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2322 // CHECK2-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
2323 // CHECK2-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2324 // CHECK2-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
2325 // CHECK2:       omp_offload.failed6:
2326 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
2327 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
2328 // CHECK2:       omp_offload.cont7:
2329 // CHECK2-NEXT:    ret i32 0
2330 //
2331 //
2332 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
2333 // CHECK2-SAME: () #[[ATTR1]] {
2334 // CHECK2-NEXT:  entry:
2335 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
2336 // CHECK2-NEXT:    ret void
2337 //
2338 //
2339 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
2340 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2341 // CHECK2-NEXT:  entry:
2342 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2343 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2344 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2345 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2346 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2347 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2348 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2349 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2350 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2351 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2352 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2353 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2354 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2355 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2356 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2357 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2358 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2359 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2360 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2361 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2362 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2363 // CHECK2:       cond.true:
2364 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2365 // CHECK2:       cond.false:
2366 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2367 // CHECK2-NEXT:    br label [[COND_END]]
2368 // CHECK2:       cond.end:
2369 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2370 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2371 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2372 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2373 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2374 // CHECK2:       omp.inner.for.cond:
2375 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2376 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2377 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2378 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2379 // CHECK2:       omp.inner.for.body:
2380 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2381 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2382 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2383 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2384 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2385 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2386 // CHECK2:       omp.inner.for.inc:
2387 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2388 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2389 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2390 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2391 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2392 // CHECK2:       omp.inner.for.end:
2393 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2394 // CHECK2:       omp.loop.exit:
2395 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2396 // CHECK2-NEXT:    ret void
2397 //
2398 //
2399 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
2400 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2401 // CHECK2-NEXT:  entry:
2402 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2403 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2404 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2405 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2406 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2407 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2408 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2409 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2410 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2411 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2412 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2413 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2414 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2415 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2416 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2417 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2418 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2419 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2420 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2421 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2422 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2423 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2424 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2425 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2426 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2427 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2428 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2429 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2430 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2431 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2432 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2433 // CHECK2:       cond.true:
2434 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2435 // CHECK2:       cond.false:
2436 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2437 // CHECK2-NEXT:    br label [[COND_END]]
2438 // CHECK2:       cond.end:
2439 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2440 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2441 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2442 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2443 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2444 // CHECK2:       omp.inner.for.cond:
2445 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2446 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2447 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2448 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2449 // CHECK2:       omp.inner.for.body:
2450 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2451 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2452 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2453 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2454 // CHECK2-NEXT:    call void @_Z3fn1v()
2455 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2456 // CHECK2:       omp.body.continue:
2457 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2458 // CHECK2:       omp.inner.for.inc:
2459 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2460 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2461 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2462 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2463 // CHECK2:       omp.inner.for.end:
2464 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2465 // CHECK2:       omp.loop.exit:
2466 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2467 // CHECK2-NEXT:    ret void
2468 //
2469 //
2470 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
2471 // CHECK2-SAME: () #[[ATTR1]] {
2472 // CHECK2-NEXT:  entry:
2473 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
2474 // CHECK2-NEXT:    ret void
2475 //
2476 //
2477 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..12
2478 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2479 // CHECK2-NEXT:  entry:
2480 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2481 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2482 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2483 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2484 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2485 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2486 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2487 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2488 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2489 // CHECK2-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2490 // CHECK2-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2491 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2492 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2493 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2494 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2495 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2496 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2497 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2498 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2499 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2500 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2501 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2502 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2503 // CHECK2:       cond.true:
2504 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2505 // CHECK2:       cond.false:
2506 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2507 // CHECK2-NEXT:    br label [[COND_END]]
2508 // CHECK2:       cond.end:
2509 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2510 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2511 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2512 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2513 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2514 // CHECK2:       omp.inner.for.cond:
2515 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2516 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2517 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2518 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2519 // CHECK2:       omp.inner.for.body:
2520 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2521 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2522 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2523 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2524 // CHECK2-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2525 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2526 // CHECK2-NEXT:    call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2527 // CHECK2-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2528 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2529 // CHECK2:       omp.inner.for.inc:
2530 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2531 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2532 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2533 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2534 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2535 // CHECK2:       omp.inner.for.end:
2536 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2537 // CHECK2:       omp.loop.exit:
2538 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2539 // CHECK2-NEXT:    ret void
2540 //
2541 //
2542 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..13
2543 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2544 // CHECK2-NEXT:  entry:
2545 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2546 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2547 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2548 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2549 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2550 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2551 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2552 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2553 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2554 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2555 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2556 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2557 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2558 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2559 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2560 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2561 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2562 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2563 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2564 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2565 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2566 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2567 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2568 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2569 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2570 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2571 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2572 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2573 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2574 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2575 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2576 // CHECK2:       cond.true:
2577 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2578 // CHECK2:       cond.false:
2579 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2580 // CHECK2-NEXT:    br label [[COND_END]]
2581 // CHECK2:       cond.end:
2582 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2583 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2584 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2585 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2586 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2587 // CHECK2:       omp.inner.for.cond:
2588 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2589 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2590 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2591 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2592 // CHECK2:       omp.inner.for.body:
2593 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2594 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2595 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2596 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2597 // CHECK2-NEXT:    call void @_Z3fn2v()
2598 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2599 // CHECK2:       omp.body.continue:
2600 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2601 // CHECK2:       omp.inner.for.inc:
2602 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2603 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2604 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2605 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2606 // CHECK2:       omp.inner.for.end:
2607 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2608 // CHECK2:       omp.loop.exit:
2609 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2610 // CHECK2-NEXT:    ret void
2611 //
2612 //
2613 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
2614 // CHECK2-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
2615 // CHECK2-NEXT:  entry:
2616 // CHECK2-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
2617 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2618 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2619 // CHECK2-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
2620 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
2621 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
2622 // CHECK2-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
2623 // CHECK2-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2624 // CHECK2-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2625 // CHECK2-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2626 // CHECK2-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
2627 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2628 // CHECK2-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
2629 // CHECK2-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
2630 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2631 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
2632 // CHECK2-NEXT:    ret void
2633 //
2634 //
2635 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14
2636 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2637 // CHECK2-NEXT:  entry:
2638 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2639 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2640 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2641 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2642 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2643 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2644 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2645 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2646 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2647 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2648 // CHECK2-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2649 // CHECK2-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2650 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2651 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2652 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2653 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2654 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2655 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2656 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2657 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2658 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2659 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2660 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2661 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2662 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2663 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2664 // CHECK2:       cond.true:
2665 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2666 // CHECK2:       cond.false:
2667 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2668 // CHECK2-NEXT:    br label [[COND_END]]
2669 // CHECK2:       cond.end:
2670 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2671 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2672 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2673 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2674 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2675 // CHECK2:       omp.inner.for.cond:
2676 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2677 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2678 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2679 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2680 // CHECK2:       omp.inner.for.body:
2681 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2682 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2683 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2684 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2685 // CHECK2-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
2686 // CHECK2-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
2687 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2688 // CHECK2:       omp_if.then:
2689 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2690 // CHECK2-NEXT:    br label [[OMP_IF_END:%.*]]
2691 // CHECK2:       omp_if.else:
2692 // CHECK2-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2693 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2694 // CHECK2-NEXT:    call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2695 // CHECK2-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2696 // CHECK2-NEXT:    br label [[OMP_IF_END]]
2697 // CHECK2:       omp_if.end:
2698 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2699 // CHECK2:       omp.inner.for.inc:
2700 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2701 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2702 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2703 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2704 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2705 // CHECK2:       omp.inner.for.end:
2706 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2707 // CHECK2:       omp.loop.exit:
2708 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2709 // CHECK2-NEXT:    ret void
2710 //
2711 //
2712 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15
2713 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2714 // CHECK2-NEXT:  entry:
2715 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2716 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2717 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2718 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2719 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2720 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2721 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2722 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2723 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2724 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2725 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2726 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2727 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2728 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2729 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2730 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2731 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2732 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2733 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2734 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2735 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2736 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2737 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2738 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2739 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2740 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2741 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2742 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2743 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2744 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2745 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2746 // CHECK2:       cond.true:
2747 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2748 // CHECK2:       cond.false:
2749 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2750 // CHECK2-NEXT:    br label [[COND_END]]
2751 // CHECK2:       cond.end:
2752 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2753 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2754 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2755 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2756 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2757 // CHECK2:       omp.inner.for.cond:
2758 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2759 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2760 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2761 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2762 // CHECK2:       omp.inner.for.body:
2763 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2764 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2765 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2766 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2767 // CHECK2-NEXT:    call void @_Z3fn3v()
2768 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2769 // CHECK2:       omp.body.continue:
2770 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2771 // CHECK2:       omp.inner.for.inc:
2772 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2773 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2774 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2775 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2776 // CHECK2:       omp.inner.for.end:
2777 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2778 // CHECK2:       omp.loop.exit:
2779 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2780 // CHECK2-NEXT:    ret void
2781 //
2782 //
2783 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2784 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] {
2785 // CHECK2-NEXT:  entry:
2786 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
2787 // CHECK2-NEXT:    ret void
2788 //
2789 //
2790 // CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv
2791 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
2792 // CHECK3-NEXT:  entry:
2793 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2794 // CHECK3-NEXT:    [[I1:%.*]] = alloca i32, align 4
2795 // CHECK3-NEXT:    store i32 0, i32* [[I]], align 4
2796 // CHECK3-NEXT:    br label [[FOR_COND:%.*]]
2797 // CHECK3:       for.cond:
2798 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
2799 // CHECK3-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
2800 // CHECK3-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
2801 // CHECK3:       for.body:
2802 // CHECK3-NEXT:    br label [[FOR_INC:%.*]]
2803 // CHECK3:       for.inc:
2804 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
2805 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
2806 // CHECK3-NEXT:    store i32 [[INC]], i32* [[I]], align 4
2807 // CHECK3-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
2808 // CHECK3:       for.end:
2809 // CHECK3-NEXT:    store i32 0, i32* [[I1]], align 4
2810 // CHECK3-NEXT:    br label [[FOR_COND2:%.*]]
2811 // CHECK3:       for.cond2:
2812 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
2813 // CHECK3-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
2814 // CHECK3-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
2815 // CHECK3:       for.body4:
2816 // CHECK3-NEXT:    call void @_Z9gtid_testv()
2817 // CHECK3-NEXT:    br label [[FOR_INC5:%.*]]
2818 // CHECK3:       for.inc5:
2819 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
2820 // CHECK3-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
2821 // CHECK3-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
2822 // CHECK3-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]]
2823 // CHECK3:       for.end7:
2824 // CHECK3-NEXT:    ret void
2825 //
2826 //
2827 // CHECK3-LABEL: define {{[^@]+}}@main
2828 // CHECK3-SAME: () #[[ATTR1:[0-9]+]] {
2829 // CHECK3-NEXT:  entry:
2830 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2831 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2832 // CHECK3-NEXT:    [[I1:%.*]] = alloca i32, align 4
2833 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2834 // CHECK3-NEXT:    [[I8:%.*]] = alloca i32, align 4
2835 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2836 // CHECK3-NEXT:    store i32 0, i32* [[I]], align 4
2837 // CHECK3-NEXT:    br label [[FOR_COND:%.*]]
2838 // CHECK3:       for.cond:
2839 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
2840 // CHECK3-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
2841 // CHECK3-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
2842 // CHECK3:       for.body:
2843 // CHECK3-NEXT:    call void @_Z3fn4v()
2844 // CHECK3-NEXT:    br label [[FOR_INC:%.*]]
2845 // CHECK3:       for.inc:
2846 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
2847 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
2848 // CHECK3-NEXT:    store i32 [[INC]], i32* [[I]], align 4
2849 // CHECK3-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
2850 // CHECK3:       for.end:
2851 // CHECK3-NEXT:    store i32 0, i32* [[I1]], align 4
2852 // CHECK3-NEXT:    br label [[FOR_COND2:%.*]]
2853 // CHECK3:       for.cond2:
2854 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
2855 // CHECK3-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
2856 // CHECK3-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
2857 // CHECK3:       for.body4:
2858 // CHECK3-NEXT:    call void @_Z3fn5v()
2859 // CHECK3-NEXT:    br label [[FOR_INC5:%.*]]
2860 // CHECK3:       for.inc5:
2861 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
2862 // CHECK3-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
2863 // CHECK3-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
2864 // CHECK3-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]]
2865 // CHECK3:       for.end7:
2866 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
2867 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
2868 // CHECK3-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2869 // CHECK3-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2870 // CHECK3-NEXT:    store i32 0, i32* [[I8]], align 4
2871 // CHECK3-NEXT:    br label [[FOR_COND9:%.*]]
2872 // CHECK3:       for.cond9:
2873 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
2874 // CHECK3-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
2875 // CHECK3-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
2876 // CHECK3:       for.body11:
2877 // CHECK3-NEXT:    call void @_Z3fn6v()
2878 // CHECK3-NEXT:    br label [[FOR_INC12:%.*]]
2879 // CHECK3:       for.inc12:
2880 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
2881 // CHECK3-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
2882 // CHECK3-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
2883 // CHECK3-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP7:![0-9]+]]
2884 // CHECK3:       for.end14:
2885 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* @Arg, align 4
2886 // CHECK3-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP7]])
2887 // CHECK3-NEXT:    ret i32 [[CALL]]
2888 //
2889 //
2890 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
2891 // CHECK3-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
2892 // CHECK3-NEXT:  entry:
2893 // CHECK3-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
2894 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2895 // CHECK3-NEXT:    [[I1:%.*]] = alloca i32, align 4
2896 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2897 // CHECK3-NEXT:    [[I8:%.*]] = alloca i32, align 4
2898 // CHECK3-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
2899 // CHECK3-NEXT:    store i32 0, i32* [[I]], align 4
2900 // CHECK3-NEXT:    br label [[FOR_COND:%.*]]
2901 // CHECK3:       for.cond:
2902 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
2903 // CHECK3-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
2904 // CHECK3-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
2905 // CHECK3:       for.body:
2906 // CHECK3-NEXT:    call void @_Z3fn1v()
2907 // CHECK3-NEXT:    br label [[FOR_INC:%.*]]
2908 // CHECK3:       for.inc:
2909 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
2910 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
2911 // CHECK3-NEXT:    store i32 [[INC]], i32* [[I]], align 4
2912 // CHECK3-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
2913 // CHECK3:       for.end:
2914 // CHECK3-NEXT:    store i32 0, i32* [[I1]], align 4
2915 // CHECK3-NEXT:    br label [[FOR_COND2:%.*]]
2916 // CHECK3:       for.cond2:
2917 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
2918 // CHECK3-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
2919 // CHECK3-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
2920 // CHECK3:       for.body4:
2921 // CHECK3-NEXT:    call void @_Z3fn2v()
2922 // CHECK3-NEXT:    br label [[FOR_INC5:%.*]]
2923 // CHECK3:       for.inc5:
2924 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
2925 // CHECK3-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
2926 // CHECK3-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
2927 // CHECK3-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP9:![0-9]+]]
2928 // CHECK3:       for.end7:
2929 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
2930 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
2931 // CHECK3-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2932 // CHECK3-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2933 // CHECK3-NEXT:    store i32 0, i32* [[I8]], align 4
2934 // CHECK3-NEXT:    br label [[FOR_COND9:%.*]]
2935 // CHECK3:       for.cond9:
2936 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
2937 // CHECK3-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
2938 // CHECK3-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
2939 // CHECK3:       for.body11:
2940 // CHECK3-NEXT:    call void @_Z3fn3v()
2941 // CHECK3-NEXT:    br label [[FOR_INC12:%.*]]
2942 // CHECK3:       for.inc12:
2943 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
2944 // CHECK3-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
2945 // CHECK3-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
2946 // CHECK3-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP10:![0-9]+]]
2947 // CHECK3:       for.end14:
2948 // CHECK3-NEXT:    ret i32 0
2949 //
2950 //
2951 // CHECK4-LABEL: define {{[^@]+}}@_Z9gtid_testv
2952 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
2953 // CHECK4-NEXT:  entry:
2954 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
2955 // CHECK4-NEXT:    [[I1:%.*]] = alloca i32, align 4
2956 // CHECK4-NEXT:    store i32 0, i32* [[I]], align 4
2957 // CHECK4-NEXT:    br label [[FOR_COND:%.*]]
2958 // CHECK4:       for.cond:
2959 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
2960 // CHECK4-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
2961 // CHECK4-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
2962 // CHECK4:       for.body:
2963 // CHECK4-NEXT:    br label [[FOR_INC:%.*]]
2964 // CHECK4:       for.inc:
2965 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
2966 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
2967 // CHECK4-NEXT:    store i32 [[INC]], i32* [[I]], align 4
2968 // CHECK4-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
2969 // CHECK4:       for.end:
2970 // CHECK4-NEXT:    store i32 0, i32* [[I1]], align 4
2971 // CHECK4-NEXT:    br label [[FOR_COND2:%.*]]
2972 // CHECK4:       for.cond2:
2973 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
2974 // CHECK4-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
2975 // CHECK4-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
2976 // CHECK4:       for.body4:
2977 // CHECK4-NEXT:    call void @_Z9gtid_testv()
2978 // CHECK4-NEXT:    br label [[FOR_INC5:%.*]]
2979 // CHECK4:       for.inc5:
2980 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
2981 // CHECK4-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
2982 // CHECK4-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
2983 // CHECK4-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]]
2984 // CHECK4:       for.end7:
2985 // CHECK4-NEXT:    ret void
2986 //
2987 //
2988 // CHECK4-LABEL: define {{[^@]+}}@main
2989 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] {
2990 // CHECK4-NEXT:  entry:
2991 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2992 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
2993 // CHECK4-NEXT:    [[I1:%.*]] = alloca i32, align 4
2994 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2995 // CHECK4-NEXT:    [[I8:%.*]] = alloca i32, align 4
2996 // CHECK4-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2997 // CHECK4-NEXT:    store i32 0, i32* [[I]], align 4
2998 // CHECK4-NEXT:    br label [[FOR_COND:%.*]]
2999 // CHECK4:       for.cond:
3000 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
3001 // CHECK4-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
3002 // CHECK4-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3003 // CHECK4:       for.body:
3004 // CHECK4-NEXT:    call void @_Z3fn4v()
3005 // CHECK4-NEXT:    br label [[FOR_INC:%.*]]
3006 // CHECK4:       for.inc:
3007 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
3008 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
3009 // CHECK4-NEXT:    store i32 [[INC]], i32* [[I]], align 4
3010 // CHECK4-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
3011 // CHECK4:       for.end:
3012 // CHECK4-NEXT:    store i32 0, i32* [[I1]], align 4
3013 // CHECK4-NEXT:    br label [[FOR_COND2:%.*]]
3014 // CHECK4:       for.cond2:
3015 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
3016 // CHECK4-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
3017 // CHECK4-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
3018 // CHECK4:       for.body4:
3019 // CHECK4-NEXT:    call void @_Z3fn5v()
3020 // CHECK4-NEXT:    br label [[FOR_INC5:%.*]]
3021 // CHECK4:       for.inc5:
3022 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
3023 // CHECK4-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
3024 // CHECK4-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
3025 // CHECK4-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]]
3026 // CHECK4:       for.end7:
3027 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
3028 // CHECK4-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
3029 // CHECK4-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3030 // CHECK4-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3031 // CHECK4-NEXT:    store i32 0, i32* [[I8]], align 4
3032 // CHECK4-NEXT:    br label [[FOR_COND9:%.*]]
3033 // CHECK4:       for.cond9:
3034 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
3035 // CHECK4-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
3036 // CHECK4-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
3037 // CHECK4:       for.body11:
3038 // CHECK4-NEXT:    call void @_Z3fn6v()
3039 // CHECK4-NEXT:    br label [[FOR_INC12:%.*]]
3040 // CHECK4:       for.inc12:
3041 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
3042 // CHECK4-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
3043 // CHECK4-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
3044 // CHECK4-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP7:![0-9]+]]
3045 // CHECK4:       for.end14:
3046 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* @Arg, align 4
3047 // CHECK4-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP7]])
3048 // CHECK4-NEXT:    ret i32 [[CALL]]
3049 //
3050 //
3051 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
3052 // CHECK4-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
3053 // CHECK4-NEXT:  entry:
3054 // CHECK4-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
3055 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3056 // CHECK4-NEXT:    [[I1:%.*]] = alloca i32, align 4
3057 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3058 // CHECK4-NEXT:    [[I8:%.*]] = alloca i32, align 4
3059 // CHECK4-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
3060 // CHECK4-NEXT:    store i32 0, i32* [[I]], align 4
3061 // CHECK4-NEXT:    br label [[FOR_COND:%.*]]
3062 // CHECK4:       for.cond:
3063 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
3064 // CHECK4-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
3065 // CHECK4-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3066 // CHECK4:       for.body:
3067 // CHECK4-NEXT:    call void @_Z3fn1v()
3068 // CHECK4-NEXT:    br label [[FOR_INC:%.*]]
3069 // CHECK4:       for.inc:
3070 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
3071 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
3072 // CHECK4-NEXT:    store i32 [[INC]], i32* [[I]], align 4
3073 // CHECK4-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
3074 // CHECK4:       for.end:
3075 // CHECK4-NEXT:    store i32 0, i32* [[I1]], align 4
3076 // CHECK4-NEXT:    br label [[FOR_COND2:%.*]]
3077 // CHECK4:       for.cond2:
3078 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
3079 // CHECK4-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
3080 // CHECK4-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
3081 // CHECK4:       for.body4:
3082 // CHECK4-NEXT:    call void @_Z3fn2v()
3083 // CHECK4-NEXT:    br label [[FOR_INC5:%.*]]
3084 // CHECK4:       for.inc5:
3085 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
3086 // CHECK4-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
3087 // CHECK4-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
3088 // CHECK4-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP9:![0-9]+]]
3089 // CHECK4:       for.end7:
3090 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
3091 // CHECK4-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
3092 // CHECK4-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3093 // CHECK4-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3094 // CHECK4-NEXT:    store i32 0, i32* [[I8]], align 4
3095 // CHECK4-NEXT:    br label [[FOR_COND9:%.*]]
3096 // CHECK4:       for.cond9:
3097 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
3098 // CHECK4-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
3099 // CHECK4-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
3100 // CHECK4:       for.body11:
3101 // CHECK4-NEXT:    call void @_Z3fn3v()
3102 // CHECK4-NEXT:    br label [[FOR_INC12:%.*]]
3103 // CHECK4:       for.inc12:
3104 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
3105 // CHECK4-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
3106 // CHECK4-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
3107 // CHECK4-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP10:![0-9]+]]
3108 // CHECK4:       for.end14:
3109 // CHECK4-NEXT:    ret i32 0
3110 //
3111 //
3112 // CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv
3113 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
3114 // CHECK5-NEXT:  entry:
3115 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3116 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3117 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
3118 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
3119 // CHECK5-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3120 // CHECK5-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3121 // CHECK5:       omp_offload.failed:
3122 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
3123 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3124 // CHECK5:       omp_offload.cont:
3125 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3126 // CHECK5-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3127 // CHECK5-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
3128 // CHECK5-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3129 // CHECK5:       omp_offload.failed2:
3130 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
3131 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
3132 // CHECK5:       omp_offload.cont3:
3133 // CHECK5-NEXT:    ret void
3134 //
3135 //
3136 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
3137 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] {
3138 // CHECK5-NEXT:  entry:
3139 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
3140 // CHECK5-NEXT:    ret void
3141 //
3142 //
3143 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
3144 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3145 // CHECK5-NEXT:  entry:
3146 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3147 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3148 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3149 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3150 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3151 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3152 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3153 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3154 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3155 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3156 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3157 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3158 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3159 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3160 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3161 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3162 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3163 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3164 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3165 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3166 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3167 // CHECK5:       cond.true:
3168 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3169 // CHECK5:       cond.false:
3170 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3171 // CHECK5-NEXT:    br label [[COND_END]]
3172 // CHECK5:       cond.end:
3173 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3174 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3175 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3176 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3177 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3178 // CHECK5:       omp.inner.for.cond:
3179 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3180 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3181 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3182 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3183 // CHECK5:       omp.inner.for.body:
3184 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3185 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3186 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3187 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3188 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3189 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3190 // CHECK5:       omp.inner.for.inc:
3191 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3192 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3193 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3194 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3195 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3196 // CHECK5:       omp.inner.for.end:
3197 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3198 // CHECK5:       omp.loop.exit:
3199 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3200 // CHECK5-NEXT:    ret void
3201 //
3202 //
3203 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
3204 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3205 // CHECK5-NEXT:  entry:
3206 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3207 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3208 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3209 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3210 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3211 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3212 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3213 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3214 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3215 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3216 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3217 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3218 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3219 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3220 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3221 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3222 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3223 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3224 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3225 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3226 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3227 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3228 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3229 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3230 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3231 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3232 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3233 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3234 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3235 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3236 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3237 // CHECK5:       cond.true:
3238 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3239 // CHECK5:       cond.false:
3240 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3241 // CHECK5-NEXT:    br label [[COND_END]]
3242 // CHECK5:       cond.end:
3243 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3244 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3245 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3246 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3247 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3248 // CHECK5:       omp.inner.for.cond:
3249 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3250 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3251 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3252 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3253 // CHECK5:       omp.inner.for.body:
3254 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3255 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3256 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3257 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3258 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3259 // CHECK5:       omp.body.continue:
3260 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3261 // CHECK5:       omp.inner.for.inc:
3262 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3263 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3264 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3265 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3266 // CHECK5:       omp.inner.for.end:
3267 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3268 // CHECK5:       omp.loop.exit:
3269 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3270 // CHECK5-NEXT:    ret void
3271 //
3272 //
3273 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
3274 // CHECK5-SAME: () #[[ATTR1]] {
3275 // CHECK5-NEXT:  entry:
3276 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
3277 // CHECK5-NEXT:    ret void
3278 //
3279 //
3280 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
3281 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3282 // CHECK5-NEXT:  entry:
3283 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3284 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3285 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3286 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3287 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3288 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3289 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3290 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3291 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3292 // CHECK5-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3293 // CHECK5-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3294 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3295 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3296 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3297 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3298 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3299 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3300 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3301 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3302 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3303 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3304 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3305 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3306 // CHECK5:       cond.true:
3307 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3308 // CHECK5:       cond.false:
3309 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3310 // CHECK5-NEXT:    br label [[COND_END]]
3311 // CHECK5:       cond.end:
3312 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3313 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3314 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3315 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3316 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3317 // CHECK5:       omp.inner.for.cond:
3318 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3319 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3320 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3321 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3322 // CHECK5:       omp.inner.for.body:
3323 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3324 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3325 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3326 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3327 // CHECK5-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3328 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3329 // CHECK5-NEXT:    call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3330 // CHECK5-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3331 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3332 // CHECK5:       omp.inner.for.inc:
3333 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3334 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3335 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3336 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3337 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3338 // CHECK5:       omp.inner.for.end:
3339 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3340 // CHECK5:       omp.loop.exit:
3341 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3342 // CHECK5-NEXT:    ret void
3343 //
3344 //
3345 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
3346 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3347 // CHECK5-NEXT:  entry:
3348 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3349 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3350 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3351 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3352 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3353 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3354 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3355 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3356 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3357 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3358 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3359 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3360 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3361 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3362 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3363 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3364 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3365 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3366 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3367 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3368 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3369 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3370 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3371 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3372 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3373 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3374 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3375 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3376 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3377 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3378 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3379 // CHECK5:       cond.true:
3380 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3381 // CHECK5:       cond.false:
3382 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3383 // CHECK5-NEXT:    br label [[COND_END]]
3384 // CHECK5:       cond.end:
3385 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3386 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3387 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3388 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3389 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3390 // CHECK5:       omp.inner.for.cond:
3391 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3392 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3393 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3394 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3395 // CHECK5:       omp.inner.for.body:
3396 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3397 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3398 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3399 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3400 // CHECK5-NEXT:    call void @_Z9gtid_testv()
3401 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3402 // CHECK5:       omp.body.continue:
3403 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3404 // CHECK5:       omp.inner.for.inc:
3405 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3406 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3407 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3408 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3409 // CHECK5:       omp.inner.for.end:
3410 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3411 // CHECK5:       omp.loop.exit:
3412 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3413 // CHECK5-NEXT:    ret void
3414 //
3415 //
3416 // CHECK5-LABEL: define {{[^@]+}}@main
3417 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
3418 // CHECK5-NEXT:  entry:
3419 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3420 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3421 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3422 // CHECK5-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
3423 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3424 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3425 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3426 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3427 // CHECK5-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
3428 // CHECK5-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3429 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3430 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
3431 // CHECK5-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3432 // CHECK5-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3433 // CHECK5:       omp_offload.failed:
3434 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
3435 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3436 // CHECK5:       omp_offload.cont:
3437 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3438 // CHECK5-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3439 // CHECK5-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
3440 // CHECK5-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3441 // CHECK5:       omp_offload.failed2:
3442 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
3443 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
3444 // CHECK5:       omp_offload.cont3:
3445 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
3446 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
3447 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
3448 // CHECK5-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
3449 // CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3450 // CHECK5-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
3451 // CHECK5-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
3452 // CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3453 // CHECK5-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
3454 // CHECK5-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
3455 // CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3456 // CHECK5-NEXT:    store i8* null, i8** [[TMP10]], align 8
3457 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3458 // CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3459 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* @Arg, align 4
3460 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
3461 // CHECK5-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3462 // CHECK5-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3463 // CHECK5-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3464 // CHECK5-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
3465 // CHECK5-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
3466 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3467 // CHECK5-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
3468 // CHECK5-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3469 // CHECK5-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3470 // CHECK5:       omp_offload.failed6:
3471 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
3472 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
3473 // CHECK5:       omp_offload.cont7:
3474 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, i32* @Arg, align 4
3475 // CHECK5-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
3476 // CHECK5-NEXT:    ret i32 [[CALL]]
3477 //
3478 //
3479 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
3480 // CHECK5-SAME: () #[[ATTR1]] {
3481 // CHECK5-NEXT:  entry:
3482 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
3483 // CHECK5-NEXT:    ret void
3484 //
3485 //
3486 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4
3487 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3488 // CHECK5-NEXT:  entry:
3489 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3490 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3491 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3492 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3493 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3494 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3495 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3496 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3497 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3498 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3499 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3500 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3501 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3502 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3503 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3504 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3505 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3506 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3507 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3508 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3509 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3510 // CHECK5:       cond.true:
3511 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3512 // CHECK5:       cond.false:
3513 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3514 // CHECK5-NEXT:    br label [[COND_END]]
3515 // CHECK5:       cond.end:
3516 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3517 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3518 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3519 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3520 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3521 // CHECK5:       omp.inner.for.cond:
3522 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3523 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3524 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3525 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3526 // CHECK5:       omp.inner.for.body:
3527 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3528 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3529 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3530 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3531 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3532 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3533 // CHECK5:       omp.inner.for.inc:
3534 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3535 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3536 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3537 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3538 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3539 // CHECK5:       omp.inner.for.end:
3540 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3541 // CHECK5:       omp.loop.exit:
3542 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3543 // CHECK5-NEXT:    ret void
3544 //
3545 //
3546 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5
3547 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3548 // CHECK5-NEXT:  entry:
3549 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3550 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3551 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3552 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3553 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3554 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3555 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3556 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3557 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3558 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3559 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3560 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3561 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3562 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3563 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3564 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3565 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3566 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3567 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3568 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3569 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3570 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3571 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3572 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3573 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3574 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3575 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3576 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3577 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3578 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3579 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3580 // CHECK5:       cond.true:
3581 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3582 // CHECK5:       cond.false:
3583 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3584 // CHECK5-NEXT:    br label [[COND_END]]
3585 // CHECK5:       cond.end:
3586 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3587 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3588 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3589 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3590 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3591 // CHECK5:       omp.inner.for.cond:
3592 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3593 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3594 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3595 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3596 // CHECK5:       omp.inner.for.body:
3597 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3598 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3599 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3600 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3601 // CHECK5-NEXT:    call void @_Z3fn4v()
3602 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3603 // CHECK5:       omp.body.continue:
3604 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3605 // CHECK5:       omp.inner.for.inc:
3606 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3607 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3608 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3609 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3610 // CHECK5:       omp.inner.for.end:
3611 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3612 // CHECK5:       omp.loop.exit:
3613 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3614 // CHECK5-NEXT:    ret void
3615 //
3616 //
3617 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
3618 // CHECK5-SAME: () #[[ATTR1]] {
3619 // CHECK5-NEXT:  entry:
3620 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
3621 // CHECK5-NEXT:    ret void
3622 //
3623 //
3624 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
3625 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3626 // CHECK5-NEXT:  entry:
3627 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3628 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3629 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3630 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3631 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3632 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3633 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3634 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3635 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3636 // CHECK5-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3637 // CHECK5-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3638 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3639 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3640 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3641 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3642 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3643 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3644 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3645 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3646 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3647 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3648 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3649 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3650 // CHECK5:       cond.true:
3651 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3652 // CHECK5:       cond.false:
3653 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3654 // CHECK5-NEXT:    br label [[COND_END]]
3655 // CHECK5:       cond.end:
3656 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3657 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3658 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3659 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3660 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3661 // CHECK5:       omp.inner.for.cond:
3662 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3663 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3664 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3665 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3666 // CHECK5:       omp.inner.for.body:
3667 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3668 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3669 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3670 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3671 // CHECK5-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3672 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3673 // CHECK5-NEXT:    call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3674 // CHECK5-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3675 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3676 // CHECK5:       omp.inner.for.inc:
3677 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3678 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3679 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3680 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3681 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3682 // CHECK5:       omp.inner.for.end:
3683 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3684 // CHECK5:       omp.loop.exit:
3685 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3686 // CHECK5-NEXT:    ret void
3687 //
3688 //
3689 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
3690 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3691 // CHECK5-NEXT:  entry:
3692 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3693 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3694 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3695 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3696 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3697 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3698 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3699 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3700 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3701 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3702 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3703 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3704 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3705 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3706 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3707 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3708 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3709 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3710 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3711 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3712 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3713 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3714 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3715 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3716 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3717 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3718 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3719 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3720 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3721 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3722 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3723 // CHECK5:       cond.true:
3724 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3725 // CHECK5:       cond.false:
3726 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3727 // CHECK5-NEXT:    br label [[COND_END]]
3728 // CHECK5:       cond.end:
3729 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3730 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3731 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3732 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3733 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3734 // CHECK5:       omp.inner.for.cond:
3735 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3736 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3737 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3738 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3739 // CHECK5:       omp.inner.for.body:
3740 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3741 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3742 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3743 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3744 // CHECK5-NEXT:    call void @_Z3fn5v()
3745 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3746 // CHECK5:       omp.body.continue:
3747 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3748 // CHECK5:       omp.inner.for.inc:
3749 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3750 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3751 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3752 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3753 // CHECK5:       omp.inner.for.end:
3754 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3755 // CHECK5:       omp.loop.exit:
3756 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3757 // CHECK5-NEXT:    ret void
3758 //
3759 //
3760 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
3761 // CHECK5-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
3762 // CHECK5-NEXT:  entry:
3763 // CHECK5-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
3764 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3765 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3766 // CHECK5-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
3767 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
3768 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
3769 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
3770 // CHECK5-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3771 // CHECK5-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3772 // CHECK5-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3773 // CHECK5-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
3774 // CHECK5-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3775 // CHECK5-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
3776 // CHECK5-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
3777 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3778 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
3779 // CHECK5-NEXT:    ret void
3780 //
3781 //
3782 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8
3783 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3784 // CHECK5-NEXT:  entry:
3785 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3786 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3787 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3788 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3789 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3790 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3791 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3792 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3793 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3794 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3795 // CHECK5-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3796 // CHECK5-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3797 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3798 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3799 // CHECK5-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3800 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3801 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3802 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3803 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3804 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3805 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3806 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3807 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3808 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3809 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3810 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3811 // CHECK5:       cond.true:
3812 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3813 // CHECK5:       cond.false:
3814 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3815 // CHECK5-NEXT:    br label [[COND_END]]
3816 // CHECK5:       cond.end:
3817 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3818 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3819 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3820 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3821 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3822 // CHECK5:       omp.inner.for.cond:
3823 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3824 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3825 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3826 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3827 // CHECK5:       omp.inner.for.body:
3828 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3829 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3830 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3831 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3832 // CHECK5-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
3833 // CHECK5-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
3834 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3835 // CHECK5:       omp_if.then:
3836 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3837 // CHECK5-NEXT:    br label [[OMP_IF_END:%.*]]
3838 // CHECK5:       omp_if.else:
3839 // CHECK5-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3840 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3841 // CHECK5-NEXT:    call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3842 // CHECK5-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3843 // CHECK5-NEXT:    br label [[OMP_IF_END]]
3844 // CHECK5:       omp_if.end:
3845 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3846 // CHECK5:       omp.inner.for.inc:
3847 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3848 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3849 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3850 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3851 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3852 // CHECK5:       omp.inner.for.end:
3853 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3854 // CHECK5:       omp.loop.exit:
3855 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3856 // CHECK5-NEXT:    ret void
3857 //
3858 //
3859 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9
3860 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3861 // CHECK5-NEXT:  entry:
3862 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3863 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3864 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3865 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3866 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3867 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3868 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3869 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3870 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3871 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3872 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3873 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3874 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3875 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3876 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3877 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3878 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3879 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3880 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3881 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3882 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3883 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3884 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3885 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3886 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3887 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3888 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3889 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3890 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3891 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3892 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3893 // CHECK5:       cond.true:
3894 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3895 // CHECK5:       cond.false:
3896 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3897 // CHECK5-NEXT:    br label [[COND_END]]
3898 // CHECK5:       cond.end:
3899 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3900 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3901 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3902 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3903 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3904 // CHECK5:       omp.inner.for.cond:
3905 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3906 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3907 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3908 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3909 // CHECK5:       omp.inner.for.body:
3910 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3911 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3912 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3913 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3914 // CHECK5-NEXT:    call void @_Z3fn6v()
3915 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3916 // CHECK5:       omp.body.continue:
3917 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3918 // CHECK5:       omp.inner.for.inc:
3919 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3920 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3921 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3922 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3923 // CHECK5:       omp.inner.for.end:
3924 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3925 // CHECK5:       omp.loop.exit:
3926 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3927 // CHECK5-NEXT:    ret void
3928 //
3929 //
3930 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
3931 // CHECK5-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
3932 // CHECK5-NEXT:  entry:
3933 // CHECK5-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
3934 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3935 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3936 // CHECK5-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
3937 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3938 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3939 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3940 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3941 // CHECK5-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
3942 // CHECK5-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
3943 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3944 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
3945 // CHECK5-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3946 // CHECK5-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3947 // CHECK5:       omp_offload.failed:
3948 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
3949 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3950 // CHECK5:       omp_offload.cont:
3951 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3952 // CHECK5-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3953 // CHECK5-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
3954 // CHECK5-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3955 // CHECK5:       omp_offload.failed2:
3956 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
3957 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
3958 // CHECK5:       omp_offload.cont3:
3959 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
3960 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
3961 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
3962 // CHECK5-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
3963 // CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3964 // CHECK5-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
3965 // CHECK5-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
3966 // CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3967 // CHECK5-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
3968 // CHECK5-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
3969 // CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3970 // CHECK5-NEXT:    store i8* null, i8** [[TMP10]], align 8
3971 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3972 // CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3973 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
3974 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
3975 // CHECK5-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3976 // CHECK5-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3977 // CHECK5-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3978 // CHECK5-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
3979 // CHECK5-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
3980 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3981 // CHECK5-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
3982 // CHECK5-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3983 // CHECK5-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3984 // CHECK5:       omp_offload.failed6:
3985 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
3986 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
3987 // CHECK5:       omp_offload.cont7:
3988 // CHECK5-NEXT:    ret i32 0
3989 //
3990 //
3991 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
3992 // CHECK5-SAME: () #[[ATTR1]] {
3993 // CHECK5-NEXT:  entry:
3994 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
3995 // CHECK5-NEXT:    ret void
3996 //
3997 //
3998 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
3999 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4000 // CHECK5-NEXT:  entry:
4001 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4002 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4003 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4004 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4005 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4006 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4007 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4008 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4009 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4010 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4011 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4012 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4013 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4014 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4015 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4016 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4017 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4018 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4019 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4020 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4021 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4022 // CHECK5:       cond.true:
4023 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4024 // CHECK5:       cond.false:
4025 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4026 // CHECK5-NEXT:    br label [[COND_END]]
4027 // CHECK5:       cond.end:
4028 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4029 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4030 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4031 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4032 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4033 // CHECK5:       omp.inner.for.cond:
4034 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4035 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4036 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4037 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4038 // CHECK5:       omp.inner.for.body:
4039 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4040 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4041 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4042 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4043 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4044 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4045 // CHECK5:       omp.inner.for.inc:
4046 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4047 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4048 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4049 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4050 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4051 // CHECK5:       omp.inner.for.end:
4052 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4053 // CHECK5:       omp.loop.exit:
4054 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4055 // CHECK5-NEXT:    ret void
4056 //
4057 //
4058 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
4059 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4060 // CHECK5-NEXT:  entry:
4061 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4062 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4063 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4064 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4065 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4066 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4067 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4068 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4069 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4070 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4071 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4072 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4073 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4074 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4075 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4076 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4077 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4078 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4079 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4080 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4081 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4082 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4083 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4084 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4085 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4086 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4087 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4088 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4089 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4090 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4091 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4092 // CHECK5:       cond.true:
4093 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4094 // CHECK5:       cond.false:
4095 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4096 // CHECK5-NEXT:    br label [[COND_END]]
4097 // CHECK5:       cond.end:
4098 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4099 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4100 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4101 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4102 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4103 // CHECK5:       omp.inner.for.cond:
4104 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4105 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4106 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4107 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4108 // CHECK5:       omp.inner.for.body:
4109 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4110 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4111 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4112 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4113 // CHECK5-NEXT:    call void @_Z3fn1v()
4114 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4115 // CHECK5:       omp.body.continue:
4116 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4117 // CHECK5:       omp.inner.for.inc:
4118 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4119 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4120 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4121 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4122 // CHECK5:       omp.inner.for.end:
4123 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4124 // CHECK5:       omp.loop.exit:
4125 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4126 // CHECK5-NEXT:    ret void
4127 //
4128 //
4129 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
4130 // CHECK5-SAME: () #[[ATTR1]] {
4131 // CHECK5-NEXT:  entry:
4132 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
4133 // CHECK5-NEXT:    ret void
4134 //
4135 //
4136 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..12
4137 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4138 // CHECK5-NEXT:  entry:
4139 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4140 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4141 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4142 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4143 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4144 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4145 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4146 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4147 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4148 // CHECK5-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4149 // CHECK5-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4150 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4151 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4152 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4153 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4154 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4155 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4156 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4157 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4158 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4159 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4160 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4161 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4162 // CHECK5:       cond.true:
4163 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4164 // CHECK5:       cond.false:
4165 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4166 // CHECK5-NEXT:    br label [[COND_END]]
4167 // CHECK5:       cond.end:
4168 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4169 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4170 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4171 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4172 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4173 // CHECK5:       omp.inner.for.cond:
4174 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4175 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4176 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4177 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4178 // CHECK5:       omp.inner.for.body:
4179 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4180 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4181 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4182 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4183 // CHECK5-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4184 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4185 // CHECK5-NEXT:    call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
4186 // CHECK5-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4187 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4188 // CHECK5:       omp.inner.for.inc:
4189 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4190 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4191 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4192 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4193 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4194 // CHECK5:       omp.inner.for.end:
4195 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4196 // CHECK5:       omp.loop.exit:
4197 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4198 // CHECK5-NEXT:    ret void
4199 //
4200 //
4201 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..13
4202 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4203 // CHECK5-NEXT:  entry:
4204 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4205 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4206 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4207 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4208 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4209 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4210 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4211 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4212 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4213 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4214 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4215 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4216 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4217 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4218 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4219 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4220 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4221 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4222 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4223 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4224 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4225 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4226 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4227 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4228 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4229 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4230 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4231 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4232 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4233 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4234 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4235 // CHECK5:       cond.true:
4236 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4237 // CHECK5:       cond.false:
4238 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4239 // CHECK5-NEXT:    br label [[COND_END]]
4240 // CHECK5:       cond.end:
4241 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4242 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4243 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4244 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4245 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4246 // CHECK5:       omp.inner.for.cond:
4247 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4248 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4249 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4250 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4251 // CHECK5:       omp.inner.for.body:
4252 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4253 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4254 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4255 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4256 // CHECK5-NEXT:    call void @_Z3fn2v()
4257 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4258 // CHECK5:       omp.body.continue:
4259 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4260 // CHECK5:       omp.inner.for.inc:
4261 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4262 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4263 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4264 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4265 // CHECK5:       omp.inner.for.end:
4266 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4267 // CHECK5:       omp.loop.exit:
4268 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4269 // CHECK5-NEXT:    ret void
4270 //
4271 //
4272 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
4273 // CHECK5-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
4274 // CHECK5-NEXT:  entry:
4275 // CHECK5-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
4276 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4277 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4278 // CHECK5-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
4279 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
4280 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
4281 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
4282 // CHECK5-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4283 // CHECK5-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4284 // CHECK5-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4285 // CHECK5-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
4286 // CHECK5-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4287 // CHECK5-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
4288 // CHECK5-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
4289 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4290 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
4291 // CHECK5-NEXT:    ret void
4292 //
4293 //
4294 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14
4295 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4296 // CHECK5-NEXT:  entry:
4297 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4298 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4299 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4300 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4301 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4302 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4303 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4304 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4305 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4306 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4307 // CHECK5-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4308 // CHECK5-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4309 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4310 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4311 // CHECK5-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4312 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4313 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4314 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4315 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4316 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4317 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4318 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4319 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4320 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4321 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4322 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4323 // CHECK5:       cond.true:
4324 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4325 // CHECK5:       cond.false:
4326 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4327 // CHECK5-NEXT:    br label [[COND_END]]
4328 // CHECK5:       cond.end:
4329 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4330 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4331 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4332 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4333 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4334 // CHECK5:       omp.inner.for.cond:
4335 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4336 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4337 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4338 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4339 // CHECK5:       omp.inner.for.body:
4340 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4341 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4342 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4343 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4344 // CHECK5-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
4345 // CHECK5-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
4346 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4347 // CHECK5:       omp_if.then:
4348 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4349 // CHECK5-NEXT:    br label [[OMP_IF_END:%.*]]
4350 // CHECK5:       omp_if.else:
4351 // CHECK5-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4352 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4353 // CHECK5-NEXT:    call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
4354 // CHECK5-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4355 // CHECK5-NEXT:    br label [[OMP_IF_END]]
4356 // CHECK5:       omp_if.end:
4357 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4358 // CHECK5:       omp.inner.for.inc:
4359 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4360 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4361 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
4362 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4363 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4364 // CHECK5:       omp.inner.for.end:
4365 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4366 // CHECK5:       omp.loop.exit:
4367 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4368 // CHECK5-NEXT:    ret void
4369 //
4370 //
4371 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15
4372 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4373 // CHECK5-NEXT:  entry:
4374 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4375 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4376 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4377 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4378 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4379 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4380 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4381 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4382 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4383 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4384 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4385 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4386 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4387 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4388 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4389 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4390 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4391 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4392 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4393 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4394 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4395 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4396 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4397 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4398 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4399 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4400 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4401 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4402 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4403 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4404 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4405 // CHECK5:       cond.true:
4406 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4407 // CHECK5:       cond.false:
4408 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4409 // CHECK5-NEXT:    br label [[COND_END]]
4410 // CHECK5:       cond.end:
4411 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4412 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4413 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4414 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4415 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4416 // CHECK5:       omp.inner.for.cond:
4417 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4418 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4419 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4420 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4421 // CHECK5:       omp.inner.for.body:
4422 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4423 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4424 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4425 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4426 // CHECK5-NEXT:    call void @_Z3fn3v()
4427 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4428 // CHECK5:       omp.body.continue:
4429 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4430 // CHECK5:       omp.inner.for.inc:
4431 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4432 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4433 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4434 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4435 // CHECK5:       omp.inner.for.end:
4436 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4437 // CHECK5:       omp.loop.exit:
4438 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4439 // CHECK5-NEXT:    ret void
4440 //
4441 //
4442 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4443 // CHECK5-SAME: () #[[ATTR5:[0-9]+]] {
4444 // CHECK5-NEXT:  entry:
4445 // CHECK5-NEXT:    call void @__tgt_register_requires(i64 1)
4446 // CHECK5-NEXT:    ret void
4447 //
4448 //
4449 // CHECK6-LABEL: define {{[^@]+}}@_Z9gtid_testv
4450 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
4451 // CHECK6-NEXT:  entry:
4452 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4453 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4454 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
4455 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
4456 // CHECK6-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
4457 // CHECK6-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4458 // CHECK6:       omp_offload.failed:
4459 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
4460 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4461 // CHECK6:       omp_offload.cont:
4462 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4463 // CHECK6-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4464 // CHECK6-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
4465 // CHECK6-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4466 // CHECK6:       omp_offload.failed2:
4467 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
4468 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
4469 // CHECK6:       omp_offload.cont3:
4470 // CHECK6-NEXT:    ret void
4471 //
4472 //
4473 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
4474 // CHECK6-SAME: () #[[ATTR1:[0-9]+]] {
4475 // CHECK6-NEXT:  entry:
4476 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
4477 // CHECK6-NEXT:    ret void
4478 //
4479 //
4480 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
4481 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4482 // CHECK6-NEXT:  entry:
4483 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4484 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4485 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4486 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4487 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4488 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4489 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4490 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4491 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4492 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4493 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4494 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4495 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4496 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4497 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4498 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4499 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4500 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4501 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4502 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4503 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4504 // CHECK6:       cond.true:
4505 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4506 // CHECK6:       cond.false:
4507 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4508 // CHECK6-NEXT:    br label [[COND_END]]
4509 // CHECK6:       cond.end:
4510 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4511 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4512 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4513 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4514 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4515 // CHECK6:       omp.inner.for.cond:
4516 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4517 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4518 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4519 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4520 // CHECK6:       omp.inner.for.body:
4521 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4522 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4523 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4524 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4525 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4526 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4527 // CHECK6:       omp.inner.for.inc:
4528 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4529 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4530 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4531 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4532 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4533 // CHECK6:       omp.inner.for.end:
4534 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4535 // CHECK6:       omp.loop.exit:
4536 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4537 // CHECK6-NEXT:    ret void
4538 //
4539 //
4540 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1
4541 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4542 // CHECK6-NEXT:  entry:
4543 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4544 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4545 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4546 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4547 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4548 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4549 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4550 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4551 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4552 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4553 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4554 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4555 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4556 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4557 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4558 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4559 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4560 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4561 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4562 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4563 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4564 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4565 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4566 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4567 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4568 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4569 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4570 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4571 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4572 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4573 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4574 // CHECK6:       cond.true:
4575 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4576 // CHECK6:       cond.false:
4577 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4578 // CHECK6-NEXT:    br label [[COND_END]]
4579 // CHECK6:       cond.end:
4580 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4581 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4582 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4583 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4584 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4585 // CHECK6:       omp.inner.for.cond:
4586 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4587 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4588 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4589 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4590 // CHECK6:       omp.inner.for.body:
4591 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4592 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4593 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4594 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4595 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4596 // CHECK6:       omp.body.continue:
4597 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4598 // CHECK6:       omp.inner.for.inc:
4599 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4600 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4601 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4602 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4603 // CHECK6:       omp.inner.for.end:
4604 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4605 // CHECK6:       omp.loop.exit:
4606 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4607 // CHECK6-NEXT:    ret void
4608 //
4609 //
4610 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
4611 // CHECK6-SAME: () #[[ATTR1]] {
4612 // CHECK6-NEXT:  entry:
4613 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
4614 // CHECK6-NEXT:    ret void
4615 //
4616 //
4617 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2
4618 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4619 // CHECK6-NEXT:  entry:
4620 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4621 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4622 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4623 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4624 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4625 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4626 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4627 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4628 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4629 // CHECK6-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4630 // CHECK6-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4631 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4632 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4633 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4634 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4635 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4636 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4637 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4638 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4639 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4640 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4641 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4642 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4643 // CHECK6:       cond.true:
4644 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4645 // CHECK6:       cond.false:
4646 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4647 // CHECK6-NEXT:    br label [[COND_END]]
4648 // CHECK6:       cond.end:
4649 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4650 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4651 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4652 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4653 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4654 // CHECK6:       omp.inner.for.cond:
4655 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4656 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4657 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4658 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4659 // CHECK6:       omp.inner.for.body:
4660 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4661 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4662 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4663 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4664 // CHECK6-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4665 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4666 // CHECK6-NEXT:    call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
4667 // CHECK6-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4668 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4669 // CHECK6:       omp.inner.for.inc:
4670 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4671 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4672 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4673 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4674 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4675 // CHECK6:       omp.inner.for.end:
4676 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4677 // CHECK6:       omp.loop.exit:
4678 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4679 // CHECK6-NEXT:    ret void
4680 //
4681 //
4682 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3
4683 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4684 // CHECK6-NEXT:  entry:
4685 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4686 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4687 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4688 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4689 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4690 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4691 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4692 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4693 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4694 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4695 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4696 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4697 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4698 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4699 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4700 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4701 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4702 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4703 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4704 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4705 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4706 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4707 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4708 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4709 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4710 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4711 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4712 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4713 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4714 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4715 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4716 // CHECK6:       cond.true:
4717 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4718 // CHECK6:       cond.false:
4719 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4720 // CHECK6-NEXT:    br label [[COND_END]]
4721 // CHECK6:       cond.end:
4722 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4723 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4724 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4725 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4726 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4727 // CHECK6:       omp.inner.for.cond:
4728 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4729 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4730 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4731 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4732 // CHECK6:       omp.inner.for.body:
4733 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4734 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4735 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4736 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4737 // CHECK6-NEXT:    call void @_Z9gtid_testv()
4738 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4739 // CHECK6:       omp.body.continue:
4740 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4741 // CHECK6:       omp.inner.for.inc:
4742 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4743 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4744 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4745 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4746 // CHECK6:       omp.inner.for.end:
4747 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4748 // CHECK6:       omp.loop.exit:
4749 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4750 // CHECK6-NEXT:    ret void
4751 //
4752 //
4753 // CHECK6-LABEL: define {{[^@]+}}@main
4754 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] {
4755 // CHECK6-NEXT:  entry:
4756 // CHECK6-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4757 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4758 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4759 // CHECK6-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
4760 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4761 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4762 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4763 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4764 // CHECK6-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
4765 // CHECK6-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4766 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4767 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
4768 // CHECK6-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
4769 // CHECK6-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4770 // CHECK6:       omp_offload.failed:
4771 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
4772 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4773 // CHECK6:       omp_offload.cont:
4774 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4775 // CHECK6-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4776 // CHECK6-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
4777 // CHECK6-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4778 // CHECK6:       omp_offload.failed2:
4779 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
4780 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
4781 // CHECK6:       omp_offload.cont3:
4782 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
4783 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4784 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
4785 // CHECK6-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
4786 // CHECK6-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4787 // CHECK6-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
4788 // CHECK6-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
4789 // CHECK6-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4790 // CHECK6-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
4791 // CHECK6-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
4792 // CHECK6-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4793 // CHECK6-NEXT:    store i8* null, i8** [[TMP10]], align 8
4794 // CHECK6-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4795 // CHECK6-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4796 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* @Arg, align 4
4797 // CHECK6-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
4798 // CHECK6-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4799 // CHECK6-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4800 // CHECK6-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4801 // CHECK6-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
4802 // CHECK6-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
4803 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4804 // CHECK6-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
4805 // CHECK6-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4806 // CHECK6-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
4807 // CHECK6:       omp_offload.failed6:
4808 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
4809 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
4810 // CHECK6:       omp_offload.cont7:
4811 // CHECK6-NEXT:    [[TMP18:%.*]] = load i32, i32* @Arg, align 4
4812 // CHECK6-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
4813 // CHECK6-NEXT:    ret i32 [[CALL]]
4814 //
4815 //
4816 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
4817 // CHECK6-SAME: () #[[ATTR1]] {
4818 // CHECK6-NEXT:  entry:
4819 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4820 // CHECK6-NEXT:    ret void
4821 //
4822 //
4823 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..4
4824 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4825 // CHECK6-NEXT:  entry:
4826 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4827 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4828 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4829 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4830 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4831 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4832 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4833 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4834 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4835 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4836 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4837 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4838 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4839 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4840 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4841 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4842 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4843 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4844 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4845 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4846 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4847 // CHECK6:       cond.true:
4848 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4849 // CHECK6:       cond.false:
4850 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4851 // CHECK6-NEXT:    br label [[COND_END]]
4852 // CHECK6:       cond.end:
4853 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4854 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4855 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4856 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4857 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4858 // CHECK6:       omp.inner.for.cond:
4859 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4860 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4861 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4862 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4863 // CHECK6:       omp.inner.for.body:
4864 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4865 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4866 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4867 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4868 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4869 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4870 // CHECK6:       omp.inner.for.inc:
4871 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4872 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4873 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4874 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4875 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4876 // CHECK6:       omp.inner.for.end:
4877 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4878 // CHECK6:       omp.loop.exit:
4879 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4880 // CHECK6-NEXT:    ret void
4881 //
4882 //
4883 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..5
4884 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4885 // CHECK6-NEXT:  entry:
4886 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4887 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4888 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4889 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4890 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4891 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4892 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4893 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4894 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4895 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4896 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4897 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4898 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4899 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4900 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4901 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4902 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4903 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4904 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4905 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4906 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4907 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4908 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4909 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4910 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4911 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4912 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4913 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4914 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4915 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4916 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4917 // CHECK6:       cond.true:
4918 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4919 // CHECK6:       cond.false:
4920 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4921 // CHECK6-NEXT:    br label [[COND_END]]
4922 // CHECK6:       cond.end:
4923 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4924 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4925 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4926 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4927 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4928 // CHECK6:       omp.inner.for.cond:
4929 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4930 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4931 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4932 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4933 // CHECK6:       omp.inner.for.body:
4934 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4935 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4936 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4937 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4938 // CHECK6-NEXT:    call void @_Z3fn4v()
4939 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4940 // CHECK6:       omp.body.continue:
4941 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4942 // CHECK6:       omp.inner.for.inc:
4943 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4944 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4945 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4946 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4947 // CHECK6:       omp.inner.for.end:
4948 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4949 // CHECK6:       omp.loop.exit:
4950 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4951 // CHECK6-NEXT:    ret void
4952 //
4953 //
4954 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
4955 // CHECK6-SAME: () #[[ATTR1]] {
4956 // CHECK6-NEXT:  entry:
4957 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
4958 // CHECK6-NEXT:    ret void
4959 //
4960 //
4961 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6
4962 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4963 // CHECK6-NEXT:  entry:
4964 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4965 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4966 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4967 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4968 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4969 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4970 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4971 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4972 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4973 // CHECK6-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4974 // CHECK6-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4975 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4976 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4977 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4978 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4979 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4980 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4981 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4982 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4983 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4984 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4985 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4986 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4987 // CHECK6:       cond.true:
4988 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4989 // CHECK6:       cond.false:
4990 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4991 // CHECK6-NEXT:    br label [[COND_END]]
4992 // CHECK6:       cond.end:
4993 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4994 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4995 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4996 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4997 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4998 // CHECK6:       omp.inner.for.cond:
4999 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5000 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5001 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5002 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5003 // CHECK6:       omp.inner.for.body:
5004 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5005 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5006 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5007 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5008 // CHECK6-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5009 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5010 // CHECK6-NEXT:    call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
5011 // CHECK6-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5012 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5013 // CHECK6:       omp.inner.for.inc:
5014 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5015 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5016 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5017 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5018 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5019 // CHECK6:       omp.inner.for.end:
5020 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5021 // CHECK6:       omp.loop.exit:
5022 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5023 // CHECK6-NEXT:    ret void
5024 //
5025 //
5026 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7
5027 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5028 // CHECK6-NEXT:  entry:
5029 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5030 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5031 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5032 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5033 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5034 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5035 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5036 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5037 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5038 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5039 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5040 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5041 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5042 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5043 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5044 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5045 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5046 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5047 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5048 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5049 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5050 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5051 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5052 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5053 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5054 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5055 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5056 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5057 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5058 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5059 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5060 // CHECK6:       cond.true:
5061 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5062 // CHECK6:       cond.false:
5063 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5064 // CHECK6-NEXT:    br label [[COND_END]]
5065 // CHECK6:       cond.end:
5066 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5067 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5068 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5069 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5070 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5071 // CHECK6:       omp.inner.for.cond:
5072 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5073 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5074 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5075 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5076 // CHECK6:       omp.inner.for.body:
5077 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5078 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5079 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5080 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5081 // CHECK6-NEXT:    call void @_Z3fn5v()
5082 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5083 // CHECK6:       omp.body.continue:
5084 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5085 // CHECK6:       omp.inner.for.inc:
5086 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5087 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5088 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5089 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5090 // CHECK6:       omp.inner.for.end:
5091 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5092 // CHECK6:       omp.loop.exit:
5093 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5094 // CHECK6-NEXT:    ret void
5095 //
5096 //
5097 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
5098 // CHECK6-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
5099 // CHECK6-NEXT:  entry:
5100 // CHECK6-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
5101 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5102 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5103 // CHECK6-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
5104 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
5105 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
5106 // CHECK6-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
5107 // CHECK6-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5108 // CHECK6-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5109 // CHECK6-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5110 // CHECK6-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
5111 // CHECK6-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5112 // CHECK6-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
5113 // CHECK6-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
5114 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5115 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
5116 // CHECK6-NEXT:    ret void
5117 //
5118 //
5119 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..8
5120 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5121 // CHECK6-NEXT:  entry:
5122 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5123 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5124 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5125 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5126 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5127 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5128 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5129 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5130 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5131 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5132 // CHECK6-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5133 // CHECK6-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5134 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5135 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5136 // CHECK6-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5137 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5138 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5139 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5140 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5141 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5142 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5143 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5144 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5145 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5146 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5147 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5148 // CHECK6:       cond.true:
5149 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5150 // CHECK6:       cond.false:
5151 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5152 // CHECK6-NEXT:    br label [[COND_END]]
5153 // CHECK6:       cond.end:
5154 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5155 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5156 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5157 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5158 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5159 // CHECK6:       omp.inner.for.cond:
5160 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5161 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5162 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5163 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5164 // CHECK6:       omp.inner.for.body:
5165 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5166 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5167 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5168 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5169 // CHECK6-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
5170 // CHECK6-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
5171 // CHECK6-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5172 // CHECK6:       omp_if.then:
5173 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
5174 // CHECK6-NEXT:    br label [[OMP_IF_END:%.*]]
5175 // CHECK6:       omp_if.else:
5176 // CHECK6-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5177 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5178 // CHECK6-NEXT:    call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
5179 // CHECK6-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5180 // CHECK6-NEXT:    br label [[OMP_IF_END]]
5181 // CHECK6:       omp_if.end:
5182 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5183 // CHECK6:       omp.inner.for.inc:
5184 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5185 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5186 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5187 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5188 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5189 // CHECK6:       omp.inner.for.end:
5190 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5191 // CHECK6:       omp.loop.exit:
5192 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5193 // CHECK6-NEXT:    ret void
5194 //
5195 //
5196 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..9
5197 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5198 // CHECK6-NEXT:  entry:
5199 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5200 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5201 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5202 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5203 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5204 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5205 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5206 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5207 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5208 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5209 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5210 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5211 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5212 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5213 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5214 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5215 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5216 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5217 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5218 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5219 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5220 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5221 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5222 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5223 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5224 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5225 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5226 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5227 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5228 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5229 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5230 // CHECK6:       cond.true:
5231 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5232 // CHECK6:       cond.false:
5233 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5234 // CHECK6-NEXT:    br label [[COND_END]]
5235 // CHECK6:       cond.end:
5236 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5237 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5238 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5239 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5240 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5241 // CHECK6:       omp.inner.for.cond:
5242 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5243 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5244 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5245 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5246 // CHECK6:       omp.inner.for.body:
5247 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5248 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5249 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5250 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5251 // CHECK6-NEXT:    call void @_Z3fn6v()
5252 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5253 // CHECK6:       omp.body.continue:
5254 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5255 // CHECK6:       omp.inner.for.inc:
5256 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5257 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5258 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5259 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5260 // CHECK6:       omp.inner.for.end:
5261 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5262 // CHECK6:       omp.loop.exit:
5263 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5264 // CHECK6-NEXT:    ret void
5265 //
5266 //
5267 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
5268 // CHECK6-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
5269 // CHECK6-NEXT:  entry:
5270 // CHECK6-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
5271 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5272 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
5273 // CHECK6-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
5274 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5275 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5276 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5277 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5278 // CHECK6-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
5279 // CHECK6-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
5280 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5281 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
5282 // CHECK6-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
5283 // CHECK6-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5284 // CHECK6:       omp_offload.failed:
5285 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
5286 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5287 // CHECK6:       omp_offload.cont:
5288 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5289 // CHECK6-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
5290 // CHECK6-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
5291 // CHECK6-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
5292 // CHECK6:       omp_offload.failed2:
5293 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
5294 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
5295 // CHECK6:       omp_offload.cont3:
5296 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
5297 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
5298 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
5299 // CHECK6-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
5300 // CHECK6-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5301 // CHECK6-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
5302 // CHECK6-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
5303 // CHECK6-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5304 // CHECK6-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
5305 // CHECK6-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
5306 // CHECK6-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5307 // CHECK6-NEXT:    store i8* null, i8** [[TMP10]], align 8
5308 // CHECK6-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5309 // CHECK6-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5310 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
5311 // CHECK6-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
5312 // CHECK6-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5313 // CHECK6-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5314 // CHECK6-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5315 // CHECK6-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
5316 // CHECK6-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
5317 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5318 // CHECK6-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
5319 // CHECK6-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5320 // CHECK6-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
5321 // CHECK6:       omp_offload.failed6:
5322 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
5323 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
5324 // CHECK6:       omp_offload.cont7:
5325 // CHECK6-NEXT:    ret i32 0
5326 //
5327 //
5328 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
5329 // CHECK6-SAME: () #[[ATTR1]] {
5330 // CHECK6-NEXT:  entry:
5331 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
5332 // CHECK6-NEXT:    ret void
5333 //
5334 //
5335 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10
5336 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5337 // CHECK6-NEXT:  entry:
5338 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5339 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5340 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5341 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5342 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5343 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5344 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5345 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5346 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5347 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5348 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5349 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5350 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5351 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5352 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5353 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5354 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5355 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5356 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5357 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5358 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5359 // CHECK6:       cond.true:
5360 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5361 // CHECK6:       cond.false:
5362 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5363 // CHECK6-NEXT:    br label [[COND_END]]
5364 // CHECK6:       cond.end:
5365 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5366 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5367 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5368 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5369 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5370 // CHECK6:       omp.inner.for.cond:
5371 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5372 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5373 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5374 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5375 // CHECK6:       omp.inner.for.body:
5376 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5377 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5378 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5379 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5380 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
5381 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5382 // CHECK6:       omp.inner.for.inc:
5383 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5384 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5385 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5386 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5387 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5388 // CHECK6:       omp.inner.for.end:
5389 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5390 // CHECK6:       omp.loop.exit:
5391 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5392 // CHECK6-NEXT:    ret void
5393 //
5394 //
5395 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11
5396 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5397 // CHECK6-NEXT:  entry:
5398 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5399 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5400 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5401 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5402 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5403 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5404 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5405 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5406 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5407 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5408 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5409 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5410 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5411 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5412 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5413 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5414 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5415 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5416 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5417 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5418 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5419 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5420 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5421 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5422 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5423 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5424 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5425 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5426 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5427 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5428 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5429 // CHECK6:       cond.true:
5430 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5431 // CHECK6:       cond.false:
5432 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5433 // CHECK6-NEXT:    br label [[COND_END]]
5434 // CHECK6:       cond.end:
5435 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5436 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5437 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5438 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5439 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5440 // CHECK6:       omp.inner.for.cond:
5441 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5442 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5443 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5444 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5445 // CHECK6:       omp.inner.for.body:
5446 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5447 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5448 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5449 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5450 // CHECK6-NEXT:    call void @_Z3fn1v()
5451 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5452 // CHECK6:       omp.body.continue:
5453 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5454 // CHECK6:       omp.inner.for.inc:
5455 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5456 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5457 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5458 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5459 // CHECK6:       omp.inner.for.end:
5460 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5461 // CHECK6:       omp.loop.exit:
5462 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5463 // CHECK6-NEXT:    ret void
5464 //
5465 //
5466 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
5467 // CHECK6-SAME: () #[[ATTR1]] {
5468 // CHECK6-NEXT:  entry:
5469 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
5470 // CHECK6-NEXT:    ret void
5471 //
5472 //
5473 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..12
5474 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5475 // CHECK6-NEXT:  entry:
5476 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5477 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5478 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5479 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5480 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5481 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5482 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5483 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5484 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5485 // CHECK6-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5486 // CHECK6-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5487 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5488 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5489 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5490 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5491 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5492 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5493 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5494 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5495 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5496 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5497 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5498 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5499 // CHECK6:       cond.true:
5500 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5501 // CHECK6:       cond.false:
5502 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5503 // CHECK6-NEXT:    br label [[COND_END]]
5504 // CHECK6:       cond.end:
5505 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5506 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5507 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5508 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5509 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5510 // CHECK6:       omp.inner.for.cond:
5511 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5512 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5513 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5514 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5515 // CHECK6:       omp.inner.for.body:
5516 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5517 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5518 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5519 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5520 // CHECK6-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5521 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5522 // CHECK6-NEXT:    call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
5523 // CHECK6-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5524 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5525 // CHECK6:       omp.inner.for.inc:
5526 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5527 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5528 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5529 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5530 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5531 // CHECK6:       omp.inner.for.end:
5532 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5533 // CHECK6:       omp.loop.exit:
5534 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5535 // CHECK6-NEXT:    ret void
5536 //
5537 //
5538 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..13
5539 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5540 // CHECK6-NEXT:  entry:
5541 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5542 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5543 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5544 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5545 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5546 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5547 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5548 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5549 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5550 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5551 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5552 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5553 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5554 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5555 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5556 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5557 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5558 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5559 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5560 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5561 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5562 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5563 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5564 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5565 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5566 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5567 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5568 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5569 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5570 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5571 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5572 // CHECK6:       cond.true:
5573 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5574 // CHECK6:       cond.false:
5575 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5576 // CHECK6-NEXT:    br label [[COND_END]]
5577 // CHECK6:       cond.end:
5578 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5579 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5580 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5581 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5582 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5583 // CHECK6:       omp.inner.for.cond:
5584 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5585 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5586 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5587 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5588 // CHECK6:       omp.inner.for.body:
5589 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5590 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5591 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5592 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5593 // CHECK6-NEXT:    call void @_Z3fn2v()
5594 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5595 // CHECK6:       omp.body.continue:
5596 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5597 // CHECK6:       omp.inner.for.inc:
5598 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5599 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5600 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5601 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5602 // CHECK6:       omp.inner.for.end:
5603 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5604 // CHECK6:       omp.loop.exit:
5605 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5606 // CHECK6-NEXT:    ret void
5607 //
5608 //
5609 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
5610 // CHECK6-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
5611 // CHECK6-NEXT:  entry:
5612 // CHECK6-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
5613 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5614 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5615 // CHECK6-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
5616 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
5617 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
5618 // CHECK6-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
5619 // CHECK6-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5620 // CHECK6-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5621 // CHECK6-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5622 // CHECK6-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
5623 // CHECK6-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5624 // CHECK6-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
5625 // CHECK6-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
5626 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5627 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
5628 // CHECK6-NEXT:    ret void
5629 //
5630 //
5631 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..14
5632 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5633 // CHECK6-NEXT:  entry:
5634 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5635 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5636 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5637 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5638 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5639 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5640 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5641 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5642 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5643 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5644 // CHECK6-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5645 // CHECK6-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5646 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5647 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5648 // CHECK6-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5649 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5650 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5651 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5652 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5653 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5654 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5655 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5656 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5657 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5658 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5659 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5660 // CHECK6:       cond.true:
5661 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5662 // CHECK6:       cond.false:
5663 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5664 // CHECK6-NEXT:    br label [[COND_END]]
5665 // CHECK6:       cond.end:
5666 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5667 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5668 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5669 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5670 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5671 // CHECK6:       omp.inner.for.cond:
5672 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5673 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5674 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5675 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5676 // CHECK6:       omp.inner.for.body:
5677 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5678 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5679 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5680 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5681 // CHECK6-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
5682 // CHECK6-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
5683 // CHECK6-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5684 // CHECK6:       omp_if.then:
5685 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
5686 // CHECK6-NEXT:    br label [[OMP_IF_END:%.*]]
5687 // CHECK6:       omp_if.else:
5688 // CHECK6-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5689 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5690 // CHECK6-NEXT:    call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
5691 // CHECK6-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5692 // CHECK6-NEXT:    br label [[OMP_IF_END]]
5693 // CHECK6:       omp_if.end:
5694 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5695 // CHECK6:       omp.inner.for.inc:
5696 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5697 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5698 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5699 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5700 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5701 // CHECK6:       omp.inner.for.end:
5702 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5703 // CHECK6:       omp.loop.exit:
5704 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5705 // CHECK6-NEXT:    ret void
5706 //
5707 //
5708 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..15
5709 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5710 // CHECK6-NEXT:  entry:
5711 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5712 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5713 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5714 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5715 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5716 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5717 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5718 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5719 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5720 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5721 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5722 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5723 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5724 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5725 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5726 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5727 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5728 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5729 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5730 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5731 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5732 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5733 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5734 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5735 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5736 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5737 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5738 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5739 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5740 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5741 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5742 // CHECK6:       cond.true:
5743 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5744 // CHECK6:       cond.false:
5745 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5746 // CHECK6-NEXT:    br label [[COND_END]]
5747 // CHECK6:       cond.end:
5748 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5749 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5750 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5751 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5752 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5753 // CHECK6:       omp.inner.for.cond:
5754 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5755 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5756 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5757 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5758 // CHECK6:       omp.inner.for.body:
5759 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5760 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5761 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5762 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5763 // CHECK6-NEXT:    call void @_Z3fn3v()
5764 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5765 // CHECK6:       omp.body.continue:
5766 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5767 // CHECK6:       omp.inner.for.inc:
5768 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5769 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5770 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5771 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5772 // CHECK6:       omp.inner.for.end:
5773 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5774 // CHECK6:       omp.loop.exit:
5775 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5776 // CHECK6-NEXT:    ret void
5777 //
5778 //
5779 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5780 // CHECK6-SAME: () #[[ATTR5:[0-9]+]] {
5781 // CHECK6-NEXT:  entry:
5782 // CHECK6-NEXT:    call void @__tgt_register_requires(i64 1)
5783 // CHECK6-NEXT:    ret void
5784 //
5785 //
5786 // CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv
5787 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
5788 // CHECK7-NEXT:  entry:
5789 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5790 // CHECK7-NEXT:    [[I1:%.*]] = alloca i32, align 4
5791 // CHECK7-NEXT:    store i32 0, i32* [[I]], align 4
5792 // CHECK7-NEXT:    br label [[FOR_COND:%.*]]
5793 // CHECK7:       for.cond:
5794 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5795 // CHECK7-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
5796 // CHECK7-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5797 // CHECK7:       for.body:
5798 // CHECK7-NEXT:    br label [[FOR_INC:%.*]]
5799 // CHECK7:       for.inc:
5800 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
5801 // CHECK7-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
5802 // CHECK7-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5803 // CHECK7-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
5804 // CHECK7:       for.end:
5805 // CHECK7-NEXT:    store i32 0, i32* [[I1]], align 4
5806 // CHECK7-NEXT:    br label [[FOR_COND2:%.*]]
5807 // CHECK7:       for.cond2:
5808 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
5809 // CHECK7-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
5810 // CHECK7-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
5811 // CHECK7:       for.body4:
5812 // CHECK7-NEXT:    call void @_Z9gtid_testv()
5813 // CHECK7-NEXT:    br label [[FOR_INC5:%.*]]
5814 // CHECK7:       for.inc5:
5815 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
5816 // CHECK7-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
5817 // CHECK7-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
5818 // CHECK7-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]]
5819 // CHECK7:       for.end7:
5820 // CHECK7-NEXT:    ret void
5821 //
5822 //
5823 // CHECK7-LABEL: define {{[^@]+}}@main
5824 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] {
5825 // CHECK7-NEXT:  entry:
5826 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5827 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5828 // CHECK7-NEXT:    [[I1:%.*]] = alloca i32, align 4
5829 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5830 // CHECK7-NEXT:    [[I8:%.*]] = alloca i32, align 4
5831 // CHECK7-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5832 // CHECK7-NEXT:    store i32 0, i32* [[I]], align 4
5833 // CHECK7-NEXT:    br label [[FOR_COND:%.*]]
5834 // CHECK7:       for.cond:
5835 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5836 // CHECK7-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
5837 // CHECK7-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5838 // CHECK7:       for.body:
5839 // CHECK7-NEXT:    call void @_Z3fn4v()
5840 // CHECK7-NEXT:    br label [[FOR_INC:%.*]]
5841 // CHECK7:       for.inc:
5842 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
5843 // CHECK7-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
5844 // CHECK7-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5845 // CHECK7-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
5846 // CHECK7:       for.end:
5847 // CHECK7-NEXT:    store i32 0, i32* [[I1]], align 4
5848 // CHECK7-NEXT:    br label [[FOR_COND2:%.*]]
5849 // CHECK7:       for.cond2:
5850 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
5851 // CHECK7-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
5852 // CHECK7-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
5853 // CHECK7:       for.body4:
5854 // CHECK7-NEXT:    call void @_Z3fn5v()
5855 // CHECK7-NEXT:    br label [[FOR_INC5:%.*]]
5856 // CHECK7:       for.inc5:
5857 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
5858 // CHECK7-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
5859 // CHECK7-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
5860 // CHECK7-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]]
5861 // CHECK7:       for.end7:
5862 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
5863 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
5864 // CHECK7-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5865 // CHECK7-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5866 // CHECK7-NEXT:    store i32 0, i32* [[I8]], align 4
5867 // CHECK7-NEXT:    br label [[FOR_COND9:%.*]]
5868 // CHECK7:       for.cond9:
5869 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
5870 // CHECK7-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
5871 // CHECK7-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
5872 // CHECK7:       for.body11:
5873 // CHECK7-NEXT:    call void @_Z3fn6v()
5874 // CHECK7-NEXT:    br label [[FOR_INC12:%.*]]
5875 // CHECK7:       for.inc12:
5876 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
5877 // CHECK7-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
5878 // CHECK7-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
5879 // CHECK7-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP7:![0-9]+]]
5880 // CHECK7:       for.end14:
5881 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* @Arg, align 4
5882 // CHECK7-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP7]])
5883 // CHECK7-NEXT:    ret i32 [[CALL]]
5884 //
5885 //
5886 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
5887 // CHECK7-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
5888 // CHECK7-NEXT:  entry:
5889 // CHECK7-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
5890 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5891 // CHECK7-NEXT:    [[I1:%.*]] = alloca i32, align 4
5892 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5893 // CHECK7-NEXT:    [[I8:%.*]] = alloca i32, align 4
5894 // CHECK7-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
5895 // CHECK7-NEXT:    store i32 0, i32* [[I]], align 4
5896 // CHECK7-NEXT:    br label [[FOR_COND:%.*]]
5897 // CHECK7:       for.cond:
5898 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5899 // CHECK7-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
5900 // CHECK7-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5901 // CHECK7:       for.body:
5902 // CHECK7-NEXT:    call void @_Z3fn1v()
5903 // CHECK7-NEXT:    br label [[FOR_INC:%.*]]
5904 // CHECK7:       for.inc:
5905 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
5906 // CHECK7-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
5907 // CHECK7-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5908 // CHECK7-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
5909 // CHECK7:       for.end:
5910 // CHECK7-NEXT:    store i32 0, i32* [[I1]], align 4
5911 // CHECK7-NEXT:    br label [[FOR_COND2:%.*]]
5912 // CHECK7:       for.cond2:
5913 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
5914 // CHECK7-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
5915 // CHECK7-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
5916 // CHECK7:       for.body4:
5917 // CHECK7-NEXT:    call void @_Z3fn2v()
5918 // CHECK7-NEXT:    br label [[FOR_INC5:%.*]]
5919 // CHECK7:       for.inc5:
5920 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
5921 // CHECK7-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
5922 // CHECK7-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
5923 // CHECK7-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP9:![0-9]+]]
5924 // CHECK7:       for.end7:
5925 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
5926 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
5927 // CHECK7-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5928 // CHECK7-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5929 // CHECK7-NEXT:    store i32 0, i32* [[I8]], align 4
5930 // CHECK7-NEXT:    br label [[FOR_COND9:%.*]]
5931 // CHECK7:       for.cond9:
5932 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
5933 // CHECK7-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
5934 // CHECK7-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
5935 // CHECK7:       for.body11:
5936 // CHECK7-NEXT:    call void @_Z3fn3v()
5937 // CHECK7-NEXT:    br label [[FOR_INC12:%.*]]
5938 // CHECK7:       for.inc12:
5939 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
5940 // CHECK7-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
5941 // CHECK7-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
5942 // CHECK7-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP10:![0-9]+]]
5943 // CHECK7:       for.end14:
5944 // CHECK7-NEXT:    ret i32 0
5945 //
5946 //
5947 // CHECK8-LABEL: define {{[^@]+}}@_Z9gtid_testv
5948 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
5949 // CHECK8-NEXT:  entry:
5950 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
5951 // CHECK8-NEXT:    [[I1:%.*]] = alloca i32, align 4
5952 // CHECK8-NEXT:    store i32 0, i32* [[I]], align 4
5953 // CHECK8-NEXT:    br label [[FOR_COND:%.*]]
5954 // CHECK8:       for.cond:
5955 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5956 // CHECK8-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
5957 // CHECK8-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5958 // CHECK8:       for.body:
5959 // CHECK8-NEXT:    br label [[FOR_INC:%.*]]
5960 // CHECK8:       for.inc:
5961 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
5962 // CHECK8-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
5963 // CHECK8-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5964 // CHECK8-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
5965 // CHECK8:       for.end:
5966 // CHECK8-NEXT:    store i32 0, i32* [[I1]], align 4
5967 // CHECK8-NEXT:    br label [[FOR_COND2:%.*]]
5968 // CHECK8:       for.cond2:
5969 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
5970 // CHECK8-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
5971 // CHECK8-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
5972 // CHECK8:       for.body4:
5973 // CHECK8-NEXT:    call void @_Z9gtid_testv()
5974 // CHECK8-NEXT:    br label [[FOR_INC5:%.*]]
5975 // CHECK8:       for.inc5:
5976 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
5977 // CHECK8-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
5978 // CHECK8-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
5979 // CHECK8-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]]
5980 // CHECK8:       for.end7:
5981 // CHECK8-NEXT:    ret void
5982 //
5983 //
5984 // CHECK8-LABEL: define {{[^@]+}}@main
5985 // CHECK8-SAME: () #[[ATTR1:[0-9]+]] {
5986 // CHECK8-NEXT:  entry:
5987 // CHECK8-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5988 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
5989 // CHECK8-NEXT:    [[I1:%.*]] = alloca i32, align 4
5990 // CHECK8-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5991 // CHECK8-NEXT:    [[I8:%.*]] = alloca i32, align 4
5992 // CHECK8-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5993 // CHECK8-NEXT:    store i32 0, i32* [[I]], align 4
5994 // CHECK8-NEXT:    br label [[FOR_COND:%.*]]
5995 // CHECK8:       for.cond:
5996 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5997 // CHECK8-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
5998 // CHECK8-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5999 // CHECK8:       for.body:
6000 // CHECK8-NEXT:    call void @_Z3fn4v()
6001 // CHECK8-NEXT:    br label [[FOR_INC:%.*]]
6002 // CHECK8:       for.inc:
6003 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
6004 // CHECK8-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
6005 // CHECK8-NEXT:    store i32 [[INC]], i32* [[I]], align 4
6006 // CHECK8-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
6007 // CHECK8:       for.end:
6008 // CHECK8-NEXT:    store i32 0, i32* [[I1]], align 4
6009 // CHECK8-NEXT:    br label [[FOR_COND2:%.*]]
6010 // CHECK8:       for.cond2:
6011 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
6012 // CHECK8-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
6013 // CHECK8-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
6014 // CHECK8:       for.body4:
6015 // CHECK8-NEXT:    call void @_Z3fn5v()
6016 // CHECK8-NEXT:    br label [[FOR_INC5:%.*]]
6017 // CHECK8:       for.inc5:
6018 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
6019 // CHECK8-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
6020 // CHECK8-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
6021 // CHECK8-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]]
6022 // CHECK8:       for.end7:
6023 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
6024 // CHECK8-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
6025 // CHECK8-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6026 // CHECK8-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6027 // CHECK8-NEXT:    store i32 0, i32* [[I8]], align 4
6028 // CHECK8-NEXT:    br label [[FOR_COND9:%.*]]
6029 // CHECK8:       for.cond9:
6030 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
6031 // CHECK8-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
6032 // CHECK8-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
6033 // CHECK8:       for.body11:
6034 // CHECK8-NEXT:    call void @_Z3fn6v()
6035 // CHECK8-NEXT:    br label [[FOR_INC12:%.*]]
6036 // CHECK8:       for.inc12:
6037 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
6038 // CHECK8-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
6039 // CHECK8-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
6040 // CHECK8-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP7:![0-9]+]]
6041 // CHECK8:       for.end14:
6042 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* @Arg, align 4
6043 // CHECK8-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP7]])
6044 // CHECK8-NEXT:    ret i32 [[CALL]]
6045 //
6046 //
6047 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
6048 // CHECK8-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
6049 // CHECK8-NEXT:  entry:
6050 // CHECK8-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
6051 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6052 // CHECK8-NEXT:    [[I1:%.*]] = alloca i32, align 4
6053 // CHECK8-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6054 // CHECK8-NEXT:    [[I8:%.*]] = alloca i32, align 4
6055 // CHECK8-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
6056 // CHECK8-NEXT:    store i32 0, i32* [[I]], align 4
6057 // CHECK8-NEXT:    br label [[FOR_COND:%.*]]
6058 // CHECK8:       for.cond:
6059 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
6060 // CHECK8-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
6061 // CHECK8-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
6062 // CHECK8:       for.body:
6063 // CHECK8-NEXT:    call void @_Z3fn1v()
6064 // CHECK8-NEXT:    br label [[FOR_INC:%.*]]
6065 // CHECK8:       for.inc:
6066 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
6067 // CHECK8-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
6068 // CHECK8-NEXT:    store i32 [[INC]], i32* [[I]], align 4
6069 // CHECK8-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
6070 // CHECK8:       for.end:
6071 // CHECK8-NEXT:    store i32 0, i32* [[I1]], align 4
6072 // CHECK8-NEXT:    br label [[FOR_COND2:%.*]]
6073 // CHECK8:       for.cond2:
6074 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
6075 // CHECK8-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
6076 // CHECK8-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
6077 // CHECK8:       for.body4:
6078 // CHECK8-NEXT:    call void @_Z3fn2v()
6079 // CHECK8-NEXT:    br label [[FOR_INC5:%.*]]
6080 // CHECK8:       for.inc5:
6081 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
6082 // CHECK8-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
6083 // CHECK8-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
6084 // CHECK8-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP9:![0-9]+]]
6085 // CHECK8:       for.end7:
6086 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
6087 // CHECK8-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
6088 // CHECK8-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6089 // CHECK8-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6090 // CHECK8-NEXT:    store i32 0, i32* [[I8]], align 4
6091 // CHECK8-NEXT:    br label [[FOR_COND9:%.*]]
6092 // CHECK8:       for.cond9:
6093 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
6094 // CHECK8-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
6095 // CHECK8-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
6096 // CHECK8:       for.body11:
6097 // CHECK8-NEXT:    call void @_Z3fn3v()
6098 // CHECK8-NEXT:    br label [[FOR_INC12:%.*]]
6099 // CHECK8:       for.inc12:
6100 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
6101 // CHECK8-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
6102 // CHECK8-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
6103 // CHECK8-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP10:![0-9]+]]
6104 // CHECK8:       for.end14:
6105 // CHECK8-NEXT:    ret i32 0
6106 //
6107 //
6108 // CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv
6109 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
6110 // CHECK9-NEXT:  entry:
6111 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6112 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
6113 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
6114 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
6115 // CHECK9-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
6116 // CHECK9-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6117 // CHECK9:       omp_offload.failed:
6118 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
6119 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6120 // CHECK9:       omp_offload.cont:
6121 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6122 // CHECK9-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
6123 // CHECK9-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
6124 // CHECK9-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
6125 // CHECK9:       omp_offload.failed2:
6126 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
6127 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
6128 // CHECK9:       omp_offload.cont3:
6129 // CHECK9-NEXT:    ret void
6130 //
6131 //
6132 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
6133 // CHECK9-SAME: () #[[ATTR1:[0-9]+]] {
6134 // CHECK9-NEXT:  entry:
6135 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
6136 // CHECK9-NEXT:    ret void
6137 //
6138 //
6139 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
6140 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6141 // CHECK9-NEXT:  entry:
6142 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6143 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6144 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6145 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6146 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6147 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6148 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6149 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6150 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6151 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6152 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6153 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6154 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6155 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6156 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6157 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6158 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6159 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6160 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6161 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6162 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6163 // CHECK9:       cond.true:
6164 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6165 // CHECK9:       cond.false:
6166 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6167 // CHECK9-NEXT:    br label [[COND_END]]
6168 // CHECK9:       cond.end:
6169 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6170 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6171 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6172 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6173 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6174 // CHECK9:       omp.inner.for.cond:
6175 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6176 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6177 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6178 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6179 // CHECK9:       omp.inner.for.body:
6180 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6181 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6182 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6183 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6184 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
6185 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6186 // CHECK9:       omp.inner.for.inc:
6187 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6188 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6189 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6190 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6191 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
6192 // CHECK9:       omp.inner.for.end:
6193 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6194 // CHECK9:       omp.loop.exit:
6195 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6196 // CHECK9-NEXT:    ret void
6197 //
6198 //
6199 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
6200 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6201 // CHECK9-NEXT:  entry:
6202 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6203 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6204 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6205 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6206 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6207 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6208 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6209 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6210 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6211 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6212 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6213 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6214 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6215 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6216 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6217 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6218 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
6219 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6220 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6221 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6222 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6223 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6224 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6225 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6226 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6227 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6228 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6229 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6230 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6231 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6232 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6233 // CHECK9:       cond.true:
6234 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6235 // CHECK9:       cond.false:
6236 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6237 // CHECK9-NEXT:    br label [[COND_END]]
6238 // CHECK9:       cond.end:
6239 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6240 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6241 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6242 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6243 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6244 // CHECK9:       omp.inner.for.cond:
6245 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6246 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6247 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6248 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6249 // CHECK9:       omp.inner.for.body:
6250 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6251 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6252 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6253 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6254 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6255 // CHECK9:       omp.body.continue:
6256 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6257 // CHECK9:       omp.inner.for.inc:
6258 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6259 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6260 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6261 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
6262 // CHECK9:       omp.inner.for.end:
6263 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6264 // CHECK9:       omp.loop.exit:
6265 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6266 // CHECK9-NEXT:    ret void
6267 //
6268 //
6269 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
6270 // CHECK9-SAME: () #[[ATTR1]] {
6271 // CHECK9-NEXT:  entry:
6272 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
6273 // CHECK9-NEXT:    ret void
6274 //
6275 //
6276 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
6277 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6278 // CHECK9-NEXT:  entry:
6279 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6280 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6281 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6282 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6283 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6284 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6285 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6286 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6287 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6288 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6289 // CHECK9-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6290 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6291 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6292 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6293 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6294 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6295 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6296 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6297 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6298 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6299 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6300 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6301 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6302 // CHECK9:       cond.true:
6303 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6304 // CHECK9:       cond.false:
6305 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6306 // CHECK9-NEXT:    br label [[COND_END]]
6307 // CHECK9:       cond.end:
6308 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6309 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6310 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6311 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6312 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6313 // CHECK9:       omp.inner.for.cond:
6314 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6315 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6316 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6317 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6318 // CHECK9:       omp.inner.for.body:
6319 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6320 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6321 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6322 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6323 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6324 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6325 // CHECK9-NEXT:    call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6326 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6327 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6328 // CHECK9:       omp.inner.for.inc:
6329 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6330 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6331 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6332 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6333 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
6334 // CHECK9:       omp.inner.for.end:
6335 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6336 // CHECK9:       omp.loop.exit:
6337 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6338 // CHECK9-NEXT:    ret void
6339 //
6340 //
6341 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
6342 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6343 // CHECK9-NEXT:  entry:
6344 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6345 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6346 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6347 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6348 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6349 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6350 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6351 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6352 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6353 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6354 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6355 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6356 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6357 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6358 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6359 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6360 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
6361 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6362 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6363 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6364 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6365 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6366 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6367 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6368 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6369 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6370 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6371 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6372 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6373 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6374 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6375 // CHECK9:       cond.true:
6376 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6377 // CHECK9:       cond.false:
6378 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6379 // CHECK9-NEXT:    br label [[COND_END]]
6380 // CHECK9:       cond.end:
6381 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6382 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6383 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6384 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6385 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6386 // CHECK9:       omp.inner.for.cond:
6387 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6388 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6389 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6390 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6391 // CHECK9:       omp.inner.for.body:
6392 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6393 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6394 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6395 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6396 // CHECK9-NEXT:    call void @_Z9gtid_testv()
6397 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6398 // CHECK9:       omp.body.continue:
6399 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6400 // CHECK9:       omp.inner.for.inc:
6401 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6402 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6403 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6404 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
6405 // CHECK9:       omp.inner.for.end:
6406 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6407 // CHECK9:       omp.loop.exit:
6408 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6409 // CHECK9-NEXT:    ret void
6410 //
6411 //
6412 // CHECK9-LABEL: define {{[^@]+}}@main
6413 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
6414 // CHECK9-NEXT:  entry:
6415 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
6416 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6417 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
6418 // CHECK9-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
6419 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
6420 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
6421 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
6422 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6423 // CHECK9-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
6424 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
6425 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6426 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
6427 // CHECK9-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
6428 // CHECK9-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6429 // CHECK9:       omp_offload.failed:
6430 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
6431 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6432 // CHECK9:       omp_offload.cont:
6433 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6434 // CHECK9-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
6435 // CHECK9-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
6436 // CHECK9-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
6437 // CHECK9:       omp_offload.failed2:
6438 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
6439 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
6440 // CHECK9:       omp_offload.cont3:
6441 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
6442 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
6443 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
6444 // CHECK9-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
6445 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6446 // CHECK9-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
6447 // CHECK9-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
6448 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6449 // CHECK9-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
6450 // CHECK9-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
6451 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6452 // CHECK9-NEXT:    store i8* null, i8** [[TMP10]], align 8
6453 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6454 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6455 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* @Arg, align 4
6456 // CHECK9-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
6457 // CHECK9-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6458 // CHECK9-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6459 // CHECK9-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6460 // CHECK9-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
6461 // CHECK9-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
6462 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6463 // CHECK9-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
6464 // CHECK9-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
6465 // CHECK9-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
6466 // CHECK9:       omp_offload.failed6:
6467 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
6468 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
6469 // CHECK9:       omp_offload.cont7:
6470 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, i32* @Arg, align 4
6471 // CHECK9-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
6472 // CHECK9-NEXT:    ret i32 [[CALL]]
6473 //
6474 //
6475 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
6476 // CHECK9-SAME: () #[[ATTR1]] {
6477 // CHECK9-NEXT:  entry:
6478 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
6479 // CHECK9-NEXT:    ret void
6480 //
6481 //
6482 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
6483 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6484 // CHECK9-NEXT:  entry:
6485 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6486 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6487 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6488 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6489 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6490 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6491 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6492 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6493 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6494 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6495 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6496 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6497 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6498 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6499 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6500 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6501 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6502 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6503 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6504 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6505 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6506 // CHECK9:       cond.true:
6507 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6508 // CHECK9:       cond.false:
6509 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6510 // CHECK9-NEXT:    br label [[COND_END]]
6511 // CHECK9:       cond.end:
6512 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6513 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6514 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6515 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6516 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6517 // CHECK9:       omp.inner.for.cond:
6518 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6519 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6520 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6521 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6522 // CHECK9:       omp.inner.for.body:
6523 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6524 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6525 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6526 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6527 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
6528 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6529 // CHECK9:       omp.inner.for.inc:
6530 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6531 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6532 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6533 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6534 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
6535 // CHECK9:       omp.inner.for.end:
6536 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6537 // CHECK9:       omp.loop.exit:
6538 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6539 // CHECK9-NEXT:    ret void
6540 //
6541 //
6542 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
6543 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6544 // CHECK9-NEXT:  entry:
6545 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6546 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6547 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6548 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6549 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6550 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6551 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6552 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6553 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6554 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6555 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6556 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6557 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6558 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6559 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6560 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6561 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
6562 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6563 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6564 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6565 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6566 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6567 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6568 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6569 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6570 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6571 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6572 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6573 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6574 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6575 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6576 // CHECK9:       cond.true:
6577 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6578 // CHECK9:       cond.false:
6579 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6580 // CHECK9-NEXT:    br label [[COND_END]]
6581 // CHECK9:       cond.end:
6582 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6583 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6584 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6585 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6586 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6587 // CHECK9:       omp.inner.for.cond:
6588 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6589 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6590 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6591 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6592 // CHECK9:       omp.inner.for.body:
6593 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6594 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6595 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6596 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6597 // CHECK9-NEXT:    call void @_Z3fn4v()
6598 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6599 // CHECK9:       omp.body.continue:
6600 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6601 // CHECK9:       omp.inner.for.inc:
6602 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6603 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6604 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6605 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
6606 // CHECK9:       omp.inner.for.end:
6607 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6608 // CHECK9:       omp.loop.exit:
6609 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6610 // CHECK9-NEXT:    ret void
6611 //
6612 //
6613 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
6614 // CHECK9-SAME: () #[[ATTR1]] {
6615 // CHECK9-NEXT:  entry:
6616 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
6617 // CHECK9-NEXT:    ret void
6618 //
6619 //
6620 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6
6621 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6622 // CHECK9-NEXT:  entry:
6623 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6624 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6625 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6626 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6627 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6628 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6629 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6630 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6631 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6632 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6633 // CHECK9-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6634 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6635 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6636 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6637 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6638 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6639 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6640 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6641 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6642 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6643 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6644 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6645 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6646 // CHECK9:       cond.true:
6647 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6648 // CHECK9:       cond.false:
6649 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6650 // CHECK9-NEXT:    br label [[COND_END]]
6651 // CHECK9:       cond.end:
6652 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6653 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6654 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6655 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6656 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6657 // CHECK9:       omp.inner.for.cond:
6658 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6659 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6660 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6661 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6662 // CHECK9:       omp.inner.for.body:
6663 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6664 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6665 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6666 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6667 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6668 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6669 // CHECK9-NEXT:    call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6670 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6671 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6672 // CHECK9:       omp.inner.for.inc:
6673 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6674 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6675 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6676 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6677 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
6678 // CHECK9:       omp.inner.for.end:
6679 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6680 // CHECK9:       omp.loop.exit:
6681 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6682 // CHECK9-NEXT:    ret void
6683 //
6684 //
6685 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
6686 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6687 // CHECK9-NEXT:  entry:
6688 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6689 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6690 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6691 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6692 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6693 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6694 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6695 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6696 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6697 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6698 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6699 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6700 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6701 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6702 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6703 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6704 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
6705 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6706 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6707 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6708 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6709 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6710 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6711 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6712 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6713 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6714 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6715 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6716 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6717 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6718 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6719 // CHECK9:       cond.true:
6720 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6721 // CHECK9:       cond.false:
6722 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6723 // CHECK9-NEXT:    br label [[COND_END]]
6724 // CHECK9:       cond.end:
6725 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6726 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6727 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6728 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6729 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6730 // CHECK9:       omp.inner.for.cond:
6731 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6732 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6733 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6734 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6735 // CHECK9:       omp.inner.for.body:
6736 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6737 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6738 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6739 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6740 // CHECK9-NEXT:    call void @_Z3fn5v()
6741 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6742 // CHECK9:       omp.body.continue:
6743 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6744 // CHECK9:       omp.inner.for.inc:
6745 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6746 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6747 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6748 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
6749 // CHECK9:       omp.inner.for.end:
6750 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6751 // CHECK9:       omp.loop.exit:
6752 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6753 // CHECK9-NEXT:    ret void
6754 //
6755 //
6756 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
6757 // CHECK9-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
6758 // CHECK9-NEXT:  entry:
6759 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
6760 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6761 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6762 // CHECK9-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
6763 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
6764 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
6765 // CHECK9-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
6766 // CHECK9-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6767 // CHECK9-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6768 // CHECK9-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6769 // CHECK9-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
6770 // CHECK9-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6771 // CHECK9-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
6772 // CHECK9-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
6773 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6774 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
6775 // CHECK9-NEXT:    ret void
6776 //
6777 //
6778 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8
6779 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6780 // CHECK9-NEXT:  entry:
6781 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6782 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6783 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6784 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6785 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6786 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6787 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6788 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6789 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6790 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6791 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6792 // CHECK9-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6793 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6794 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6795 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6796 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6797 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6798 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6799 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6800 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6801 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6802 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6803 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6804 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6805 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6806 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6807 // CHECK9:       cond.true:
6808 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6809 // CHECK9:       cond.false:
6810 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6811 // CHECK9-NEXT:    br label [[COND_END]]
6812 // CHECK9:       cond.end:
6813 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6814 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6815 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6816 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6817 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6818 // CHECK9:       omp.inner.for.cond:
6819 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6820 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6821 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6822 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6823 // CHECK9:       omp.inner.for.body:
6824 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6825 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6826 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6827 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6828 // CHECK9-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
6829 // CHECK9-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
6830 // CHECK9-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6831 // CHECK9:       omp_if.then:
6832 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
6833 // CHECK9-NEXT:    br label [[OMP_IF_END:%.*]]
6834 // CHECK9:       omp_if.else:
6835 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6836 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6837 // CHECK9-NEXT:    call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6838 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6839 // CHECK9-NEXT:    br label [[OMP_IF_END]]
6840 // CHECK9:       omp_if.end:
6841 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6842 // CHECK9:       omp.inner.for.inc:
6843 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6844 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6845 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
6846 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6847 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
6848 // CHECK9:       omp.inner.for.end:
6849 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6850 // CHECK9:       omp.loop.exit:
6851 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6852 // CHECK9-NEXT:    ret void
6853 //
6854 //
6855 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9
6856 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6857 // CHECK9-NEXT:  entry:
6858 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6859 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6860 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6861 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6862 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6863 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6864 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6865 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6866 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6867 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6868 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6869 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6870 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6871 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6872 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6873 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6874 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
6875 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6876 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6877 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6878 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6879 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6880 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6881 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6882 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6883 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6884 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6885 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6886 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6887 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6888 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6889 // CHECK9:       cond.true:
6890 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6891 // CHECK9:       cond.false:
6892 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6893 // CHECK9-NEXT:    br label [[COND_END]]
6894 // CHECK9:       cond.end:
6895 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6896 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6897 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6898 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6899 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6900 // CHECK9:       omp.inner.for.cond:
6901 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6902 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6903 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6904 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6905 // CHECK9:       omp.inner.for.body:
6906 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6907 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6908 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6909 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6910 // CHECK9-NEXT:    call void @_Z3fn6v()
6911 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6912 // CHECK9:       omp.body.continue:
6913 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6914 // CHECK9:       omp.inner.for.inc:
6915 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6916 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6917 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6918 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
6919 // CHECK9:       omp.inner.for.end:
6920 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6921 // CHECK9:       omp.loop.exit:
6922 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6923 // CHECK9-NEXT:    ret void
6924 //
6925 //
6926 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
6927 // CHECK9-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
6928 // CHECK9-NEXT:  entry:
6929 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
6930 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6931 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
6932 // CHECK9-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
6933 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
6934 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
6935 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
6936 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6937 // CHECK9-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
6938 // CHECK9-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
6939 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6940 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
6941 // CHECK9-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
6942 // CHECK9-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6943 // CHECK9:       omp_offload.failed:
6944 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
6945 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6946 // CHECK9:       omp_offload.cont:
6947 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6948 // CHECK9-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
6949 // CHECK9-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
6950 // CHECK9-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
6951 // CHECK9:       omp_offload.failed2:
6952 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
6953 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
6954 // CHECK9:       omp_offload.cont3:
6955 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
6956 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
6957 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
6958 // CHECK9-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
6959 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6960 // CHECK9-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
6961 // CHECK9-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
6962 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6963 // CHECK9-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
6964 // CHECK9-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
6965 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6966 // CHECK9-NEXT:    store i8* null, i8** [[TMP10]], align 8
6967 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6968 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6969 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
6970 // CHECK9-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
6971 // CHECK9-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6972 // CHECK9-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6973 // CHECK9-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6974 // CHECK9-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
6975 // CHECK9-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
6976 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6977 // CHECK9-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
6978 // CHECK9-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
6979 // CHECK9-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
6980 // CHECK9:       omp_offload.failed6:
6981 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
6982 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
6983 // CHECK9:       omp_offload.cont7:
6984 // CHECK9-NEXT:    ret i32 0
6985 //
6986 //
6987 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
6988 // CHECK9-SAME: () #[[ATTR1]] {
6989 // CHECK9-NEXT:  entry:
6990 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
6991 // CHECK9-NEXT:    ret void
6992 //
6993 //
6994 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
6995 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6996 // CHECK9-NEXT:  entry:
6997 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6998 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6999 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7000 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7001 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7002 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7003 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7004 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7005 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7006 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7007 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7008 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7009 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7010 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7011 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7012 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7013 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7014 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7015 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7016 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7017 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7018 // CHECK9:       cond.true:
7019 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7020 // CHECK9:       cond.false:
7021 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7022 // CHECK9-NEXT:    br label [[COND_END]]
7023 // CHECK9:       cond.end:
7024 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7025 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7026 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7027 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7028 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7029 // CHECK9:       omp.inner.for.cond:
7030 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7031 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7032 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7033 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7034 // CHECK9:       omp.inner.for.body:
7035 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7036 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7037 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7038 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7039 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
7040 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7041 // CHECK9:       omp.inner.for.inc:
7042 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7043 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7044 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7045 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7046 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
7047 // CHECK9:       omp.inner.for.end:
7048 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7049 // CHECK9:       omp.loop.exit:
7050 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7051 // CHECK9-NEXT:    ret void
7052 //
7053 //
7054 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11
7055 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7056 // CHECK9-NEXT:  entry:
7057 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7058 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7059 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7060 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7061 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7062 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7063 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7064 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7065 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7066 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7067 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7068 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7069 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7070 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7071 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7072 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7073 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7074 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7075 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7076 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7077 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7078 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7079 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7080 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7081 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7082 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7083 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7084 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7085 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7086 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7087 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7088 // CHECK9:       cond.true:
7089 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7090 // CHECK9:       cond.false:
7091 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7092 // CHECK9-NEXT:    br label [[COND_END]]
7093 // CHECK9:       cond.end:
7094 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7095 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7096 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7097 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7098 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7099 // CHECK9:       omp.inner.for.cond:
7100 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7101 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7102 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7103 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7104 // CHECK9:       omp.inner.for.body:
7105 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7106 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7107 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7108 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7109 // CHECK9-NEXT:    call void @_Z3fn1v()
7110 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7111 // CHECK9:       omp.body.continue:
7112 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7113 // CHECK9:       omp.inner.for.inc:
7114 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7115 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7116 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7117 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
7118 // CHECK9:       omp.inner.for.end:
7119 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7120 // CHECK9:       omp.loop.exit:
7121 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7122 // CHECK9-NEXT:    ret void
7123 //
7124 //
7125 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
7126 // CHECK9-SAME: () #[[ATTR1]] {
7127 // CHECK9-NEXT:  entry:
7128 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
7129 // CHECK9-NEXT:    ret void
7130 //
7131 //
7132 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..12
7133 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7134 // CHECK9-NEXT:  entry:
7135 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7136 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7137 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7138 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7139 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7140 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7141 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7142 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7143 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7144 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7145 // CHECK9-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7146 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7147 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7148 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7149 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7150 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7151 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7152 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7153 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7154 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7155 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7156 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7157 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7158 // CHECK9:       cond.true:
7159 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7160 // CHECK9:       cond.false:
7161 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7162 // CHECK9-NEXT:    br label [[COND_END]]
7163 // CHECK9:       cond.end:
7164 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7165 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7166 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7167 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7168 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7169 // CHECK9:       omp.inner.for.cond:
7170 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7171 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7172 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7173 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7174 // CHECK9:       omp.inner.for.body:
7175 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7176 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7177 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7178 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7179 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7180 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7181 // CHECK9-NEXT:    call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7182 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7183 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7184 // CHECK9:       omp.inner.for.inc:
7185 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7186 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7187 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7188 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7189 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
7190 // CHECK9:       omp.inner.for.end:
7191 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7192 // CHECK9:       omp.loop.exit:
7193 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7194 // CHECK9-NEXT:    ret void
7195 //
7196 //
7197 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13
7198 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7199 // CHECK9-NEXT:  entry:
7200 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7201 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7202 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7203 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7204 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7205 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7206 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7207 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7208 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7209 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7210 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7211 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7212 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7213 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7214 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7215 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7216 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7217 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7218 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7219 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7220 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7221 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7222 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7223 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7224 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7225 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7226 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7227 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7228 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7229 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7230 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7231 // CHECK9:       cond.true:
7232 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7233 // CHECK9:       cond.false:
7234 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7235 // CHECK9-NEXT:    br label [[COND_END]]
7236 // CHECK9:       cond.end:
7237 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7238 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7239 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7240 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7241 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7242 // CHECK9:       omp.inner.for.cond:
7243 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7244 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7245 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7246 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7247 // CHECK9:       omp.inner.for.body:
7248 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7249 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7250 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7251 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7252 // CHECK9-NEXT:    call void @_Z3fn2v()
7253 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7254 // CHECK9:       omp.body.continue:
7255 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7256 // CHECK9:       omp.inner.for.inc:
7257 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7258 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7259 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7260 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
7261 // CHECK9:       omp.inner.for.end:
7262 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7263 // CHECK9:       omp.loop.exit:
7264 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7265 // CHECK9-NEXT:    ret void
7266 //
7267 //
7268 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
7269 // CHECK9-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
7270 // CHECK9-NEXT:  entry:
7271 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
7272 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7273 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7274 // CHECK9-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
7275 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
7276 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
7277 // CHECK9-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
7278 // CHECK9-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7279 // CHECK9-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7280 // CHECK9-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7281 // CHECK9-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
7282 // CHECK9-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
7283 // CHECK9-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
7284 // CHECK9-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
7285 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7286 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
7287 // CHECK9-NEXT:    ret void
7288 //
7289 //
7290 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14
7291 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
7292 // CHECK9-NEXT:  entry:
7293 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7294 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7295 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7296 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7297 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7298 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7299 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7300 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7301 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7302 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7303 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7304 // CHECK9-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7305 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7306 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7307 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7308 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
7309 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7310 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7311 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7312 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7313 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7314 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7315 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7316 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7317 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7318 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7319 // CHECK9:       cond.true:
7320 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7321 // CHECK9:       cond.false:
7322 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7323 // CHECK9-NEXT:    br label [[COND_END]]
7324 // CHECK9:       cond.end:
7325 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7326 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7327 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7328 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7329 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7330 // CHECK9:       omp.inner.for.cond:
7331 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7332 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7333 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7334 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7335 // CHECK9:       omp.inner.for.body:
7336 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7337 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7338 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7339 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7340 // CHECK9-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
7341 // CHECK9-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
7342 // CHECK9-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7343 // CHECK9:       omp_if.then:
7344 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
7345 // CHECK9-NEXT:    br label [[OMP_IF_END:%.*]]
7346 // CHECK9:       omp_if.else:
7347 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7348 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7349 // CHECK9-NEXT:    call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7350 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7351 // CHECK9-NEXT:    br label [[OMP_IF_END]]
7352 // CHECK9:       omp_if.end:
7353 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7354 // CHECK9:       omp.inner.for.inc:
7355 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7356 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7357 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
7358 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7359 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
7360 // CHECK9:       omp.inner.for.end:
7361 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7362 // CHECK9:       omp.loop.exit:
7363 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7364 // CHECK9-NEXT:    ret void
7365 //
7366 //
7367 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15
7368 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7369 // CHECK9-NEXT:  entry:
7370 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7371 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7372 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7373 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7374 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7375 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7376 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7377 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7378 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7379 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7380 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7381 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7382 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7383 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7384 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7385 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7386 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7387 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7388 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7389 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7390 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7391 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7392 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7393 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7394 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7395 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7396 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7397 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7398 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7399 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7400 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7401 // CHECK9:       cond.true:
7402 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7403 // CHECK9:       cond.false:
7404 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7405 // CHECK9-NEXT:    br label [[COND_END]]
7406 // CHECK9:       cond.end:
7407 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7408 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7409 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7410 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7411 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7412 // CHECK9:       omp.inner.for.cond:
7413 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7414 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7415 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7416 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7417 // CHECK9:       omp.inner.for.body:
7418 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7419 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7420 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7421 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7422 // CHECK9-NEXT:    call void @_Z3fn3v()
7423 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7424 // CHECK9:       omp.body.continue:
7425 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7426 // CHECK9:       omp.inner.for.inc:
7427 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7428 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7429 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7430 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
7431 // CHECK9:       omp.inner.for.end:
7432 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7433 // CHECK9:       omp.loop.exit:
7434 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7435 // CHECK9-NEXT:    ret void
7436 //
7437 //
7438 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7439 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] {
7440 // CHECK9-NEXT:  entry:
7441 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
7442 // CHECK9-NEXT:    ret void
7443 //
7444 //
7445 // CHECK10-LABEL: define {{[^@]+}}@_Z9gtid_testv
7446 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
7447 // CHECK10-NEXT:  entry:
7448 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7449 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
7450 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
7451 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
7452 // CHECK10-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
7453 // CHECK10-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7454 // CHECK10:       omp_offload.failed:
7455 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
7456 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7457 // CHECK10:       omp_offload.cont:
7458 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7459 // CHECK10-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
7460 // CHECK10-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
7461 // CHECK10-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
7462 // CHECK10:       omp_offload.failed2:
7463 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
7464 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
7465 // CHECK10:       omp_offload.cont3:
7466 // CHECK10-NEXT:    ret void
7467 //
7468 //
7469 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
7470 // CHECK10-SAME: () #[[ATTR1:[0-9]+]] {
7471 // CHECK10-NEXT:  entry:
7472 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
7473 // CHECK10-NEXT:    ret void
7474 //
7475 //
7476 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
7477 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7478 // CHECK10-NEXT:  entry:
7479 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7480 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7481 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7482 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7483 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7484 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7485 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7486 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7487 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7488 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7489 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7490 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7491 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7492 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7493 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7494 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7495 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7496 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7497 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7498 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7499 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7500 // CHECK10:       cond.true:
7501 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7502 // CHECK10:       cond.false:
7503 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7504 // CHECK10-NEXT:    br label [[COND_END]]
7505 // CHECK10:       cond.end:
7506 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7507 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7508 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7509 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7510 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7511 // CHECK10:       omp.inner.for.cond:
7512 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7513 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7514 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7515 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7516 // CHECK10:       omp.inner.for.body:
7517 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7518 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7519 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7520 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7521 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
7522 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7523 // CHECK10:       omp.inner.for.inc:
7524 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7525 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7526 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7527 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7528 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
7529 // CHECK10:       omp.inner.for.end:
7530 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7531 // CHECK10:       omp.loop.exit:
7532 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7533 // CHECK10-NEXT:    ret void
7534 //
7535 //
7536 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
7537 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7538 // CHECK10-NEXT:  entry:
7539 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7540 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7541 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7542 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7543 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7544 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7545 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7546 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7547 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7548 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7549 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7550 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7551 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7552 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7553 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7554 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7555 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7556 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7557 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7558 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7559 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7560 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7561 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7562 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7563 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7564 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7565 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7566 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7567 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7568 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7569 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7570 // CHECK10:       cond.true:
7571 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7572 // CHECK10:       cond.false:
7573 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7574 // CHECK10-NEXT:    br label [[COND_END]]
7575 // CHECK10:       cond.end:
7576 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7577 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7578 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7579 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7580 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7581 // CHECK10:       omp.inner.for.cond:
7582 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7583 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7584 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7585 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7586 // CHECK10:       omp.inner.for.body:
7587 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7588 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7589 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7590 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7591 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7592 // CHECK10:       omp.body.continue:
7593 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7594 // CHECK10:       omp.inner.for.inc:
7595 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7596 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7597 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7598 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
7599 // CHECK10:       omp.inner.for.end:
7600 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7601 // CHECK10:       omp.loop.exit:
7602 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7603 // CHECK10-NEXT:    ret void
7604 //
7605 //
7606 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
7607 // CHECK10-SAME: () #[[ATTR1]] {
7608 // CHECK10-NEXT:  entry:
7609 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
7610 // CHECK10-NEXT:    ret void
7611 //
7612 //
7613 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
7614 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7615 // CHECK10-NEXT:  entry:
7616 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7617 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7618 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7619 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7620 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7621 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7622 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7623 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7624 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7625 // CHECK10-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7626 // CHECK10-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7627 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7628 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7629 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7630 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7631 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7632 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7633 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7634 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7635 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7636 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7637 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7638 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7639 // CHECK10:       cond.true:
7640 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7641 // CHECK10:       cond.false:
7642 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7643 // CHECK10-NEXT:    br label [[COND_END]]
7644 // CHECK10:       cond.end:
7645 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7646 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7647 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7648 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7649 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7650 // CHECK10:       omp.inner.for.cond:
7651 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7652 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7653 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7654 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7655 // CHECK10:       omp.inner.for.body:
7656 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7657 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7658 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7659 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7660 // CHECK10-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7661 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7662 // CHECK10-NEXT:    call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7663 // CHECK10-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7664 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7665 // CHECK10:       omp.inner.for.inc:
7666 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7667 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7668 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7669 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7670 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
7671 // CHECK10:       omp.inner.for.end:
7672 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7673 // CHECK10:       omp.loop.exit:
7674 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7675 // CHECK10-NEXT:    ret void
7676 //
7677 //
7678 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
7679 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7680 // CHECK10-NEXT:  entry:
7681 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7682 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7683 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7684 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7685 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7686 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7687 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7688 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7689 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7690 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7691 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7692 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7693 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7694 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7695 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7696 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7697 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7698 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7699 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7700 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7701 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7702 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7703 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7704 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7705 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7706 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7707 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7708 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7709 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7710 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7711 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7712 // CHECK10:       cond.true:
7713 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7714 // CHECK10:       cond.false:
7715 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7716 // CHECK10-NEXT:    br label [[COND_END]]
7717 // CHECK10:       cond.end:
7718 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7719 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7720 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7721 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7722 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7723 // CHECK10:       omp.inner.for.cond:
7724 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7725 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7726 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7727 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7728 // CHECK10:       omp.inner.for.body:
7729 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7730 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7731 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7732 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7733 // CHECK10-NEXT:    call void @_Z9gtid_testv()
7734 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7735 // CHECK10:       omp.body.continue:
7736 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7737 // CHECK10:       omp.inner.for.inc:
7738 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7739 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7740 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7741 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
7742 // CHECK10:       omp.inner.for.end:
7743 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7744 // CHECK10:       omp.loop.exit:
7745 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7746 // CHECK10-NEXT:    ret void
7747 //
7748 //
7749 // CHECK10-LABEL: define {{[^@]+}}@main
7750 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] {
7751 // CHECK10-NEXT:  entry:
7752 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7753 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7754 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
7755 // CHECK10-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
7756 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
7757 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
7758 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
7759 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7760 // CHECK10-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
7761 // CHECK10-NEXT:    store i32 0, i32* [[RETVAL]], align 4
7762 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7763 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
7764 // CHECK10-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
7765 // CHECK10-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7766 // CHECK10:       omp_offload.failed:
7767 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
7768 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7769 // CHECK10:       omp_offload.cont:
7770 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7771 // CHECK10-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
7772 // CHECK10-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
7773 // CHECK10-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
7774 // CHECK10:       omp_offload.failed2:
7775 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
7776 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
7777 // CHECK10:       omp_offload.cont3:
7778 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
7779 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
7780 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
7781 // CHECK10-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
7782 // CHECK10-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7783 // CHECK10-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
7784 // CHECK10-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
7785 // CHECK10-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7786 // CHECK10-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
7787 // CHECK10-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
7788 // CHECK10-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7789 // CHECK10-NEXT:    store i8* null, i8** [[TMP10]], align 8
7790 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7791 // CHECK10-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7792 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* @Arg, align 4
7793 // CHECK10-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
7794 // CHECK10-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7795 // CHECK10-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7796 // CHECK10-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7797 // CHECK10-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
7798 // CHECK10-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
7799 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7800 // CHECK10-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
7801 // CHECK10-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
7802 // CHECK10-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
7803 // CHECK10:       omp_offload.failed6:
7804 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
7805 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
7806 // CHECK10:       omp_offload.cont7:
7807 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, i32* @Arg, align 4
7808 // CHECK10-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
7809 // CHECK10-NEXT:    ret i32 [[CALL]]
7810 //
7811 //
7812 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
7813 // CHECK10-SAME: () #[[ATTR1]] {
7814 // CHECK10-NEXT:  entry:
7815 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
7816 // CHECK10-NEXT:    ret void
7817 //
7818 //
7819 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4
7820 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7821 // CHECK10-NEXT:  entry:
7822 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7823 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7824 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7825 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7826 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7827 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7828 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7829 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7830 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7831 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7832 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7833 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7834 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7835 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7836 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7837 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7838 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7839 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7840 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7841 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7842 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7843 // CHECK10:       cond.true:
7844 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7845 // CHECK10:       cond.false:
7846 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7847 // CHECK10-NEXT:    br label [[COND_END]]
7848 // CHECK10:       cond.end:
7849 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7850 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7851 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7852 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7853 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7854 // CHECK10:       omp.inner.for.cond:
7855 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7856 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7857 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7858 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7859 // CHECK10:       omp.inner.for.body:
7860 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7861 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7862 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7863 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7864 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
7865 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7866 // CHECK10:       omp.inner.for.inc:
7867 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7868 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7869 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7870 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7871 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
7872 // CHECK10:       omp.inner.for.end:
7873 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7874 // CHECK10:       omp.loop.exit:
7875 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7876 // CHECK10-NEXT:    ret void
7877 //
7878 //
7879 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5
7880 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7881 // CHECK10-NEXT:  entry:
7882 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7883 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7884 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7885 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7886 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7887 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7888 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7889 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7890 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7891 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7892 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7893 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7894 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7895 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7896 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7897 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7898 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7899 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7900 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7901 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7902 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7903 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7904 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7905 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7906 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7907 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7908 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7909 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7910 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7911 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7912 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7913 // CHECK10:       cond.true:
7914 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7915 // CHECK10:       cond.false:
7916 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7917 // CHECK10-NEXT:    br label [[COND_END]]
7918 // CHECK10:       cond.end:
7919 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7920 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7921 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7922 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7923 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7924 // CHECK10:       omp.inner.for.cond:
7925 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7926 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7927 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7928 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7929 // CHECK10:       omp.inner.for.body:
7930 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7931 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7932 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7933 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7934 // CHECK10-NEXT:    call void @_Z3fn4v()
7935 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7936 // CHECK10:       omp.body.continue:
7937 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7938 // CHECK10:       omp.inner.for.inc:
7939 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7940 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7941 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7942 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
7943 // CHECK10:       omp.inner.for.end:
7944 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7945 // CHECK10:       omp.loop.exit:
7946 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7947 // CHECK10-NEXT:    ret void
7948 //
7949 //
7950 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
7951 // CHECK10-SAME: () #[[ATTR1]] {
7952 // CHECK10-NEXT:  entry:
7953 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
7954 // CHECK10-NEXT:    ret void
7955 //
7956 //
7957 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6
7958 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7959 // CHECK10-NEXT:  entry:
7960 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7961 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7962 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7963 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7964 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7965 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7966 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7967 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7968 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7969 // CHECK10-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7970 // CHECK10-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7971 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7972 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7973 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7974 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7975 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7976 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7977 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7978 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7979 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7980 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7981 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7982 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7983 // CHECK10:       cond.true:
7984 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7985 // CHECK10:       cond.false:
7986 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7987 // CHECK10-NEXT:    br label [[COND_END]]
7988 // CHECK10:       cond.end:
7989 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7990 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7991 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7992 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7993 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7994 // CHECK10:       omp.inner.for.cond:
7995 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7996 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7997 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7998 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7999 // CHECK10:       omp.inner.for.body:
8000 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8001 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8002 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8003 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8004 // CHECK10-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8005 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8006 // CHECK10-NEXT:    call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
8007 // CHECK10-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8008 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8009 // CHECK10:       omp.inner.for.inc:
8010 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8011 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8012 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
8013 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8014 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
8015 // CHECK10:       omp.inner.for.end:
8016 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8017 // CHECK10:       omp.loop.exit:
8018 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8019 // CHECK10-NEXT:    ret void
8020 //
8021 //
8022 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7
8023 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8024 // CHECK10-NEXT:  entry:
8025 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8026 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8027 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8028 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8029 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8030 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8031 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8032 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8033 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8034 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8035 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8036 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8037 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8038 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8039 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8040 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8041 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8042 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8043 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8044 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8045 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8046 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8047 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8048 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8049 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8050 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8051 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8052 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8053 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8054 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8055 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8056 // CHECK10:       cond.true:
8057 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8058 // CHECK10:       cond.false:
8059 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8060 // CHECK10-NEXT:    br label [[COND_END]]
8061 // CHECK10:       cond.end:
8062 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8063 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8064 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8065 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8066 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8067 // CHECK10:       omp.inner.for.cond:
8068 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8069 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8070 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8071 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8072 // CHECK10:       omp.inner.for.body:
8073 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8074 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8075 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8076 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
8077 // CHECK10-NEXT:    call void @_Z3fn5v()
8078 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8079 // CHECK10:       omp.body.continue:
8080 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8081 // CHECK10:       omp.inner.for.inc:
8082 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8083 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8084 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8085 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
8086 // CHECK10:       omp.inner.for.end:
8087 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8088 // CHECK10:       omp.loop.exit:
8089 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8090 // CHECK10-NEXT:    ret void
8091 //
8092 //
8093 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
8094 // CHECK10-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
8095 // CHECK10-NEXT:  entry:
8096 // CHECK10-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
8097 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8098 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8099 // CHECK10-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
8100 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
8101 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
8102 // CHECK10-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
8103 // CHECK10-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8104 // CHECK10-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8105 // CHECK10-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8106 // CHECK10-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
8107 // CHECK10-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
8108 // CHECK10-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
8109 // CHECK10-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
8110 // CHECK10-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8111 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
8112 // CHECK10-NEXT:    ret void
8113 //
8114 //
8115 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..8
8116 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
8117 // CHECK10-NEXT:  entry:
8118 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8119 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8120 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8121 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8122 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8123 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8124 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8125 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8126 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8127 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8128 // CHECK10-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
8129 // CHECK10-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
8130 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8131 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8132 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8133 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
8134 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8135 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8136 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8137 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8138 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8139 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8140 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8141 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8142 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8143 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8144 // CHECK10:       cond.true:
8145 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8146 // CHECK10:       cond.false:
8147 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8148 // CHECK10-NEXT:    br label [[COND_END]]
8149 // CHECK10:       cond.end:
8150 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8151 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8152 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8153 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8154 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8155 // CHECK10:       omp.inner.for.cond:
8156 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8157 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8158 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8159 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8160 // CHECK10:       omp.inner.for.body:
8161 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8162 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8163 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8164 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8165 // CHECK10-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
8166 // CHECK10-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
8167 // CHECK10-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
8168 // CHECK10:       omp_if.then:
8169 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
8170 // CHECK10-NEXT:    br label [[OMP_IF_END:%.*]]
8171 // CHECK10:       omp_if.else:
8172 // CHECK10-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8173 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8174 // CHECK10-NEXT:    call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
8175 // CHECK10-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8176 // CHECK10-NEXT:    br label [[OMP_IF_END]]
8177 // CHECK10:       omp_if.end:
8178 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8179 // CHECK10:       omp.inner.for.inc:
8180 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8181 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8182 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
8183 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8184 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
8185 // CHECK10:       omp.inner.for.end:
8186 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8187 // CHECK10:       omp.loop.exit:
8188 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8189 // CHECK10-NEXT:    ret void
8190 //
8191 //
8192 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..9
8193 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8194 // CHECK10-NEXT:  entry:
8195 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8196 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8197 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8198 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8199 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8200 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8201 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8202 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8203 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8204 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8205 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8206 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8207 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8208 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8209 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8210 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8211 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8212 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8213 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8214 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8215 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8216 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8217 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8218 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8219 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8220 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8221 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8222 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8223 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8224 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8225 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8226 // CHECK10:       cond.true:
8227 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8228 // CHECK10:       cond.false:
8229 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8230 // CHECK10-NEXT:    br label [[COND_END]]
8231 // CHECK10:       cond.end:
8232 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8233 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8234 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8235 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8236 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8237 // CHECK10:       omp.inner.for.cond:
8238 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8239 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8240 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8241 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8242 // CHECK10:       omp.inner.for.body:
8243 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8244 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8245 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8246 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
8247 // CHECK10-NEXT:    call void @_Z3fn6v()
8248 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8249 // CHECK10:       omp.body.continue:
8250 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8251 // CHECK10:       omp.inner.for.inc:
8252 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8253 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8254 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8255 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
8256 // CHECK10:       omp.inner.for.end:
8257 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8258 // CHECK10:       omp.loop.exit:
8259 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8260 // CHECK10-NEXT:    ret void
8261 //
8262 //
8263 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
8264 // CHECK10-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
8265 // CHECK10-NEXT:  entry:
8266 // CHECK10-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
8267 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8268 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
8269 // CHECK10-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
8270 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
8271 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
8272 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
8273 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8274 // CHECK10-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
8275 // CHECK10-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
8276 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8277 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
8278 // CHECK10-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
8279 // CHECK10-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8280 // CHECK10:       omp_offload.failed:
8281 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
8282 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
8283 // CHECK10:       omp_offload.cont:
8284 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8285 // CHECK10-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
8286 // CHECK10-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
8287 // CHECK10-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
8288 // CHECK10:       omp_offload.failed2:
8289 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
8290 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
8291 // CHECK10:       omp_offload.cont3:
8292 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
8293 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
8294 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
8295 // CHECK10-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
8296 // CHECK10-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8297 // CHECK10-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
8298 // CHECK10-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
8299 // CHECK10-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8300 // CHECK10-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
8301 // CHECK10-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
8302 // CHECK10-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
8303 // CHECK10-NEXT:    store i8* null, i8** [[TMP10]], align 8
8304 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8305 // CHECK10-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8306 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
8307 // CHECK10-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
8308 // CHECK10-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8309 // CHECK10-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8310 // CHECK10-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8311 // CHECK10-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
8312 // CHECK10-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
8313 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8314 // CHECK10-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
8315 // CHECK10-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
8316 // CHECK10-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
8317 // CHECK10:       omp_offload.failed6:
8318 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
8319 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
8320 // CHECK10:       omp_offload.cont7:
8321 // CHECK10-NEXT:    ret i32 0
8322 //
8323 //
8324 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
8325 // CHECK10-SAME: () #[[ATTR1]] {
8326 // CHECK10-NEXT:  entry:
8327 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
8328 // CHECK10-NEXT:    ret void
8329 //
8330 //
8331 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10
8332 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8333 // CHECK10-NEXT:  entry:
8334 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8335 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8336 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8337 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8338 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8339 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8340 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8341 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8342 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8343 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8344 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8345 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8346 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8347 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8348 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8349 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8350 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8351 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8352 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8353 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8354 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8355 // CHECK10:       cond.true:
8356 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8357 // CHECK10:       cond.false:
8358 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8359 // CHECK10-NEXT:    br label [[COND_END]]
8360 // CHECK10:       cond.end:
8361 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8362 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8363 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8364 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8365 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8366 // CHECK10:       omp.inner.for.cond:
8367 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8368 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8369 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8370 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8371 // CHECK10:       omp.inner.for.body:
8372 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8373 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8374 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8375 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8376 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
8377 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8378 // CHECK10:       omp.inner.for.inc:
8379 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8380 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8381 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8382 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8383 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
8384 // CHECK10:       omp.inner.for.end:
8385 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8386 // CHECK10:       omp.loop.exit:
8387 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8388 // CHECK10-NEXT:    ret void
8389 //
8390 //
8391 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..11
8392 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8393 // CHECK10-NEXT:  entry:
8394 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8395 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8396 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8397 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8398 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8399 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8400 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8401 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8402 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8403 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8404 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8405 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8406 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8407 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8408 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8409 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8410 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8411 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8412 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8413 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8414 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8415 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8416 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8417 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8418 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8419 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8420 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8421 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8422 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8423 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8424 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8425 // CHECK10:       cond.true:
8426 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8427 // CHECK10:       cond.false:
8428 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8429 // CHECK10-NEXT:    br label [[COND_END]]
8430 // CHECK10:       cond.end:
8431 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8432 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8433 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8434 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8435 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8436 // CHECK10:       omp.inner.for.cond:
8437 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8438 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8439 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8440 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8441 // CHECK10:       omp.inner.for.body:
8442 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8443 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8444 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8445 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
8446 // CHECK10-NEXT:    call void @_Z3fn1v()
8447 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8448 // CHECK10:       omp.body.continue:
8449 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8450 // CHECK10:       omp.inner.for.inc:
8451 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8452 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8453 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8454 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
8455 // CHECK10:       omp.inner.for.end:
8456 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8457 // CHECK10:       omp.loop.exit:
8458 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8459 // CHECK10-NEXT:    ret void
8460 //
8461 //
8462 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
8463 // CHECK10-SAME: () #[[ATTR1]] {
8464 // CHECK10-NEXT:  entry:
8465 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
8466 // CHECK10-NEXT:    ret void
8467 //
8468 //
8469 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..12
8470 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8471 // CHECK10-NEXT:  entry:
8472 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8473 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8474 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8475 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8476 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8477 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8478 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8479 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8480 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8481 // CHECK10-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
8482 // CHECK10-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
8483 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8484 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8485 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8486 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8487 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8488 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8489 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8490 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8491 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8492 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8493 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8494 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8495 // CHECK10:       cond.true:
8496 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8497 // CHECK10:       cond.false:
8498 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8499 // CHECK10-NEXT:    br label [[COND_END]]
8500 // CHECK10:       cond.end:
8501 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8502 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8503 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8504 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8505 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8506 // CHECK10:       omp.inner.for.cond:
8507 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8508 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8509 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8510 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8511 // CHECK10:       omp.inner.for.body:
8512 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8513 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8514 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8515 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8516 // CHECK10-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8517 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8518 // CHECK10-NEXT:    call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
8519 // CHECK10-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8520 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8521 // CHECK10:       omp.inner.for.inc:
8522 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8523 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8524 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
8525 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8526 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
8527 // CHECK10:       omp.inner.for.end:
8528 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8529 // CHECK10:       omp.loop.exit:
8530 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8531 // CHECK10-NEXT:    ret void
8532 //
8533 //
8534 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..13
8535 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8536 // CHECK10-NEXT:  entry:
8537 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8538 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8539 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8540 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8541 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8542 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8543 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8544 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8545 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8546 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8547 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8548 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8549 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8550 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8551 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8552 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8553 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8554 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8555 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8556 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8557 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8558 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8559 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8560 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8561 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8562 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8563 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8564 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8565 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8566 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8567 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8568 // CHECK10:       cond.true:
8569 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8570 // CHECK10:       cond.false:
8571 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8572 // CHECK10-NEXT:    br label [[COND_END]]
8573 // CHECK10:       cond.end:
8574 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8575 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8576 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8577 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8578 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8579 // CHECK10:       omp.inner.for.cond:
8580 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8581 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8582 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8583 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8584 // CHECK10:       omp.inner.for.body:
8585 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8586 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8587 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8588 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
8589 // CHECK10-NEXT:    call void @_Z3fn2v()
8590 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8591 // CHECK10:       omp.body.continue:
8592 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8593 // CHECK10:       omp.inner.for.inc:
8594 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8595 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8596 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8597 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
8598 // CHECK10:       omp.inner.for.end:
8599 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8600 // CHECK10:       omp.loop.exit:
8601 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8602 // CHECK10-NEXT:    ret void
8603 //
8604 //
8605 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
8606 // CHECK10-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
8607 // CHECK10-NEXT:  entry:
8608 // CHECK10-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
8609 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8610 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8611 // CHECK10-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
8612 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
8613 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
8614 // CHECK10-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
8615 // CHECK10-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8616 // CHECK10-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8617 // CHECK10-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8618 // CHECK10-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
8619 // CHECK10-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
8620 // CHECK10-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
8621 // CHECK10-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
8622 // CHECK10-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8623 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
8624 // CHECK10-NEXT:    ret void
8625 //
8626 //
8627 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..14
8628 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
8629 // CHECK10-NEXT:  entry:
8630 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8631 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8632 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8633 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8634 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8635 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8636 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8637 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8638 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8639 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8640 // CHECK10-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
8641 // CHECK10-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
8642 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8643 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8644 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8645 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
8646 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8647 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8648 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8649 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8650 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8651 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8652 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8653 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8654 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8655 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8656 // CHECK10:       cond.true:
8657 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8658 // CHECK10:       cond.false:
8659 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8660 // CHECK10-NEXT:    br label [[COND_END]]
8661 // CHECK10:       cond.end:
8662 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8663 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8664 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8665 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8666 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8667 // CHECK10:       omp.inner.for.cond:
8668 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8669 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8670 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8671 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8672 // CHECK10:       omp.inner.for.body:
8673 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8674 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8675 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8676 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8677 // CHECK10-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
8678 // CHECK10-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
8679 // CHECK10-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
8680 // CHECK10:       omp_if.then:
8681 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
8682 // CHECK10-NEXT:    br label [[OMP_IF_END:%.*]]
8683 // CHECK10:       omp_if.else:
8684 // CHECK10-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8685 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8686 // CHECK10-NEXT:    call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
8687 // CHECK10-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8688 // CHECK10-NEXT:    br label [[OMP_IF_END]]
8689 // CHECK10:       omp_if.end:
8690 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8691 // CHECK10:       omp.inner.for.inc:
8692 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8693 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8694 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
8695 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8696 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
8697 // CHECK10:       omp.inner.for.end:
8698 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8699 // CHECK10:       omp.loop.exit:
8700 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8701 // CHECK10-NEXT:    ret void
8702 //
8703 //
8704 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..15
8705 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8706 // CHECK10-NEXT:  entry:
8707 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8708 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8709 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8710 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8711 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8712 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8713 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8714 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8715 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8716 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8717 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8718 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8719 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8720 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8721 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8722 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8723 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8724 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8725 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8726 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8727 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8728 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8729 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8730 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8731 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8732 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8733 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8734 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8735 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8736 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8737 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8738 // CHECK10:       cond.true:
8739 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8740 // CHECK10:       cond.false:
8741 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8742 // CHECK10-NEXT:    br label [[COND_END]]
8743 // CHECK10:       cond.end:
8744 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8745 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8746 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8747 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8748 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8749 // CHECK10:       omp.inner.for.cond:
8750 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8751 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8752 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8753 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8754 // CHECK10:       omp.inner.for.body:
8755 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8756 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8757 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8758 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
8759 // CHECK10-NEXT:    call void @_Z3fn3v()
8760 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8761 // CHECK10:       omp.body.continue:
8762 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8763 // CHECK10:       omp.inner.for.inc:
8764 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8765 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8766 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8767 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
8768 // CHECK10:       omp.inner.for.end:
8769 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8770 // CHECK10:       omp.loop.exit:
8771 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8772 // CHECK10-NEXT:    ret void
8773 //
8774 //
8775 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
8776 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] {
8777 // CHECK10-NEXT:  entry:
8778 // CHECK10-NEXT:    call void @__tgt_register_requires(i64 1)
8779 // CHECK10-NEXT:    ret void
8780 //
8781 //
8782 // CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv
8783 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
8784 // CHECK11-NEXT:  entry:
8785 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
8786 // CHECK11-NEXT:    [[I1:%.*]] = alloca i32, align 4
8787 // CHECK11-NEXT:    store i32 0, i32* [[I]], align 4
8788 // CHECK11-NEXT:    br label [[FOR_COND:%.*]]
8789 // CHECK11:       for.cond:
8790 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
8791 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
8792 // CHECK11-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
8793 // CHECK11:       for.body:
8794 // CHECK11-NEXT:    br label [[FOR_INC:%.*]]
8795 // CHECK11:       for.inc:
8796 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
8797 // CHECK11-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
8798 // CHECK11-NEXT:    store i32 [[INC]], i32* [[I]], align 4
8799 // CHECK11-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
8800 // CHECK11:       for.end:
8801 // CHECK11-NEXT:    store i32 0, i32* [[I1]], align 4
8802 // CHECK11-NEXT:    br label [[FOR_COND2:%.*]]
8803 // CHECK11:       for.cond2:
8804 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
8805 // CHECK11-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
8806 // CHECK11-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
8807 // CHECK11:       for.body4:
8808 // CHECK11-NEXT:    call void @_Z9gtid_testv()
8809 // CHECK11-NEXT:    br label [[FOR_INC5:%.*]]
8810 // CHECK11:       for.inc5:
8811 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
8812 // CHECK11-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
8813 // CHECK11-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
8814 // CHECK11-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]]
8815 // CHECK11:       for.end7:
8816 // CHECK11-NEXT:    ret void
8817 //
8818 //
8819 // CHECK11-LABEL: define {{[^@]+}}@main
8820 // CHECK11-SAME: () #[[ATTR1:[0-9]+]] {
8821 // CHECK11-NEXT:  entry:
8822 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
8823 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
8824 // CHECK11-NEXT:    [[I1:%.*]] = alloca i32, align 4
8825 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8826 // CHECK11-NEXT:    [[I8:%.*]] = alloca i32, align 4
8827 // CHECK11-NEXT:    store i32 0, i32* [[RETVAL]], align 4
8828 // CHECK11-NEXT:    store i32 0, i32* [[I]], align 4
8829 // CHECK11-NEXT:    br label [[FOR_COND:%.*]]
8830 // CHECK11:       for.cond:
8831 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
8832 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
8833 // CHECK11-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
8834 // CHECK11:       for.body:
8835 // CHECK11-NEXT:    call void @_Z3fn4v()
8836 // CHECK11-NEXT:    br label [[FOR_INC:%.*]]
8837 // CHECK11:       for.inc:
8838 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
8839 // CHECK11-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
8840 // CHECK11-NEXT:    store i32 [[INC]], i32* [[I]], align 4
8841 // CHECK11-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
8842 // CHECK11:       for.end:
8843 // CHECK11-NEXT:    store i32 0, i32* [[I1]], align 4
8844 // CHECK11-NEXT:    br label [[FOR_COND2:%.*]]
8845 // CHECK11:       for.cond2:
8846 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
8847 // CHECK11-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
8848 // CHECK11-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
8849 // CHECK11:       for.body4:
8850 // CHECK11-NEXT:    call void @_Z3fn5v()
8851 // CHECK11-NEXT:    br label [[FOR_INC5:%.*]]
8852 // CHECK11:       for.inc5:
8853 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
8854 // CHECK11-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
8855 // CHECK11-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
8856 // CHECK11-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]]
8857 // CHECK11:       for.end7:
8858 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
8859 // CHECK11-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
8860 // CHECK11-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8861 // CHECK11-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8862 // CHECK11-NEXT:    store i32 0, i32* [[I8]], align 4
8863 // CHECK11-NEXT:    br label [[FOR_COND9:%.*]]
8864 // CHECK11:       for.cond9:
8865 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
8866 // CHECK11-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
8867 // CHECK11-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
8868 // CHECK11:       for.body11:
8869 // CHECK11-NEXT:    call void @_Z3fn6v()
8870 // CHECK11-NEXT:    br label [[FOR_INC12:%.*]]
8871 // CHECK11:       for.inc12:
8872 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
8873 // CHECK11-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
8874 // CHECK11-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
8875 // CHECK11-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP11:![0-9]+]]
8876 // CHECK11:       for.end14:
8877 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* @Arg, align 4
8878 // CHECK11-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP7]])
8879 // CHECK11-NEXT:    ret i32 [[CALL]]
8880 //
8881 //
8882 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
8883 // CHECK11-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
8884 // CHECK11-NEXT:  entry:
8885 // CHECK11-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
8886 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
8887 // CHECK11-NEXT:    [[I1:%.*]] = alloca i32, align 4
8888 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8889 // CHECK11-NEXT:    [[I8:%.*]] = alloca i32, align 4
8890 // CHECK11-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
8891 // CHECK11-NEXT:    store i32 0, i32* [[I]], align 4
8892 // CHECK11-NEXT:    br label [[FOR_COND:%.*]]
8893 // CHECK11:       for.cond:
8894 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
8895 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
8896 // CHECK11-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
8897 // CHECK11:       for.body:
8898 // CHECK11-NEXT:    call void @_Z3fn1v()
8899 // CHECK11-NEXT:    br label [[FOR_INC:%.*]]
8900 // CHECK11:       for.inc:
8901 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
8902 // CHECK11-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
8903 // CHECK11-NEXT:    store i32 [[INC]], i32* [[I]], align 4
8904 // CHECK11-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
8905 // CHECK11:       for.end:
8906 // CHECK11-NEXT:    store i32 0, i32* [[I1]], align 4
8907 // CHECK11-NEXT:    br label [[FOR_COND2:%.*]]
8908 // CHECK11:       for.cond2:
8909 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
8910 // CHECK11-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
8911 // CHECK11-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
8912 // CHECK11:       for.body4:
8913 // CHECK11-NEXT:    call void @_Z3fn2v()
8914 // CHECK11-NEXT:    br label [[FOR_INC5:%.*]]
8915 // CHECK11:       for.inc5:
8916 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
8917 // CHECK11-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
8918 // CHECK11-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
8919 // CHECK11-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP13:![0-9]+]]
8920 // CHECK11:       for.end7:
8921 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
8922 // CHECK11-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
8923 // CHECK11-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8924 // CHECK11-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8925 // CHECK11-NEXT:    store i32 0, i32* [[I8]], align 4
8926 // CHECK11-NEXT:    br label [[FOR_COND9:%.*]]
8927 // CHECK11:       for.cond9:
8928 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
8929 // CHECK11-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
8930 // CHECK11-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
8931 // CHECK11:       for.body11:
8932 // CHECK11-NEXT:    call void @_Z3fn3v()
8933 // CHECK11-NEXT:    br label [[FOR_INC12:%.*]]
8934 // CHECK11:       for.inc12:
8935 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
8936 // CHECK11-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
8937 // CHECK11-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
8938 // CHECK11-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP14:![0-9]+]]
8939 // CHECK11:       for.end14:
8940 // CHECK11-NEXT:    ret i32 0
8941 //
8942 //
8943 // CHECK12-LABEL: define {{[^@]+}}@_Z9gtid_testv
8944 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
8945 // CHECK12-NEXT:  entry:
8946 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
8947 // CHECK12-NEXT:    [[I1:%.*]] = alloca i32, align 4
8948 // CHECK12-NEXT:    store i32 0, i32* [[I]], align 4
8949 // CHECK12-NEXT:    br label [[FOR_COND:%.*]]
8950 // CHECK12:       for.cond:
8951 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
8952 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
8953 // CHECK12-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
8954 // CHECK12:       for.body:
8955 // CHECK12-NEXT:    br label [[FOR_INC:%.*]]
8956 // CHECK12:       for.inc:
8957 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
8958 // CHECK12-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
8959 // CHECK12-NEXT:    store i32 [[INC]], i32* [[I]], align 4
8960 // CHECK12-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
8961 // CHECK12:       for.end:
8962 // CHECK12-NEXT:    store i32 0, i32* [[I1]], align 4
8963 // CHECK12-NEXT:    br label [[FOR_COND2:%.*]]
8964 // CHECK12:       for.cond2:
8965 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
8966 // CHECK12-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
8967 // CHECK12-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
8968 // CHECK12:       for.body4:
8969 // CHECK12-NEXT:    call void @_Z9gtid_testv()
8970 // CHECK12-NEXT:    br label [[FOR_INC5:%.*]]
8971 // CHECK12:       for.inc5:
8972 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
8973 // CHECK12-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
8974 // CHECK12-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
8975 // CHECK12-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]]
8976 // CHECK12:       for.end7:
8977 // CHECK12-NEXT:    ret void
8978 //
8979 //
8980 // CHECK12-LABEL: define {{[^@]+}}@main
8981 // CHECK12-SAME: () #[[ATTR1:[0-9]+]] {
8982 // CHECK12-NEXT:  entry:
8983 // CHECK12-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
8984 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
8985 // CHECK12-NEXT:    [[I1:%.*]] = alloca i32, align 4
8986 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8987 // CHECK12-NEXT:    [[I8:%.*]] = alloca i32, align 4
8988 // CHECK12-NEXT:    store i32 0, i32* [[RETVAL]], align 4
8989 // CHECK12-NEXT:    store i32 0, i32* [[I]], align 4
8990 // CHECK12-NEXT:    br label [[FOR_COND:%.*]]
8991 // CHECK12:       for.cond:
8992 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
8993 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
8994 // CHECK12-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
8995 // CHECK12:       for.body:
8996 // CHECK12-NEXT:    call void @_Z3fn4v()
8997 // CHECK12-NEXT:    br label [[FOR_INC:%.*]]
8998 // CHECK12:       for.inc:
8999 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
9000 // CHECK12-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
9001 // CHECK12-NEXT:    store i32 [[INC]], i32* [[I]], align 4
9002 // CHECK12-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
9003 // CHECK12:       for.end:
9004 // CHECK12-NEXT:    store i32 0, i32* [[I1]], align 4
9005 // CHECK12-NEXT:    br label [[FOR_COND2:%.*]]
9006 // CHECK12:       for.cond2:
9007 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
9008 // CHECK12-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
9009 // CHECK12-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
9010 // CHECK12:       for.body4:
9011 // CHECK12-NEXT:    call void @_Z3fn5v()
9012 // CHECK12-NEXT:    br label [[FOR_INC5:%.*]]
9013 // CHECK12:       for.inc5:
9014 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
9015 // CHECK12-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
9016 // CHECK12-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
9017 // CHECK12-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]]
9018 // CHECK12:       for.end7:
9019 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
9020 // CHECK12-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
9021 // CHECK12-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9022 // CHECK12-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9023 // CHECK12-NEXT:    store i32 0, i32* [[I8]], align 4
9024 // CHECK12-NEXT:    br label [[FOR_COND9:%.*]]
9025 // CHECK12:       for.cond9:
9026 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
9027 // CHECK12-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
9028 // CHECK12-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
9029 // CHECK12:       for.body11:
9030 // CHECK12-NEXT:    call void @_Z3fn6v()
9031 // CHECK12-NEXT:    br label [[FOR_INC12:%.*]]
9032 // CHECK12:       for.inc12:
9033 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
9034 // CHECK12-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
9035 // CHECK12-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
9036 // CHECK12-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP11:![0-9]+]]
9037 // CHECK12:       for.end14:
9038 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* @Arg, align 4
9039 // CHECK12-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP7]])
9040 // CHECK12-NEXT:    ret i32 [[CALL]]
9041 //
9042 //
9043 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
9044 // CHECK12-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
9045 // CHECK12-NEXT:  entry:
9046 // CHECK12-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
9047 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
9048 // CHECK12-NEXT:    [[I1:%.*]] = alloca i32, align 4
9049 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9050 // CHECK12-NEXT:    [[I8:%.*]] = alloca i32, align 4
9051 // CHECK12-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
9052 // CHECK12-NEXT:    store i32 0, i32* [[I]], align 4
9053 // CHECK12-NEXT:    br label [[FOR_COND:%.*]]
9054 // CHECK12:       for.cond:
9055 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
9056 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
9057 // CHECK12-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
9058 // CHECK12:       for.body:
9059 // CHECK12-NEXT:    call void @_Z3fn1v()
9060 // CHECK12-NEXT:    br label [[FOR_INC:%.*]]
9061 // CHECK12:       for.inc:
9062 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
9063 // CHECK12-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
9064 // CHECK12-NEXT:    store i32 [[INC]], i32* [[I]], align 4
9065 // CHECK12-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
9066 // CHECK12:       for.end:
9067 // CHECK12-NEXT:    store i32 0, i32* [[I1]], align 4
9068 // CHECK12-NEXT:    br label [[FOR_COND2:%.*]]
9069 // CHECK12:       for.cond2:
9070 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
9071 // CHECK12-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
9072 // CHECK12-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
9073 // CHECK12:       for.body4:
9074 // CHECK12-NEXT:    call void @_Z3fn2v()
9075 // CHECK12-NEXT:    br label [[FOR_INC5:%.*]]
9076 // CHECK12:       for.inc5:
9077 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
9078 // CHECK12-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
9079 // CHECK12-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
9080 // CHECK12-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP13:![0-9]+]]
9081 // CHECK12:       for.end7:
9082 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
9083 // CHECK12-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
9084 // CHECK12-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9085 // CHECK12-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9086 // CHECK12-NEXT:    store i32 0, i32* [[I8]], align 4
9087 // CHECK12-NEXT:    br label [[FOR_COND9:%.*]]
9088 // CHECK12:       for.cond9:
9089 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
9090 // CHECK12-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
9091 // CHECK12-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
9092 // CHECK12:       for.body11:
9093 // CHECK12-NEXT:    call void @_Z3fn3v()
9094 // CHECK12-NEXT:    br label [[FOR_INC12:%.*]]
9095 // CHECK12:       for.inc12:
9096 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
9097 // CHECK12-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
9098 // CHECK12-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
9099 // CHECK12-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP14:![0-9]+]]
9100 // CHECK12:       for.end14:
9101 // CHECK12-NEXT:    ret i32 0
9102 //
9103 //
9104 // CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv
9105 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
9106 // CHECK13-NEXT:  entry:
9107 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9108 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
9109 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
9110 // CHECK13-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
9111 // CHECK13-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
9112 // CHECK13-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9113 // CHECK13:       omp_offload.failed:
9114 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
9115 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
9116 // CHECK13:       omp_offload.cont:
9117 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9118 // CHECK13-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9119 // CHECK13-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
9120 // CHECK13-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
9121 // CHECK13:       omp_offload.failed2:
9122 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
9123 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
9124 // CHECK13:       omp_offload.cont3:
9125 // CHECK13-NEXT:    ret void
9126 //
9127 //
9128 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
9129 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] {
9130 // CHECK13-NEXT:  entry:
9131 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
9132 // CHECK13-NEXT:    ret void
9133 //
9134 //
9135 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
9136 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9137 // CHECK13-NEXT:  entry:
9138 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9139 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9140 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9141 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9142 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9143 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9144 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9145 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9146 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9147 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9148 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9149 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9150 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9151 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9152 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9153 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9154 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9155 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9156 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9157 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9158 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9159 // CHECK13:       cond.true:
9160 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9161 // CHECK13:       cond.false:
9162 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9163 // CHECK13-NEXT:    br label [[COND_END]]
9164 // CHECK13:       cond.end:
9165 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9166 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9167 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9168 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9169 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9170 // CHECK13:       omp.inner.for.cond:
9171 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9172 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9173 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9174 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9175 // CHECK13:       omp.inner.for.body:
9176 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9177 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9178 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9179 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9180 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
9181 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9182 // CHECK13:       omp.inner.for.inc:
9183 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9184 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9185 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
9186 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9187 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9188 // CHECK13:       omp.inner.for.end:
9189 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9190 // CHECK13:       omp.loop.exit:
9191 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9192 // CHECK13-NEXT:    ret void
9193 //
9194 //
9195 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
9196 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9197 // CHECK13-NEXT:  entry:
9198 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9199 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9200 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9201 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9202 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9203 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9204 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9205 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9206 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9207 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9208 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9209 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9210 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9211 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9212 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9213 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9214 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9215 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9216 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9217 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9218 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9219 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9220 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9221 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9222 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9223 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9224 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9225 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9226 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9227 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9228 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9229 // CHECK13:       cond.true:
9230 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9231 // CHECK13:       cond.false:
9232 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9233 // CHECK13-NEXT:    br label [[COND_END]]
9234 // CHECK13:       cond.end:
9235 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9236 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9237 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9238 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9239 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9240 // CHECK13:       omp.inner.for.cond:
9241 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9242 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9243 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9244 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9245 // CHECK13:       omp.inner.for.body:
9246 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9247 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9248 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9249 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9250 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9251 // CHECK13:       omp.body.continue:
9252 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9253 // CHECK13:       omp.inner.for.inc:
9254 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9255 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9256 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9257 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9258 // CHECK13:       omp.inner.for.end:
9259 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9260 // CHECK13:       omp.loop.exit:
9261 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9262 // CHECK13-NEXT:    ret void
9263 //
9264 //
9265 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
9266 // CHECK13-SAME: () #[[ATTR1]] {
9267 // CHECK13-NEXT:  entry:
9268 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
9269 // CHECK13-NEXT:    ret void
9270 //
9271 //
9272 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
9273 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9274 // CHECK13-NEXT:  entry:
9275 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9276 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9277 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9278 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9279 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9280 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9281 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9282 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9283 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9284 // CHECK13-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
9285 // CHECK13-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
9286 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9287 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9288 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9289 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9290 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9291 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9292 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9293 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9294 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9295 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9296 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9297 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9298 // CHECK13:       cond.true:
9299 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9300 // CHECK13:       cond.false:
9301 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9302 // CHECK13-NEXT:    br label [[COND_END]]
9303 // CHECK13:       cond.end:
9304 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9305 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9306 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9307 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9308 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9309 // CHECK13:       omp.inner.for.cond:
9310 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9311 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9312 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9313 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9314 // CHECK13:       omp.inner.for.body:
9315 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9316 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9317 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9318 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9319 // CHECK13-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9320 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9321 // CHECK13-NEXT:    call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
9322 // CHECK13-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9323 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9324 // CHECK13:       omp.inner.for.inc:
9325 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9326 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9327 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9328 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9329 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9330 // CHECK13:       omp.inner.for.end:
9331 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9332 // CHECK13:       omp.loop.exit:
9333 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9334 // CHECK13-NEXT:    ret void
9335 //
9336 //
9337 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
9338 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9339 // CHECK13-NEXT:  entry:
9340 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9341 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9342 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9343 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9344 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9345 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9346 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9347 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9348 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9349 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9350 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9351 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9352 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9353 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9354 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9355 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9356 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9357 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9358 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9359 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9360 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9361 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9362 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9363 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9364 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9365 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9366 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9367 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9368 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9369 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9370 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9371 // CHECK13:       cond.true:
9372 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9373 // CHECK13:       cond.false:
9374 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9375 // CHECK13-NEXT:    br label [[COND_END]]
9376 // CHECK13:       cond.end:
9377 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9378 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9379 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9380 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9381 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9382 // CHECK13:       omp.inner.for.cond:
9383 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9384 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9385 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9386 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9387 // CHECK13:       omp.inner.for.body:
9388 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9389 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9390 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9391 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9392 // CHECK13-NEXT:    call void @_Z9gtid_testv()
9393 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9394 // CHECK13:       omp.body.continue:
9395 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9396 // CHECK13:       omp.inner.for.inc:
9397 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9398 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9399 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9400 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9401 // CHECK13:       omp.inner.for.end:
9402 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9403 // CHECK13:       omp.loop.exit:
9404 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9405 // CHECK13-NEXT:    ret void
9406 //
9407 //
9408 // CHECK13-LABEL: define {{[^@]+}}@main
9409 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] {
9410 // CHECK13-NEXT:  entry:
9411 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
9412 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9413 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
9414 // CHECK13-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
9415 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
9416 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
9417 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
9418 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9419 // CHECK13-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
9420 // CHECK13-NEXT:    store i32 0, i32* [[RETVAL]], align 4
9421 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9422 // CHECK13-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
9423 // CHECK13-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
9424 // CHECK13-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9425 // CHECK13:       omp_offload.failed:
9426 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
9427 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
9428 // CHECK13:       omp_offload.cont:
9429 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9430 // CHECK13-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9431 // CHECK13-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
9432 // CHECK13-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
9433 // CHECK13:       omp_offload.failed2:
9434 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
9435 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
9436 // CHECK13:       omp_offload.cont3:
9437 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
9438 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
9439 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
9440 // CHECK13-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
9441 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9442 // CHECK13-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
9443 // CHECK13-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
9444 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9445 // CHECK13-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
9446 // CHECK13-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
9447 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9448 // CHECK13-NEXT:    store i8* null, i8** [[TMP10]], align 8
9449 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9450 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9451 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* @Arg, align 4
9452 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
9453 // CHECK13-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9454 // CHECK13-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9455 // CHECK13-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9456 // CHECK13-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
9457 // CHECK13-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
9458 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9459 // CHECK13-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
9460 // CHECK13-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
9461 // CHECK13-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
9462 // CHECK13:       omp_offload.failed6:
9463 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
9464 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
9465 // CHECK13:       omp_offload.cont7:
9466 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* @Arg, align 4
9467 // CHECK13-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
9468 // CHECK13-NEXT:    ret i32 [[CALL]]
9469 //
9470 //
9471 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
9472 // CHECK13-SAME: () #[[ATTR1]] {
9473 // CHECK13-NEXT:  entry:
9474 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
9475 // CHECK13-NEXT:    ret void
9476 //
9477 //
9478 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4
9479 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9480 // CHECK13-NEXT:  entry:
9481 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9482 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9483 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9484 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9485 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9486 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9487 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9488 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9489 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9490 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9491 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9492 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9493 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9494 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9495 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9496 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9497 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9498 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9499 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9500 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9501 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9502 // CHECK13:       cond.true:
9503 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9504 // CHECK13:       cond.false:
9505 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9506 // CHECK13-NEXT:    br label [[COND_END]]
9507 // CHECK13:       cond.end:
9508 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9509 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9510 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9511 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9512 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9513 // CHECK13:       omp.inner.for.cond:
9514 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9515 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9516 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9517 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9518 // CHECK13:       omp.inner.for.body:
9519 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9520 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9521 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9522 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9523 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
9524 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9525 // CHECK13:       omp.inner.for.inc:
9526 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9527 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9528 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
9529 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9530 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9531 // CHECK13:       omp.inner.for.end:
9532 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9533 // CHECK13:       omp.loop.exit:
9534 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9535 // CHECK13-NEXT:    ret void
9536 //
9537 //
9538 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5
9539 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9540 // CHECK13-NEXT:  entry:
9541 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9542 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9543 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9544 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9545 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9546 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9547 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9548 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9549 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9550 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9551 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9552 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9553 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9554 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9555 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9556 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9557 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9558 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9559 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9560 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9561 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9562 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9563 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9564 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9565 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9566 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9567 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9568 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9569 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9570 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9571 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9572 // CHECK13:       cond.true:
9573 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9574 // CHECK13:       cond.false:
9575 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9576 // CHECK13-NEXT:    br label [[COND_END]]
9577 // CHECK13:       cond.end:
9578 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9579 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9580 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9581 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9582 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9583 // CHECK13:       omp.inner.for.cond:
9584 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9585 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9586 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9587 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9588 // CHECK13:       omp.inner.for.body:
9589 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9590 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9591 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9592 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9593 // CHECK13-NEXT:    call void @_Z3fn4v()
9594 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9595 // CHECK13:       omp.body.continue:
9596 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9597 // CHECK13:       omp.inner.for.inc:
9598 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9599 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9600 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9601 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9602 // CHECK13:       omp.inner.for.end:
9603 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9604 // CHECK13:       omp.loop.exit:
9605 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9606 // CHECK13-NEXT:    ret void
9607 //
9608 //
9609 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
9610 // CHECK13-SAME: () #[[ATTR1]] {
9611 // CHECK13-NEXT:  entry:
9612 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
9613 // CHECK13-NEXT:    ret void
9614 //
9615 //
9616 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
9617 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9618 // CHECK13-NEXT:  entry:
9619 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9620 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9621 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9622 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9623 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9624 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9625 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9626 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9627 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9628 // CHECK13-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
9629 // CHECK13-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
9630 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9631 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9632 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9633 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9634 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9635 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9636 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9637 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9638 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9639 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9640 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9641 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9642 // CHECK13:       cond.true:
9643 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9644 // CHECK13:       cond.false:
9645 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9646 // CHECK13-NEXT:    br label [[COND_END]]
9647 // CHECK13:       cond.end:
9648 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9649 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9650 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9651 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9652 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9653 // CHECK13:       omp.inner.for.cond:
9654 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9655 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9656 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9657 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9658 // CHECK13:       omp.inner.for.body:
9659 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9660 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9661 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9662 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9663 // CHECK13-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9664 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9665 // CHECK13-NEXT:    call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
9666 // CHECK13-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9667 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9668 // CHECK13:       omp.inner.for.inc:
9669 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9670 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9671 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9672 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9673 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9674 // CHECK13:       omp.inner.for.end:
9675 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9676 // CHECK13:       omp.loop.exit:
9677 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9678 // CHECK13-NEXT:    ret void
9679 //
9680 //
9681 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7
9682 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9683 // CHECK13-NEXT:  entry:
9684 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9685 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9686 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9687 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9688 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9689 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9690 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9691 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9692 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9693 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9694 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9695 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9696 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9697 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9698 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9699 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9700 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9701 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9702 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9703 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9704 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9705 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9706 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9707 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9708 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9709 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9710 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9711 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9712 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9713 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9714 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9715 // CHECK13:       cond.true:
9716 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9717 // CHECK13:       cond.false:
9718 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9719 // CHECK13-NEXT:    br label [[COND_END]]
9720 // CHECK13:       cond.end:
9721 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9722 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9723 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9724 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9725 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9726 // CHECK13:       omp.inner.for.cond:
9727 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9728 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9729 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9730 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9731 // CHECK13:       omp.inner.for.body:
9732 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9733 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9734 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9735 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9736 // CHECK13-NEXT:    call void @_Z3fn5v()
9737 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9738 // CHECK13:       omp.body.continue:
9739 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9740 // CHECK13:       omp.inner.for.inc:
9741 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9742 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9743 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9744 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9745 // CHECK13:       omp.inner.for.end:
9746 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9747 // CHECK13:       omp.loop.exit:
9748 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9749 // CHECK13-NEXT:    ret void
9750 //
9751 //
9752 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
9753 // CHECK13-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
9754 // CHECK13-NEXT:  entry:
9755 // CHECK13-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
9756 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9757 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9758 // CHECK13-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
9759 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
9760 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
9761 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
9762 // CHECK13-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9763 // CHECK13-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9764 // CHECK13-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9765 // CHECK13-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
9766 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
9767 // CHECK13-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
9768 // CHECK13-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
9769 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9770 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
9771 // CHECK13-NEXT:    ret void
9772 //
9773 //
9774 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8
9775 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
9776 // CHECK13-NEXT:  entry:
9777 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9778 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9779 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9780 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9781 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9782 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9783 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9784 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9785 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9786 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9787 // CHECK13-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
9788 // CHECK13-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
9789 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9790 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9791 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9792 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
9793 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9794 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9795 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9796 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9797 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9798 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9799 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9800 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9801 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9802 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9803 // CHECK13:       cond.true:
9804 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9805 // CHECK13:       cond.false:
9806 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9807 // CHECK13-NEXT:    br label [[COND_END]]
9808 // CHECK13:       cond.end:
9809 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9810 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9811 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9812 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9813 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9814 // CHECK13:       omp.inner.for.cond:
9815 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9816 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9817 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9818 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9819 // CHECK13:       omp.inner.for.body:
9820 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9821 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9822 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9823 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9824 // CHECK13-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
9825 // CHECK13-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
9826 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9827 // CHECK13:       omp_if.then:
9828 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
9829 // CHECK13-NEXT:    br label [[OMP_IF_END:%.*]]
9830 // CHECK13:       omp_if.else:
9831 // CHECK13-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9832 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9833 // CHECK13-NEXT:    call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
9834 // CHECK13-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9835 // CHECK13-NEXT:    br label [[OMP_IF_END]]
9836 // CHECK13:       omp_if.end:
9837 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9838 // CHECK13:       omp.inner.for.inc:
9839 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9840 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9841 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
9842 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9843 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9844 // CHECK13:       omp.inner.for.end:
9845 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9846 // CHECK13:       omp.loop.exit:
9847 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9848 // CHECK13-NEXT:    ret void
9849 //
9850 //
9851 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9
9852 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9853 // CHECK13-NEXT:  entry:
9854 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9855 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9856 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9857 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9858 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9859 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9860 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9861 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9862 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9863 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9864 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9865 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9866 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9867 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9868 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9869 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9870 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9871 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9872 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9873 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9874 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9875 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9876 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9877 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9878 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9879 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9880 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9881 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9882 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9883 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9884 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9885 // CHECK13:       cond.true:
9886 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9887 // CHECK13:       cond.false:
9888 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9889 // CHECK13-NEXT:    br label [[COND_END]]
9890 // CHECK13:       cond.end:
9891 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9892 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9893 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9894 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9895 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9896 // CHECK13:       omp.inner.for.cond:
9897 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9898 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9899 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9900 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9901 // CHECK13:       omp.inner.for.body:
9902 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9903 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9904 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9905 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9906 // CHECK13-NEXT:    call void @_Z3fn6v()
9907 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9908 // CHECK13:       omp.body.continue:
9909 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9910 // CHECK13:       omp.inner.for.inc:
9911 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9912 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9913 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9914 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9915 // CHECK13:       omp.inner.for.end:
9916 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9917 // CHECK13:       omp.loop.exit:
9918 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9919 // CHECK13-NEXT:    ret void
9920 //
9921 //
9922 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
9923 // CHECK13-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
9924 // CHECK13-NEXT:  entry:
9925 // CHECK13-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
9926 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9927 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
9928 // CHECK13-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
9929 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
9930 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
9931 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
9932 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9933 // CHECK13-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
9934 // CHECK13-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
9935 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9936 // CHECK13-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
9937 // CHECK13-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
9938 // CHECK13-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9939 // CHECK13:       omp_offload.failed:
9940 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
9941 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
9942 // CHECK13:       omp_offload.cont:
9943 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9944 // CHECK13-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9945 // CHECK13-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
9946 // CHECK13-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
9947 // CHECK13:       omp_offload.failed2:
9948 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
9949 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
9950 // CHECK13:       omp_offload.cont3:
9951 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
9952 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
9953 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
9954 // CHECK13-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
9955 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9956 // CHECK13-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
9957 // CHECK13-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
9958 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9959 // CHECK13-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
9960 // CHECK13-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
9961 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9962 // CHECK13-NEXT:    store i8* null, i8** [[TMP10]], align 8
9963 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9964 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9965 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
9966 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
9967 // CHECK13-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9968 // CHECK13-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9969 // CHECK13-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9970 // CHECK13-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
9971 // CHECK13-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
9972 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9973 // CHECK13-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
9974 // CHECK13-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
9975 // CHECK13-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
9976 // CHECK13:       omp_offload.failed6:
9977 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
9978 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
9979 // CHECK13:       omp_offload.cont7:
9980 // CHECK13-NEXT:    ret i32 0
9981 //
9982 //
9983 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
9984 // CHECK13-SAME: () #[[ATTR1]] {
9985 // CHECK13-NEXT:  entry:
9986 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
9987 // CHECK13-NEXT:    ret void
9988 //
9989 //
9990 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10
9991 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9992 // CHECK13-NEXT:  entry:
9993 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9994 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9995 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9996 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9997 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9998 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9999 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10000 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10001 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10002 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10003 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10004 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10005 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10006 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10007 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10008 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10009 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10010 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10011 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10012 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10013 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10014 // CHECK13:       cond.true:
10015 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10016 // CHECK13:       cond.false:
10017 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10018 // CHECK13-NEXT:    br label [[COND_END]]
10019 // CHECK13:       cond.end:
10020 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10021 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10022 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10023 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10024 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10025 // CHECK13:       omp.inner.for.cond:
10026 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10027 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10028 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10029 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10030 // CHECK13:       omp.inner.for.body:
10031 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10032 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10033 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10034 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10035 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
10036 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10037 // CHECK13:       omp.inner.for.inc:
10038 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10039 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10040 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
10041 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10042 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
10043 // CHECK13:       omp.inner.for.end:
10044 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10045 // CHECK13:       omp.loop.exit:
10046 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10047 // CHECK13-NEXT:    ret void
10048 //
10049 //
10050 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
10051 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10052 // CHECK13-NEXT:  entry:
10053 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10054 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10055 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10056 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10057 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10058 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10059 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10060 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10061 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10062 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10063 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10064 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10065 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10066 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10067 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10068 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10069 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10070 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10071 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10072 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10073 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10074 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10075 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10076 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10077 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10078 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10079 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10080 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10081 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10082 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10083 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10084 // CHECK13:       cond.true:
10085 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10086 // CHECK13:       cond.false:
10087 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10088 // CHECK13-NEXT:    br label [[COND_END]]
10089 // CHECK13:       cond.end:
10090 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10091 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10092 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10093 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10094 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10095 // CHECK13:       omp.inner.for.cond:
10096 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10097 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10098 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10099 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10100 // CHECK13:       omp.inner.for.body:
10101 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10102 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10103 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10104 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
10105 // CHECK13-NEXT:    call void @_Z3fn1v()
10106 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10107 // CHECK13:       omp.body.continue:
10108 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10109 // CHECK13:       omp.inner.for.inc:
10110 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10111 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10112 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10113 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
10114 // CHECK13:       omp.inner.for.end:
10115 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10116 // CHECK13:       omp.loop.exit:
10117 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10118 // CHECK13-NEXT:    ret void
10119 //
10120 //
10121 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
10122 // CHECK13-SAME: () #[[ATTR1]] {
10123 // CHECK13-NEXT:  entry:
10124 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
10125 // CHECK13-NEXT:    ret void
10126 //
10127 //
10128 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..12
10129 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10130 // CHECK13-NEXT:  entry:
10131 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10132 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10133 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10134 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10135 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10136 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10137 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10138 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10139 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10140 // CHECK13-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10141 // CHECK13-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10142 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10143 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10144 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10145 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10146 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10147 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10148 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10149 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10150 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10151 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10152 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10153 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10154 // CHECK13:       cond.true:
10155 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10156 // CHECK13:       cond.false:
10157 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10158 // CHECK13-NEXT:    br label [[COND_END]]
10159 // CHECK13:       cond.end:
10160 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10161 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10162 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10163 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10164 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10165 // CHECK13:       omp.inner.for.cond:
10166 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10167 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10168 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10169 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10170 // CHECK13:       omp.inner.for.body:
10171 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10172 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10173 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10174 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10175 // CHECK13-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10176 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10177 // CHECK13-NEXT:    call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
10178 // CHECK13-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10179 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10180 // CHECK13:       omp.inner.for.inc:
10181 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10182 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10183 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10184 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10185 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
10186 // CHECK13:       omp.inner.for.end:
10187 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10188 // CHECK13:       omp.loop.exit:
10189 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10190 // CHECK13-NEXT:    ret void
10191 //
10192 //
10193 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..13
10194 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10195 // CHECK13-NEXT:  entry:
10196 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10197 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10198 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10199 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10200 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10201 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10202 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10203 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10204 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10205 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10206 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10207 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10208 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10209 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10210 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10211 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10212 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10213 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10214 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10215 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10216 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10217 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10218 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10219 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10220 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10221 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10222 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10223 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10224 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10225 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10226 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10227 // CHECK13:       cond.true:
10228 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10229 // CHECK13:       cond.false:
10230 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10231 // CHECK13-NEXT:    br label [[COND_END]]
10232 // CHECK13:       cond.end:
10233 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10234 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10235 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10236 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10237 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10238 // CHECK13:       omp.inner.for.cond:
10239 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10240 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10241 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10242 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10243 // CHECK13:       omp.inner.for.body:
10244 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10245 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10246 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10247 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
10248 // CHECK13-NEXT:    call void @_Z3fn2v()
10249 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10250 // CHECK13:       omp.body.continue:
10251 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10252 // CHECK13:       omp.inner.for.inc:
10253 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10254 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10255 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10256 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
10257 // CHECK13:       omp.inner.for.end:
10258 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10259 // CHECK13:       omp.loop.exit:
10260 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10261 // CHECK13-NEXT:    ret void
10262 //
10263 //
10264 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
10265 // CHECK13-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
10266 // CHECK13-NEXT:  entry:
10267 // CHECK13-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
10268 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
10269 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10270 // CHECK13-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
10271 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
10272 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
10273 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
10274 // CHECK13-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
10275 // CHECK13-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
10276 // CHECK13-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
10277 // CHECK13-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
10278 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
10279 // CHECK13-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
10280 // CHECK13-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
10281 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10282 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
10283 // CHECK13-NEXT:    ret void
10284 //
10285 //
10286 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14
10287 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
10288 // CHECK13-NEXT:  entry:
10289 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10290 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10291 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10292 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10293 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10294 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10295 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10296 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10297 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10298 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10299 // CHECK13-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10300 // CHECK13-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10301 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10302 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10303 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10304 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
10305 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10306 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10307 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10308 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10309 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10310 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10311 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10312 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10313 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10314 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10315 // CHECK13:       cond.true:
10316 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10317 // CHECK13:       cond.false:
10318 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10319 // CHECK13-NEXT:    br label [[COND_END]]
10320 // CHECK13:       cond.end:
10321 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10322 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10323 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10324 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10325 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10326 // CHECK13:       omp.inner.for.cond:
10327 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10328 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10329 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10330 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10331 // CHECK13:       omp.inner.for.body:
10332 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10333 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10334 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10335 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10336 // CHECK13-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
10337 // CHECK13-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
10338 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
10339 // CHECK13:       omp_if.then:
10340 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
10341 // CHECK13-NEXT:    br label [[OMP_IF_END:%.*]]
10342 // CHECK13:       omp_if.else:
10343 // CHECK13-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10344 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10345 // CHECK13-NEXT:    call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
10346 // CHECK13-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10347 // CHECK13-NEXT:    br label [[OMP_IF_END]]
10348 // CHECK13:       omp_if.end:
10349 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10350 // CHECK13:       omp.inner.for.inc:
10351 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10352 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10353 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
10354 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10355 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
10356 // CHECK13:       omp.inner.for.end:
10357 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10358 // CHECK13:       omp.loop.exit:
10359 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10360 // CHECK13-NEXT:    ret void
10361 //
10362 //
10363 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15
10364 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10365 // CHECK13-NEXT:  entry:
10366 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10367 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10368 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10369 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10370 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10371 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10372 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10373 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10374 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10375 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10376 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10377 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10378 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10379 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10380 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10381 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10382 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10383 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10384 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10385 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10386 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10387 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10388 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10389 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10390 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10391 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10392 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10393 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10394 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10395 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10396 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10397 // CHECK13:       cond.true:
10398 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10399 // CHECK13:       cond.false:
10400 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10401 // CHECK13-NEXT:    br label [[COND_END]]
10402 // CHECK13:       cond.end:
10403 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10404 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10405 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10406 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10407 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10408 // CHECK13:       omp.inner.for.cond:
10409 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10410 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10411 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10412 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10413 // CHECK13:       omp.inner.for.body:
10414 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10415 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10416 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10417 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
10418 // CHECK13-NEXT:    call void @_Z3fn3v()
10419 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10420 // CHECK13:       omp.body.continue:
10421 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10422 // CHECK13:       omp.inner.for.inc:
10423 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10424 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10425 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10426 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
10427 // CHECK13:       omp.inner.for.end:
10428 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10429 // CHECK13:       omp.loop.exit:
10430 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10431 // CHECK13-NEXT:    ret void
10432 //
10433 //
10434 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
10435 // CHECK13-SAME: () #[[ATTR5:[0-9]+]] {
10436 // CHECK13-NEXT:  entry:
10437 // CHECK13-NEXT:    call void @__tgt_register_requires(i64 1)
10438 // CHECK13-NEXT:    ret void
10439 //
10440 //
10441 // CHECK14-LABEL: define {{[^@]+}}@_Z9gtid_testv
10442 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] {
10443 // CHECK14-NEXT:  entry:
10444 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10445 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
10446 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
10447 // CHECK14-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
10448 // CHECK14-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
10449 // CHECK14-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10450 // CHECK14:       omp_offload.failed:
10451 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
10452 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
10453 // CHECK14:       omp_offload.cont:
10454 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10455 // CHECK14-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
10456 // CHECK14-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
10457 // CHECK14-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
10458 // CHECK14:       omp_offload.failed2:
10459 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
10460 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
10461 // CHECK14:       omp_offload.cont3:
10462 // CHECK14-NEXT:    ret void
10463 //
10464 //
10465 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
10466 // CHECK14-SAME: () #[[ATTR1:[0-9]+]] {
10467 // CHECK14-NEXT:  entry:
10468 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
10469 // CHECK14-NEXT:    ret void
10470 //
10471 //
10472 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined.
10473 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10474 // CHECK14-NEXT:  entry:
10475 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10476 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10477 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10478 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10479 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10480 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10481 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10482 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10483 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10484 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10485 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10486 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10487 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10488 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10489 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10490 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10491 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10492 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10493 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10494 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10495 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10496 // CHECK14:       cond.true:
10497 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10498 // CHECK14:       cond.false:
10499 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10500 // CHECK14-NEXT:    br label [[COND_END]]
10501 // CHECK14:       cond.end:
10502 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10503 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10504 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10505 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10506 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10507 // CHECK14:       omp.inner.for.cond:
10508 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10509 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10510 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10511 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10512 // CHECK14:       omp.inner.for.body:
10513 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10514 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10515 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10516 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10517 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
10518 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10519 // CHECK14:       omp.inner.for.inc:
10520 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10521 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10522 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
10523 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10524 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10525 // CHECK14:       omp.inner.for.end:
10526 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10527 // CHECK14:       omp.loop.exit:
10528 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10529 // CHECK14-NEXT:    ret void
10530 //
10531 //
10532 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1
10533 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10534 // CHECK14-NEXT:  entry:
10535 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10536 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10537 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10538 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10539 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10540 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10541 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10542 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10543 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10544 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10545 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10546 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10547 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10548 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10549 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10550 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10551 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10552 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10553 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10554 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10555 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10556 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10557 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10558 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10559 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10560 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10561 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10562 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10563 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10564 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10565 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10566 // CHECK14:       cond.true:
10567 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10568 // CHECK14:       cond.false:
10569 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10570 // CHECK14-NEXT:    br label [[COND_END]]
10571 // CHECK14:       cond.end:
10572 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10573 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10574 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10575 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10576 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10577 // CHECK14:       omp.inner.for.cond:
10578 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10579 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10580 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10581 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10582 // CHECK14:       omp.inner.for.body:
10583 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10584 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10585 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10586 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
10587 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10588 // CHECK14:       omp.body.continue:
10589 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10590 // CHECK14:       omp.inner.for.inc:
10591 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10592 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10593 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10594 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10595 // CHECK14:       omp.inner.for.end:
10596 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10597 // CHECK14:       omp.loop.exit:
10598 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10599 // CHECK14-NEXT:    ret void
10600 //
10601 //
10602 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
10603 // CHECK14-SAME: () #[[ATTR1]] {
10604 // CHECK14-NEXT:  entry:
10605 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
10606 // CHECK14-NEXT:    ret void
10607 //
10608 //
10609 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2
10610 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10611 // CHECK14-NEXT:  entry:
10612 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10613 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10614 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10615 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10616 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10617 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10618 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10619 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10620 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10621 // CHECK14-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10622 // CHECK14-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10623 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10624 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10625 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10626 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10627 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10628 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10629 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10630 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10631 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10632 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10633 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10634 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10635 // CHECK14:       cond.true:
10636 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10637 // CHECK14:       cond.false:
10638 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10639 // CHECK14-NEXT:    br label [[COND_END]]
10640 // CHECK14:       cond.end:
10641 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10642 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10643 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10644 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10645 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10646 // CHECK14:       omp.inner.for.cond:
10647 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10648 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10649 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10650 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10651 // CHECK14:       omp.inner.for.body:
10652 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10653 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10654 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10655 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10656 // CHECK14-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10657 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10658 // CHECK14-NEXT:    call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
10659 // CHECK14-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10660 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10661 // CHECK14:       omp.inner.for.inc:
10662 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10663 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10664 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10665 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10666 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10667 // CHECK14:       omp.inner.for.end:
10668 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10669 // CHECK14:       omp.loop.exit:
10670 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10671 // CHECK14-NEXT:    ret void
10672 //
10673 //
10674 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3
10675 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10676 // CHECK14-NEXT:  entry:
10677 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10678 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10679 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10680 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10681 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10682 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10683 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10684 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10685 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10686 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10687 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10688 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10689 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10690 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10691 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10692 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10693 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10694 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10695 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10696 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10697 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10698 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10699 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10700 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10701 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10702 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10703 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10704 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10705 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10706 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10707 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10708 // CHECK14:       cond.true:
10709 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10710 // CHECK14:       cond.false:
10711 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10712 // CHECK14-NEXT:    br label [[COND_END]]
10713 // CHECK14:       cond.end:
10714 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10715 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10716 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10717 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10718 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10719 // CHECK14:       omp.inner.for.cond:
10720 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10721 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10722 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10723 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10724 // CHECK14:       omp.inner.for.body:
10725 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10726 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10727 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10728 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
10729 // CHECK14-NEXT:    call void @_Z9gtid_testv()
10730 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10731 // CHECK14:       omp.body.continue:
10732 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10733 // CHECK14:       omp.inner.for.inc:
10734 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10735 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10736 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10737 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10738 // CHECK14:       omp.inner.for.end:
10739 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10740 // CHECK14:       omp.loop.exit:
10741 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10742 // CHECK14-NEXT:    ret void
10743 //
10744 //
10745 // CHECK14-LABEL: define {{[^@]+}}@main
10746 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] {
10747 // CHECK14-NEXT:  entry:
10748 // CHECK14-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
10749 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10750 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
10751 // CHECK14-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
10752 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
10753 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
10754 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
10755 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
10756 // CHECK14-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
10757 // CHECK14-NEXT:    store i32 0, i32* [[RETVAL]], align 4
10758 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10759 // CHECK14-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
10760 // CHECK14-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
10761 // CHECK14-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10762 // CHECK14:       omp_offload.failed:
10763 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
10764 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
10765 // CHECK14:       omp_offload.cont:
10766 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10767 // CHECK14-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
10768 // CHECK14-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
10769 // CHECK14-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
10770 // CHECK14:       omp_offload.failed2:
10771 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
10772 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
10773 // CHECK14:       omp_offload.cont3:
10774 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
10775 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
10776 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
10777 // CHECK14-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
10778 // CHECK14-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10779 // CHECK14-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
10780 // CHECK14-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
10781 // CHECK14-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10782 // CHECK14-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
10783 // CHECK14-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
10784 // CHECK14-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
10785 // CHECK14-NEXT:    store i8* null, i8** [[TMP10]], align 8
10786 // CHECK14-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10787 // CHECK14-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10788 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* @Arg, align 4
10789 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
10790 // CHECK14-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
10791 // CHECK14-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
10792 // CHECK14-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
10793 // CHECK14-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
10794 // CHECK14-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
10795 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10796 // CHECK14-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
10797 // CHECK14-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
10798 // CHECK14-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
10799 // CHECK14:       omp_offload.failed6:
10800 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
10801 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
10802 // CHECK14:       omp_offload.cont7:
10803 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* @Arg, align 4
10804 // CHECK14-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
10805 // CHECK14-NEXT:    ret i32 [[CALL]]
10806 //
10807 //
10808 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
10809 // CHECK14-SAME: () #[[ATTR1]] {
10810 // CHECK14-NEXT:  entry:
10811 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
10812 // CHECK14-NEXT:    ret void
10813 //
10814 //
10815 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..4
10816 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10817 // CHECK14-NEXT:  entry:
10818 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10819 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10820 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10821 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10822 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10823 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10824 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10825 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10826 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10827 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10828 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10829 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10830 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10831 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10832 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10833 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10834 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10835 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10836 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10837 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10838 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10839 // CHECK14:       cond.true:
10840 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10841 // CHECK14:       cond.false:
10842 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10843 // CHECK14-NEXT:    br label [[COND_END]]
10844 // CHECK14:       cond.end:
10845 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10846 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10847 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10848 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10849 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10850 // CHECK14:       omp.inner.for.cond:
10851 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10852 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10853 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10854 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10855 // CHECK14:       omp.inner.for.body:
10856 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10857 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10858 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10859 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10860 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
10861 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10862 // CHECK14:       omp.inner.for.inc:
10863 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10864 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10865 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
10866 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10867 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10868 // CHECK14:       omp.inner.for.end:
10869 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10870 // CHECK14:       omp.loop.exit:
10871 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10872 // CHECK14-NEXT:    ret void
10873 //
10874 //
10875 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5
10876 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10877 // CHECK14-NEXT:  entry:
10878 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10879 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10880 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10881 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10882 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10883 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10884 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10885 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10886 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10887 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10888 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10889 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10890 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10891 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10892 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10893 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10894 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10895 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10896 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10897 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10898 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10899 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10900 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10901 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10902 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10903 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10904 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10905 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10906 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10907 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10908 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10909 // CHECK14:       cond.true:
10910 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10911 // CHECK14:       cond.false:
10912 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10913 // CHECK14-NEXT:    br label [[COND_END]]
10914 // CHECK14:       cond.end:
10915 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10916 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10917 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10918 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10919 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10920 // CHECK14:       omp.inner.for.cond:
10921 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10922 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10923 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10924 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10925 // CHECK14:       omp.inner.for.body:
10926 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10927 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10928 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10929 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
10930 // CHECK14-NEXT:    call void @_Z3fn4v()
10931 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10932 // CHECK14:       omp.body.continue:
10933 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10934 // CHECK14:       omp.inner.for.inc:
10935 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10936 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10937 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10938 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10939 // CHECK14:       omp.inner.for.end:
10940 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10941 // CHECK14:       omp.loop.exit:
10942 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10943 // CHECK14-NEXT:    ret void
10944 //
10945 //
10946 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
10947 // CHECK14-SAME: () #[[ATTR1]] {
10948 // CHECK14-NEXT:  entry:
10949 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
10950 // CHECK14-NEXT:    ret void
10951 //
10952 //
10953 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6
10954 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10955 // CHECK14-NEXT:  entry:
10956 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10957 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10958 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10959 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10960 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10961 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10962 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10963 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10964 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10965 // CHECK14-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10966 // CHECK14-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10967 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10968 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10969 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10970 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10971 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10972 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10973 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10974 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10975 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10976 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10977 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10978 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10979 // CHECK14:       cond.true:
10980 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10981 // CHECK14:       cond.false:
10982 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10983 // CHECK14-NEXT:    br label [[COND_END]]
10984 // CHECK14:       cond.end:
10985 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10986 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10987 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10988 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10989 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10990 // CHECK14:       omp.inner.for.cond:
10991 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10992 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10993 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10994 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10995 // CHECK14:       omp.inner.for.body:
10996 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10997 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10998 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10999 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11000 // CHECK14-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11001 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11002 // CHECK14-NEXT:    call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
11003 // CHECK14-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11004 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11005 // CHECK14:       omp.inner.for.inc:
11006 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11007 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11008 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11009 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11010 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11011 // CHECK14:       omp.inner.for.end:
11012 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11013 // CHECK14:       omp.loop.exit:
11014 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11015 // CHECK14-NEXT:    ret void
11016 //
11017 //
11018 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..7
11019 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11020 // CHECK14-NEXT:  entry:
11021 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11022 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11023 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11024 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11025 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11026 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11027 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11028 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11029 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11030 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11031 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11032 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11033 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11034 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11035 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11036 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11037 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11038 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11039 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11040 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11041 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11042 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11043 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11044 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11045 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11046 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11047 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11048 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11049 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11050 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11051 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11052 // CHECK14:       cond.true:
11053 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11054 // CHECK14:       cond.false:
11055 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11056 // CHECK14-NEXT:    br label [[COND_END]]
11057 // CHECK14:       cond.end:
11058 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11059 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11060 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11061 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11062 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11063 // CHECK14:       omp.inner.for.cond:
11064 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11065 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11066 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11067 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11068 // CHECK14:       omp.inner.for.body:
11069 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11070 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11071 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11072 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
11073 // CHECK14-NEXT:    call void @_Z3fn5v()
11074 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11075 // CHECK14:       omp.body.continue:
11076 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11077 // CHECK14:       omp.inner.for.inc:
11078 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11079 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11080 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11081 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11082 // CHECK14:       omp.inner.for.end:
11083 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11084 // CHECK14:       omp.loop.exit:
11085 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11086 // CHECK14-NEXT:    ret void
11087 //
11088 //
11089 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
11090 // CHECK14-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
11091 // CHECK14-NEXT:  entry:
11092 // CHECK14-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
11093 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
11094 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11095 // CHECK14-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
11096 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
11097 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
11098 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
11099 // CHECK14-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
11100 // CHECK14-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
11101 // CHECK14-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
11102 // CHECK14-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
11103 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
11104 // CHECK14-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
11105 // CHECK14-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
11106 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11107 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
11108 // CHECK14-NEXT:    ret void
11109 //
11110 //
11111 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8
11112 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
11113 // CHECK14-NEXT:  entry:
11114 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11115 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11116 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11117 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11118 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11119 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11120 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11121 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11122 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11123 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11124 // CHECK14-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
11125 // CHECK14-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
11126 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11127 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11128 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11129 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
11130 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11131 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11132 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11133 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11134 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11135 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11136 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11137 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11138 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11139 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11140 // CHECK14:       cond.true:
11141 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11142 // CHECK14:       cond.false:
11143 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11144 // CHECK14-NEXT:    br label [[COND_END]]
11145 // CHECK14:       cond.end:
11146 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11147 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11148 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11149 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11150 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11151 // CHECK14:       omp.inner.for.cond:
11152 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11153 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11154 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11155 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11156 // CHECK14:       omp.inner.for.body:
11157 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11158 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
11159 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11160 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11161 // CHECK14-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
11162 // CHECK14-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
11163 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
11164 // CHECK14:       omp_if.then:
11165 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
11166 // CHECK14-NEXT:    br label [[OMP_IF_END:%.*]]
11167 // CHECK14:       omp_if.else:
11168 // CHECK14-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11169 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11170 // CHECK14-NEXT:    call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
11171 // CHECK14-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11172 // CHECK14-NEXT:    br label [[OMP_IF_END]]
11173 // CHECK14:       omp_if.end:
11174 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11175 // CHECK14:       omp.inner.for.inc:
11176 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11177 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11178 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
11179 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11180 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11181 // CHECK14:       omp.inner.for.end:
11182 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11183 // CHECK14:       omp.loop.exit:
11184 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11185 // CHECK14-NEXT:    ret void
11186 //
11187 //
11188 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9
11189 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11190 // CHECK14-NEXT:  entry:
11191 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11192 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11193 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11194 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11195 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11196 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11197 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11198 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11199 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11200 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11201 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11202 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11203 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11204 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11205 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11206 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11207 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11208 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11209 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11210 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11211 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11212 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11213 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11214 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11215 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11216 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11217 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11218 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11219 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11220 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11221 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11222 // CHECK14:       cond.true:
11223 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11224 // CHECK14:       cond.false:
11225 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11226 // CHECK14-NEXT:    br label [[COND_END]]
11227 // CHECK14:       cond.end:
11228 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11229 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11230 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11231 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11232 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11233 // CHECK14:       omp.inner.for.cond:
11234 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11235 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11236 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11237 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11238 // CHECK14:       omp.inner.for.body:
11239 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11240 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11241 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11242 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
11243 // CHECK14-NEXT:    call void @_Z3fn6v()
11244 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11245 // CHECK14:       omp.body.continue:
11246 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11247 // CHECK14:       omp.inner.for.inc:
11248 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11249 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11250 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11251 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11252 // CHECK14:       omp.inner.for.end:
11253 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11254 // CHECK14:       omp.loop.exit:
11255 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11256 // CHECK14-NEXT:    ret void
11257 //
11258 //
11259 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
11260 // CHECK14-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
11261 // CHECK14-NEXT:  entry:
11262 // CHECK14-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
11263 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11264 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
11265 // CHECK14-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
11266 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
11267 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
11268 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
11269 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
11270 // CHECK14-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
11271 // CHECK14-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
11272 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
11273 // CHECK14-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
11274 // CHECK14-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
11275 // CHECK14-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11276 // CHECK14:       omp_offload.failed:
11277 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
11278 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
11279 // CHECK14:       omp_offload.cont:
11280 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
11281 // CHECK14-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
11282 // CHECK14-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
11283 // CHECK14-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
11284 // CHECK14:       omp_offload.failed2:
11285 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
11286 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
11287 // CHECK14:       omp_offload.cont3:
11288 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
11289 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
11290 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[CONV]], align 4
11291 // CHECK14-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
11292 // CHECK14-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11293 // CHECK14-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
11294 // CHECK14-NEXT:    store i64 [[TMP5]], i64* [[TMP7]], align 8
11295 // CHECK14-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11296 // CHECK14-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
11297 // CHECK14-NEXT:    store i64 [[TMP5]], i64* [[TMP9]], align 8
11298 // CHECK14-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11299 // CHECK14-NEXT:    store i8* null, i8** [[TMP10]], align 8
11300 // CHECK14-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11301 // CHECK14-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11302 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
11303 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
11304 // CHECK14-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
11305 // CHECK14-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
11306 // CHECK14-NEXT:    [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
11307 // CHECK14-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
11308 // CHECK14-NEXT:    [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
11309 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
11310 // CHECK14-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
11311 // CHECK14-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
11312 // CHECK14-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
11313 // CHECK14:       omp_offload.failed6:
11314 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
11315 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
11316 // CHECK14:       omp_offload.cont7:
11317 // CHECK14-NEXT:    ret i32 0
11318 //
11319 //
11320 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
11321 // CHECK14-SAME: () #[[ATTR1]] {
11322 // CHECK14-NEXT:  entry:
11323 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
11324 // CHECK14-NEXT:    ret void
11325 //
11326 //
11327 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..10
11328 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11329 // CHECK14-NEXT:  entry:
11330 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11331 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11332 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11333 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11334 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11335 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11336 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11337 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11338 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11339 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11340 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11341 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11342 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11343 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11344 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11345 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11346 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11347 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11348 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11349 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11350 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11351 // CHECK14:       cond.true:
11352 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11353 // CHECK14:       cond.false:
11354 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11355 // CHECK14-NEXT:    br label [[COND_END]]
11356 // CHECK14:       cond.end:
11357 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11358 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11359 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11360 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11361 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11362 // CHECK14:       omp.inner.for.cond:
11363 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11364 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11365 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11366 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11367 // CHECK14:       omp.inner.for.body:
11368 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11369 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
11370 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11371 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11372 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
11373 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11374 // CHECK14:       omp.inner.for.inc:
11375 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11376 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11377 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
11378 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11379 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11380 // CHECK14:       omp.inner.for.end:
11381 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11382 // CHECK14:       omp.loop.exit:
11383 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11384 // CHECK14-NEXT:    ret void
11385 //
11386 //
11387 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11
11388 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11389 // CHECK14-NEXT:  entry:
11390 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11391 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11392 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11393 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11394 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11395 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11396 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11397 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11398 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11399 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11400 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11401 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11402 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11403 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11404 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11405 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11406 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11407 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11408 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11409 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11410 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11411 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11412 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11413 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11414 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11415 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11416 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11417 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11418 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11419 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11420 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11421 // CHECK14:       cond.true:
11422 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11423 // CHECK14:       cond.false:
11424 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11425 // CHECK14-NEXT:    br label [[COND_END]]
11426 // CHECK14:       cond.end:
11427 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11428 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11429 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11430 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11431 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11432 // CHECK14:       omp.inner.for.cond:
11433 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11434 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11435 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11436 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11437 // CHECK14:       omp.inner.for.body:
11438 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11439 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11440 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11441 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
11442 // CHECK14-NEXT:    call void @_Z3fn1v()
11443 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11444 // CHECK14:       omp.body.continue:
11445 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11446 // CHECK14:       omp.inner.for.inc:
11447 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11448 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11449 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11450 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11451 // CHECK14:       omp.inner.for.end:
11452 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11453 // CHECK14:       omp.loop.exit:
11454 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11455 // CHECK14-NEXT:    ret void
11456 //
11457 //
11458 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
11459 // CHECK14-SAME: () #[[ATTR1]] {
11460 // CHECK14-NEXT:  entry:
11461 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
11462 // CHECK14-NEXT:    ret void
11463 //
11464 //
11465 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..12
11466 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11467 // CHECK14-NEXT:  entry:
11468 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11469 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11470 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11471 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11472 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11473 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11474 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11475 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11476 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11477 // CHECK14-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
11478 // CHECK14-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
11479 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11480 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11481 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11482 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11483 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11484 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11485 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11486 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11487 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11488 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11489 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11490 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11491 // CHECK14:       cond.true:
11492 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11493 // CHECK14:       cond.false:
11494 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11495 // CHECK14-NEXT:    br label [[COND_END]]
11496 // CHECK14:       cond.end:
11497 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11498 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11499 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11500 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11501 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11502 // CHECK14:       omp.inner.for.cond:
11503 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11504 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11505 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11506 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11507 // CHECK14:       omp.inner.for.body:
11508 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11509 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
11510 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11511 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11512 // CHECK14-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11513 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11514 // CHECK14-NEXT:    call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
11515 // CHECK14-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11516 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11517 // CHECK14:       omp.inner.for.inc:
11518 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11519 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11520 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11521 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11522 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11523 // CHECK14:       omp.inner.for.end:
11524 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11525 // CHECK14:       omp.loop.exit:
11526 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11527 // CHECK14-NEXT:    ret void
11528 //
11529 //
11530 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..13
11531 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11532 // CHECK14-NEXT:  entry:
11533 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11534 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11535 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11536 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11537 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11538 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11539 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11540 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11541 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11542 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11543 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11544 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11545 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11546 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11547 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11548 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11549 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11550 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11551 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11552 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11553 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11554 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11555 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11556 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11557 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11558 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11559 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11560 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11561 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11562 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11563 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11564 // CHECK14:       cond.true:
11565 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11566 // CHECK14:       cond.false:
11567 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11568 // CHECK14-NEXT:    br label [[COND_END]]
11569 // CHECK14:       cond.end:
11570 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11571 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11572 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11573 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11574 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11575 // CHECK14:       omp.inner.for.cond:
11576 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11577 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11578 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11579 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11580 // CHECK14:       omp.inner.for.body:
11581 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11582 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11583 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11584 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
11585 // CHECK14-NEXT:    call void @_Z3fn2v()
11586 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11587 // CHECK14:       omp.body.continue:
11588 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11589 // CHECK14:       omp.inner.for.inc:
11590 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11591 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11592 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11593 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11594 // CHECK14:       omp.inner.for.end:
11595 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11596 // CHECK14:       omp.loop.exit:
11597 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11598 // CHECK14-NEXT:    ret void
11599 //
11600 //
11601 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
11602 // CHECK14-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
11603 // CHECK14-NEXT:  entry:
11604 // CHECK14-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
11605 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
11606 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11607 // CHECK14-NEXT:    store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
11608 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
11609 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
11610 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
11611 // CHECK14-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
11612 // CHECK14-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
11613 // CHECK14-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
11614 // CHECK14-NEXT:    [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
11615 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
11616 // CHECK14-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
11617 // CHECK14-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
11618 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11619 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
11620 // CHECK14-NEXT:    ret void
11621 //
11622 //
11623 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..14
11624 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
11625 // CHECK14-NEXT:  entry:
11626 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11627 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11628 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11629 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11630 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11631 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11632 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11633 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11634 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11635 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11636 // CHECK14-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
11637 // CHECK14-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
11638 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11639 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11640 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11641 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
11642 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11643 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11644 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11645 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11646 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11647 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11648 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11649 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11650 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11651 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11652 // CHECK14:       cond.true:
11653 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11654 // CHECK14:       cond.false:
11655 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11656 // CHECK14-NEXT:    br label [[COND_END]]
11657 // CHECK14:       cond.end:
11658 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11659 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11660 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11661 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11662 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11663 // CHECK14:       omp.inner.for.cond:
11664 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11665 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11666 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11667 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11668 // CHECK14:       omp.inner.for.body:
11669 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11670 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
11671 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11672 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11673 // CHECK14-NEXT:    [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
11674 // CHECK14-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
11675 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
11676 // CHECK14:       omp_if.then:
11677 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
11678 // CHECK14-NEXT:    br label [[OMP_IF_END:%.*]]
11679 // CHECK14:       omp_if.else:
11680 // CHECK14-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11681 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11682 // CHECK14-NEXT:    call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
11683 // CHECK14-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11684 // CHECK14-NEXT:    br label [[OMP_IF_END]]
11685 // CHECK14:       omp_if.end:
11686 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11687 // CHECK14:       omp.inner.for.inc:
11688 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11689 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11690 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
11691 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11692 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11693 // CHECK14:       omp.inner.for.end:
11694 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11695 // CHECK14:       omp.loop.exit:
11696 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11697 // CHECK14-NEXT:    ret void
11698 //
11699 //
11700 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..15
11701 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11702 // CHECK14-NEXT:  entry:
11703 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11704 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11705 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11706 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11707 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11708 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11709 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11710 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11711 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11712 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11713 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11714 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11715 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11716 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11717 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11718 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11719 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11720 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11721 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11722 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11723 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11724 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11725 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11726 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11727 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11728 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11729 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11730 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11731 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11732 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11733 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11734 // CHECK14:       cond.true:
11735 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11736 // CHECK14:       cond.false:
11737 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11738 // CHECK14-NEXT:    br label [[COND_END]]
11739 // CHECK14:       cond.end:
11740 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11741 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11742 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11743 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11744 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11745 // CHECK14:       omp.inner.for.cond:
11746 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11747 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11748 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11749 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11750 // CHECK14:       omp.inner.for.body:
11751 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11752 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11753 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11754 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
11755 // CHECK14-NEXT:    call void @_Z3fn3v()
11756 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11757 // CHECK14:       omp.body.continue:
11758 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11759 // CHECK14:       omp.inner.for.inc:
11760 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11761 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11762 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11763 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11764 // CHECK14:       omp.inner.for.end:
11765 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11766 // CHECK14:       omp.loop.exit:
11767 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11768 // CHECK14-NEXT:    ret void
11769 //
11770 //
11771 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
11772 // CHECK14-SAME: () #[[ATTR5:[0-9]+]] {
11773 // CHECK14-NEXT:  entry:
11774 // CHECK14-NEXT:    call void @__tgt_register_requires(i64 1)
11775 // CHECK14-NEXT:    ret void
11776 //
11777 //
11778 // CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv
11779 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
11780 // CHECK15-NEXT:  entry:
11781 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
11782 // CHECK15-NEXT:    [[I1:%.*]] = alloca i32, align 4
11783 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
11784 // CHECK15-NEXT:    br label [[FOR_COND:%.*]]
11785 // CHECK15:       for.cond:
11786 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
11787 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
11788 // CHECK15-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
11789 // CHECK15:       for.body:
11790 // CHECK15-NEXT:    br label [[FOR_INC:%.*]]
11791 // CHECK15:       for.inc:
11792 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
11793 // CHECK15-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
11794 // CHECK15-NEXT:    store i32 [[INC]], i32* [[I]], align 4
11795 // CHECK15-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
11796 // CHECK15:       for.end:
11797 // CHECK15-NEXT:    store i32 0, i32* [[I1]], align 4
11798 // CHECK15-NEXT:    br label [[FOR_COND2:%.*]]
11799 // CHECK15:       for.cond2:
11800 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
11801 // CHECK15-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
11802 // CHECK15-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
11803 // CHECK15:       for.body4:
11804 // CHECK15-NEXT:    call void @_Z9gtid_testv()
11805 // CHECK15-NEXT:    br label [[FOR_INC5:%.*]]
11806 // CHECK15:       for.inc5:
11807 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
11808 // CHECK15-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
11809 // CHECK15-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
11810 // CHECK15-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]]
11811 // CHECK15:       for.end7:
11812 // CHECK15-NEXT:    ret void
11813 //
11814 //
11815 // CHECK15-LABEL: define {{[^@]+}}@main
11816 // CHECK15-SAME: () #[[ATTR1:[0-9]+]] {
11817 // CHECK15-NEXT:  entry:
11818 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
11819 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
11820 // CHECK15-NEXT:    [[I1:%.*]] = alloca i32, align 4
11821 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
11822 // CHECK15-NEXT:    [[I8:%.*]] = alloca i32, align 4
11823 // CHECK15-NEXT:    store i32 0, i32* [[RETVAL]], align 4
11824 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
11825 // CHECK15-NEXT:    br label [[FOR_COND:%.*]]
11826 // CHECK15:       for.cond:
11827 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
11828 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
11829 // CHECK15-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
11830 // CHECK15:       for.body:
11831 // CHECK15-NEXT:    call void @_Z3fn4v()
11832 // CHECK15-NEXT:    br label [[FOR_INC:%.*]]
11833 // CHECK15:       for.inc:
11834 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
11835 // CHECK15-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
11836 // CHECK15-NEXT:    store i32 [[INC]], i32* [[I]], align 4
11837 // CHECK15-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
11838 // CHECK15:       for.end:
11839 // CHECK15-NEXT:    store i32 0, i32* [[I1]], align 4
11840 // CHECK15-NEXT:    br label [[FOR_COND2:%.*]]
11841 // CHECK15:       for.cond2:
11842 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
11843 // CHECK15-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
11844 // CHECK15-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
11845 // CHECK15:       for.body4:
11846 // CHECK15-NEXT:    call void @_Z3fn5v()
11847 // CHECK15-NEXT:    br label [[FOR_INC5:%.*]]
11848 // CHECK15:       for.inc5:
11849 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
11850 // CHECK15-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
11851 // CHECK15-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
11852 // CHECK15-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]]
11853 // CHECK15:       for.end7:
11854 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
11855 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
11856 // CHECK15-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
11857 // CHECK15-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
11858 // CHECK15-NEXT:    store i32 0, i32* [[I8]], align 4
11859 // CHECK15-NEXT:    br label [[FOR_COND9:%.*]]
11860 // CHECK15:       for.cond9:
11861 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
11862 // CHECK15-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
11863 // CHECK15-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
11864 // CHECK15:       for.body11:
11865 // CHECK15-NEXT:    call void @_Z3fn6v()
11866 // CHECK15-NEXT:    br label [[FOR_INC12:%.*]]
11867 // CHECK15:       for.inc12:
11868 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
11869 // CHECK15-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
11870 // CHECK15-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
11871 // CHECK15-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP11:![0-9]+]]
11872 // CHECK15:       for.end14:
11873 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* @Arg, align 4
11874 // CHECK15-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP7]])
11875 // CHECK15-NEXT:    ret i32 [[CALL]]
11876 //
11877 //
11878 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
11879 // CHECK15-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
11880 // CHECK15-NEXT:  entry:
11881 // CHECK15-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
11882 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
11883 // CHECK15-NEXT:    [[I1:%.*]] = alloca i32, align 4
11884 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
11885 // CHECK15-NEXT:    [[I8:%.*]] = alloca i32, align 4
11886 // CHECK15-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
11887 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
11888 // CHECK15-NEXT:    br label [[FOR_COND:%.*]]
11889 // CHECK15:       for.cond:
11890 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
11891 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
11892 // CHECK15-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
11893 // CHECK15:       for.body:
11894 // CHECK15-NEXT:    call void @_Z3fn1v()
11895 // CHECK15-NEXT:    br label [[FOR_INC:%.*]]
11896 // CHECK15:       for.inc:
11897 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
11898 // CHECK15-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
11899 // CHECK15-NEXT:    store i32 [[INC]], i32* [[I]], align 4
11900 // CHECK15-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
11901 // CHECK15:       for.end:
11902 // CHECK15-NEXT:    store i32 0, i32* [[I1]], align 4
11903 // CHECK15-NEXT:    br label [[FOR_COND2:%.*]]
11904 // CHECK15:       for.cond2:
11905 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
11906 // CHECK15-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
11907 // CHECK15-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
11908 // CHECK15:       for.body4:
11909 // CHECK15-NEXT:    call void @_Z3fn2v()
11910 // CHECK15-NEXT:    br label [[FOR_INC5:%.*]]
11911 // CHECK15:       for.inc5:
11912 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
11913 // CHECK15-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
11914 // CHECK15-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
11915 // CHECK15-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP13:![0-9]+]]
11916 // CHECK15:       for.end7:
11917 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
11918 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
11919 // CHECK15-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
11920 // CHECK15-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
11921 // CHECK15-NEXT:    store i32 0, i32* [[I8]], align 4
11922 // CHECK15-NEXT:    br label [[FOR_COND9:%.*]]
11923 // CHECK15:       for.cond9:
11924 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
11925 // CHECK15-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
11926 // CHECK15-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
11927 // CHECK15:       for.body11:
11928 // CHECK15-NEXT:    call void @_Z3fn3v()
11929 // CHECK15-NEXT:    br label [[FOR_INC12:%.*]]
11930 // CHECK15:       for.inc12:
11931 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
11932 // CHECK15-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
11933 // CHECK15-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
11934 // CHECK15-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP14:![0-9]+]]
11935 // CHECK15:       for.end14:
11936 // CHECK15-NEXT:    ret i32 0
11937 //
11938 //
11939 // CHECK16-LABEL: define {{[^@]+}}@_Z9gtid_testv
11940 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] {
11941 // CHECK16-NEXT:  entry:
11942 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
11943 // CHECK16-NEXT:    [[I1:%.*]] = alloca i32, align 4
11944 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
11945 // CHECK16-NEXT:    br label [[FOR_COND:%.*]]
11946 // CHECK16:       for.cond:
11947 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
11948 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
11949 // CHECK16-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
11950 // CHECK16:       for.body:
11951 // CHECK16-NEXT:    br label [[FOR_INC:%.*]]
11952 // CHECK16:       for.inc:
11953 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
11954 // CHECK16-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
11955 // CHECK16-NEXT:    store i32 [[INC]], i32* [[I]], align 4
11956 // CHECK16-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
11957 // CHECK16:       for.end:
11958 // CHECK16-NEXT:    store i32 0, i32* [[I1]], align 4
11959 // CHECK16-NEXT:    br label [[FOR_COND2:%.*]]
11960 // CHECK16:       for.cond2:
11961 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
11962 // CHECK16-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
11963 // CHECK16-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
11964 // CHECK16:       for.body4:
11965 // CHECK16-NEXT:    call void @_Z9gtid_testv()
11966 // CHECK16-NEXT:    br label [[FOR_INC5:%.*]]
11967 // CHECK16:       for.inc5:
11968 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
11969 // CHECK16-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
11970 // CHECK16-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
11971 // CHECK16-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]]
11972 // CHECK16:       for.end7:
11973 // CHECK16-NEXT:    ret void
11974 //
11975 //
11976 // CHECK16-LABEL: define {{[^@]+}}@main
11977 // CHECK16-SAME: () #[[ATTR1:[0-9]+]] {
11978 // CHECK16-NEXT:  entry:
11979 // CHECK16-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
11980 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
11981 // CHECK16-NEXT:    [[I1:%.*]] = alloca i32, align 4
11982 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
11983 // CHECK16-NEXT:    [[I8:%.*]] = alloca i32, align 4
11984 // CHECK16-NEXT:    store i32 0, i32* [[RETVAL]], align 4
11985 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
11986 // CHECK16-NEXT:    br label [[FOR_COND:%.*]]
11987 // CHECK16:       for.cond:
11988 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
11989 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
11990 // CHECK16-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
11991 // CHECK16:       for.body:
11992 // CHECK16-NEXT:    call void @_Z3fn4v()
11993 // CHECK16-NEXT:    br label [[FOR_INC:%.*]]
11994 // CHECK16:       for.inc:
11995 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
11996 // CHECK16-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
11997 // CHECK16-NEXT:    store i32 [[INC]], i32* [[I]], align 4
11998 // CHECK16-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
11999 // CHECK16:       for.end:
12000 // CHECK16-NEXT:    store i32 0, i32* [[I1]], align 4
12001 // CHECK16-NEXT:    br label [[FOR_COND2:%.*]]
12002 // CHECK16:       for.cond2:
12003 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
12004 // CHECK16-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
12005 // CHECK16-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
12006 // CHECK16:       for.body4:
12007 // CHECK16-NEXT:    call void @_Z3fn5v()
12008 // CHECK16-NEXT:    br label [[FOR_INC5:%.*]]
12009 // CHECK16:       for.inc5:
12010 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
12011 // CHECK16-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
12012 // CHECK16-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
12013 // CHECK16-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]]
12014 // CHECK16:       for.end7:
12015 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* @Arg, align 4
12016 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
12017 // CHECK16-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
12018 // CHECK16-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
12019 // CHECK16-NEXT:    store i32 0, i32* [[I8]], align 4
12020 // CHECK16-NEXT:    br label [[FOR_COND9:%.*]]
12021 // CHECK16:       for.cond9:
12022 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
12023 // CHECK16-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
12024 // CHECK16-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
12025 // CHECK16:       for.body11:
12026 // CHECK16-NEXT:    call void @_Z3fn6v()
12027 // CHECK16-NEXT:    br label [[FOR_INC12:%.*]]
12028 // CHECK16:       for.inc12:
12029 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
12030 // CHECK16-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
12031 // CHECK16-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
12032 // CHECK16-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP11:![0-9]+]]
12033 // CHECK16:       for.end14:
12034 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* @Arg, align 4
12035 // CHECK16-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP7]])
12036 // CHECK16-NEXT:    ret i32 [[CALL]]
12037 //
12038 //
12039 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
12040 // CHECK16-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
12041 // CHECK16-NEXT:  entry:
12042 // CHECK16-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
12043 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
12044 // CHECK16-NEXT:    [[I1:%.*]] = alloca i32, align 4
12045 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
12046 // CHECK16-NEXT:    [[I8:%.*]] = alloca i32, align 4
12047 // CHECK16-NEXT:    store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
12048 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
12049 // CHECK16-NEXT:    br label [[FOR_COND:%.*]]
12050 // CHECK16:       for.cond:
12051 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
12052 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
12053 // CHECK16-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
12054 // CHECK16:       for.body:
12055 // CHECK16-NEXT:    call void @_Z3fn1v()
12056 // CHECK16-NEXT:    br label [[FOR_INC:%.*]]
12057 // CHECK16:       for.inc:
12058 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
12059 // CHECK16-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
12060 // CHECK16-NEXT:    store i32 [[INC]], i32* [[I]], align 4
12061 // CHECK16-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
12062 // CHECK16:       for.end:
12063 // CHECK16-NEXT:    store i32 0, i32* [[I1]], align 4
12064 // CHECK16-NEXT:    br label [[FOR_COND2:%.*]]
12065 // CHECK16:       for.cond2:
12066 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I1]], align 4
12067 // CHECK16-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
12068 // CHECK16-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]]
12069 // CHECK16:       for.body4:
12070 // CHECK16-NEXT:    call void @_Z3fn2v()
12071 // CHECK16-NEXT:    br label [[FOR_INC5:%.*]]
12072 // CHECK16:       for.inc5:
12073 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
12074 // CHECK16-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
12075 // CHECK16-NEXT:    store i32 [[INC6]], i32* [[I1]], align 4
12076 // CHECK16-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP13:![0-9]+]]
12077 // CHECK16:       for.end7:
12078 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
12079 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP4]], 0
12080 // CHECK16-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
12081 // CHECK16-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
12082 // CHECK16-NEXT:    store i32 0, i32* [[I8]], align 4
12083 // CHECK16-NEXT:    br label [[FOR_COND9:%.*]]
12084 // CHECK16:       for.cond9:
12085 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I8]], align 4
12086 // CHECK16-NEXT:    [[CMP10:%.*]] = icmp slt i32 [[TMP5]], 100
12087 // CHECK16-NEXT:    br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]]
12088 // CHECK16:       for.body11:
12089 // CHECK16-NEXT:    call void @_Z3fn3v()
12090 // CHECK16-NEXT:    br label [[FOR_INC12:%.*]]
12091 // CHECK16:       for.inc12:
12092 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I8]], align 4
12093 // CHECK16-NEXT:    [[INC13:%.*]] = add nsw i32 [[TMP6]], 1
12094 // CHECK16-NEXT:    store i32 [[INC13]], i32* [[I8]], align 4
12095 // CHECK16-NEXT:    br label [[FOR_COND9]], !llvm.loop [[LOOP14:![0-9]+]]
12096 // CHECK16:       for.end14:
12097 // CHECK16-NEXT:    ret i32 0
12098 //
12099