1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 10 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 13 14 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 18 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 21 22 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 29 30 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 31 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 32 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 34 // expected-no-diagnostics 35 #ifndef HEADER 36 #define HEADER 37 38 void fn1(); 39 void fn2(); 40 void fn3(); 41 void fn4(); 42 void fn5(); 43 void fn6(); 44 45 int Arg; 46 47 void gtid_test() { 48 #pragma omp target 49 #pragma omp teams distribute parallel for 50 for(int i = 0 ; i < 100; i++) {} 51 52 #pragma omp target 53 #pragma omp teams distribute parallel for if (parallel: false) 54 for(int i = 0 ; i < 100; i++) { 55 gtid_test(); 56 } 57 } 58 59 60 template <typename T> 61 int tmain(T Arg) { 62 #pragma omp target 63 #pragma omp teams distribute parallel for if (true) 64 for(int i = 0 ; i < 100; i++) { 65 fn1(); 66 } 67 #pragma omp target 68 #pragma omp teams distribute parallel for if (false) 69 for(int i = 0 ; i < 100; i++) { 70 fn2(); 71 } 72 #pragma omp target 73 #pragma omp teams distribute parallel for if (parallel: Arg) 74 for(int i = 0 ; i < 100; i++) { 75 fn3(); 76 } 77 return 0; 78 } 79 80 int main() { 81 #pragma omp target 82 #pragma omp teams distribute parallel for if (true) 83 for(int i = 0 ; i < 100; i++) { 84 85 86 fn4(); 87 } 88 89 #pragma omp target 90 #pragma omp teams distribute parallel for if (false) 91 for(int i = 0 ; i < 100; i++) { 92 93 94 fn5(); 95 } 96 97 #pragma omp target 98 #pragma omp teams distribute parallel for if (Arg) 99 for(int i = 0 ; i < 100; i++) { 100 101 102 fn6(); 103 } 104 105 return tmain(Arg); 106 } 107 108 109 110 111 112 113 // call void [[T_OUTLINE_FUN_3:@.+]]( 114 115 #endif 116 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv 117 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 118 // CHECK1-NEXT: entry: 119 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 120 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 121 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 122 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 123 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4 124 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 125 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4 126 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 127 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8 128 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 129 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8 130 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 131 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8 132 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 133 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8 134 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 135 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8 136 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 137 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8 138 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 139 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8 140 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 141 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 142 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 143 // CHECK1: omp_offload.failed: 144 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]] 145 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 146 // CHECK1: omp_offload.cont: 147 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 148 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0 149 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4 150 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1 151 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4 152 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2 153 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8 154 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3 155 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8 156 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4 157 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8 158 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5 159 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8 160 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6 161 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8 162 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7 163 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8 164 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8 165 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8 166 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]]) 167 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 168 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 169 // CHECK1: omp_offload.failed3: 170 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 171 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 172 // CHECK1: omp_offload.cont4: 173 // CHECK1-NEXT: ret void 174 // 175 // 176 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 177 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { 178 // CHECK1-NEXT: entry: 179 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 180 // CHECK1-NEXT: ret void 181 // 182 // 183 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 184 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 185 // CHECK1-NEXT: entry: 186 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 187 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 188 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 193 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 194 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 195 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 196 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 197 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 198 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 199 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 200 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 201 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 202 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 203 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 204 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 205 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 206 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 207 // CHECK1: cond.true: 208 // CHECK1-NEXT: br label [[COND_END:%.*]] 209 // CHECK1: cond.false: 210 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 211 // CHECK1-NEXT: br label [[COND_END]] 212 // CHECK1: cond.end: 213 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 214 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 215 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 216 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 217 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 218 // CHECK1: omp.inner.for.cond: 219 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 220 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 221 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 222 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 223 // CHECK1: omp.inner.for.body: 224 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 225 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 226 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 227 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 228 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 229 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 230 // CHECK1: omp.inner.for.inc: 231 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 232 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 233 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 234 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 235 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 236 // CHECK1: omp.inner.for.end: 237 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 238 // CHECK1: omp.loop.exit: 239 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 240 // CHECK1-NEXT: ret void 241 // 242 // 243 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 244 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 245 // CHECK1-NEXT: entry: 246 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 247 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 248 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 249 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 250 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 251 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 252 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 253 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 254 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 255 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 256 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 257 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 258 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 259 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 260 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 261 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 262 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 263 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 264 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 265 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 266 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 267 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 268 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 269 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 270 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 271 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 272 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 273 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 274 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 275 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 276 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 277 // CHECK1: cond.true: 278 // CHECK1-NEXT: br label [[COND_END:%.*]] 279 // CHECK1: cond.false: 280 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 281 // CHECK1-NEXT: br label [[COND_END]] 282 // CHECK1: cond.end: 283 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 284 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 285 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 286 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 287 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 288 // CHECK1: omp.inner.for.cond: 289 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 290 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 291 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 292 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 293 // CHECK1: omp.inner.for.body: 294 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 295 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 296 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 297 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 298 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 299 // CHECK1: omp.body.continue: 300 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 301 // CHECK1: omp.inner.for.inc: 302 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 303 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 304 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 305 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 306 // CHECK1: omp.inner.for.end: 307 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 308 // CHECK1: omp.loop.exit: 309 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 310 // CHECK1-NEXT: ret void 311 // 312 // 313 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 314 // CHECK1-SAME: () #[[ATTR1]] { 315 // CHECK1-NEXT: entry: 316 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 317 // CHECK1-NEXT: ret void 318 // 319 // 320 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 321 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 322 // CHECK1-NEXT: entry: 323 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 324 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 325 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 326 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 327 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 328 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 329 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 330 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 331 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 332 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 333 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 334 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 335 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 336 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 337 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 338 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 339 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 340 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 341 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 342 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 343 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 344 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 345 // CHECK1: cond.true: 346 // CHECK1-NEXT: br label [[COND_END:%.*]] 347 // CHECK1: cond.false: 348 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 349 // CHECK1-NEXT: br label [[COND_END]] 350 // CHECK1: cond.end: 351 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 352 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 353 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 354 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 355 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 356 // CHECK1: omp.inner.for.cond: 357 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 358 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 359 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 360 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 361 // CHECK1: omp.inner.for.body: 362 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 363 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 364 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 365 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 366 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 367 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 368 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 369 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 370 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 371 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 372 // CHECK1: omp.inner.for.inc: 373 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 374 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 375 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 376 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 377 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 378 // CHECK1: omp.inner.for.end: 379 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 380 // CHECK1: omp.loop.exit: 381 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 382 // CHECK1-NEXT: ret void 383 // 384 // 385 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 386 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 387 // CHECK1-NEXT: entry: 388 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 389 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 390 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 391 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 392 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 393 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 394 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 395 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 396 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 397 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 398 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 399 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 400 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 401 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 402 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 403 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 404 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 405 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 406 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 407 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 408 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 409 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 410 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 411 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 412 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 413 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 414 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 415 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 416 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 417 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 418 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 419 // CHECK1: cond.true: 420 // CHECK1-NEXT: br label [[COND_END:%.*]] 421 // CHECK1: cond.false: 422 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 423 // CHECK1-NEXT: br label [[COND_END]] 424 // CHECK1: cond.end: 425 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 426 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 427 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 428 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 429 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 430 // CHECK1: omp.inner.for.cond: 431 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 432 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 433 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 434 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 435 // CHECK1: omp.inner.for.body: 436 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 437 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 438 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 439 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 440 // CHECK1-NEXT: call void @_Z9gtid_testv() 441 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 442 // CHECK1: omp.body.continue: 443 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 444 // CHECK1: omp.inner.for.inc: 445 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 446 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 447 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 448 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 449 // CHECK1: omp.inner.for.end: 450 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 451 // CHECK1: omp.loop.exit: 452 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 453 // CHECK1-NEXT: ret void 454 // 455 // 456 // CHECK1-LABEL: define {{[^@]+}}@main 457 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 458 // CHECK1-NEXT: entry: 459 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 460 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 461 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 462 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 463 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 464 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 465 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 466 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 467 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 468 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 469 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 470 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 471 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4 472 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 473 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4 474 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 475 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8 476 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 477 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8 478 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 479 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8 480 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 481 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8 482 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 483 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8 484 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 485 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8 486 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 487 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8 488 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 489 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 490 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 491 // CHECK1: omp_offload.failed: 492 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]] 493 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 494 // CHECK1: omp_offload.cont: 495 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 496 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0 497 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4 498 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1 499 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4 500 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2 501 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8 502 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3 503 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8 504 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4 505 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8 506 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5 507 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8 508 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6 509 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8 510 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7 511 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8 512 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8 513 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8 514 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]]) 515 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 516 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 517 // CHECK1: omp_offload.failed3: 518 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]] 519 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 520 // CHECK1: omp_offload.cont4: 521 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* @Arg, align 4 522 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 523 // CHECK1-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4 524 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 525 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 526 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 527 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8 528 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 529 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 530 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8 531 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 532 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8 533 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 534 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 535 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* @Arg, align 4 536 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP31]], 0 537 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 538 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 539 // CHECK1-NEXT: [[TMP32:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 540 // CHECK1-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP32]] to i1 541 // CHECK1-NEXT: [[TMP33:%.*]] = select i1 [[TOBOOL5]], i32 0, i32 1 542 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 543 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0 544 // CHECK1-NEXT: store i32 1, i32* [[TMP34]], align 4 545 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1 546 // CHECK1-NEXT: store i32 1, i32* [[TMP35]], align 4 547 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2 548 // CHECK1-NEXT: store i8** [[TMP29]], i8*** [[TMP36]], align 8 549 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3 550 // CHECK1-NEXT: store i8** [[TMP30]], i8*** [[TMP37]], align 8 551 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4 552 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 8 553 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5 554 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 8 555 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6 556 // CHECK1-NEXT: store i8** null, i8*** [[TMP40]], align 8 557 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7 558 // CHECK1-NEXT: store i8** null, i8*** [[TMP41]], align 8 559 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8 560 // CHECK1-NEXT: store i64 100, i64* [[TMP42]], align 8 561 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP33]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]]) 562 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 563 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 564 // CHECK1: omp_offload.failed8: 565 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP23]]) #[[ATTR2]] 566 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]] 567 // CHECK1: omp_offload.cont9: 568 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* @Arg, align 4 569 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP45]]) 570 // CHECK1-NEXT: ret i32 [[CALL]] 571 // 572 // 573 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 574 // CHECK1-SAME: () #[[ATTR1]] { 575 // CHECK1-NEXT: entry: 576 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 577 // CHECK1-NEXT: ret void 578 // 579 // 580 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 581 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 582 // CHECK1-NEXT: entry: 583 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 584 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 585 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 586 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 587 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 588 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 589 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 590 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 591 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 592 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 593 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 594 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 595 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 596 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 597 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 598 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 599 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 600 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 601 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 602 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 603 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 604 // CHECK1: cond.true: 605 // CHECK1-NEXT: br label [[COND_END:%.*]] 606 // CHECK1: cond.false: 607 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 608 // CHECK1-NEXT: br label [[COND_END]] 609 // CHECK1: cond.end: 610 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 611 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 612 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 613 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 614 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 615 // CHECK1: omp.inner.for.cond: 616 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 617 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 618 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 619 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 620 // CHECK1: omp.inner.for.body: 621 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 622 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 623 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 624 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 625 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 626 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 627 // CHECK1: omp.inner.for.inc: 628 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 629 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 630 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 631 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 632 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 633 // CHECK1: omp.inner.for.end: 634 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 635 // CHECK1: omp.loop.exit: 636 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 637 // CHECK1-NEXT: ret void 638 // 639 // 640 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 641 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 642 // CHECK1-NEXT: entry: 643 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 644 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 645 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 646 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 647 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 648 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 649 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 650 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 651 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 652 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 653 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 654 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 655 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 656 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 657 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 658 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 659 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 660 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 661 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 662 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 663 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 664 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 665 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 666 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 667 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 668 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 669 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 670 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 671 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 672 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 673 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 674 // CHECK1: cond.true: 675 // CHECK1-NEXT: br label [[COND_END:%.*]] 676 // CHECK1: cond.false: 677 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 678 // CHECK1-NEXT: br label [[COND_END]] 679 // CHECK1: cond.end: 680 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 681 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 682 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 683 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 684 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 685 // CHECK1: omp.inner.for.cond: 686 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 687 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 688 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 689 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 690 // CHECK1: omp.inner.for.body: 691 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 692 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 693 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 694 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 695 // CHECK1-NEXT: call void @_Z3fn4v() 696 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 697 // CHECK1: omp.body.continue: 698 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 699 // CHECK1: omp.inner.for.inc: 700 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 701 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 702 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 703 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 704 // CHECK1: omp.inner.for.end: 705 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 706 // CHECK1: omp.loop.exit: 707 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 708 // CHECK1-NEXT: ret void 709 // 710 // 711 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89 712 // CHECK1-SAME: () #[[ATTR1]] { 713 // CHECK1-NEXT: entry: 714 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 715 // CHECK1-NEXT: ret void 716 // 717 // 718 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 719 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 720 // CHECK1-NEXT: entry: 721 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 722 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 723 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 724 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 725 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 726 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 727 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 728 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 729 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 730 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 731 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 732 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 733 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 734 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 735 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 736 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 737 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 738 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 739 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 740 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 741 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 742 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 743 // CHECK1: cond.true: 744 // CHECK1-NEXT: br label [[COND_END:%.*]] 745 // CHECK1: cond.false: 746 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 747 // CHECK1-NEXT: br label [[COND_END]] 748 // CHECK1: cond.end: 749 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 750 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 751 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 752 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 753 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 754 // CHECK1: omp.inner.for.cond: 755 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 756 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 757 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 758 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 759 // CHECK1: omp.inner.for.body: 760 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 761 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 762 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 763 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 764 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 765 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 766 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 767 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 768 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 769 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 770 // CHECK1: omp.inner.for.inc: 771 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 772 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 773 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 774 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 775 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 776 // CHECK1: omp.inner.for.end: 777 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 778 // CHECK1: omp.loop.exit: 779 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 780 // CHECK1-NEXT: ret void 781 // 782 // 783 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 784 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 785 // CHECK1-NEXT: entry: 786 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 787 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 788 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 789 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 790 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 791 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 792 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 793 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 794 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 795 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 796 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 797 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 798 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 799 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 800 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 801 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 802 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 803 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 804 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 805 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 806 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 807 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 808 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 809 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 810 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 811 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 812 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 813 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 814 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 815 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 816 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 817 // CHECK1: cond.true: 818 // CHECK1-NEXT: br label [[COND_END:%.*]] 819 // CHECK1: cond.false: 820 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 821 // CHECK1-NEXT: br label [[COND_END]] 822 // CHECK1: cond.end: 823 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 824 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 825 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 826 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 827 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 828 // CHECK1: omp.inner.for.cond: 829 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 830 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 831 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 832 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 833 // CHECK1: omp.inner.for.body: 834 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 835 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 836 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 837 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 838 // CHECK1-NEXT: call void @_Z3fn5v() 839 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 840 // CHECK1: omp.body.continue: 841 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 842 // CHECK1: omp.inner.for.inc: 843 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 844 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 845 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 846 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 847 // CHECK1: omp.inner.for.end: 848 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 849 // CHECK1: omp.loop.exit: 850 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 851 // CHECK1-NEXT: ret void 852 // 853 // 854 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97 855 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 856 // CHECK1-NEXT: entry: 857 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 858 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 859 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 860 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 861 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 862 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 863 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 864 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 865 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 866 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 867 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1 868 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8* 869 // CHECK1-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8 870 // CHECK1-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1 871 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 872 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]]) 873 // CHECK1-NEXT: ret void 874 // 875 // 876 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 877 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 878 // CHECK1-NEXT: entry: 879 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 880 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 881 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 882 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 883 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 884 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 885 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 886 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 887 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 888 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 889 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 890 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 891 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 892 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 893 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 894 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 895 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 896 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 897 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 898 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 899 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 900 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 901 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 902 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 903 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 904 // CHECK1: cond.true: 905 // CHECK1-NEXT: br label [[COND_END:%.*]] 906 // CHECK1: cond.false: 907 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 908 // CHECK1-NEXT: br label [[COND_END]] 909 // CHECK1: cond.end: 910 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 911 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 912 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 913 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 914 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 915 // CHECK1: omp.inner.for.cond: 916 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 917 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 918 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 919 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 920 // CHECK1: omp.inner.for.body: 921 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 922 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 923 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 924 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 925 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1 926 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1 927 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 928 // CHECK1: omp_if.then: 929 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 930 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 931 // CHECK1: omp_if.else: 932 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 933 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 934 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 935 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 936 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 937 // CHECK1-NEXT: br label [[OMP_IF_END]] 938 // CHECK1: omp_if.end: 939 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 940 // CHECK1: omp.inner.for.inc: 941 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 942 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 943 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 944 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 945 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 946 // CHECK1: omp.inner.for.end: 947 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 948 // CHECK1: omp.loop.exit: 949 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 950 // CHECK1-NEXT: ret void 951 // 952 // 953 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 954 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 955 // CHECK1-NEXT: entry: 956 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 957 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 958 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 959 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 960 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 961 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 962 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 963 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 964 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 965 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 966 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 967 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 968 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 969 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 970 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 971 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 972 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 973 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 974 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 975 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 976 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 977 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 978 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 979 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 980 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 981 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 982 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 983 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 984 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 985 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 986 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 987 // CHECK1: cond.true: 988 // CHECK1-NEXT: br label [[COND_END:%.*]] 989 // CHECK1: cond.false: 990 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 991 // CHECK1-NEXT: br label [[COND_END]] 992 // CHECK1: cond.end: 993 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 994 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 995 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 996 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 997 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 998 // CHECK1: omp.inner.for.cond: 999 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1000 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1001 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1002 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1003 // CHECK1: omp.inner.for.body: 1004 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1005 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1006 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1007 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1008 // CHECK1-NEXT: call void @_Z3fn6v() 1009 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1010 // CHECK1: omp.body.continue: 1011 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1012 // CHECK1: omp.inner.for.inc: 1013 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1014 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1015 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1016 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1017 // CHECK1: omp.inner.for.end: 1018 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1019 // CHECK1: omp.loop.exit: 1020 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1021 // CHECK1-NEXT: ret void 1022 // 1023 // 1024 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 1025 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 1026 // CHECK1-NEXT: entry: 1027 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 1028 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1029 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1030 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 1031 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1032 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1033 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1034 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 1035 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1036 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 1037 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1038 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1039 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4 1040 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1041 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4 1042 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1043 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8 1044 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1045 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8 1046 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1047 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8 1048 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1049 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8 1050 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1051 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8 1052 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1053 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8 1054 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1055 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8 1056 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1057 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 1058 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1059 // CHECK1: omp_offload.failed: 1060 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]] 1061 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 1062 // CHECK1: omp_offload.cont: 1063 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1064 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0 1065 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4 1066 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1 1067 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4 1068 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2 1069 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8 1070 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3 1071 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8 1072 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4 1073 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8 1074 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5 1075 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8 1076 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6 1077 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8 1078 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7 1079 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8 1080 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8 1081 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8 1082 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]]) 1083 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1084 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1085 // CHECK1: omp_offload.failed3: 1086 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]] 1087 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1088 // CHECK1: omp_offload.cont4: 1089 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 1090 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 1091 // CHECK1-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4 1092 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 1093 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1094 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 1095 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8 1096 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1097 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 1098 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8 1099 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1100 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8 1101 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1102 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1103 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 1104 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP31]], 0 1105 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 1106 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 1107 // CHECK1-NEXT: [[TMP32:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 1108 // CHECK1-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP32]] to i1 1109 // CHECK1-NEXT: [[TMP33:%.*]] = select i1 [[TOBOOL5]], i32 0, i32 1 1110 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1111 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0 1112 // CHECK1-NEXT: store i32 1, i32* [[TMP34]], align 4 1113 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1 1114 // CHECK1-NEXT: store i32 1, i32* [[TMP35]], align 4 1115 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2 1116 // CHECK1-NEXT: store i8** [[TMP29]], i8*** [[TMP36]], align 8 1117 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3 1118 // CHECK1-NEXT: store i8** [[TMP30]], i8*** [[TMP37]], align 8 1119 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4 1120 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP38]], align 8 1121 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5 1122 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP39]], align 8 1123 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6 1124 // CHECK1-NEXT: store i8** null, i8*** [[TMP40]], align 8 1125 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7 1126 // CHECK1-NEXT: store i8** null, i8*** [[TMP41]], align 8 1127 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8 1128 // CHECK1-NEXT: store i64 100, i64* [[TMP42]], align 8 1129 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP33]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]]) 1130 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 1131 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 1132 // CHECK1: omp_offload.failed8: 1133 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP23]]) #[[ATTR2]] 1134 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]] 1135 // CHECK1: omp_offload.cont9: 1136 // CHECK1-NEXT: ret i32 0 1137 // 1138 // 1139 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62 1140 // CHECK1-SAME: () #[[ATTR1]] { 1141 // CHECK1-NEXT: entry: 1142 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 1143 // CHECK1-NEXT: ret void 1144 // 1145 // 1146 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 1147 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1148 // CHECK1-NEXT: entry: 1149 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1150 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1151 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1152 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1153 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1154 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1155 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1156 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1157 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1158 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1159 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1160 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1161 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1162 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1163 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1164 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1165 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1166 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1167 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1168 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1169 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1170 // CHECK1: cond.true: 1171 // CHECK1-NEXT: br label [[COND_END:%.*]] 1172 // CHECK1: cond.false: 1173 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1174 // CHECK1-NEXT: br label [[COND_END]] 1175 // CHECK1: cond.end: 1176 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1177 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1178 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1179 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1180 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1181 // CHECK1: omp.inner.for.cond: 1182 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1183 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1184 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1185 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1186 // CHECK1: omp.inner.for.body: 1187 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1188 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1189 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1190 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1191 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1192 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1193 // CHECK1: omp.inner.for.inc: 1194 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1195 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1196 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1197 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1198 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1199 // CHECK1: omp.inner.for.end: 1200 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1201 // CHECK1: omp.loop.exit: 1202 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1203 // CHECK1-NEXT: ret void 1204 // 1205 // 1206 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1207 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1208 // CHECK1-NEXT: entry: 1209 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1210 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1211 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1212 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1213 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1214 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1215 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1216 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1217 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1218 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1219 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1220 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1221 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1222 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1223 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1224 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1225 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1226 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1227 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1228 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1229 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1230 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1231 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1232 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1233 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1234 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1235 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1236 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1237 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1238 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1239 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1240 // CHECK1: cond.true: 1241 // CHECK1-NEXT: br label [[COND_END:%.*]] 1242 // CHECK1: cond.false: 1243 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1244 // CHECK1-NEXT: br label [[COND_END]] 1245 // CHECK1: cond.end: 1246 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1247 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1248 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1249 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1250 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1251 // CHECK1: omp.inner.for.cond: 1252 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1253 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1254 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1255 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1256 // CHECK1: omp.inner.for.body: 1257 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1258 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1259 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1260 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1261 // CHECK1-NEXT: call void @_Z3fn1v() 1262 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1263 // CHECK1: omp.body.continue: 1264 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1265 // CHECK1: omp.inner.for.inc: 1266 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1267 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1268 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1269 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1270 // CHECK1: omp.inner.for.end: 1271 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1272 // CHECK1: omp.loop.exit: 1273 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1274 // CHECK1-NEXT: ret void 1275 // 1276 // 1277 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67 1278 // CHECK1-SAME: () #[[ATTR1]] { 1279 // CHECK1-NEXT: entry: 1280 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 1281 // CHECK1-NEXT: ret void 1282 // 1283 // 1284 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12 1285 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1286 // CHECK1-NEXT: entry: 1287 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1288 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1289 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1290 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1291 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1292 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1293 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1294 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1295 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1296 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1297 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1298 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1299 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1300 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1301 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1302 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1303 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1304 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1305 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1306 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1307 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1308 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1309 // CHECK1: cond.true: 1310 // CHECK1-NEXT: br label [[COND_END:%.*]] 1311 // CHECK1: cond.false: 1312 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1313 // CHECK1-NEXT: br label [[COND_END]] 1314 // CHECK1: cond.end: 1315 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1316 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1317 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1318 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1319 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1320 // CHECK1: omp.inner.for.cond: 1321 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1322 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1323 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1324 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1325 // CHECK1: omp.inner.for.body: 1326 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1327 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1328 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1329 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1330 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1331 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1332 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1333 // CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1334 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1335 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1336 // CHECK1: omp.inner.for.inc: 1337 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1338 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1339 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1340 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1341 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1342 // CHECK1: omp.inner.for.end: 1343 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1344 // CHECK1: omp.loop.exit: 1345 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1346 // CHECK1-NEXT: ret void 1347 // 1348 // 1349 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13 1350 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1351 // CHECK1-NEXT: entry: 1352 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1353 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1354 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1355 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1356 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1357 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1358 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1359 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1360 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1361 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1362 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1363 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1364 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1365 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1366 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1367 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1368 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1369 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1370 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1371 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1372 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1373 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1374 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1375 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1376 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1377 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1378 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1379 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1380 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1381 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1382 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1383 // CHECK1: cond.true: 1384 // CHECK1-NEXT: br label [[COND_END:%.*]] 1385 // CHECK1: cond.false: 1386 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1387 // CHECK1-NEXT: br label [[COND_END]] 1388 // CHECK1: cond.end: 1389 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1390 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1391 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1392 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1393 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1394 // CHECK1: omp.inner.for.cond: 1395 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1396 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1397 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1398 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1399 // CHECK1: omp.inner.for.body: 1400 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1401 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1402 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1403 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1404 // CHECK1-NEXT: call void @_Z3fn2v() 1405 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1406 // CHECK1: omp.body.continue: 1407 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1408 // CHECK1: omp.inner.for.inc: 1409 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1410 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1411 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1412 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1413 // CHECK1: omp.inner.for.end: 1414 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1415 // CHECK1: omp.loop.exit: 1416 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1417 // CHECK1-NEXT: ret void 1418 // 1419 // 1420 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72 1421 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 1422 // CHECK1-NEXT: entry: 1423 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 1424 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 1425 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1426 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 1427 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 1428 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 1429 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 1430 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 1431 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 1432 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 1433 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1 1434 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8* 1435 // CHECK1-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8 1436 // CHECK1-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1 1437 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1438 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]]) 1439 // CHECK1-NEXT: ret void 1440 // 1441 // 1442 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 1443 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1444 // CHECK1-NEXT: entry: 1445 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1446 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1447 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1448 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1449 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1450 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1451 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1452 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1453 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1454 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1455 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1456 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1457 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1458 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1459 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 1460 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1461 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1462 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1463 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1464 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1465 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1466 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1467 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1468 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1469 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1470 // CHECK1: cond.true: 1471 // CHECK1-NEXT: br label [[COND_END:%.*]] 1472 // CHECK1: cond.false: 1473 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1474 // CHECK1-NEXT: br label [[COND_END]] 1475 // CHECK1: cond.end: 1476 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1477 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1478 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1479 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1480 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1481 // CHECK1: omp.inner.for.cond: 1482 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1483 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1484 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1485 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1486 // CHECK1: omp.inner.for.body: 1487 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1488 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1489 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1490 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1491 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1 1492 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1 1493 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1494 // CHECK1: omp_if.then: 1495 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1496 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1497 // CHECK1: omp_if.else: 1498 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1499 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1500 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1501 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1502 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1503 // CHECK1-NEXT: br label [[OMP_IF_END]] 1504 // CHECK1: omp_if.end: 1505 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1506 // CHECK1: omp.inner.for.inc: 1507 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1508 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1509 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1510 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1511 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1512 // CHECK1: omp.inner.for.end: 1513 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1514 // CHECK1: omp.loop.exit: 1515 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1516 // CHECK1-NEXT: ret void 1517 // 1518 // 1519 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1520 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1521 // CHECK1-NEXT: entry: 1522 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1523 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1524 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1525 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1526 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1527 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1528 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1529 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1530 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1531 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1532 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1533 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1534 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1535 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1536 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1537 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1538 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1539 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1540 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1541 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1542 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1543 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1544 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1545 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1546 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1547 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1548 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1549 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1550 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1551 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1552 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1553 // CHECK1: cond.true: 1554 // CHECK1-NEXT: br label [[COND_END:%.*]] 1555 // CHECK1: cond.false: 1556 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1557 // CHECK1-NEXT: br label [[COND_END]] 1558 // CHECK1: cond.end: 1559 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1560 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1561 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1562 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1563 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1564 // CHECK1: omp.inner.for.cond: 1565 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1566 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1567 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1568 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1569 // CHECK1: omp.inner.for.body: 1570 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1571 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1572 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1573 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1574 // CHECK1-NEXT: call void @_Z3fn3v() 1575 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1576 // CHECK1: omp.body.continue: 1577 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1578 // CHECK1: omp.inner.for.inc: 1579 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1580 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1581 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1582 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1583 // CHECK1: omp.inner.for.end: 1584 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1585 // CHECK1: omp.loop.exit: 1586 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1587 // CHECK1-NEXT: ret void 1588 // 1589 // 1590 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1591 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 1592 // CHECK1-NEXT: entry: 1593 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1594 // CHECK1-NEXT: ret void 1595 // 1596