1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 10 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 13 14 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 18 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 21 22 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 29 30 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 31 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 32 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 34 // expected-no-diagnostics 35 #ifndef HEADER 36 #define HEADER 37 38 void fn1(); 39 void fn2(); 40 void fn3(); 41 void fn4(); 42 void fn5(); 43 void fn6(); 44 45 int Arg; 46 47 void gtid_test() { 48 #pragma omp target 49 #pragma omp teams distribute parallel for 50 for(int i = 0 ; i < 100; i++) {} 51 52 #pragma omp target 53 #pragma omp teams distribute parallel for if (parallel: false) 54 for(int i = 0 ; i < 100; i++) { 55 gtid_test(); 56 } 57 } 58 59 60 template <typename T> 61 int tmain(T Arg) { 62 #pragma omp target 63 #pragma omp teams distribute parallel for if (true) 64 for(int i = 0 ; i < 100; i++) { 65 fn1(); 66 } 67 #pragma omp target 68 #pragma omp teams distribute parallel for if (false) 69 for(int i = 0 ; i < 100; i++) { 70 fn2(); 71 } 72 #pragma omp target 73 #pragma omp teams distribute parallel for if (parallel: Arg) 74 for(int i = 0 ; i < 100; i++) { 75 fn3(); 76 } 77 return 0; 78 } 79 80 int main() { 81 #pragma omp target 82 #pragma omp teams distribute parallel for if (true) 83 for(int i = 0 ; i < 100; i++) { 84 85 86 fn4(); 87 } 88 89 #pragma omp target 90 #pragma omp teams distribute parallel for if (false) 91 for(int i = 0 ; i < 100; i++) { 92 93 94 fn5(); 95 } 96 97 #pragma omp target 98 #pragma omp teams distribute parallel for if (Arg) 99 for(int i = 0 ; i < 100; i++) { 100 101 102 fn6(); 103 } 104 105 return tmain(Arg); 106 } 107 108 109 110 111 112 113 // call void [[T_OUTLINE_FUN_3:@.+]]( 114 115 #endif 116 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv 117 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 118 // CHECK1-NEXT: entry: 119 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 120 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 121 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 122 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 123 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 124 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 125 // CHECK1: omp_offload.failed: 126 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]] 127 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 128 // CHECK1: omp_offload.cont: 129 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 130 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 131 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 132 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 133 // CHECK1: omp_offload.failed2: 134 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 135 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 136 // CHECK1: omp_offload.cont3: 137 // CHECK1-NEXT: ret void 138 // 139 // 140 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 141 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { 142 // CHECK1-NEXT: entry: 143 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 144 // CHECK1-NEXT: ret void 145 // 146 // 147 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 148 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 149 // CHECK1-NEXT: entry: 150 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 151 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 152 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 153 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 155 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 156 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 157 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 158 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 159 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 160 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 161 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 162 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 163 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 164 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 165 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 166 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 167 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 168 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 169 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 170 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 171 // CHECK1: cond.true: 172 // CHECK1-NEXT: br label [[COND_END:%.*]] 173 // CHECK1: cond.false: 174 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 175 // CHECK1-NEXT: br label [[COND_END]] 176 // CHECK1: cond.end: 177 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 178 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 179 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 180 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 181 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 182 // CHECK1: omp.inner.for.cond: 183 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 184 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 185 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 186 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 187 // CHECK1: omp.inner.for.body: 188 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 189 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 190 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 191 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 192 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 193 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 194 // CHECK1: omp.inner.for.inc: 195 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 196 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 197 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 198 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 199 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 200 // CHECK1: omp.inner.for.end: 201 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 202 // CHECK1: omp.loop.exit: 203 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 204 // CHECK1-NEXT: ret void 205 // 206 // 207 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 208 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 209 // CHECK1-NEXT: entry: 210 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 211 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 212 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 213 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 214 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 215 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 216 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 218 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 219 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 220 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 221 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 222 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 223 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 224 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 225 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 226 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 227 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 228 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 229 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 230 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 231 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 232 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 233 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 234 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 235 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 236 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 237 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 238 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 239 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 240 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 241 // CHECK1: cond.true: 242 // CHECK1-NEXT: br label [[COND_END:%.*]] 243 // CHECK1: cond.false: 244 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 245 // CHECK1-NEXT: br label [[COND_END]] 246 // CHECK1: cond.end: 247 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 248 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 249 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 250 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 251 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 252 // CHECK1: omp.inner.for.cond: 253 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 254 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 255 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 256 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 257 // CHECK1: omp.inner.for.body: 258 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 259 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 260 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 261 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 262 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 263 // CHECK1: omp.body.continue: 264 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 265 // CHECK1: omp.inner.for.inc: 266 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 267 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 268 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 269 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 270 // CHECK1: omp.inner.for.end: 271 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 272 // CHECK1: omp.loop.exit: 273 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 274 // CHECK1-NEXT: ret void 275 // 276 // 277 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 278 // CHECK1-SAME: () #[[ATTR1]] { 279 // CHECK1-NEXT: entry: 280 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 281 // CHECK1-NEXT: ret void 282 // 283 // 284 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 285 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 286 // CHECK1-NEXT: entry: 287 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 288 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 289 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 290 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 291 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 292 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 293 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 294 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 295 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 296 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 297 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 298 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 299 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 300 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 301 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 302 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 303 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 304 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 305 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 306 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 307 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 308 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 309 // CHECK1: cond.true: 310 // CHECK1-NEXT: br label [[COND_END:%.*]] 311 // CHECK1: cond.false: 312 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 313 // CHECK1-NEXT: br label [[COND_END]] 314 // CHECK1: cond.end: 315 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 316 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 317 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 318 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 319 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 320 // CHECK1: omp.inner.for.cond: 321 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 322 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 323 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 324 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 325 // CHECK1: omp.inner.for.body: 326 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 327 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 328 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 329 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 330 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 331 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 332 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 333 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 334 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 335 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 336 // CHECK1: omp.inner.for.inc: 337 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 338 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 339 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 340 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 341 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 342 // CHECK1: omp.inner.for.end: 343 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 344 // CHECK1: omp.loop.exit: 345 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 346 // CHECK1-NEXT: ret void 347 // 348 // 349 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 350 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 351 // CHECK1-NEXT: entry: 352 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 353 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 354 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 355 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 356 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 357 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 358 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 359 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 360 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 361 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 362 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 363 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 364 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 365 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 366 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 367 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 368 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 369 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 370 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 371 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 372 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 373 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 374 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 375 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 376 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 377 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 378 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 379 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 380 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 381 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 382 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 383 // CHECK1: cond.true: 384 // CHECK1-NEXT: br label [[COND_END:%.*]] 385 // CHECK1: cond.false: 386 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 387 // CHECK1-NEXT: br label [[COND_END]] 388 // CHECK1: cond.end: 389 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 390 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 391 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 392 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 393 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 394 // CHECK1: omp.inner.for.cond: 395 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 396 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 397 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 398 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 399 // CHECK1: omp.inner.for.body: 400 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 401 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 402 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 403 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 404 // CHECK1-NEXT: call void @_Z9gtid_testv() 405 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 406 // CHECK1: omp.body.continue: 407 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 408 // CHECK1: omp.inner.for.inc: 409 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 410 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 411 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 412 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 413 // CHECK1: omp.inner.for.end: 414 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 415 // CHECK1: omp.loop.exit: 416 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 417 // CHECK1-NEXT: ret void 418 // 419 // 420 // CHECK1-LABEL: define {{[^@]+}}@main 421 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 422 // CHECK1-NEXT: entry: 423 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 424 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 425 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 426 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 427 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 428 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 429 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 430 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 431 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4 432 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 433 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 434 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 435 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 436 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 437 // CHECK1: omp_offload.failed: 438 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]] 439 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 440 // CHECK1: omp_offload.cont: 441 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 442 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 443 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 444 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 445 // CHECK1: omp_offload.failed2: 446 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]] 447 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 448 // CHECK1: omp_offload.cont3: 449 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4 450 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 451 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 452 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 453 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 454 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 455 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 456 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 457 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 458 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 459 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 460 // CHECK1-NEXT: store i8* null, i8** [[TMP10]], align 8 461 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 462 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 463 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* @Arg, align 4 464 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0 465 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 466 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 467 // CHECK1-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 468 // CHECK1-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1 469 // CHECK1-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1 470 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 471 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]]) 472 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 473 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 474 // CHECK1: omp_offload.failed6: 475 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]] 476 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]] 477 // CHECK1: omp_offload.cont7: 478 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* @Arg, align 4 479 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP18]]) 480 // CHECK1-NEXT: ret i32 [[CALL]] 481 // 482 // 483 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 484 // CHECK1-SAME: () #[[ATTR1]] { 485 // CHECK1-NEXT: entry: 486 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 487 // CHECK1-NEXT: ret void 488 // 489 // 490 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 491 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 492 // CHECK1-NEXT: entry: 493 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 494 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 495 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 496 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 497 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 498 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 499 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 500 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 501 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 502 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 503 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 504 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 505 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 506 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 507 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 508 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 509 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 510 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 511 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 512 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 513 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 514 // CHECK1: cond.true: 515 // CHECK1-NEXT: br label [[COND_END:%.*]] 516 // CHECK1: cond.false: 517 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 518 // CHECK1-NEXT: br label [[COND_END]] 519 // CHECK1: cond.end: 520 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 521 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 522 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 523 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 524 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 525 // CHECK1: omp.inner.for.cond: 526 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 527 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 528 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 529 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 530 // CHECK1: omp.inner.for.body: 531 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 532 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 533 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 534 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 535 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 536 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 537 // CHECK1: omp.inner.for.inc: 538 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 539 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 540 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 541 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 542 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 543 // CHECK1: omp.inner.for.end: 544 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 545 // CHECK1: omp.loop.exit: 546 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 547 // CHECK1-NEXT: ret void 548 // 549 // 550 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 551 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 552 // CHECK1-NEXT: entry: 553 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 554 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 555 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 556 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 557 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 558 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 559 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 560 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 561 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 562 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 563 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 564 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 565 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 566 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 567 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 568 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 569 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 570 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 571 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 572 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 573 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 574 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 575 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 576 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 577 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 578 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 579 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 580 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 581 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 582 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 583 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 584 // CHECK1: cond.true: 585 // CHECK1-NEXT: br label [[COND_END:%.*]] 586 // CHECK1: cond.false: 587 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 588 // CHECK1-NEXT: br label [[COND_END]] 589 // CHECK1: cond.end: 590 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 591 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 592 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 593 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 594 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 595 // CHECK1: omp.inner.for.cond: 596 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 597 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 598 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 599 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 600 // CHECK1: omp.inner.for.body: 601 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 602 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 603 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 604 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 605 // CHECK1-NEXT: call void @_Z3fn4v() 606 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 607 // CHECK1: omp.body.continue: 608 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 609 // CHECK1: omp.inner.for.inc: 610 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 611 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 612 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 613 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 614 // CHECK1: omp.inner.for.end: 615 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 616 // CHECK1: omp.loop.exit: 617 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 618 // CHECK1-NEXT: ret void 619 // 620 // 621 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89 622 // CHECK1-SAME: () #[[ATTR1]] { 623 // CHECK1-NEXT: entry: 624 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 625 // CHECK1-NEXT: ret void 626 // 627 // 628 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 629 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 630 // CHECK1-NEXT: entry: 631 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 632 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 633 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 634 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 635 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 636 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 637 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 638 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 639 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 640 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 641 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 642 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 643 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 644 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 645 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 646 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 647 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 648 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 649 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 650 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 651 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 652 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 653 // CHECK1: cond.true: 654 // CHECK1-NEXT: br label [[COND_END:%.*]] 655 // CHECK1: cond.false: 656 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 657 // CHECK1-NEXT: br label [[COND_END]] 658 // CHECK1: cond.end: 659 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 660 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 661 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 662 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 663 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 664 // CHECK1: omp.inner.for.cond: 665 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 666 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 667 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 668 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 669 // CHECK1: omp.inner.for.body: 670 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 671 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 672 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 673 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 674 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 675 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 676 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 677 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 678 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 679 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 680 // CHECK1: omp.inner.for.inc: 681 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 682 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 683 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 684 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 685 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 686 // CHECK1: omp.inner.for.end: 687 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 688 // CHECK1: omp.loop.exit: 689 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 690 // CHECK1-NEXT: ret void 691 // 692 // 693 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 694 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 695 // CHECK1-NEXT: entry: 696 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 697 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 698 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 699 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 700 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 701 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 702 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 703 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 704 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 705 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 706 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 707 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 708 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 709 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 710 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 711 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 712 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 713 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 714 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 715 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 716 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 717 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 718 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 719 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 720 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 721 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 722 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 723 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 724 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 725 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 726 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 727 // CHECK1: cond.true: 728 // CHECK1-NEXT: br label [[COND_END:%.*]] 729 // CHECK1: cond.false: 730 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 731 // CHECK1-NEXT: br label [[COND_END]] 732 // CHECK1: cond.end: 733 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 734 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 735 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 736 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 737 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 738 // CHECK1: omp.inner.for.cond: 739 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 740 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 741 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 742 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 743 // CHECK1: omp.inner.for.body: 744 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 745 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 746 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 747 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 748 // CHECK1-NEXT: call void @_Z3fn5v() 749 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 750 // CHECK1: omp.body.continue: 751 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 752 // CHECK1: omp.inner.for.inc: 753 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 754 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 755 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 756 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 757 // CHECK1: omp.inner.for.end: 758 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 759 // CHECK1: omp.loop.exit: 760 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 761 // CHECK1-NEXT: ret void 762 // 763 // 764 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97 765 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 766 // CHECK1-NEXT: entry: 767 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 768 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 769 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 770 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 771 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 772 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 773 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 774 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 775 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 776 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 777 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1 778 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8* 779 // CHECK1-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8 780 // CHECK1-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1 781 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 782 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]]) 783 // CHECK1-NEXT: ret void 784 // 785 // 786 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 787 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 788 // CHECK1-NEXT: entry: 789 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 790 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 791 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 792 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 793 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 794 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 795 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 796 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 797 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 798 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 799 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 800 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 801 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 802 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 803 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 804 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 805 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 806 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 807 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 808 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 809 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 810 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 811 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 812 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 813 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 814 // CHECK1: cond.true: 815 // CHECK1-NEXT: br label [[COND_END:%.*]] 816 // CHECK1: cond.false: 817 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 818 // CHECK1-NEXT: br label [[COND_END]] 819 // CHECK1: cond.end: 820 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 821 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 822 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 823 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 824 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 825 // CHECK1: omp.inner.for.cond: 826 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 827 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 828 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 829 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 830 // CHECK1: omp.inner.for.body: 831 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 832 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 833 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 834 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 835 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1 836 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1 837 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 838 // CHECK1: omp_if.then: 839 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 840 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 841 // CHECK1: omp_if.else: 842 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 843 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 844 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 845 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 846 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 847 // CHECK1-NEXT: br label [[OMP_IF_END]] 848 // CHECK1: omp_if.end: 849 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 850 // CHECK1: omp.inner.for.inc: 851 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 852 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 853 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 854 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 855 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 856 // CHECK1: omp.inner.for.end: 857 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 858 // CHECK1: omp.loop.exit: 859 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 860 // CHECK1-NEXT: ret void 861 // 862 // 863 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 864 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 865 // CHECK1-NEXT: entry: 866 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 867 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 868 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 869 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 870 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 871 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 872 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 873 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 874 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 875 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 876 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 877 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 878 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 879 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 880 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 881 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 882 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 883 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 884 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 885 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 886 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 887 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 888 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 889 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 890 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 891 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 892 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 893 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 894 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 895 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 896 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 897 // CHECK1: cond.true: 898 // CHECK1-NEXT: br label [[COND_END:%.*]] 899 // CHECK1: cond.false: 900 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 901 // CHECK1-NEXT: br label [[COND_END]] 902 // CHECK1: cond.end: 903 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 904 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 905 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 906 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 907 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 908 // CHECK1: omp.inner.for.cond: 909 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 910 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 911 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 912 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 913 // CHECK1: omp.inner.for.body: 914 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 915 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 916 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 917 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 918 // CHECK1-NEXT: call void @_Z3fn6v() 919 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 920 // CHECK1: omp.body.continue: 921 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 922 // CHECK1: omp.inner.for.inc: 923 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 924 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 925 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 926 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 927 // CHECK1: omp.inner.for.end: 928 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 929 // CHECK1: omp.loop.exit: 930 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 931 // CHECK1-NEXT: ret void 932 // 933 // 934 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 935 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 936 // CHECK1-NEXT: entry: 937 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 938 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 939 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 940 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 941 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 942 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 943 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 944 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 945 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4 946 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 947 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 948 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 949 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 950 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 951 // CHECK1: omp_offload.failed: 952 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]] 953 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 954 // CHECK1: omp_offload.cont: 955 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 956 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 957 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 958 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 959 // CHECK1: omp_offload.failed2: 960 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]] 961 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 962 // CHECK1: omp_offload.cont3: 963 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 964 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 965 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 966 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 967 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 968 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 969 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 970 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 971 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 972 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 973 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 974 // CHECK1-NEXT: store i8* null, i8** [[TMP10]], align 8 975 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 976 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 977 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 978 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0 979 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 980 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 981 // CHECK1-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 982 // CHECK1-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1 983 // CHECK1-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1 984 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 985 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]]) 986 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 987 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 988 // CHECK1: omp_offload.failed6: 989 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]] 990 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]] 991 // CHECK1: omp_offload.cont7: 992 // CHECK1-NEXT: ret i32 0 993 // 994 // 995 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62 996 // CHECK1-SAME: () #[[ATTR1]] { 997 // CHECK1-NEXT: entry: 998 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 999 // CHECK1-NEXT: ret void 1000 // 1001 // 1002 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 1003 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1004 // CHECK1-NEXT: entry: 1005 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1006 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1007 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1008 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1009 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1010 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1011 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1012 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1013 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1014 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1015 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1016 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1017 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1018 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1019 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1020 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1021 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1022 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1023 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1024 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1025 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1026 // CHECK1: cond.true: 1027 // CHECK1-NEXT: br label [[COND_END:%.*]] 1028 // CHECK1: cond.false: 1029 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1030 // CHECK1-NEXT: br label [[COND_END]] 1031 // CHECK1: cond.end: 1032 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1033 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1034 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1035 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1036 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1037 // CHECK1: omp.inner.for.cond: 1038 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1039 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1040 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1041 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1042 // CHECK1: omp.inner.for.body: 1043 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1044 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1045 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1046 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1047 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1048 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1049 // CHECK1: omp.inner.for.inc: 1050 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1051 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1052 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1053 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1054 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1055 // CHECK1: omp.inner.for.end: 1056 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1057 // CHECK1: omp.loop.exit: 1058 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1059 // CHECK1-NEXT: ret void 1060 // 1061 // 1062 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1063 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1064 // CHECK1-NEXT: entry: 1065 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1066 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1067 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1068 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1069 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1070 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1071 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1072 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1073 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1074 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1075 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1076 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1077 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1078 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1079 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1080 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1081 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1082 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1083 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1084 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1085 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1086 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1087 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1088 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1089 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1090 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1091 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1092 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1093 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1094 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1095 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1096 // CHECK1: cond.true: 1097 // CHECK1-NEXT: br label [[COND_END:%.*]] 1098 // CHECK1: cond.false: 1099 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1100 // CHECK1-NEXT: br label [[COND_END]] 1101 // CHECK1: cond.end: 1102 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1103 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1104 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1105 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1106 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1107 // CHECK1: omp.inner.for.cond: 1108 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1109 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1110 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1111 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1112 // CHECK1: omp.inner.for.body: 1113 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1114 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1115 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1116 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1117 // CHECK1-NEXT: call void @_Z3fn1v() 1118 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1119 // CHECK1: omp.body.continue: 1120 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1121 // CHECK1: omp.inner.for.inc: 1122 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1123 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1124 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1125 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1126 // CHECK1: omp.inner.for.end: 1127 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1128 // CHECK1: omp.loop.exit: 1129 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1130 // CHECK1-NEXT: ret void 1131 // 1132 // 1133 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67 1134 // CHECK1-SAME: () #[[ATTR1]] { 1135 // CHECK1-NEXT: entry: 1136 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 1137 // CHECK1-NEXT: ret void 1138 // 1139 // 1140 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12 1141 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1142 // CHECK1-NEXT: entry: 1143 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1144 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1145 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1146 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1147 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1148 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1149 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1150 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1151 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1152 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1153 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1154 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1155 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1156 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1157 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1158 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1159 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1160 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1161 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1162 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1163 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1164 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1165 // CHECK1: cond.true: 1166 // CHECK1-NEXT: br label [[COND_END:%.*]] 1167 // CHECK1: cond.false: 1168 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1169 // CHECK1-NEXT: br label [[COND_END]] 1170 // CHECK1: cond.end: 1171 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1172 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1173 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1174 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1175 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1176 // CHECK1: omp.inner.for.cond: 1177 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1178 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1179 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1180 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1181 // CHECK1: omp.inner.for.body: 1182 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1183 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1184 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1185 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1186 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1187 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1188 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1189 // CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1190 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1191 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1192 // CHECK1: omp.inner.for.inc: 1193 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1194 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1195 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1196 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1197 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1198 // CHECK1: omp.inner.for.end: 1199 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1200 // CHECK1: omp.loop.exit: 1201 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1202 // CHECK1-NEXT: ret void 1203 // 1204 // 1205 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13 1206 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1207 // CHECK1-NEXT: entry: 1208 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1209 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1210 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1211 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1212 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1213 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1214 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1215 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1216 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1217 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1218 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1219 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1220 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1221 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1222 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1223 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1224 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1225 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1226 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1227 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1228 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1229 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1230 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1231 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1232 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1233 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1234 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1235 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1236 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1237 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1238 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1239 // CHECK1: cond.true: 1240 // CHECK1-NEXT: br label [[COND_END:%.*]] 1241 // CHECK1: cond.false: 1242 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1243 // CHECK1-NEXT: br label [[COND_END]] 1244 // CHECK1: cond.end: 1245 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1246 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1247 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1248 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1249 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1250 // CHECK1: omp.inner.for.cond: 1251 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1252 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1253 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1254 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1255 // CHECK1: omp.inner.for.body: 1256 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1257 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1258 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1259 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1260 // CHECK1-NEXT: call void @_Z3fn2v() 1261 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1262 // CHECK1: omp.body.continue: 1263 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1264 // CHECK1: omp.inner.for.inc: 1265 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1266 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1267 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1268 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1269 // CHECK1: omp.inner.for.end: 1270 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1271 // CHECK1: omp.loop.exit: 1272 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1273 // CHECK1-NEXT: ret void 1274 // 1275 // 1276 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72 1277 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 1278 // CHECK1-NEXT: entry: 1279 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 1280 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 1281 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1282 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 1283 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 1284 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 1285 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 1286 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 1287 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 1288 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 1289 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1 1290 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8* 1291 // CHECK1-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8 1292 // CHECK1-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1 1293 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1294 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]]) 1295 // CHECK1-NEXT: ret void 1296 // 1297 // 1298 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 1299 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1300 // CHECK1-NEXT: entry: 1301 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1302 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1303 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1304 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1305 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1306 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1307 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1308 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1309 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1310 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1311 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1312 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1313 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1314 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1315 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 1316 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1317 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1318 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1319 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1320 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1321 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1322 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1323 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1324 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1325 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1326 // CHECK1: cond.true: 1327 // CHECK1-NEXT: br label [[COND_END:%.*]] 1328 // CHECK1: cond.false: 1329 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1330 // CHECK1-NEXT: br label [[COND_END]] 1331 // CHECK1: cond.end: 1332 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1333 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1334 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1335 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1336 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1337 // CHECK1: omp.inner.for.cond: 1338 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1339 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1340 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1341 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1342 // CHECK1: omp.inner.for.body: 1343 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1344 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1345 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1346 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1347 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1 1348 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1 1349 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1350 // CHECK1: omp_if.then: 1351 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1352 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1353 // CHECK1: omp_if.else: 1354 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1355 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1356 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1357 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1358 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1359 // CHECK1-NEXT: br label [[OMP_IF_END]] 1360 // CHECK1: omp_if.end: 1361 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1362 // CHECK1: omp.inner.for.inc: 1363 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1364 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1365 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1366 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1367 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1368 // CHECK1: omp.inner.for.end: 1369 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1370 // CHECK1: omp.loop.exit: 1371 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1372 // CHECK1-NEXT: ret void 1373 // 1374 // 1375 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1376 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1377 // CHECK1-NEXT: entry: 1378 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1379 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1380 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1381 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1382 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1383 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1384 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1385 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1386 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1387 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1388 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1389 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1390 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1391 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1392 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1393 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1394 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1395 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1396 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1397 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1398 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1399 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1400 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1401 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1402 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1403 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1404 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1405 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1406 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1407 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1408 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1409 // CHECK1: cond.true: 1410 // CHECK1-NEXT: br label [[COND_END:%.*]] 1411 // CHECK1: cond.false: 1412 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1413 // CHECK1-NEXT: br label [[COND_END]] 1414 // CHECK1: cond.end: 1415 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1416 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1417 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1418 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1419 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1420 // CHECK1: omp.inner.for.cond: 1421 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1422 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1423 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1424 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1425 // CHECK1: omp.inner.for.body: 1426 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1427 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1428 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1429 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1430 // CHECK1-NEXT: call void @_Z3fn3v() 1431 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1432 // CHECK1: omp.body.continue: 1433 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1434 // CHECK1: omp.inner.for.inc: 1435 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1436 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1437 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1438 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1439 // CHECK1: omp.inner.for.end: 1440 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1441 // CHECK1: omp.loop.exit: 1442 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1443 // CHECK1-NEXT: ret void 1444 // 1445 // 1446 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1447 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 1448 // CHECK1-NEXT: entry: 1449 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1450 // CHECK1-NEXT: ret void 1451 // 1452