1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 int x; 29 #pragma omp threadprivate(x) 30 31 template <typename T> 32 T tmain() { 33 int a[2]; 34 #pragma omp target 35 #pragma omp teams distribute parallel for copyin(x) 36 for (int i = 0; i < 2; ++i) { 37 a[i] = x; 38 } 39 return T(); 40 } 41 42 int main() { 43 int a[2]; 44 #ifdef LAMBDA 45 [&]() { 46 #pragma omp target 47 #pragma omp teams distribute parallel for copyin(x) 48 for (int i = 0; i < 2; ++i) { 49 50 // Skip global, bound tid and loop vars 51 a[i] = x; 52 53 54 // Skip global, bound tid and loop vars 55 56 57 [&]() { 58 a[i] = x; 59 }(); 60 } 61 }(); 62 return 0; 63 #else 64 #pragma omp target 65 #pragma omp teams distribute parallel for copyin(x) 66 for (int i = 0; i < 2; ++i) { 67 a[i] = x; 68 } 69 return tmain<int>(); 70 //return 0; 71 #endif 72 } 73 74 75 76 // Skip global, bound tid and loop vars 77 78 79 // Skip global, bound tid and loop vars 80 81 82 83 84 // Skip global, bound tid and loop vars 85 86 87 // Skip global, bound tid and loop vars 88 // prev lb and ub 89 90 // iter variables 91 92 93 94 #endif 95 // CHECK1-LABEL: define {{[^@]+}}@main 96 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 97 // CHECK1-NEXT: entry: 98 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 99 // CHECK1-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 100 // CHECK1-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 101 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 102 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 103 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 104 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 105 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 106 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 107 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 108 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 109 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[X_CASTED]], align 8 110 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 111 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64* 112 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8 113 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 114 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 115 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 116 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 117 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8 118 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 119 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 120 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 8 121 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 122 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 123 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 8 124 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 125 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 126 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 127 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 128 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 129 // CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 130 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 131 // CHECK1-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 132 // CHECK1: omp_offload.failed: 133 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64(i64 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2:[0-9]+]] 134 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 135 // CHECK1: omp_offload.cont: 136 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 137 // CHECK1-NEXT: ret i32 [[CALL]] 138 // 139 // 140 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64 141 // CHECK1-SAME: (i64 [[X:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 142 // CHECK1-NEXT: entry: 143 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 144 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 145 // CHECK1-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 146 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 147 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 148 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 149 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]]) 150 // CHECK1-NEXT: ret void 151 // 152 // 153 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 154 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 155 // CHECK1-NEXT: entry: 156 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 157 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 158 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 159 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 160 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 161 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 162 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 163 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 166 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 168 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 169 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 170 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 171 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 172 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 173 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 174 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 175 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 176 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 177 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 178 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 179 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 180 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 181 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 182 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 183 // CHECK1: cond.true: 184 // CHECK1-NEXT: br label [[COND_END:%.*]] 185 // CHECK1: cond.false: 186 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 187 // CHECK1-NEXT: br label [[COND_END]] 188 // CHECK1: cond.end: 189 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 190 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 191 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 192 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 193 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 194 // CHECK1: omp.inner.for.cond: 195 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 196 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 197 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 198 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 199 // CHECK1: omp.inner.for.body: 200 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 201 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 202 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 203 // CHECK1-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 204 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 205 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 206 // CHECK1: omp.inner.for.inc: 207 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 208 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 209 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 210 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 211 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 212 // CHECK1: omp.inner.for.end: 213 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 214 // CHECK1: omp.loop.exit: 215 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 216 // CHECK1-NEXT: ret void 217 // 218 // 219 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 220 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 221 // CHECK1-NEXT: entry: 222 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 223 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 224 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 225 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 226 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 227 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 228 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 229 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 230 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 231 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 232 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 233 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 236 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 237 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 238 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 239 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 240 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 241 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 242 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 243 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 244 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 245 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 246 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP2]] to i32 247 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 248 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32 249 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 250 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 251 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 252 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 253 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 254 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 255 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 256 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 257 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 258 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 259 // CHECK1: cond.true: 260 // CHECK1-NEXT: br label [[COND_END:%.*]] 261 // CHECK1: cond.false: 262 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 263 // CHECK1-NEXT: br label [[COND_END]] 264 // CHECK1: cond.end: 265 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 266 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 267 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 268 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 269 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 270 // CHECK1: omp.inner.for.cond: 271 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 272 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 273 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 274 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 275 // CHECK1: omp.inner.for.body: 276 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 277 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 278 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 279 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 280 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 281 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 282 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 283 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 284 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 285 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 286 // CHECK1: omp.body.continue: 287 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 288 // CHECK1: omp.inner.for.inc: 289 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 290 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 291 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 292 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 293 // CHECK1: omp.inner.for.end: 294 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 295 // CHECK1: omp.loop.exit: 296 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 297 // CHECK1-NEXT: ret void 298 // 299 // 300 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 301 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat { 302 // CHECK1-NEXT: entry: 303 // CHECK1-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 304 // CHECK1-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 305 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 306 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 307 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 308 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 309 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 310 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 311 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 312 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[X_CASTED]], align 8 313 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 314 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64* 315 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8 316 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 317 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 318 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 319 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 320 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8 321 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 322 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 323 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 8 324 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 325 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 326 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 8 327 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 328 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 329 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 330 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 331 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 332 // CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 333 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 334 // CHECK1-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 335 // CHECK1: omp_offload.failed: 336 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34(i64 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2]] 337 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 338 // CHECK1: omp_offload.cont: 339 // CHECK1-NEXT: ret i32 0 340 // 341 // 342 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34 343 // CHECK1-SAME: (i64 [[X:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1]] { 344 // CHECK1-NEXT: entry: 345 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 346 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 347 // CHECK1-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 348 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 349 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 350 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 351 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]]) 352 // CHECK1-NEXT: ret void 353 // 354 // 355 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 356 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 357 // CHECK1-NEXT: entry: 358 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 359 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 360 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 361 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 362 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 363 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 364 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 365 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 366 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 367 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 368 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 369 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 370 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 371 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 372 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 373 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 374 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 375 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 376 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 377 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 378 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 379 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 380 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 381 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 382 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 383 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 384 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 385 // CHECK1: cond.true: 386 // CHECK1-NEXT: br label [[COND_END:%.*]] 387 // CHECK1: cond.false: 388 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 389 // CHECK1-NEXT: br label [[COND_END]] 390 // CHECK1: cond.end: 391 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 392 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 393 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 394 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 395 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 396 // CHECK1: omp.inner.for.cond: 397 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 398 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 399 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 400 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 401 // CHECK1: omp.inner.for.body: 402 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 403 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 404 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 405 // CHECK1-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 406 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 407 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 408 // CHECK1: omp.inner.for.inc: 409 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 410 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 411 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 412 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 413 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 414 // CHECK1: omp.inner.for.end: 415 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 416 // CHECK1: omp.loop.exit: 417 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 418 // CHECK1-NEXT: ret void 419 // 420 // 421 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 422 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 423 // CHECK1-NEXT: entry: 424 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 425 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 426 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 427 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 428 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 429 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 430 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 431 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 432 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 433 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 434 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 435 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 436 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 437 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 438 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 439 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 440 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 441 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 442 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 443 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 444 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 445 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 446 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 447 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 448 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP2]] to i32 449 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 450 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32 451 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 452 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 453 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 454 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 455 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 456 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 457 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 458 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 459 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 460 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 461 // CHECK1: cond.true: 462 // CHECK1-NEXT: br label [[COND_END:%.*]] 463 // CHECK1: cond.false: 464 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 465 // CHECK1-NEXT: br label [[COND_END]] 466 // CHECK1: cond.end: 467 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 468 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 469 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 470 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 471 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 472 // CHECK1: omp.inner.for.cond: 473 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 474 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 475 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 476 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 477 // CHECK1: omp.inner.for.body: 478 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 479 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 480 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 481 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 482 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 483 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 484 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 485 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 486 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 487 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 488 // CHECK1: omp.body.continue: 489 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 490 // CHECK1: omp.inner.for.inc: 491 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 492 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 493 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 494 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 495 // CHECK1: omp.inner.for.end: 496 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 497 // CHECK1: omp.loop.exit: 498 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 499 // CHECK1-NEXT: ret void 500 // 501 // 502 // CHECK1-LABEL: define {{[^@]+}}@_ZTW1x 503 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] comdat { 504 // CHECK1-NEXT: ret i32* @x 505 // 506 // 507 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 508 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 509 // CHECK1-NEXT: entry: 510 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 511 // CHECK1-NEXT: ret void 512 // 513 // 514 // CHECK2-LABEL: define {{[^@]+}}@main 515 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 516 // CHECK2-NEXT: entry: 517 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 518 // CHECK2-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 519 // CHECK2-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 520 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 521 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 522 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 523 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 524 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 525 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 526 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 527 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 528 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[X_CASTED]], align 8 529 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 530 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64* 531 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8 532 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 533 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 534 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 535 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 536 // CHECK2-NEXT: store i8* null, i8** [[TMP6]], align 8 537 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 538 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 539 // CHECK2-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 8 540 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 541 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 542 // CHECK2-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 8 543 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 544 // CHECK2-NEXT: store i8* null, i8** [[TMP11]], align 8 545 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 546 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 547 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 548 // CHECK2-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 549 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 550 // CHECK2-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 551 // CHECK2: omp_offload.failed: 552 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64(i64 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2:[0-9]+]] 553 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 554 // CHECK2: omp_offload.cont: 555 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 556 // CHECK2-NEXT: ret i32 [[CALL]] 557 // 558 // 559 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64 560 // CHECK2-SAME: (i64 [[X:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 561 // CHECK2-NEXT: entry: 562 // CHECK2-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 563 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 564 // CHECK2-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 565 // CHECK2-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 566 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 567 // CHECK2-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 568 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]]) 569 // CHECK2-NEXT: ret void 570 // 571 // 572 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 573 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 574 // CHECK2-NEXT: entry: 575 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 576 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 577 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 578 // CHECK2-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 579 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 580 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 581 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 582 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 583 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 584 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 585 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 586 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 587 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 588 // CHECK2-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 589 // CHECK2-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 590 // CHECK2-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 591 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 592 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 593 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 594 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 595 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 596 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 597 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 598 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 599 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 600 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 601 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 602 // CHECK2: cond.true: 603 // CHECK2-NEXT: br label [[COND_END:%.*]] 604 // CHECK2: cond.false: 605 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 606 // CHECK2-NEXT: br label [[COND_END]] 607 // CHECK2: cond.end: 608 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 609 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 610 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 611 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 612 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 613 // CHECK2: omp.inner.for.cond: 614 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 615 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 616 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 617 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 618 // CHECK2: omp.inner.for.body: 619 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 620 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 621 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 622 // CHECK2-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 623 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 624 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 625 // CHECK2: omp.inner.for.inc: 626 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 627 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 628 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 629 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 630 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 631 // CHECK2: omp.inner.for.end: 632 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 633 // CHECK2: omp.loop.exit: 634 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 635 // CHECK2-NEXT: ret void 636 // 637 // 638 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 639 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 640 // CHECK2-NEXT: entry: 641 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 642 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 643 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 644 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 645 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 646 // CHECK2-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 647 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 648 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 649 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 650 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 651 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 652 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 653 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 654 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 655 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 656 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 657 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 658 // CHECK2-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 659 // CHECK2-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 660 // CHECK2-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 661 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 662 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 663 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 664 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 665 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP2]] to i32 666 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 667 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32 668 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 669 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 670 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 671 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 672 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 673 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 674 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 675 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 676 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 677 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 678 // CHECK2: cond.true: 679 // CHECK2-NEXT: br label [[COND_END:%.*]] 680 // CHECK2: cond.false: 681 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 682 // CHECK2-NEXT: br label [[COND_END]] 683 // CHECK2: cond.end: 684 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 685 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 686 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 687 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 688 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 689 // CHECK2: omp.inner.for.cond: 690 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 691 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 692 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 693 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 694 // CHECK2: omp.inner.for.body: 695 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 696 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 697 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 698 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 699 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 700 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 701 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 702 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 703 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 704 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 705 // CHECK2: omp.body.continue: 706 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 707 // CHECK2: omp.inner.for.inc: 708 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 709 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 710 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 711 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 712 // CHECK2: omp.inner.for.end: 713 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 714 // CHECK2: omp.loop.exit: 715 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 716 // CHECK2-NEXT: ret void 717 // 718 // 719 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 720 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] comdat { 721 // CHECK2-NEXT: entry: 722 // CHECK2-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 723 // CHECK2-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 724 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 725 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 726 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 727 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 728 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 729 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 730 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 731 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[X_CASTED]], align 8 732 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 733 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64* 734 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8 735 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 736 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 737 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 738 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 739 // CHECK2-NEXT: store i8* null, i8** [[TMP6]], align 8 740 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 741 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 742 // CHECK2-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 8 743 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 744 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 745 // CHECK2-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 8 746 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 747 // CHECK2-NEXT: store i8* null, i8** [[TMP11]], align 8 748 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 749 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 750 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 751 // CHECK2-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 752 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 753 // CHECK2-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 754 // CHECK2: omp_offload.failed: 755 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34(i64 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2]] 756 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 757 // CHECK2: omp_offload.cont: 758 // CHECK2-NEXT: ret i32 0 759 // 760 // 761 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34 762 // CHECK2-SAME: (i64 [[X:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1]] { 763 // CHECK2-NEXT: entry: 764 // CHECK2-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 765 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 766 // CHECK2-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 767 // CHECK2-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 768 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 769 // CHECK2-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 770 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]]) 771 // CHECK2-NEXT: ret void 772 // 773 // 774 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 775 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 776 // CHECK2-NEXT: entry: 777 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 778 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 779 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 780 // CHECK2-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 781 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 782 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 783 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 784 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 785 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 786 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 787 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 788 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 789 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 790 // CHECK2-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 791 // CHECK2-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 792 // CHECK2-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 793 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 794 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 795 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 796 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 797 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 798 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 799 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 800 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 801 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 802 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 803 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 804 // CHECK2: cond.true: 805 // CHECK2-NEXT: br label [[COND_END:%.*]] 806 // CHECK2: cond.false: 807 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 808 // CHECK2-NEXT: br label [[COND_END]] 809 // CHECK2: cond.end: 810 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 811 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 812 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 813 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 814 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 815 // CHECK2: omp.inner.for.cond: 816 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 817 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 818 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 819 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 820 // CHECK2: omp.inner.for.body: 821 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 822 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 823 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 824 // CHECK2-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 825 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 826 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 827 // CHECK2: omp.inner.for.inc: 828 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 829 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 830 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 831 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 832 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 833 // CHECK2: omp.inner.for.end: 834 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 835 // CHECK2: omp.loop.exit: 836 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 837 // CHECK2-NEXT: ret void 838 // 839 // 840 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 841 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 842 // CHECK2-NEXT: entry: 843 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 844 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 845 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 846 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 847 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 848 // CHECK2-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 849 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 850 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 851 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 852 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 853 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 854 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 855 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 856 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 857 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 858 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 859 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 860 // CHECK2-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 861 // CHECK2-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 862 // CHECK2-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 863 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 864 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 865 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 866 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 867 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP2]] to i32 868 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 869 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32 870 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 871 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 872 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 873 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 874 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 875 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 876 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 877 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 878 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 879 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 880 // CHECK2: cond.true: 881 // CHECK2-NEXT: br label [[COND_END:%.*]] 882 // CHECK2: cond.false: 883 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 884 // CHECK2-NEXT: br label [[COND_END]] 885 // CHECK2: cond.end: 886 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 887 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 888 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 889 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 890 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 891 // CHECK2: omp.inner.for.cond: 892 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 893 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 894 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 895 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 896 // CHECK2: omp.inner.for.body: 897 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 898 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 899 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 900 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 901 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 902 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 903 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 904 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 905 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 906 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 907 // CHECK2: omp.body.continue: 908 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 909 // CHECK2: omp.inner.for.inc: 910 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 911 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 912 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 913 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 914 // CHECK2: omp.inner.for.end: 915 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 916 // CHECK2: omp.loop.exit: 917 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 918 // CHECK2-NEXT: ret void 919 // 920 // 921 // CHECK2-LABEL: define {{[^@]+}}@_ZTW1x 922 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] comdat { 923 // CHECK2-NEXT: ret i32* @x 924 // 925 // 926 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 927 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] { 928 // CHECK2-NEXT: entry: 929 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 930 // CHECK2-NEXT: ret void 931 // 932 // 933 // CHECK3-LABEL: define {{[^@]+}}@main 934 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 935 // CHECK3-NEXT: entry: 936 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 937 // CHECK3-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 938 // CHECK3-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 939 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 940 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 941 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 942 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 943 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 944 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 945 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[X_CASTED]], align 4 946 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[X_CASTED]], align 4 947 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 948 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32* 949 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4 950 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 951 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 952 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 953 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 954 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4 955 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 956 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 957 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 4 958 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 959 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 960 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 4 961 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 962 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4 963 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 964 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 965 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 966 // CHECK3-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 967 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 968 // CHECK3-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 969 // CHECK3: omp_offload.failed: 970 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64(i32 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2:[0-9]+]] 971 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 972 // CHECK3: omp_offload.cont: 973 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 974 // CHECK3-NEXT: ret i32 [[CALL]] 975 // 976 // 977 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64 978 // CHECK3-SAME: (i32 [[X:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 979 // CHECK3-NEXT: entry: 980 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 981 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 982 // CHECK3-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 983 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 984 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 985 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[X_ADDR]]) 986 // CHECK3-NEXT: ret void 987 // 988 // 989 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 990 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 991 // CHECK3-NEXT: entry: 992 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 993 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 994 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 995 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 996 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 997 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 998 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 999 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1000 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1001 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1002 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1003 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1004 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1005 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1006 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1007 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1008 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1009 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1010 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1011 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1012 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1013 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1014 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1015 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1016 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1017 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1018 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1019 // CHECK3: cond.true: 1020 // CHECK3-NEXT: br label [[COND_END:%.*]] 1021 // CHECK3: cond.false: 1022 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1023 // CHECK3-NEXT: br label [[COND_END]] 1024 // CHECK3: cond.end: 1025 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1026 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1027 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1028 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1029 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1030 // CHECK3: omp.inner.for.cond: 1031 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1032 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1033 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1034 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1035 // CHECK3: omp.inner.for.body: 1036 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1037 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1038 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP9]], i32 [[TMP10]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 1039 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1040 // CHECK3: omp.inner.for.inc: 1041 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1042 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1043 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1044 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1045 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1046 // CHECK3: omp.inner.for.end: 1047 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1048 // CHECK3: omp.loop.exit: 1049 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1050 // CHECK3-NEXT: ret void 1051 // 1052 // 1053 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1054 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 1055 // CHECK3-NEXT: entry: 1056 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1057 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1058 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1059 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1060 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 1061 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1062 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1063 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1064 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1065 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1066 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1067 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1068 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1069 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1070 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1071 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1072 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1073 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1074 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1075 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1076 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1077 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1078 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1079 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1080 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1081 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_LB]], align 4 1082 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4 1083 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1084 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1085 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1086 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1087 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1088 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1089 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1090 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1091 // CHECK3: cond.true: 1092 // CHECK3-NEXT: br label [[COND_END:%.*]] 1093 // CHECK3: cond.false: 1094 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1095 // CHECK3-NEXT: br label [[COND_END]] 1096 // CHECK3: cond.end: 1097 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1098 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1099 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1100 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1101 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1102 // CHECK3: omp.inner.for.cond: 1103 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1104 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1105 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1106 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1107 // CHECK3: omp.inner.for.body: 1108 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1109 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1110 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1111 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1112 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 1113 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1114 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 1115 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 1116 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1117 // CHECK3: omp.body.continue: 1118 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1119 // CHECK3: omp.inner.for.inc: 1120 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1121 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1 1122 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1123 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1124 // CHECK3: omp.inner.for.end: 1125 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1126 // CHECK3: omp.loop.exit: 1127 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1128 // CHECK3-NEXT: ret void 1129 // 1130 // 1131 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1132 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] comdat { 1133 // CHECK3-NEXT: entry: 1134 // CHECK3-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1135 // CHECK3-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 1136 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 1137 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 1138 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 1139 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1140 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 1141 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[X_CASTED]], align 4 1142 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[X_CASTED]], align 4 1143 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1144 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32* 1145 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4 1146 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1147 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 1148 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 1149 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1150 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4 1151 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1152 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 1153 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 4 1154 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1155 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 1156 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 4 1157 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1158 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4 1159 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1160 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1161 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 1162 // CHECK3-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1163 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1164 // CHECK3-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1165 // CHECK3: omp_offload.failed: 1166 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34(i32 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2]] 1167 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1168 // CHECK3: omp_offload.cont: 1169 // CHECK3-NEXT: ret i32 0 1170 // 1171 // 1172 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34 1173 // CHECK3-SAME: (i32 [[X:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1]] { 1174 // CHECK3-NEXT: entry: 1175 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 1176 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 1177 // CHECK3-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 1178 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1179 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1180 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[X_ADDR]]) 1181 // CHECK3-NEXT: ret void 1182 // 1183 // 1184 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1185 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 1186 // CHECK3-NEXT: entry: 1187 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1188 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1189 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 1190 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1191 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1192 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1193 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1194 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1195 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1196 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1197 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1198 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1199 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1200 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1201 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1202 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1203 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1204 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1205 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1206 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1207 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1208 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1209 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1210 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1211 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1212 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1213 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1214 // CHECK3: cond.true: 1215 // CHECK3-NEXT: br label [[COND_END:%.*]] 1216 // CHECK3: cond.false: 1217 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1218 // CHECK3-NEXT: br label [[COND_END]] 1219 // CHECK3: cond.end: 1220 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1221 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1222 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1223 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1224 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1225 // CHECK3: omp.inner.for.cond: 1226 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1227 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1228 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1229 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1230 // CHECK3: omp.inner.for.body: 1231 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1232 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1233 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], i32 [[TMP10]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 1234 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1235 // CHECK3: omp.inner.for.inc: 1236 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1237 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1238 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1239 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1240 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1241 // CHECK3: omp.inner.for.end: 1242 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1243 // CHECK3: omp.loop.exit: 1244 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1245 // CHECK3-NEXT: ret void 1246 // 1247 // 1248 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 1249 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 1250 // CHECK3-NEXT: entry: 1251 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1252 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1253 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1254 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1255 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 1256 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1257 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1258 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1259 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1260 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1261 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1262 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1263 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1264 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1265 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1266 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1267 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1268 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1269 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1270 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1271 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1272 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1273 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1274 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1275 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1276 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_LB]], align 4 1277 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4 1278 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1279 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1280 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1281 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1282 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1283 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1284 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1285 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1286 // CHECK3: cond.true: 1287 // CHECK3-NEXT: br label [[COND_END:%.*]] 1288 // CHECK3: cond.false: 1289 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1290 // CHECK3-NEXT: br label [[COND_END]] 1291 // CHECK3: cond.end: 1292 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1293 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1294 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1295 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1296 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1297 // CHECK3: omp.inner.for.cond: 1298 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1299 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1300 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1301 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1302 // CHECK3: omp.inner.for.body: 1303 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1304 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1305 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1306 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1307 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 1308 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1309 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 1310 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 1311 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1312 // CHECK3: omp.body.continue: 1313 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1314 // CHECK3: omp.inner.for.inc: 1315 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1316 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1 1317 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1318 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1319 // CHECK3: omp.inner.for.end: 1320 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1321 // CHECK3: omp.loop.exit: 1322 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1323 // CHECK3-NEXT: ret void 1324 // 1325 // 1326 // CHECK3-LABEL: define {{[^@]+}}@_ZTW1x 1327 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] comdat { 1328 // CHECK3-NEXT: ret i32* @x 1329 // 1330 // 1331 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1332 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] { 1333 // CHECK3-NEXT: entry: 1334 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1335 // CHECK3-NEXT: ret void 1336 // 1337 // 1338 // CHECK4-LABEL: define {{[^@]+}}@main 1339 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 1340 // CHECK4-NEXT: entry: 1341 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1342 // CHECK4-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1343 // CHECK4-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 1344 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 1345 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 1346 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 1347 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1348 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1349 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 1350 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[X_CASTED]], align 4 1351 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[X_CASTED]], align 4 1352 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1353 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32* 1354 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4 1355 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1356 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 1357 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 1358 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1359 // CHECK4-NEXT: store i8* null, i8** [[TMP6]], align 4 1360 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1361 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 1362 // CHECK4-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 4 1363 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1364 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 1365 // CHECK4-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 4 1366 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1367 // CHECK4-NEXT: store i8* null, i8** [[TMP11]], align 4 1368 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1369 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1370 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 1371 // CHECK4-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1372 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1373 // CHECK4-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1374 // CHECK4: omp_offload.failed: 1375 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64(i32 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2:[0-9]+]] 1376 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1377 // CHECK4: omp_offload.cont: 1378 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1379 // CHECK4-NEXT: ret i32 [[CALL]] 1380 // 1381 // 1382 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64 1383 // CHECK4-SAME: (i32 [[X:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 1384 // CHECK4-NEXT: entry: 1385 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 1386 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 1387 // CHECK4-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 1388 // CHECK4-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1389 // CHECK4-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1390 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[X_ADDR]]) 1391 // CHECK4-NEXT: ret void 1392 // 1393 // 1394 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1395 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 1396 // CHECK4-NEXT: entry: 1397 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1398 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1399 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 1400 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1401 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1402 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1403 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1404 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1405 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1406 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1407 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1408 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1409 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1410 // CHECK4-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1411 // CHECK4-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1412 // CHECK4-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1413 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1414 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1415 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1416 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1417 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1418 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1419 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1420 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1421 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1422 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1423 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1424 // CHECK4: cond.true: 1425 // CHECK4-NEXT: br label [[COND_END:%.*]] 1426 // CHECK4: cond.false: 1427 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1428 // CHECK4-NEXT: br label [[COND_END]] 1429 // CHECK4: cond.end: 1430 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1431 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1432 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1433 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1434 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1435 // CHECK4: omp.inner.for.cond: 1436 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1437 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1438 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1439 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1440 // CHECK4: omp.inner.for.body: 1441 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1442 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1443 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP9]], i32 [[TMP10]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 1444 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1445 // CHECK4: omp.inner.for.inc: 1446 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1447 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1448 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1449 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1450 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1451 // CHECK4: omp.inner.for.end: 1452 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1453 // CHECK4: omp.loop.exit: 1454 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1455 // CHECK4-NEXT: ret void 1456 // 1457 // 1458 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1459 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 1460 // CHECK4-NEXT: entry: 1461 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1462 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1463 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1464 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1465 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 1466 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1467 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1468 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1469 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1470 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1471 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1472 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1473 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1474 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1475 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1476 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1477 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1478 // CHECK4-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1479 // CHECK4-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1480 // CHECK4-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1481 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1482 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1483 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1484 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1485 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1486 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_LB]], align 4 1487 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4 1488 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1489 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1490 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1491 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1492 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1493 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1494 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1495 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1496 // CHECK4: cond.true: 1497 // CHECK4-NEXT: br label [[COND_END:%.*]] 1498 // CHECK4: cond.false: 1499 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1500 // CHECK4-NEXT: br label [[COND_END]] 1501 // CHECK4: cond.end: 1502 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1503 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1504 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1505 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1506 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1507 // CHECK4: omp.inner.for.cond: 1508 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1509 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1510 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1511 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1512 // CHECK4: omp.inner.for.body: 1513 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1514 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1515 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1516 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1517 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 1518 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1519 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 1520 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 1521 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1522 // CHECK4: omp.body.continue: 1523 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1524 // CHECK4: omp.inner.for.inc: 1525 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1526 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1 1527 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1528 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1529 // CHECK4: omp.inner.for.end: 1530 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1531 // CHECK4: omp.loop.exit: 1532 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1533 // CHECK4-NEXT: ret void 1534 // 1535 // 1536 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1537 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] comdat { 1538 // CHECK4-NEXT: entry: 1539 // CHECK4-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1540 // CHECK4-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 1541 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 1542 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 1543 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 1544 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1545 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 1546 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[X_CASTED]], align 4 1547 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[X_CASTED]], align 4 1548 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1549 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32* 1550 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4 1551 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1552 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 1553 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 1554 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1555 // CHECK4-NEXT: store i8* null, i8** [[TMP6]], align 4 1556 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1557 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 1558 // CHECK4-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 4 1559 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1560 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 1561 // CHECK4-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 4 1562 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1563 // CHECK4-NEXT: store i8* null, i8** [[TMP11]], align 4 1564 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1565 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1566 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 1567 // CHECK4-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1568 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1569 // CHECK4-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1570 // CHECK4: omp_offload.failed: 1571 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34(i32 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2]] 1572 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1573 // CHECK4: omp_offload.cont: 1574 // CHECK4-NEXT: ret i32 0 1575 // 1576 // 1577 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34 1578 // CHECK4-SAME: (i32 [[X:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1]] { 1579 // CHECK4-NEXT: entry: 1580 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 1581 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 1582 // CHECK4-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 1583 // CHECK4-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1584 // CHECK4-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1585 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[X_ADDR]]) 1586 // CHECK4-NEXT: ret void 1587 // 1588 // 1589 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 1590 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 1591 // CHECK4-NEXT: entry: 1592 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1593 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1594 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 1595 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1596 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1597 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1598 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1599 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1600 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1601 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1602 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1603 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1604 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1605 // CHECK4-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1606 // CHECK4-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1607 // CHECK4-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1608 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1609 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1610 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1611 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1612 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1613 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1614 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1615 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1616 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1617 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1618 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1619 // CHECK4: cond.true: 1620 // CHECK4-NEXT: br label [[COND_END:%.*]] 1621 // CHECK4: cond.false: 1622 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1623 // CHECK4-NEXT: br label [[COND_END]] 1624 // CHECK4: cond.end: 1625 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1626 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1627 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1628 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1629 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1630 // CHECK4: omp.inner.for.cond: 1631 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1632 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1633 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1634 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1635 // CHECK4: omp.inner.for.body: 1636 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1637 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1638 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], i32 [[TMP10]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 1639 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1640 // CHECK4: omp.inner.for.inc: 1641 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1642 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1643 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1644 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1645 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1646 // CHECK4: omp.inner.for.end: 1647 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1648 // CHECK4: omp.loop.exit: 1649 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1650 // CHECK4-NEXT: ret void 1651 // 1652 // 1653 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 1654 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 1655 // CHECK4-NEXT: entry: 1656 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1657 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1658 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1659 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1660 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 1661 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1662 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1663 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1664 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1665 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1666 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1667 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1668 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1669 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1670 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1671 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1672 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1673 // CHECK4-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 1674 // CHECK4-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1675 // CHECK4-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 1676 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1677 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1678 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1679 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1680 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1681 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_LB]], align 4 1682 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4 1683 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1684 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1685 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1686 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1687 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1688 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1689 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1690 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1691 // CHECK4: cond.true: 1692 // CHECK4-NEXT: br label [[COND_END:%.*]] 1693 // CHECK4: cond.false: 1694 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1695 // CHECK4-NEXT: br label [[COND_END]] 1696 // CHECK4: cond.end: 1697 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1698 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1699 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1700 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1701 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1702 // CHECK4: omp.inner.for.cond: 1703 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1704 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1705 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1706 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1707 // CHECK4: omp.inner.for.body: 1708 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1709 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1710 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1711 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1712 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 1713 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1714 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 1715 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 1716 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1717 // CHECK4: omp.body.continue: 1718 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1719 // CHECK4: omp.inner.for.inc: 1720 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1721 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1 1722 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1723 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1724 // CHECK4: omp.inner.for.end: 1725 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1726 // CHECK4: omp.loop.exit: 1727 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1728 // CHECK4-NEXT: ret void 1729 // 1730 // 1731 // CHECK4-LABEL: define {{[^@]+}}@_ZTW1x 1732 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] comdat { 1733 // CHECK4-NEXT: ret i32* @x 1734 // 1735 // 1736 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1737 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] { 1738 // CHECK4-NEXT: entry: 1739 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1740 // CHECK4-NEXT: ret void 1741 // 1742 // 1743 // CHECK5-LABEL: define {{[^@]+}}@main 1744 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1745 // CHECK5-NEXT: entry: 1746 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1747 // CHECK5-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1748 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1749 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 1750 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 1751 // CHECK5-NEXT: br label [[FOR_COND:%.*]] 1752 // CHECK5: for.cond: 1753 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1754 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 1755 // CHECK5-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1756 // CHECK5: for.body: 1757 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* @x, align 4 1758 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1759 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64 1760 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1761 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 1762 // CHECK5-NEXT: br label [[FOR_INC:%.*]] 1763 // CHECK5: for.inc: 1764 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1765 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 1766 // CHECK5-NEXT: store i32 [[INC]], i32* [[I]], align 4 1767 // CHECK5-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 1768 // CHECK5: for.end: 1769 // CHECK5-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 1770 // CHECK5-NEXT: ret i32 [[CALL]] 1771 // 1772 // 1773 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1774 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] comdat { 1775 // CHECK5-NEXT: entry: 1776 // CHECK5-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1777 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1778 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 1779 // CHECK5-NEXT: br label [[FOR_COND:%.*]] 1780 // CHECK5: for.cond: 1781 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1782 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 1783 // CHECK5-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1784 // CHECK5: for.body: 1785 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* @x, align 4 1786 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1787 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64 1788 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1789 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 1790 // CHECK5-NEXT: br label [[FOR_INC:%.*]] 1791 // CHECK5: for.inc: 1792 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1793 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 1794 // CHECK5-NEXT: store i32 [[INC]], i32* [[I]], align 4 1795 // CHECK5-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1796 // CHECK5: for.end: 1797 // CHECK5-NEXT: ret i32 0 1798 // 1799 // 1800 // CHECK6-LABEL: define {{[^@]+}}@main 1801 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 1802 // CHECK6-NEXT: entry: 1803 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1804 // CHECK6-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1805 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 1806 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 1807 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 1808 // CHECK6-NEXT: br label [[FOR_COND:%.*]] 1809 // CHECK6: for.cond: 1810 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1811 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 1812 // CHECK6-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1813 // CHECK6: for.body: 1814 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* @x, align 4 1815 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1816 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64 1817 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1818 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 1819 // CHECK6-NEXT: br label [[FOR_INC:%.*]] 1820 // CHECK6: for.inc: 1821 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1822 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 1823 // CHECK6-NEXT: store i32 [[INC]], i32* [[I]], align 4 1824 // CHECK6-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 1825 // CHECK6: for.end: 1826 // CHECK6-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 1827 // CHECK6-NEXT: ret i32 [[CALL]] 1828 // 1829 // 1830 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1831 // CHECK6-SAME: () #[[ATTR1:[0-9]+]] comdat { 1832 // CHECK6-NEXT: entry: 1833 // CHECK6-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1834 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 1835 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 1836 // CHECK6-NEXT: br label [[FOR_COND:%.*]] 1837 // CHECK6: for.cond: 1838 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1839 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 1840 // CHECK6-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1841 // CHECK6: for.body: 1842 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* @x, align 4 1843 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1844 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64 1845 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1846 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 1847 // CHECK6-NEXT: br label [[FOR_INC:%.*]] 1848 // CHECK6: for.inc: 1849 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1850 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 1851 // CHECK6-NEXT: store i32 [[INC]], i32* [[I]], align 4 1852 // CHECK6-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1853 // CHECK6: for.end: 1854 // CHECK6-NEXT: ret i32 0 1855 // 1856 // 1857 // CHECK7-LABEL: define {{[^@]+}}@main 1858 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1859 // CHECK7-NEXT: entry: 1860 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1861 // CHECK7-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1862 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1863 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 1864 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 1865 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 1866 // CHECK7: for.cond: 1867 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1868 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 1869 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1870 // CHECK7: for.body: 1871 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* @x, align 4 1872 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1873 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i32 0, i32 [[TMP2]] 1874 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 1875 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 1876 // CHECK7: for.inc: 1877 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1878 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 1879 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 1880 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1881 // CHECK7: for.end: 1882 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1883 // CHECK7-NEXT: ret i32 [[CALL]] 1884 // 1885 // 1886 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1887 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] comdat { 1888 // CHECK7-NEXT: entry: 1889 // CHECK7-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1890 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1891 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 1892 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 1893 // CHECK7: for.cond: 1894 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1895 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 1896 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1897 // CHECK7: for.body: 1898 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* @x, align 4 1899 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1900 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i32 0, i32 [[TMP2]] 1901 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 1902 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 1903 // CHECK7: for.inc: 1904 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1905 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 1906 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 1907 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 1908 // CHECK7: for.end: 1909 // CHECK7-NEXT: ret i32 0 1910 // 1911 // 1912 // CHECK8-LABEL: define {{[^@]+}}@main 1913 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 1914 // CHECK8-NEXT: entry: 1915 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1916 // CHECK8-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1917 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1918 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 1919 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 1920 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 1921 // CHECK8: for.cond: 1922 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1923 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 1924 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1925 // CHECK8: for.body: 1926 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* @x, align 4 1927 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1928 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i32 0, i32 [[TMP2]] 1929 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 1930 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 1931 // CHECK8: for.inc: 1932 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1933 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 1934 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 1935 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1936 // CHECK8: for.end: 1937 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1938 // CHECK8-NEXT: ret i32 [[CALL]] 1939 // 1940 // 1941 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1942 // CHECK8-SAME: () #[[ATTR1:[0-9]+]] comdat { 1943 // CHECK8-NEXT: entry: 1944 // CHECK8-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1945 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1946 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 1947 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 1948 // CHECK8: for.cond: 1949 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1950 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 1951 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1952 // CHECK8: for.body: 1953 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* @x, align 4 1954 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1955 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i32 0, i32 [[TMP2]] 1956 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 1957 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 1958 // CHECK8: for.inc: 1959 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1960 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 1961 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 1962 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 1963 // CHECK8: for.end: 1964 // CHECK8-NEXT: ret i32 0 1965 // 1966 // 1967 // CHECK9-LABEL: define {{[^@]+}}@main 1968 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1969 // CHECK9-NEXT: entry: 1970 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1971 // CHECK9-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 1972 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 1973 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1974 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1975 // CHECK9-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP0]], align 8 1976 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(8) [[REF_TMP]]) 1977 // CHECK9-NEXT: ret i32 0 1978 // 1979 // 1980 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l46 1981 // CHECK9-SAME: (i64 [[X:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1982 // CHECK9-NEXT: entry: 1983 // CHECK9-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 1984 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 1985 // CHECK9-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 1986 // CHECK9-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 1987 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 1988 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 1989 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]]) 1990 // CHECK9-NEXT: ret void 1991 // 1992 // 1993 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1994 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] { 1995 // CHECK9-NEXT: entry: 1996 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1997 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1998 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 1999 // CHECK9-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 2000 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2001 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2002 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2003 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2004 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2005 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2006 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2007 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2008 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2009 // CHECK9-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 2010 // CHECK9-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 2011 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 2012 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 2013 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2014 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2015 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2016 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2017 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2018 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2019 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2020 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2021 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2022 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2023 // CHECK9: cond.true: 2024 // CHECK9-NEXT: br label [[COND_END:%.*]] 2025 // CHECK9: cond.false: 2026 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2027 // CHECK9-NEXT: br label [[COND_END]] 2028 // CHECK9: cond.end: 2029 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2030 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2031 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2032 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2033 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2034 // CHECK9: omp.inner.for.cond: 2035 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2036 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2037 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2038 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2039 // CHECK9: omp.inner.for.body: 2040 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2041 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2042 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2043 // CHECK9-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 2044 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 2045 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2046 // CHECK9: omp.inner.for.inc: 2047 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2048 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2049 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2050 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2051 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2052 // CHECK9: omp.inner.for.end: 2053 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2054 // CHECK9: omp.loop.exit: 2055 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2056 // CHECK9-NEXT: ret void 2057 // 2058 // 2059 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 2060 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] { 2061 // CHECK9-NEXT: entry: 2062 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2063 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2064 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2065 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2066 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 2067 // CHECK9-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 2068 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2069 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2070 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2071 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2072 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2073 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2074 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2075 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 2076 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2077 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2078 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2079 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2080 // CHECK9-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 2081 // CHECK9-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 2082 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 2083 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 2084 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2085 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2086 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2087 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP2]] to i32 2088 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2089 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32 2090 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2091 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2092 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2093 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2094 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2095 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2096 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2097 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2098 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 2099 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2100 // CHECK9: cond.true: 2101 // CHECK9-NEXT: br label [[COND_END:%.*]] 2102 // CHECK9: cond.false: 2103 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2104 // CHECK9-NEXT: br label [[COND_END]] 2105 // CHECK9: cond.end: 2106 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 2107 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2108 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2109 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2110 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2111 // CHECK9: omp.inner.for.cond: 2112 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2113 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2114 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2115 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2116 // CHECK9: omp.inner.for.body: 2117 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2118 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2119 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2120 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2121 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 2122 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2123 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 2124 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2125 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 2126 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 2127 // CHECK9-NEXT: store [2 x i32]* [[TMP0]], [2 x i32]** [[TMP14]], align 8 2128 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 2129 // CHECK9-NEXT: store i32* [[I]], i32** [[TMP15]], align 8 2130 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 2131 // CHECK9-NEXT: store i32* [[TMP1]], i32** [[TMP16]], align 8 2132 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(24) [[REF_TMP]]) 2133 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2134 // CHECK9: omp.body.continue: 2135 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2136 // CHECK9: omp.inner.for.inc: 2137 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2138 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 2139 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2140 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2141 // CHECK9: omp.inner.for.end: 2142 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2143 // CHECK9: omp.loop.exit: 2144 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 2145 // CHECK9-NEXT: ret void 2146 // 2147 // 2148 // CHECK9-LABEL: define {{[^@]+}}@_ZTW1x 2149 // CHECK9-SAME: () #[[ATTR4:[0-9]+]] comdat { 2150 // CHECK9-NEXT: ret i32* @x 2151 // 2152 // 2153 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2154 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] { 2155 // CHECK9-NEXT: entry: 2156 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2157 // CHECK9-NEXT: ret void 2158 // 2159 // 2160 // CHECK10-LABEL: define {{[^@]+}}@main 2161 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 2162 // CHECK10-NEXT: entry: 2163 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2164 // CHECK10-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 2165 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 2166 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 2167 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 2168 // CHECK10-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP0]], align 8 2169 // CHECK10-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(8) [[REF_TMP]]) 2170 // CHECK10-NEXT: ret i32 0 2171 // 2172 // 2173 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l46 2174 // CHECK10-SAME: (i64 [[X:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2175 // CHECK10-NEXT: entry: 2176 // CHECK10-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 2177 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 2178 // CHECK10-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 2179 // CHECK10-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 2180 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 2181 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 2182 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]]) 2183 // CHECK10-NEXT: ret void 2184 // 2185 // 2186 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 2187 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] { 2188 // CHECK10-NEXT: entry: 2189 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2190 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2191 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 2192 // CHECK10-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 2193 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2194 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2195 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2196 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2197 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2198 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2199 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2200 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2201 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2202 // CHECK10-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 2203 // CHECK10-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 2204 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 2205 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 2206 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2207 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2208 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2209 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2210 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2211 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2212 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2213 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2214 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2215 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2216 // CHECK10: cond.true: 2217 // CHECK10-NEXT: br label [[COND_END:%.*]] 2218 // CHECK10: cond.false: 2219 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2220 // CHECK10-NEXT: br label [[COND_END]] 2221 // CHECK10: cond.end: 2222 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2223 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2224 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2225 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2226 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2227 // CHECK10: omp.inner.for.cond: 2228 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2229 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2230 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2231 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2232 // CHECK10: omp.inner.for.body: 2233 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2234 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2235 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2236 // CHECK10-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 2237 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 2238 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2239 // CHECK10: omp.inner.for.inc: 2240 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2241 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2242 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2243 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2244 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2245 // CHECK10: omp.inner.for.end: 2246 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2247 // CHECK10: omp.loop.exit: 2248 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2249 // CHECK10-NEXT: ret void 2250 // 2251 // 2252 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2253 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] { 2254 // CHECK10-NEXT: entry: 2255 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2256 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2257 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2258 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2259 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 2260 // CHECK10-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 2261 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2262 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2263 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2264 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2265 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2266 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2267 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2268 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 2269 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2270 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2271 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2272 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2273 // CHECK10-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 2274 // CHECK10-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 2275 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 2276 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 2277 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2278 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2279 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2280 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP2]] to i32 2281 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2282 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32 2283 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2284 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2285 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2286 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2287 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2288 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2289 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2290 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2291 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 2292 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2293 // CHECK10: cond.true: 2294 // CHECK10-NEXT: br label [[COND_END:%.*]] 2295 // CHECK10: cond.false: 2296 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2297 // CHECK10-NEXT: br label [[COND_END]] 2298 // CHECK10: cond.end: 2299 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 2300 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2301 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2302 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2303 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2304 // CHECK10: omp.inner.for.cond: 2305 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2306 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2307 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2308 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2309 // CHECK10: omp.inner.for.body: 2310 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2311 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2312 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2313 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2314 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 2315 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2316 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 2317 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2318 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 2319 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 2320 // CHECK10-NEXT: store [2 x i32]* [[TMP0]], [2 x i32]** [[TMP14]], align 8 2321 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 2322 // CHECK10-NEXT: store i32* [[I]], i32** [[TMP15]], align 8 2323 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 2324 // CHECK10-NEXT: store i32* [[TMP1]], i32** [[TMP16]], align 8 2325 // CHECK10-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(24) [[REF_TMP]]) 2326 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2327 // CHECK10: omp.body.continue: 2328 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2329 // CHECK10: omp.inner.for.inc: 2330 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2331 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 2332 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2333 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2334 // CHECK10: omp.inner.for.end: 2335 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2336 // CHECK10: omp.loop.exit: 2337 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 2338 // CHECK10-NEXT: ret void 2339 // 2340 // 2341 // CHECK10-LABEL: define {{[^@]+}}@_ZTW1x 2342 // CHECK10-SAME: () #[[ATTR4:[0-9]+]] comdat { 2343 // CHECK10-NEXT: ret i32* @x 2344 // 2345 // 2346 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2347 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] { 2348 // CHECK10-NEXT: entry: 2349 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2350 // CHECK10-NEXT: ret void 2351 // 2352 // 2353 // CHECK11-LABEL: define {{[^@]+}}@main 2354 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2355 // CHECK11-NEXT: entry: 2356 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2357 // CHECK11-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 2358 // CHECK11-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 2359 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2360 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 2361 // CHECK11-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP0]], align 8 2362 // CHECK11-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(8) [[REF_TMP]]) 2363 // CHECK11-NEXT: ret i32 0 2364 // 2365 // 2366 // CHECK12-LABEL: define {{[^@]+}}@main 2367 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2368 // CHECK12-NEXT: entry: 2369 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2370 // CHECK12-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 2371 // CHECK12-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 2372 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2373 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 2374 // CHECK12-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP0]], align 8 2375 // CHECK12-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(8) [[REF_TMP]]) 2376 // CHECK12-NEXT: ret i32 0 2377 // 2378