1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 20 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 int x; 29 #pragma omp threadprivate(x) 30 31 template <typename T> 32 T tmain() { 33 int a[2]; 34 #pragma omp target 35 #pragma omp teams distribute parallel for copyin(x) 36 for (int i = 0; i < 2; ++i) { 37 a[i] = x; 38 } 39 return T(); 40 } 41 42 int main() { 43 int a[2]; 44 #ifdef LAMBDA 45 [&]() { 46 #pragma omp target 47 #pragma omp teams distribute parallel for copyin(x) 48 for (int i = 0; i < 2; ++i) { 49 50 // Skip global, bound tid and loop vars 51 a[i] = x; 52 53 54 // Skip global, bound tid and loop vars 55 56 57 [&]() { 58 a[i] = x; 59 }(); 60 } 61 }(); 62 return 0; 63 #else 64 #pragma omp target 65 #pragma omp teams distribute parallel for copyin(x) 66 for (int i = 0; i < 2; ++i) { 67 a[i] = x; 68 } 69 return tmain<int>(); 70 //return 0; 71 #endif 72 } 73 74 75 76 // Skip global, bound tid and loop vars 77 78 79 // Skip global, bound tid and loop vars 80 81 82 83 84 // Skip global, bound tid and loop vars 85 86 87 // Skip global, bound tid and loop vars 88 // prev lb and ub 89 90 // iter variables 91 92 93 94 #endif 95 // CHECK1-LABEL: define {{[^@]+}}@main 96 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 97 // CHECK1-NEXT: entry: 98 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 99 // CHECK1-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 100 // CHECK1-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 101 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 102 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 103 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 104 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 105 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 106 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 107 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 108 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 109 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[X_CASTED]], align 8 110 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 111 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64* 112 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8 113 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 114 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 115 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 116 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 117 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8 118 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 119 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 120 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 8 121 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 122 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 123 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 8 124 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 125 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 126 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 127 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 128 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 129 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 130 // CHECK1-NEXT: store i32 1, i32* [[TMP14]], align 4 131 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 132 // CHECK1-NEXT: store i32 2, i32* [[TMP15]], align 4 133 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 134 // CHECK1-NEXT: store i8** [[TMP12]], i8*** [[TMP16]], align 8 135 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 136 // CHECK1-NEXT: store i8** [[TMP13]], i8*** [[TMP17]], align 8 137 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 138 // CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP18]], align 8 139 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 140 // CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP19]], align 8 141 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 142 // CHECK1-NEXT: store i8** null, i8*** [[TMP20]], align 8 143 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 144 // CHECK1-NEXT: store i8** null, i8*** [[TMP21]], align 8 145 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 146 // CHECK1-NEXT: store i64 2, i64* [[TMP22]], align 8 147 // CHECK1-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 148 // CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 149 // CHECK1-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 150 // CHECK1: omp_offload.failed: 151 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64(i64 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2:[0-9]+]] 152 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 153 // CHECK1: omp_offload.cont: 154 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 155 // CHECK1-NEXT: ret i32 [[CALL]] 156 // 157 // 158 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64 159 // CHECK1-SAME: (i64 noundef [[X:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 160 // CHECK1-NEXT: entry: 161 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 162 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 163 // CHECK1-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 164 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 165 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 166 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 167 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]]) 168 // CHECK1-NEXT: ret void 169 // 170 // 171 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 172 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 173 // CHECK1-NEXT: entry: 174 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 175 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 176 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 177 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 178 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 179 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 180 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 181 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 182 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 183 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 184 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 185 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 186 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 187 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 188 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 189 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 190 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 191 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 192 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 193 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 194 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 195 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 196 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 197 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 198 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 199 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 200 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 201 // CHECK1: cond.true: 202 // CHECK1-NEXT: br label [[COND_END:%.*]] 203 // CHECK1: cond.false: 204 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 205 // CHECK1-NEXT: br label [[COND_END]] 206 // CHECK1: cond.end: 207 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 208 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 209 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 210 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 211 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 212 // CHECK1: omp.inner.for.cond: 213 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 214 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 215 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 216 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 217 // CHECK1: omp.inner.for.body: 218 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 219 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 220 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 221 // CHECK1-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 222 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 223 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 224 // CHECK1: omp.inner.for.inc: 225 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 226 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 227 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 228 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 229 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 230 // CHECK1: omp.inner.for.end: 231 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 232 // CHECK1: omp.loop.exit: 233 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 234 // CHECK1-NEXT: ret void 235 // 236 // 237 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 238 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 239 // CHECK1-NEXT: entry: 240 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 241 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 242 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 243 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 244 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 245 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 246 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 247 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 248 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 249 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 250 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 251 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 252 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 253 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 254 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 255 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 256 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 257 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 258 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 259 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 260 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 261 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 262 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 263 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 264 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP2]] to i32 265 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 266 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32 267 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 268 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 269 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 270 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 271 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 272 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 273 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 274 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 275 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 276 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 277 // CHECK1: cond.true: 278 // CHECK1-NEXT: br label [[COND_END:%.*]] 279 // CHECK1: cond.false: 280 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 281 // CHECK1-NEXT: br label [[COND_END]] 282 // CHECK1: cond.end: 283 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 284 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 285 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 286 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 287 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 288 // CHECK1: omp.inner.for.cond: 289 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 290 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 291 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 292 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 293 // CHECK1: omp.inner.for.body: 294 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 295 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 296 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 297 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 298 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 299 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 300 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 301 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 302 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 303 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 304 // CHECK1: omp.body.continue: 305 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 306 // CHECK1: omp.inner.for.inc: 307 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 308 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 309 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 310 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 311 // CHECK1: omp.inner.for.end: 312 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 313 // CHECK1: omp.loop.exit: 314 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 315 // CHECK1-NEXT: ret void 316 // 317 // 318 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 319 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat { 320 // CHECK1-NEXT: entry: 321 // CHECK1-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 322 // CHECK1-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 323 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 324 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 325 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 326 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 327 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 328 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 329 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 330 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[X_CASTED]], align 8 331 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 332 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64* 333 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8 334 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 335 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 336 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 337 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 338 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8 339 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 340 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 341 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 8 342 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 343 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 344 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 8 345 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 346 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 347 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 348 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 349 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 350 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 351 // CHECK1-NEXT: store i32 1, i32* [[TMP14]], align 4 352 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 353 // CHECK1-NEXT: store i32 2, i32* [[TMP15]], align 4 354 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 355 // CHECK1-NEXT: store i8** [[TMP12]], i8*** [[TMP16]], align 8 356 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 357 // CHECK1-NEXT: store i8** [[TMP13]], i8*** [[TMP17]], align 8 358 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 359 // CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP18]], align 8 360 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 361 // CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP19]], align 8 362 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 363 // CHECK1-NEXT: store i8** null, i8*** [[TMP20]], align 8 364 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 365 // CHECK1-NEXT: store i8** null, i8*** [[TMP21]], align 8 366 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 367 // CHECK1-NEXT: store i64 2, i64* [[TMP22]], align 8 368 // CHECK1-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 369 // CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 370 // CHECK1-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 371 // CHECK1: omp_offload.failed: 372 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34(i64 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2]] 373 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 374 // CHECK1: omp_offload.cont: 375 // CHECK1-NEXT: ret i32 0 376 // 377 // 378 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34 379 // CHECK1-SAME: (i64 noundef [[X:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1]] { 380 // CHECK1-NEXT: entry: 381 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 382 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 383 // CHECK1-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 384 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 385 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 386 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 387 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]]) 388 // CHECK1-NEXT: ret void 389 // 390 // 391 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 392 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 393 // CHECK1-NEXT: entry: 394 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 395 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 396 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 397 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 398 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 399 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 400 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 403 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 406 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 407 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 408 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 409 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 410 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 411 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 412 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 413 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 414 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 415 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 416 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 417 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 418 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 419 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 420 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 421 // CHECK1: cond.true: 422 // CHECK1-NEXT: br label [[COND_END:%.*]] 423 // CHECK1: cond.false: 424 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 425 // CHECK1-NEXT: br label [[COND_END]] 426 // CHECK1: cond.end: 427 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 428 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 429 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 430 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 431 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 432 // CHECK1: omp.inner.for.cond: 433 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 434 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 435 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 436 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 437 // CHECK1: omp.inner.for.body: 438 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 439 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 440 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 441 // CHECK1-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 442 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 443 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 444 // CHECK1: omp.inner.for.inc: 445 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 446 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 447 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 448 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 449 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 450 // CHECK1: omp.inner.for.end: 451 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 452 // CHECK1: omp.loop.exit: 453 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 454 // CHECK1-NEXT: ret void 455 // 456 // 457 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 458 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 459 // CHECK1-NEXT: entry: 460 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 461 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 462 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 463 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 464 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 465 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 466 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 467 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 468 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 469 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 470 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 471 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 472 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 473 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 474 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 475 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 476 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 477 // CHECK1-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 478 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 479 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 480 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 481 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 482 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 483 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 484 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP2]] to i32 485 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 486 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32 487 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 488 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 489 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 490 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 491 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 492 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 493 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 494 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 495 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 496 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 497 // CHECK1: cond.true: 498 // CHECK1-NEXT: br label [[COND_END:%.*]] 499 // CHECK1: cond.false: 500 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 501 // CHECK1-NEXT: br label [[COND_END]] 502 // CHECK1: cond.end: 503 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 504 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 505 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 506 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 507 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 508 // CHECK1: omp.inner.for.cond: 509 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 510 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 511 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 512 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 513 // CHECK1: omp.inner.for.body: 514 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 515 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 516 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 517 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 518 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 519 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 520 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 521 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 522 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 523 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 524 // CHECK1: omp.body.continue: 525 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 526 // CHECK1: omp.inner.for.inc: 527 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 528 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 529 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 530 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 531 // CHECK1: omp.inner.for.end: 532 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 533 // CHECK1: omp.loop.exit: 534 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 535 // CHECK1-NEXT: ret void 536 // 537 // 538 // CHECK1-LABEL: define {{[^@]+}}@_ZTW1x 539 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] comdat { 540 // CHECK1-NEXT: ret i32* @x 541 // 542 // 543 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 544 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 545 // CHECK1-NEXT: entry: 546 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 547 // CHECK1-NEXT: ret void 548 // 549 // 550 // CHECK3-LABEL: define {{[^@]+}}@main 551 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 552 // CHECK3-NEXT: entry: 553 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 554 // CHECK3-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 555 // CHECK3-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 556 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 557 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 558 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 559 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 560 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 561 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 562 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[X_CASTED]], align 4 563 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[X_CASTED]], align 4 564 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 565 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32* 566 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4 567 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 568 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 569 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 570 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 571 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4 572 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 573 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 574 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 4 575 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 576 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 577 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 4 578 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 579 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4 580 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 581 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 582 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 583 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 584 // CHECK3-NEXT: store i32 1, i32* [[TMP14]], align 4 585 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 586 // CHECK3-NEXT: store i32 2, i32* [[TMP15]], align 4 587 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 588 // CHECK3-NEXT: store i8** [[TMP12]], i8*** [[TMP16]], align 4 589 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 590 // CHECK3-NEXT: store i8** [[TMP13]], i8*** [[TMP17]], align 4 591 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 592 // CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP18]], align 4 593 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 594 // CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP19]], align 4 595 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 596 // CHECK3-NEXT: store i8** null, i8*** [[TMP20]], align 4 597 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 598 // CHECK3-NEXT: store i8** null, i8*** [[TMP21]], align 4 599 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 600 // CHECK3-NEXT: store i64 2, i64* [[TMP22]], align 8 601 // CHECK3-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 602 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 603 // CHECK3-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 604 // CHECK3: omp_offload.failed: 605 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64(i32 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2:[0-9]+]] 606 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 607 // CHECK3: omp_offload.cont: 608 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 609 // CHECK3-NEXT: ret i32 [[CALL]] 610 // 611 // 612 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64 613 // CHECK3-SAME: (i32 noundef [[X:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 614 // CHECK3-NEXT: entry: 615 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 616 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 617 // CHECK3-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 618 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 619 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 620 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[X_ADDR]]) 621 // CHECK3-NEXT: ret void 622 // 623 // 624 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 625 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 626 // CHECK3-NEXT: entry: 627 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 628 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 629 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 630 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 631 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 632 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 633 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 634 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 635 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 636 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 637 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 638 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 639 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 640 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 641 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 642 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 643 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 644 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 645 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 646 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 647 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 648 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 649 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 650 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 651 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 652 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 653 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 654 // CHECK3: cond.true: 655 // CHECK3-NEXT: br label [[COND_END:%.*]] 656 // CHECK3: cond.false: 657 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 658 // CHECK3-NEXT: br label [[COND_END]] 659 // CHECK3: cond.end: 660 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 661 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 662 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 663 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 664 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 665 // CHECK3: omp.inner.for.cond: 666 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 667 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 668 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 669 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 670 // CHECK3: omp.inner.for.body: 671 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 672 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 673 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP9]], i32 [[TMP10]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 674 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 675 // CHECK3: omp.inner.for.inc: 676 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 677 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 678 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 679 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 680 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 681 // CHECK3: omp.inner.for.end: 682 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 683 // CHECK3: omp.loop.exit: 684 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 685 // CHECK3-NEXT: ret void 686 // 687 // 688 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 689 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 690 // CHECK3-NEXT: entry: 691 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 692 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 693 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 694 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 695 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 696 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 697 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 698 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 699 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 700 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 701 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 702 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 703 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 704 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 705 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 706 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 707 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 708 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 709 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 710 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 711 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 712 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 713 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 714 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 715 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 716 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_LB]], align 4 717 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4 718 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 719 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 720 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 721 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 722 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 723 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 724 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 725 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 726 // CHECK3: cond.true: 727 // CHECK3-NEXT: br label [[COND_END:%.*]] 728 // CHECK3: cond.false: 729 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 730 // CHECK3-NEXT: br label [[COND_END]] 731 // CHECK3: cond.end: 732 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 733 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 734 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 735 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 736 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 737 // CHECK3: omp.inner.for.cond: 738 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 739 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 740 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 741 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 742 // CHECK3: omp.inner.for.body: 743 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 744 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 745 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 746 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 747 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 748 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 749 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 750 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 751 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 752 // CHECK3: omp.body.continue: 753 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 754 // CHECK3: omp.inner.for.inc: 755 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 756 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1 757 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 758 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 759 // CHECK3: omp.inner.for.end: 760 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 761 // CHECK3: omp.loop.exit: 762 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 763 // CHECK3-NEXT: ret void 764 // 765 // 766 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 767 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] comdat { 768 // CHECK3-NEXT: entry: 769 // CHECK3-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 770 // CHECK3-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 771 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 772 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 773 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 774 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 775 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @x, align 4 776 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[X_CASTED]], align 4 777 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[X_CASTED]], align 4 778 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 779 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32* 780 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4 781 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 782 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 783 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 784 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 785 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4 786 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 787 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 788 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP8]], align 4 789 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 790 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 791 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP10]], align 4 792 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 793 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4 794 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 795 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 796 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 797 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 798 // CHECK3-NEXT: store i32 1, i32* [[TMP14]], align 4 799 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 800 // CHECK3-NEXT: store i32 2, i32* [[TMP15]], align 4 801 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 802 // CHECK3-NEXT: store i8** [[TMP12]], i8*** [[TMP16]], align 4 803 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 804 // CHECK3-NEXT: store i8** [[TMP13]], i8*** [[TMP17]], align 4 805 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 806 // CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP18]], align 4 807 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 808 // CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP19]], align 4 809 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 810 // CHECK3-NEXT: store i8** null, i8*** [[TMP20]], align 4 811 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 812 // CHECK3-NEXT: store i8** null, i8*** [[TMP21]], align 4 813 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 814 // CHECK3-NEXT: store i64 2, i64* [[TMP22]], align 8 815 // CHECK3-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 816 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 817 // CHECK3-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 818 // CHECK3: omp_offload.failed: 819 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34(i32 [[TMP1]], [2 x i32]* [[A]]) #[[ATTR2]] 820 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 821 // CHECK3: omp_offload.cont: 822 // CHECK3-NEXT: ret i32 0 823 // 824 // 825 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34 826 // CHECK3-SAME: (i32 noundef [[X:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1]] { 827 // CHECK3-NEXT: entry: 828 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 829 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 830 // CHECK3-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 831 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 832 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 833 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[X_ADDR]]) 834 // CHECK3-NEXT: ret void 835 // 836 // 837 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 838 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 839 // CHECK3-NEXT: entry: 840 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 841 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 842 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 843 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 844 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 845 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 846 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 847 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 848 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 849 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 850 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 851 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 852 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 853 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 854 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 855 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 856 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 857 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 858 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 859 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 860 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 861 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 862 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 863 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 864 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 865 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 866 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 867 // CHECK3: cond.true: 868 // CHECK3-NEXT: br label [[COND_END:%.*]] 869 // CHECK3: cond.false: 870 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 871 // CHECK3-NEXT: br label [[COND_END]] 872 // CHECK3: cond.end: 873 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 874 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 875 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 876 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 877 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 878 // CHECK3: omp.inner.for.cond: 879 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 880 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 881 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 882 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 883 // CHECK3: omp.inner.for.body: 884 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 885 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 886 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], i32 [[TMP10]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 887 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 888 // CHECK3: omp.inner.for.inc: 889 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 890 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 891 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 892 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 893 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 894 // CHECK3: omp.inner.for.end: 895 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 896 // CHECK3: omp.loop.exit: 897 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 898 // CHECK3-NEXT: ret void 899 // 900 // 901 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 902 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 903 // CHECK3-NEXT: entry: 904 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 905 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 906 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 907 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 908 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 4 909 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 910 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 911 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 912 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 913 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 914 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 915 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 916 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 917 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 918 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 919 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 920 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 921 // CHECK3-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 4 922 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 923 // CHECK3-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 4 924 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 4 925 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 926 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 927 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 928 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 929 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_LB]], align 4 930 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4 931 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 932 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 933 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 934 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 935 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 936 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 937 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 938 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 939 // CHECK3: cond.true: 940 // CHECK3-NEXT: br label [[COND_END:%.*]] 941 // CHECK3: cond.false: 942 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 943 // CHECK3-NEXT: br label [[COND_END]] 944 // CHECK3: cond.end: 945 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 946 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 947 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 948 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 949 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 950 // CHECK3: omp.inner.for.cond: 951 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 952 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 953 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 954 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 955 // CHECK3: omp.inner.for.body: 956 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 957 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 958 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 959 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 960 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 961 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 962 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 963 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 964 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 965 // CHECK3: omp.body.continue: 966 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 967 // CHECK3: omp.inner.for.inc: 968 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 969 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1 970 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 971 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 972 // CHECK3: omp.inner.for.end: 973 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 974 // CHECK3: omp.loop.exit: 975 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 976 // CHECK3-NEXT: ret void 977 // 978 // 979 // CHECK3-LABEL: define {{[^@]+}}@_ZTW1x 980 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] comdat { 981 // CHECK3-NEXT: ret i32* @x 982 // 983 // 984 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 985 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] { 986 // CHECK3-NEXT: entry: 987 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 988 // CHECK3-NEXT: ret void 989 // 990 // 991 // CHECK9-LABEL: define {{[^@]+}}@main 992 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 993 // CHECK9-NEXT: entry: 994 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 995 // CHECK9-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 996 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 997 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 998 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 999 // CHECK9-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[TMP0]], align 8 1000 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 1001 // CHECK9-NEXT: ret i32 0 1002 // 1003 // 1004 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l46 1005 // CHECK9-SAME: (i64 noundef [[X:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1006 // CHECK9-NEXT: entry: 1007 // CHECK9-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 1008 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 1009 // CHECK9-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 1010 // CHECK9-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 1011 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 1012 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 1013 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]]) 1014 // CHECK9-NEXT: ret void 1015 // 1016 // 1017 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1018 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] { 1019 // CHECK9-NEXT: entry: 1020 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1021 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1022 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 1023 // CHECK9-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 1024 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1025 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1026 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1027 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1028 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1029 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1030 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1031 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1032 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1033 // CHECK9-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 1034 // CHECK9-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 1035 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 1036 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 1037 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1038 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1039 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1040 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1041 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1042 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1043 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1044 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1045 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1046 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1047 // CHECK9: cond.true: 1048 // CHECK9-NEXT: br label [[COND_END:%.*]] 1049 // CHECK9: cond.false: 1050 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1051 // CHECK9-NEXT: br label [[COND_END]] 1052 // CHECK9: cond.end: 1053 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1054 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1055 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1056 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1057 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1058 // CHECK9: omp.inner.for.cond: 1059 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1060 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1061 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1062 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1063 // CHECK9: omp.inner.for.body: 1064 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1065 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1066 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1067 // CHECK9-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 1068 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], [2 x i32]* [[TMP0]], i32* [[TMP1]]) 1069 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1070 // CHECK9: omp.inner.for.inc: 1071 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1072 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1073 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1074 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1075 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1076 // CHECK9: omp.inner.for.end: 1077 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1078 // CHECK9: omp.loop.exit: 1079 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1080 // CHECK9-NEXT: ret void 1081 // 1082 // 1083 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1084 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] { 1085 // CHECK9-NEXT: entry: 1086 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1087 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1088 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1089 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1090 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [2 x i32]*, align 8 1091 // CHECK9-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 1092 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1093 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1094 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1095 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1096 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1097 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1098 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1099 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1100 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1101 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1102 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1103 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1104 // CHECK9-NEXT: store [2 x i32]* [[A]], [2 x i32]** [[A_ADDR]], align 8 1105 // CHECK9-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 1106 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[A_ADDR]], align 8 1107 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X_ADDR]], align 8 1108 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1109 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1110 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1111 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP2]] to i32 1112 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1113 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32 1114 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1115 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1116 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1117 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1118 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1119 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1120 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1121 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1122 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1123 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1124 // CHECK9: cond.true: 1125 // CHECK9-NEXT: br label [[COND_END:%.*]] 1126 // CHECK9: cond.false: 1127 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1128 // CHECK9-NEXT: br label [[COND_END]] 1129 // CHECK9: cond.end: 1130 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1131 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1132 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1133 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1134 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1135 // CHECK9: omp.inner.for.cond: 1136 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1137 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1138 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1139 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1140 // CHECK9: omp.inner.for.body: 1141 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1142 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1143 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1144 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1145 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 1146 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1147 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1148 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1149 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 1150 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1151 // CHECK9-NEXT: store [2 x i32]* [[TMP0]], [2 x i32]** [[TMP14]], align 8 1152 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1153 // CHECK9-NEXT: store i32* [[I]], i32** [[TMP15]], align 8 1154 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1155 // CHECK9-NEXT: store i32* [[TMP1]], i32** [[TMP16]], align 8 1156 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) 1157 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1158 // CHECK9: omp.body.continue: 1159 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1160 // CHECK9: omp.inner.for.inc: 1161 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1162 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 1163 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1164 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1165 // CHECK9: omp.inner.for.end: 1166 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1167 // CHECK9: omp.loop.exit: 1168 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1169 // CHECK9-NEXT: ret void 1170 // 1171 // 1172 // CHECK9-LABEL: define {{[^@]+}}@_ZTW1x 1173 // CHECK9-SAME: () #[[ATTR4:[0-9]+]] comdat { 1174 // CHECK9-NEXT: ret i32* @x 1175 // 1176 // 1177 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1178 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] { 1179 // CHECK9-NEXT: entry: 1180 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1181 // CHECK9-NEXT: ret void 1182 // 1183