1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X][Y]; 25 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute parallel for collapse(2) 30 for(int i = 0; i < X; i++) { 31 for(int j = 0; j < Y; j++) { 32 a[i][j] = (T)0; 33 } 34 } 35 36 // discard loop variables not needed here 37 38 39 return a[0][0]; 40 } 41 }; 42 43 int teams_template_struct(void) { 44 SS<int, 123, 456> V; 45 return V.foo(); 46 47 } 48 #endif // CK1 49 50 // Test host codegen. 51 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 52 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 53 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 54 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 56 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 57 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 64 #ifdef CK2 65 66 template <typename T, int n, int m> 67 int tmain(T argc) { 68 T a[n][m]; 69 #pragma omp target 70 #pragma omp teams distribute parallel for collapse(2) 71 for(int i = 0; i < n; i++) { 72 for(int j = 0; j < m; j++) { 73 a[i][j] = (T)0; 74 } 75 } 76 return 0; 77 } 78 79 int main (int argc, char **argv) { 80 int n = 100; 81 int m = 2; 82 int a[n][m]; 83 #pragma omp target 84 #pragma omp teams distribute parallel for collapse(2) 85 for(int i = 0; i < n; i++) { 86 for(int j = 0; j < m; j++) { 87 a[i][j] = 0; 88 } 89 } 90 return tmain<int, 10, 2>(argc); 91 } 92 93 94 95 96 97 98 99 100 // discard loop variables not needed here 101 102 103 #endif // CK2 104 #endif // #ifndef HEADER 105 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 106 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 107 // CHECK1-NEXT: entry: 108 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 109 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 110 // CHECK1-NEXT: ret i32 [[CALL]] 111 // 112 // 113 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 114 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 115 // CHECK1-NEXT: entry: 116 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 117 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 118 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 119 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 120 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 121 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 122 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 123 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 124 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 125 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 126 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 127 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 128 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 129 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 130 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8 131 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 132 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 133 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 134 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 135 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088) 136 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 137 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 138 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 139 // CHECK1: omp_offload.failed: 140 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 141 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 142 // CHECK1: omp_offload.cont: 143 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 144 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0 145 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0 146 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 147 // CHECK1-NEXT: ret i32 [[TMP9]] 148 // 149 // 150 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 151 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 152 // CHECK1-NEXT: entry: 153 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 154 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 155 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 156 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 157 // CHECK1-NEXT: ret void 158 // 159 // 160 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 161 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 162 // CHECK1-NEXT: entry: 163 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 164 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 165 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 166 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 168 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 169 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 171 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 172 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 173 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 174 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 175 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 176 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 177 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 178 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 179 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 180 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 181 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 182 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 183 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 184 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 185 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 186 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 187 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 188 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 189 // CHECK1: cond.true: 190 // CHECK1-NEXT: br label [[COND_END:%.*]] 191 // CHECK1: cond.false: 192 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 193 // CHECK1-NEXT: br label [[COND_END]] 194 // CHECK1: cond.end: 195 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 196 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 197 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 198 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 199 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 200 // CHECK1: omp.inner.for.cond: 201 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 202 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 203 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 204 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 205 // CHECK1: omp.inner.for.body: 206 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 207 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 208 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 209 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 210 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 211 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 212 // CHECK1: omp.inner.for.inc: 213 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 214 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 215 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 216 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 217 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 218 // CHECK1: omp.inner.for.end: 219 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 220 // CHECK1: omp.loop.exit: 221 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 222 // CHECK1-NEXT: ret void 223 // 224 // 225 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 226 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 227 // CHECK1-NEXT: entry: 228 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 229 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 230 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 231 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 232 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 233 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 236 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 237 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 238 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 239 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 243 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 244 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 245 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 246 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 247 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 248 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 249 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 250 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 251 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 252 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 253 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 254 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 255 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 256 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 257 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 258 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 259 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 260 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 261 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 262 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 263 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 264 // CHECK1: cond.true: 265 // CHECK1-NEXT: br label [[COND_END:%.*]] 266 // CHECK1: cond.false: 267 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 268 // CHECK1-NEXT: br label [[COND_END]] 269 // CHECK1: cond.end: 270 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 271 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 272 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 273 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 274 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 275 // CHECK1: omp.inner.for.cond: 276 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 277 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 278 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 279 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 280 // CHECK1: omp.inner.for.body: 281 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 282 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 283 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 284 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 285 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 286 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 287 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 288 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456 289 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456 290 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 291 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 292 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 293 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 294 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 295 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 296 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 297 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 298 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 299 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 300 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 301 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 302 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 303 // CHECK1: omp.body.continue: 304 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 305 // CHECK1: omp.inner.for.inc: 306 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 307 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 308 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 309 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 310 // CHECK1: omp.inner.for.end: 311 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 312 // CHECK1: omp.loop.exit: 313 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 314 // CHECK1-NEXT: ret void 315 // 316 // 317 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 318 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 319 // CHECK1-NEXT: entry: 320 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 321 // CHECK1-NEXT: ret void 322 // 323 // 324 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 325 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 326 // CHECK3-NEXT: entry: 327 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 328 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 329 // CHECK3-NEXT: ret i32 [[CALL]] 330 // 331 // 332 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 333 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 334 // CHECK3-NEXT: entry: 335 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 336 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 337 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 338 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 339 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 340 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 341 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 342 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 343 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 344 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 345 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 346 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 347 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 348 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 349 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4 350 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 351 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 352 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 353 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 354 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088) 355 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 356 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 357 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 358 // CHECK3: omp_offload.failed: 359 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 360 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 361 // CHECK3: omp_offload.cont: 362 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 363 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0 364 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0 365 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 366 // CHECK3-NEXT: ret i32 [[TMP9]] 367 // 368 // 369 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 370 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 371 // CHECK3-NEXT: entry: 372 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 373 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 374 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 375 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 376 // CHECK3-NEXT: ret void 377 // 378 // 379 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 380 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 381 // CHECK3-NEXT: entry: 382 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 383 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 384 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 385 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 386 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 387 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 388 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 389 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 390 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 391 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 392 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 393 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 394 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 395 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 396 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 397 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 398 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 399 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 400 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 401 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 402 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 403 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 404 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 405 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 406 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 407 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 408 // CHECK3: cond.true: 409 // CHECK3-NEXT: br label [[COND_END:%.*]] 410 // CHECK3: cond.false: 411 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 412 // CHECK3-NEXT: br label [[COND_END]] 413 // CHECK3: cond.end: 414 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 415 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 416 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 417 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 418 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 419 // CHECK3: omp.inner.for.cond: 420 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 421 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 422 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 423 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 424 // CHECK3: omp.inner.for.body: 425 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 426 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 427 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 428 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 429 // CHECK3: omp.inner.for.inc: 430 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 431 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 432 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 433 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 434 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 435 // CHECK3: omp.inner.for.end: 436 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 437 // CHECK3: omp.loop.exit: 438 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 439 // CHECK3-NEXT: ret void 440 // 441 // 442 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 443 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 444 // CHECK3-NEXT: entry: 445 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 446 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 447 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 448 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 449 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 450 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 451 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 452 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 453 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 454 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 455 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 456 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 457 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 458 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 459 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 460 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 461 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 462 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 463 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 464 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 465 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 466 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 467 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 468 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 469 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 470 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 471 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 472 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 473 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 474 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 475 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 476 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 477 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 478 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 479 // CHECK3: cond.true: 480 // CHECK3-NEXT: br label [[COND_END:%.*]] 481 // CHECK3: cond.false: 482 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 483 // CHECK3-NEXT: br label [[COND_END]] 484 // CHECK3: cond.end: 485 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 486 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 487 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 488 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 489 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 490 // CHECK3: omp.inner.for.cond: 491 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 492 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 493 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 494 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 495 // CHECK3: omp.inner.for.body: 496 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 497 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 498 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 499 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 500 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 501 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 502 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 503 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456 504 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 505 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 506 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 507 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 508 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 509 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 510 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 511 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]] 512 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 513 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 514 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 515 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 516 // CHECK3: omp.body.continue: 517 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 518 // CHECK3: omp.inner.for.inc: 519 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 520 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 521 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 522 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 523 // CHECK3: omp.inner.for.end: 524 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 525 // CHECK3: omp.loop.exit: 526 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 527 // CHECK3-NEXT: ret void 528 // 529 // 530 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 531 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 532 // CHECK3-NEXT: entry: 533 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 534 // CHECK3-NEXT: ret void 535 // 536 // 537 // CHECK9-LABEL: define {{[^@]+}}@main 538 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 539 // CHECK9-NEXT: entry: 540 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 541 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 542 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 543 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 544 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 545 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 546 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 547 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 548 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 549 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 550 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 551 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 552 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 553 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 554 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 555 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 556 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 557 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 558 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 559 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 560 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 561 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 562 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 563 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4 564 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 565 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 566 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4 567 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 568 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave() 569 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8 570 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 571 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 572 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 573 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 574 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4 575 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 576 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4 577 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8 578 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4 579 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32* 580 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4 581 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8 582 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 583 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 584 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 585 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP12]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes to i8*), i64 40, i1 false) 586 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 587 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64* 588 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP14]], align 8 589 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 590 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 591 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP16]], align 8 592 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 593 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8 594 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 595 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 596 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8 597 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 598 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 599 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8 600 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 601 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 602 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 603 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64* 604 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP24]], align 8 605 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 606 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 607 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP26]], align 8 608 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 609 // CHECK9-NEXT: store i8* null, i8** [[TMP27]], align 8 610 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 611 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 612 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP29]], align 8 613 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 614 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 615 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8 616 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 617 // CHECK9-NEXT: store i8* null, i8** [[TMP32]], align 8 618 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 619 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32** 620 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP34]], align 8 621 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 622 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32** 623 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 8 624 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 625 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP37]], align 8 626 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 627 // CHECK9-NEXT: store i8* null, i8** [[TMP38]], align 8 628 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 629 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 630 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 631 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[N]], align 4 632 // CHECK9-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_]], align 4 633 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 634 // CHECK9-NEXT: store i32 [[TMP43]], i32* [[DOTCAPTURE_EXPR_3]], align 4 635 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 636 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP44]], 0 637 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 638 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64 639 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 640 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP45]], 0 641 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 642 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 643 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]] 644 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 645 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8 646 // CHECK9-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8 647 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP46]], 1 648 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]]) 649 // CHECK9-NEXT: [[TMP47:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, i32 5, i8** [[TMP39]], i8** [[TMP40]], i64* [[TMP41]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 650 // CHECK9-NEXT: [[TMP48:%.*]] = icmp ne i32 [[TMP47]], 0 651 // CHECK9-NEXT: br i1 [[TMP48]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 652 // CHECK9: omp_offload.failed: 653 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 654 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 655 // CHECK9: omp_offload.cont: 656 // CHECK9-NEXT: [[TMP49:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 657 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP49]]) 658 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 659 // CHECK9-NEXT: [[TMP50:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 660 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP50]]) 661 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, i32* [[RETVAL]], align 4 662 // CHECK9-NEXT: ret i32 [[TMP51]] 663 // 664 // 665 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 666 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 667 // CHECK9-NEXT: entry: 668 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 669 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 670 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 671 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 672 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 673 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 674 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 675 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 676 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 677 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 678 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 679 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32* 680 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 681 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 682 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 683 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 684 // CHECK9-NEXT: ret void 685 // 686 // 687 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 688 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 689 // CHECK9-NEXT: entry: 690 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 691 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 692 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 693 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 694 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 695 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 696 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 697 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 698 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 699 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 700 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 701 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 702 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 703 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 704 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 705 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 706 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 707 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 708 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 709 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 710 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 711 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 712 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 713 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 714 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 715 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 716 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 717 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 718 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 719 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 720 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 721 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 722 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 723 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 724 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 725 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 726 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 727 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 728 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 729 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 730 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 731 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 732 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 733 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 734 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 735 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 736 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 737 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 738 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 739 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4 740 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 741 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 742 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 743 // CHECK9: land.lhs.true: 744 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 745 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 746 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 747 // CHECK9: omp.precond.then: 748 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 749 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 750 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 751 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 752 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 753 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 754 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 755 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 756 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 757 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 758 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 759 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 760 // CHECK9: cond.true: 761 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 762 // CHECK9-NEXT: br label [[COND_END:%.*]] 763 // CHECK9: cond.false: 764 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 765 // CHECK9-NEXT: br label [[COND_END]] 766 // CHECK9: cond.end: 767 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 768 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 769 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 770 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 771 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 772 // CHECK9: omp.inner.for.cond: 773 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 774 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 775 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 776 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 777 // CHECK9: omp.inner.for.body: 778 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 779 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 780 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP22]], i32* [[TMP0]], i32* [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], i32* [[TMP4]]) 781 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 782 // CHECK9: omp.inner.for.inc: 783 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 784 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 785 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]] 786 // CHECK9-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 787 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 788 // CHECK9: omp.inner.for.end: 789 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 790 // CHECK9: omp.loop.exit: 791 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 792 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 793 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 794 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 795 // CHECK9: omp.precond.end: 796 // CHECK9-NEXT: ret void 797 // 798 // 799 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 800 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 801 // CHECK9-NEXT: entry: 802 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 803 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 804 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 805 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 806 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 807 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 808 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 809 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 810 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 811 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 812 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 813 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 814 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 815 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 816 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 817 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 818 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 819 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 820 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 821 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 822 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 823 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 824 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 825 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 826 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 827 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 828 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 829 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 830 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 831 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 832 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 833 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 834 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 835 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 836 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 837 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 838 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 839 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 840 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 841 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 842 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 843 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 844 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 845 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 846 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 847 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 848 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 849 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 850 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 851 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 852 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 853 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 854 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 855 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4 856 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 857 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 858 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 859 // CHECK9: land.lhs.true: 860 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 861 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 862 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 863 // CHECK9: omp.precond.then: 864 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 865 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 866 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 867 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 868 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 869 // CHECK9-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_LB]], align 8 870 // CHECK9-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_UB]], align 8 871 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 872 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 873 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 874 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 875 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 876 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 877 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 878 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 879 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 880 // CHECK9: cond.true: 881 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 882 // CHECK9-NEXT: br label [[COND_END:%.*]] 883 // CHECK9: cond.false: 884 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 885 // CHECK9-NEXT: br label [[COND_END]] 886 // CHECK9: cond.end: 887 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 888 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 889 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 890 // CHECK9-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 891 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 892 // CHECK9: omp.inner.for.cond: 893 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 894 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 895 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 896 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 897 // CHECK9: omp.inner.for.body: 898 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 899 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 900 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0 901 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 902 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 903 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 904 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]] 905 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 906 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 907 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 908 // CHECK9-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4 909 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 910 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 911 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 912 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0 913 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 914 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 915 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 916 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]] 917 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 918 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0 919 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 920 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 921 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 922 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 923 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]] 924 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 925 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 926 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 927 // CHECK9-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4 928 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[I11]], align 4 929 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64 930 // CHECK9-NEXT: [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 931 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP30]] 932 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[J12]], align 4 933 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64 934 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]] 935 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4 936 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 937 // CHECK9: omp.body.continue: 938 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 939 // CHECK9: omp.inner.for.inc: 940 // CHECK9-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 941 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1 942 // CHECK9-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8 943 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 944 // CHECK9: omp.inner.for.end: 945 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 946 // CHECK9: omp.loop.exit: 947 // CHECK9-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 948 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 949 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 950 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 951 // CHECK9: omp.precond.end: 952 // CHECK9-NEXT: ret void 953 // 954 // 955 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 956 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 957 // CHECK9-NEXT: entry: 958 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 959 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 960 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 961 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 962 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 963 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 964 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 965 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 966 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 967 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 968 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8 969 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 970 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 971 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8 972 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 973 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 974 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 975 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 976 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20) 977 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 978 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 979 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 980 // CHECK9: omp_offload.failed: 981 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 982 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 983 // CHECK9: omp_offload.cont: 984 // CHECK9-NEXT: ret i32 0 985 // 986 // 987 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 988 // CHECK9-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 989 // CHECK9-NEXT: entry: 990 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 991 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 992 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 993 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 994 // CHECK9-NEXT: ret void 995 // 996 // 997 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 998 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 999 // CHECK9-NEXT: entry: 1000 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1001 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1002 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1003 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1004 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1005 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1006 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1007 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1008 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1009 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1010 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1011 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1012 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1013 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1014 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1015 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1016 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1017 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 1018 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1019 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1020 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1021 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1022 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1023 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1024 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1025 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1026 // CHECK9: cond.true: 1027 // CHECK9-NEXT: br label [[COND_END:%.*]] 1028 // CHECK9: cond.false: 1029 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1030 // CHECK9-NEXT: br label [[COND_END]] 1031 // CHECK9: cond.end: 1032 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1033 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1034 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1035 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1036 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1037 // CHECK9: omp.inner.for.cond: 1038 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1039 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1040 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1041 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1042 // CHECK9: omp.inner.for.body: 1043 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1044 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1045 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1046 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1047 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]]) 1048 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1049 // CHECK9: omp.inner.for.inc: 1050 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1051 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1052 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1053 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1054 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1055 // CHECK9: omp.inner.for.end: 1056 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1057 // CHECK9: omp.loop.exit: 1058 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1059 // CHECK9-NEXT: ret void 1060 // 1061 // 1062 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 1063 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1064 // CHECK9-NEXT: entry: 1065 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1066 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1067 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1068 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1069 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1070 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1071 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1072 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1073 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1074 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1075 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1076 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1077 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1078 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1079 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1080 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1081 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1082 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1083 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1084 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1085 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1086 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 1087 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1088 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1089 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1090 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 1091 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1092 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1093 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1094 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1095 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1096 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1097 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1098 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1099 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 1100 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1101 // CHECK9: cond.true: 1102 // CHECK9-NEXT: br label [[COND_END:%.*]] 1103 // CHECK9: cond.false: 1104 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1105 // CHECK9-NEXT: br label [[COND_END]] 1106 // CHECK9: cond.end: 1107 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1108 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1109 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1110 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1111 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1112 // CHECK9: omp.inner.for.cond: 1113 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1114 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1115 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1116 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1117 // CHECK9: omp.inner.for.body: 1118 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1119 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 1120 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1121 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1122 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1123 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1124 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1125 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2 1126 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2 1127 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 1128 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 1129 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 1130 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 1131 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1132 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1133 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1134 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 1135 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 1136 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 1137 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 1138 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1139 // CHECK9: omp.body.continue: 1140 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1141 // CHECK9: omp.inner.for.inc: 1142 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1143 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 1144 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 1145 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1146 // CHECK9: omp.inner.for.end: 1147 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1148 // CHECK9: omp.loop.exit: 1149 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1150 // CHECK9-NEXT: ret void 1151 // 1152 // 1153 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1154 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1155 // CHECK9-NEXT: entry: 1156 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1157 // CHECK9-NEXT: ret void 1158 // 1159 // 1160 // CHECK11-LABEL: define {{[^@]+}}@main 1161 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1162 // CHECK11-NEXT: entry: 1163 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1164 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1165 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 1166 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 1167 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 1168 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 1169 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 1170 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 1171 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1172 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 1173 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 1174 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 1175 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 1176 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 1177 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1178 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1179 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1180 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1181 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 1182 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1183 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1184 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 1185 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 1186 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4 1187 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1188 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4 1189 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1190 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 1191 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 1192 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 1193 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 1194 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4 1195 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 1196 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 1197 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 1198 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4 1199 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4 1200 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4 1201 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 1202 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 1203 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 1204 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1205 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes to i8*), i32 40, i1 false) 1206 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1207 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 1208 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP13]], align 4 1209 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1210 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 1211 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 1212 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1213 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 1214 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1215 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 1216 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4 1217 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1218 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 1219 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4 1220 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1221 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 1222 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1223 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 1224 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4 1225 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1226 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 1227 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4 1228 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1229 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 1230 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1231 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 1232 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP28]], align 4 1233 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1234 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 1235 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4 1236 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1237 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4 1238 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1239 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32** 1240 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP33]], align 4 1241 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1242 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32** 1243 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP35]], align 4 1244 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 1245 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP36]], align 4 1246 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 1247 // CHECK11-NEXT: store i8* null, i8** [[TMP37]], align 4 1248 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1249 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1250 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1251 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4 1252 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[DOTCAPTURE_EXPR_]], align 4 1253 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[M]], align 4 1254 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1255 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1256 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP43]], 0 1257 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1258 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1259 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1260 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP44]], 0 1261 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 1262 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 1263 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 1264 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 1265 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8 1266 // CHECK11-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8 1267 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP45]], 1 1268 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]]) 1269 // CHECK11-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, i32 5, i8** [[TMP38]], i8** [[TMP39]], i64* [[TMP40]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1270 // CHECK11-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 1271 // CHECK11-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1272 // CHECK11: omp_offload.failed: 1273 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1274 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1275 // CHECK11: omp_offload.cont: 1276 // CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1277 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP48]]) 1278 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1279 // CHECK11-NEXT: [[TMP49:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 1280 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP49]]) 1281 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, i32* [[RETVAL]], align 4 1282 // CHECK11-NEXT: ret i32 [[TMP50]] 1283 // 1284 // 1285 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 1286 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1287 // CHECK11-NEXT: entry: 1288 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1289 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 1290 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1291 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1292 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1293 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1294 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 1295 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 1296 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 1297 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1298 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 1299 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 1300 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1301 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 1302 // CHECK11-NEXT: ret void 1303 // 1304 // 1305 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 1306 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1307 // CHECK11-NEXT: entry: 1308 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1309 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1310 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1311 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 1312 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1313 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1314 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1315 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1316 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1317 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1318 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1319 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1320 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1321 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1322 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1323 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 1324 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 1325 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1326 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1327 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4 1328 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4 1329 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1330 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1331 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1332 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 1333 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 1334 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 1335 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1336 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1337 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 1338 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 1339 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 1340 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1341 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1342 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1343 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1344 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1345 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1346 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1347 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1348 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1349 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1350 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1351 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1352 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1353 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1354 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1355 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1356 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 1357 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4 1358 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1359 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1360 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1361 // CHECK11: land.lhs.true: 1362 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1363 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1364 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1365 // CHECK11: omp.precond.then: 1366 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 1367 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1368 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 1369 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1370 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1371 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1372 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1373 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1374 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1375 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1376 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 1377 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1378 // CHECK11: cond.true: 1379 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1380 // CHECK11-NEXT: br label [[COND_END:%.*]] 1381 // CHECK11: cond.false: 1382 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1383 // CHECK11-NEXT: br label [[COND_END]] 1384 // CHECK11: cond.end: 1385 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1386 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 1387 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 1388 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 1389 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1390 // CHECK11: omp.inner.for.cond: 1391 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1392 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1393 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 1394 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1395 // CHECK11: omp.inner.for.body: 1396 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 1397 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32 1398 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1399 // CHECK11-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32 1400 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP24]], i32* [[TMP0]], i32* [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], i32* [[TMP4]]) 1401 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1402 // CHECK11: omp.inner.for.inc: 1403 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1404 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 1405 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]] 1406 // CHECK11-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 1407 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1408 // CHECK11: omp.inner.for.end: 1409 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1410 // CHECK11: omp.loop.exit: 1411 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1412 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 1413 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 1414 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1415 // CHECK11: omp.precond.end: 1416 // CHECK11-NEXT: ret void 1417 // 1418 // 1419 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 1420 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1421 // CHECK11-NEXT: entry: 1422 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1423 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1424 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1425 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1426 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1427 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 1428 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1429 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1430 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1431 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1432 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1433 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1434 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1435 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1436 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1437 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1438 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1439 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 1440 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 1441 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1442 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1443 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4 1444 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4 1445 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1446 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1447 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1448 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1449 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1450 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 1451 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 1452 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 1453 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1454 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1455 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 1456 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 1457 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 1458 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1459 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1460 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1461 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1462 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1463 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1464 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1465 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1466 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1467 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1468 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1469 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1470 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1471 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1472 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1473 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1474 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 1475 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4 1476 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1477 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1478 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1479 // CHECK11: land.lhs.true: 1480 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1481 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1482 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1483 // CHECK11: omp.precond.then: 1484 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 1485 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1486 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 1487 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1488 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP12]] to i64 1489 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1490 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP13]] to i64 1491 // CHECK11-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8 1492 // CHECK11-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8 1493 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1494 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1495 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1496 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1497 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1498 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1499 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1500 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 1501 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1502 // CHECK11: cond.true: 1503 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1504 // CHECK11-NEXT: br label [[COND_END:%.*]] 1505 // CHECK11: cond.false: 1506 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1507 // CHECK11-NEXT: br label [[COND_END]] 1508 // CHECK11: cond.end: 1509 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 1510 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 1511 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 1512 // CHECK11-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 1513 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1514 // CHECK11: omp.inner.for.cond: 1515 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1516 // CHECK11-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1517 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 1518 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1519 // CHECK11: omp.inner.for.body: 1520 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1521 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1522 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 0 1523 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 1524 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]] 1525 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64 1526 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]] 1527 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1 1528 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]] 1529 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32 1530 // CHECK11-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4 1531 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1532 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1533 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1534 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 0 1535 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 1536 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]] 1537 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64 1538 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]] 1539 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1540 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 0 1541 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 1542 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]] 1543 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64 1544 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]] 1545 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]] 1546 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1 1547 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]] 1548 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32 1549 // CHECK11-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4 1550 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[I13]], align 4 1551 // CHECK11-NEXT: [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]] 1552 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP30]] 1553 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[J14]], align 4 1554 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP31]] 1555 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4 1556 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1557 // CHECK11: omp.body.continue: 1558 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1559 // CHECK11: omp.inner.for.inc: 1560 // CHECK11-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1561 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP32]], 1 1562 // CHECK11-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8 1563 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1564 // CHECK11: omp.inner.for.end: 1565 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1566 // CHECK11: omp.loop.exit: 1567 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1568 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1569 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1570 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1571 // CHECK11: omp.precond.end: 1572 // CHECK11-NEXT: ret void 1573 // 1574 // 1575 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1576 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1577 // CHECK11-NEXT: entry: 1578 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1579 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1580 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1581 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1582 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1583 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1584 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1585 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1586 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1587 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 1588 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4 1589 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1590 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 1591 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4 1592 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1593 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 1594 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1595 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1596 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20) 1597 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1598 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1599 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1600 // CHECK11: omp_offload.failed: 1601 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 1602 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1603 // CHECK11: omp_offload.cont: 1604 // CHECK11-NEXT: ret i32 0 1605 // 1606 // 1607 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 1608 // CHECK11-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1609 // CHECK11-NEXT: entry: 1610 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 1611 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 1612 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 1613 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 1614 // CHECK11-NEXT: ret void 1615 // 1616 // 1617 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 1618 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1619 // CHECK11-NEXT: entry: 1620 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1621 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1622 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 1623 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1624 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1625 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1626 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1627 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1628 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1629 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1630 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1631 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1632 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1633 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1634 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 1635 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 1636 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1637 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 1638 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1639 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1640 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1641 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1642 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1643 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1644 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1645 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1646 // CHECK11: cond.true: 1647 // CHECK11-NEXT: br label [[COND_END:%.*]] 1648 // CHECK11: cond.false: 1649 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1650 // CHECK11-NEXT: br label [[COND_END]] 1651 // CHECK11: cond.end: 1652 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1653 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1654 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1655 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1656 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1657 // CHECK11: omp.inner.for.cond: 1658 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1659 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1660 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1661 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1662 // CHECK11: omp.inner.for.body: 1663 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1664 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1665 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]]) 1666 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1667 // CHECK11: omp.inner.for.inc: 1668 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1669 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1670 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1671 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1672 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1673 // CHECK11: omp.inner.for.end: 1674 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1675 // CHECK11: omp.loop.exit: 1676 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1677 // CHECK11-NEXT: ret void 1678 // 1679 // 1680 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 1681 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1682 // CHECK11-NEXT: entry: 1683 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1684 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1685 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1686 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1687 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 1688 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1689 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1690 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1691 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1692 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1693 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1694 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1695 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1696 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1697 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1698 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1699 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1700 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1701 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 1702 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 1703 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1704 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 1705 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1706 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1707 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1708 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1709 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1710 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1711 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1712 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1713 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1714 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1715 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 1716 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1717 // CHECK11: cond.true: 1718 // CHECK11-NEXT: br label [[COND_END:%.*]] 1719 // CHECK11: cond.false: 1720 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1721 // CHECK11-NEXT: br label [[COND_END]] 1722 // CHECK11: cond.end: 1723 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1724 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1725 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1726 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1727 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1728 // CHECK11: omp.inner.for.cond: 1729 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1730 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1731 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1732 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1733 // CHECK11: omp.inner.for.body: 1734 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1735 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 1736 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1737 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1738 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1739 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1740 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1741 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2 1742 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 1743 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 1744 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 1745 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 1746 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 1747 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1748 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]] 1749 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 1750 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 1751 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 1752 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1753 // CHECK11: omp.body.continue: 1754 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1755 // CHECK11: omp.inner.for.inc: 1756 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1757 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 1758 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1759 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1760 // CHECK11: omp.inner.for.end: 1761 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1762 // CHECK11: omp.loop.exit: 1763 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1764 // CHECK11-NEXT: ret void 1765 // 1766 // 1767 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1768 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 1769 // CHECK11-NEXT: entry: 1770 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 1771 // CHECK11-NEXT: ret void 1772 // 1773